Commit | Line | Data |
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5ead97c8 JF |
1 | /* |
2 | * Core of Xen paravirt_ops implementation. | |
3 | * | |
4 | * This file contains the xen_paravirt_ops structure itself, and the | |
5 | * implementations for: | |
6 | * - privileged instructions | |
7 | * - interrupt flags | |
8 | * - segment operations | |
9 | * - booting and setup | |
10 | * | |
11 | * Jeremy Fitzhardinge <jeremy@xensource.com>, XenSource Inc, 2007 | |
12 | */ | |
13 | ||
38e20b07 | 14 | #include <linux/cpu.h> |
5ead97c8 JF |
15 | #include <linux/kernel.h> |
16 | #include <linux/init.h> | |
17 | #include <linux/smp.h> | |
18 | #include <linux/preempt.h> | |
f120f13e | 19 | #include <linux/hardirq.h> |
5ead97c8 JF |
20 | #include <linux/percpu.h> |
21 | #include <linux/delay.h> | |
22 | #include <linux/start_kernel.h> | |
23 | #include <linux/sched.h> | |
6cac5a92 | 24 | #include <linux/kprobes.h> |
5ead97c8 JF |
25 | #include <linux/bootmem.h> |
26 | #include <linux/module.h> | |
f4f97b3e JF |
27 | #include <linux/mm.h> |
28 | #include <linux/page-flags.h> | |
29 | #include <linux/highmem.h> | |
b8c2d3df | 30 | #include <linux/console.h> |
5d990b62 | 31 | #include <linux/pci.h> |
5a0e3ad6 | 32 | #include <linux/gfp.h> |
236260b9 | 33 | #include <linux/memblock.h> |
96f28bc6 | 34 | #include <linux/edd.h> |
5ead97c8 | 35 | |
1ccbf534 | 36 | #include <xen/xen.h> |
0ec53ecf | 37 | #include <xen/events.h> |
5ead97c8 | 38 | #include <xen/interface/xen.h> |
ecbf29cd | 39 | #include <xen/interface/version.h> |
5ead97c8 JF |
40 | #include <xen/interface/physdev.h> |
41 | #include <xen/interface/vcpu.h> | |
bee6ab53 | 42 | #include <xen/interface/memory.h> |
cef12ee5 | 43 | #include <xen/interface/xen-mca.h> |
5ead97c8 JF |
44 | #include <xen/features.h> |
45 | #include <xen/page.h> | |
38e20b07 | 46 | #include <xen/hvm.h> |
084a2a4e | 47 | #include <xen/hvc-console.h> |
211063dc | 48 | #include <xen/acpi.h> |
5ead97c8 JF |
49 | |
50 | #include <asm/paravirt.h> | |
7b6aa335 | 51 | #include <asm/apic.h> |
5ead97c8 | 52 | #include <asm/page.h> |
b5401a96 | 53 | #include <asm/xen/pci.h> |
5ead97c8 JF |
54 | #include <asm/xen/hypercall.h> |
55 | #include <asm/xen/hypervisor.h> | |
56 | #include <asm/fixmap.h> | |
57 | #include <asm/processor.h> | |
707ebbc8 | 58 | #include <asm/proto.h> |
1153968a | 59 | #include <asm/msr-index.h> |
6cac5a92 | 60 | #include <asm/traps.h> |
5ead97c8 JF |
61 | #include <asm/setup.h> |
62 | #include <asm/desc.h> | |
817a824b | 63 | #include <asm/pgalloc.h> |
5ead97c8 | 64 | #include <asm/pgtable.h> |
f87e4cac | 65 | #include <asm/tlbflush.h> |
fefa629a | 66 | #include <asm/reboot.h> |
577eebea | 67 | #include <asm/stackprotector.h> |
bee6ab53 | 68 | #include <asm/hypervisor.h> |
73c154c6 | 69 | #include <asm/mwait.h> |
76a8df7b | 70 | #include <asm/pci_x86.h> |
c79c4982 | 71 | #include <asm/pat.h> |
73c154c6 KRW |
72 | |
73 | #ifdef CONFIG_ACPI | |
74 | #include <linux/acpi.h> | |
75 | #include <asm/acpi.h> | |
76 | #include <acpi/pdc_intel.h> | |
77 | #include <acpi/processor.h> | |
78 | #include <xen/interface/platform.h> | |
79 | #endif | |
5ead97c8 JF |
80 | |
81 | #include "xen-ops.h" | |
3b827c1b | 82 | #include "mmu.h" |
f447d56d | 83 | #include "smp.h" |
5ead97c8 JF |
84 | #include "multicalls.h" |
85 | ||
86 | EXPORT_SYMBOL_GPL(hypercall_page); | |
87 | ||
5ead97c8 JF |
88 | DEFINE_PER_CPU(struct vcpu_info *, xen_vcpu); |
89 | DEFINE_PER_CPU(struct vcpu_info, xen_vcpu_info); | |
9f79991d | 90 | |
6e833587 JF |
91 | enum xen_domain_type xen_domain_type = XEN_NATIVE; |
92 | EXPORT_SYMBOL_GPL(xen_domain_type); | |
93 | ||
7e77506a IC |
94 | unsigned long *machine_to_phys_mapping = (void *)MACH2PHYS_VIRT_START; |
95 | EXPORT_SYMBOL(machine_to_phys_mapping); | |
ccbcdf7c JB |
96 | unsigned long machine_to_phys_nr; |
97 | EXPORT_SYMBOL(machine_to_phys_nr); | |
7e77506a | 98 | |
5ead97c8 JF |
99 | struct start_info *xen_start_info; |
100 | EXPORT_SYMBOL_GPL(xen_start_info); | |
101 | ||
a0d695c8 | 102 | struct shared_info xen_dummy_shared_info; |
60223a32 | 103 | |
38341432 JF |
104 | void *xen_initial_gdt; |
105 | ||
bee6ab53 | 106 | RESERVE_BRK(shared_info_page_brk, PAGE_SIZE); |
38e20b07 SY |
107 | __read_mostly int xen_have_vector_callback; |
108 | EXPORT_SYMBOL_GPL(xen_have_vector_callback); | |
bee6ab53 | 109 | |
60223a32 JF |
110 | /* |
111 | * Point at some empty memory to start with. We map the real shared_info | |
112 | * page as soon as fixmap is up and running. | |
113 | */ | |
4648da7c | 114 | struct shared_info *HYPERVISOR_shared_info = &xen_dummy_shared_info; |
60223a32 JF |
115 | |
116 | /* | |
117 | * Flag to determine whether vcpu info placement is available on all | |
118 | * VCPUs. We assume it is to start with, and then set it to zero on | |
119 | * the first failure. This is because it can succeed on some VCPUs | |
120 | * and not others, since it can involve hypervisor memory allocation, | |
121 | * or because the guest failed to guarantee all the appropriate | |
122 | * constraints on all VCPUs (ie buffer can't cross a page boundary). | |
123 | * | |
124 | * Note that any particular CPU may be using a placed vcpu structure, | |
125 | * but we can only optimise if the all are. | |
126 | * | |
127 | * 0: not available, 1: available | |
128 | */ | |
e4d04071 | 129 | static int have_vcpu_info_placement = 1; |
60223a32 | 130 | |
1c32cdc6 DV |
131 | struct tls_descs { |
132 | struct desc_struct desc[3]; | |
133 | }; | |
134 | ||
135 | /* | |
136 | * Updating the 3 TLS descriptors in the GDT on every task switch is | |
137 | * surprisingly expensive so we avoid updating them if they haven't | |
138 | * changed. Since Xen writes different descriptors than the one | |
139 | * passed in the update_descriptor hypercall we keep shadow copies to | |
140 | * compare against. | |
141 | */ | |
142 | static DEFINE_PER_CPU(struct tls_descs, shadow_tls_desc); | |
143 | ||
c06ee78d MR |
144 | static void clamp_max_cpus(void) |
145 | { | |
146 | #ifdef CONFIG_SMP | |
147 | if (setup_max_cpus > MAX_VIRT_CPUS) | |
148 | setup_max_cpus = MAX_VIRT_CPUS; | |
149 | #endif | |
150 | } | |
151 | ||
9c7a7942 | 152 | static void xen_vcpu_setup(int cpu) |
5ead97c8 | 153 | { |
60223a32 JF |
154 | struct vcpu_register_vcpu_info info; |
155 | int err; | |
156 | struct vcpu_info *vcpup; | |
157 | ||
a0d695c8 | 158 | BUG_ON(HYPERVISOR_shared_info == &xen_dummy_shared_info); |
60223a32 | 159 | |
c06ee78d MR |
160 | if (cpu < MAX_VIRT_CPUS) |
161 | per_cpu(xen_vcpu,cpu) = &HYPERVISOR_shared_info->vcpu_info[cpu]; | |
60223a32 | 162 | |
c06ee78d MR |
163 | if (!have_vcpu_info_placement) { |
164 | if (cpu >= MAX_VIRT_CPUS) | |
165 | clamp_max_cpus(); | |
166 | return; | |
167 | } | |
60223a32 | 168 | |
c06ee78d | 169 | vcpup = &per_cpu(xen_vcpu_info, cpu); |
9976b39b | 170 | info.mfn = arbitrary_virt_to_mfn(vcpup); |
60223a32 JF |
171 | info.offset = offset_in_page(vcpup); |
172 | ||
60223a32 JF |
173 | /* Check to see if the hypervisor will put the vcpu_info |
174 | structure where we want it, which allows direct access via | |
175 | a percpu-variable. */ | |
176 | err = HYPERVISOR_vcpu_op(VCPUOP_register_vcpu_info, cpu, &info); | |
177 | ||
178 | if (err) { | |
179 | printk(KERN_DEBUG "register_vcpu_info failed: err=%d\n", err); | |
180 | have_vcpu_info_placement = 0; | |
c06ee78d | 181 | clamp_max_cpus(); |
60223a32 JF |
182 | } else { |
183 | /* This cpu is using the registered vcpu info, even if | |
184 | later ones fail to. */ | |
185 | per_cpu(xen_vcpu, cpu) = vcpup; | |
60223a32 | 186 | } |
5ead97c8 JF |
187 | } |
188 | ||
9c7a7942 JF |
189 | /* |
190 | * On restore, set the vcpu placement up again. | |
191 | * If it fails, then we're in a bad state, since | |
192 | * we can't back out from using it... | |
193 | */ | |
194 | void xen_vcpu_restore(void) | |
195 | { | |
3905bb2a | 196 | int cpu; |
9c7a7942 | 197 | |
9d328a94 | 198 | for_each_possible_cpu(cpu) { |
3905bb2a | 199 | bool other_cpu = (cpu != smp_processor_id()); |
9d328a94 | 200 | bool is_up = HYPERVISOR_vcpu_op(VCPUOP_is_up, cpu, NULL); |
9c7a7942 | 201 | |
9d328a94 | 202 | if (other_cpu && is_up && |
3905bb2a JF |
203 | HYPERVISOR_vcpu_op(VCPUOP_down, cpu, NULL)) |
204 | BUG(); | |
9c7a7942 | 205 | |
3905bb2a | 206 | xen_setup_runstate_info(cpu); |
9c7a7942 | 207 | |
3905bb2a | 208 | if (have_vcpu_info_placement) |
9c7a7942 | 209 | xen_vcpu_setup(cpu); |
9c7a7942 | 210 | |
9d328a94 | 211 | if (other_cpu && is_up && |
3905bb2a JF |
212 | HYPERVISOR_vcpu_op(VCPUOP_up, cpu, NULL)) |
213 | BUG(); | |
9c7a7942 JF |
214 | } |
215 | } | |
216 | ||
5ead97c8 JF |
217 | static void __init xen_banner(void) |
218 | { | |
95c7c23b JF |
219 | unsigned version = HYPERVISOR_xen_version(XENVER_version, NULL); |
220 | struct xen_extraversion extra; | |
221 | HYPERVISOR_xen_version(XENVER_extraversion, &extra); | |
222 | ||
5ead97c8 | 223 | printk(KERN_INFO "Booting paravirtualized kernel on %s\n", |
93b1eab3 | 224 | pv_info.name); |
95c7c23b JF |
225 | printk(KERN_INFO "Xen version: %d.%d%s%s\n", |
226 | version >> 16, version & 0xffff, extra.extraversion, | |
e57778a1 | 227 | xen_feature(XENFEAT_mmu_pt_update_preserve_ad) ? " (preserve-AD)" : ""); |
5ead97c8 | 228 | } |
394b40f6 KRW |
229 | /* Check if running on Xen version (major, minor) or later */ |
230 | bool | |
231 | xen_running_on_version_or_later(unsigned int major, unsigned int minor) | |
232 | { | |
233 | unsigned int version; | |
234 | ||
235 | if (!xen_domain()) | |
236 | return false; | |
237 | ||
238 | version = HYPERVISOR_xen_version(XENVER_version, NULL); | |
239 | if ((((version >> 16) == major) && ((version & 0xffff) >= minor)) || | |
240 | ((version >> 16) > major)) | |
241 | return true; | |
242 | return false; | |
243 | } | |
5ead97c8 | 244 | |
5e626254 AP |
245 | #define CPUID_THERM_POWER_LEAF 6 |
246 | #define APERFMPERF_PRESENT 0 | |
247 | ||
e826fe1b JF |
248 | static __read_mostly unsigned int cpuid_leaf1_edx_mask = ~0; |
249 | static __read_mostly unsigned int cpuid_leaf1_ecx_mask = ~0; | |
250 | ||
73c154c6 KRW |
251 | static __read_mostly unsigned int cpuid_leaf1_ecx_set_mask; |
252 | static __read_mostly unsigned int cpuid_leaf5_ecx_val; | |
253 | static __read_mostly unsigned int cpuid_leaf5_edx_val; | |
254 | ||
65ea5b03 PA |
255 | static void xen_cpuid(unsigned int *ax, unsigned int *bx, |
256 | unsigned int *cx, unsigned int *dx) | |
5ead97c8 | 257 | { |
82d64699 | 258 | unsigned maskebx = ~0; |
e826fe1b | 259 | unsigned maskecx = ~0; |
5ead97c8 | 260 | unsigned maskedx = ~0; |
73c154c6 | 261 | unsigned setecx = 0; |
5ead97c8 JF |
262 | /* |
263 | * Mask out inconvenient features, to try and disable as many | |
264 | * unsupported kernel subsystems as possible. | |
265 | */ | |
82d64699 JF |
266 | switch (*ax) { |
267 | case 1: | |
e826fe1b | 268 | maskecx = cpuid_leaf1_ecx_mask; |
73c154c6 | 269 | setecx = cpuid_leaf1_ecx_set_mask; |
e826fe1b | 270 | maskedx = cpuid_leaf1_edx_mask; |
82d64699 JF |
271 | break; |
272 | ||
73c154c6 KRW |
273 | case CPUID_MWAIT_LEAF: |
274 | /* Synthesize the values.. */ | |
275 | *ax = 0; | |
276 | *bx = 0; | |
277 | *cx = cpuid_leaf5_ecx_val; | |
278 | *dx = cpuid_leaf5_edx_val; | |
279 | return; | |
280 | ||
5e626254 AP |
281 | case CPUID_THERM_POWER_LEAF: |
282 | /* Disabling APERFMPERF for kernel usage */ | |
283 | maskecx = ~(1 << APERFMPERF_PRESENT); | |
284 | break; | |
285 | ||
82d64699 JF |
286 | case 0xb: |
287 | /* Suppress extended topology stuff */ | |
288 | maskebx = 0; | |
289 | break; | |
e826fe1b | 290 | } |
5ead97c8 JF |
291 | |
292 | asm(XEN_EMULATE_PREFIX "cpuid" | |
65ea5b03 PA |
293 | : "=a" (*ax), |
294 | "=b" (*bx), | |
295 | "=c" (*cx), | |
296 | "=d" (*dx) | |
297 | : "0" (*ax), "2" (*cx)); | |
e826fe1b | 298 | |
82d64699 | 299 | *bx &= maskebx; |
e826fe1b | 300 | *cx &= maskecx; |
73c154c6 | 301 | *cx |= setecx; |
65ea5b03 | 302 | *dx &= maskedx; |
73c154c6 | 303 | |
5ead97c8 JF |
304 | } |
305 | ||
73c154c6 KRW |
306 | static bool __init xen_check_mwait(void) |
307 | { | |
e3aa4e61 | 308 | #ifdef CONFIG_ACPI |
73c154c6 KRW |
309 | struct xen_platform_op op = { |
310 | .cmd = XENPF_set_processor_pminfo, | |
311 | .u.set_pminfo.id = -1, | |
312 | .u.set_pminfo.type = XEN_PM_PDC, | |
313 | }; | |
314 | uint32_t buf[3]; | |
315 | unsigned int ax, bx, cx, dx; | |
316 | unsigned int mwait_mask; | |
317 | ||
318 | /* We need to determine whether it is OK to expose the MWAIT | |
319 | * capability to the kernel to harvest deeper than C3 states from ACPI | |
320 | * _CST using the processor_harvest_xen.c module. For this to work, we | |
321 | * need to gather the MWAIT_LEAF values (which the cstate.c code | |
322 | * checks against). The hypervisor won't expose the MWAIT flag because | |
323 | * it would break backwards compatibility; so we will find out directly | |
324 | * from the hardware and hypercall. | |
325 | */ | |
326 | if (!xen_initial_domain()) | |
327 | return false; | |
328 | ||
e3aa4e61 LJ |
329 | /* |
330 | * When running under platform earlier than Xen4.2, do not expose | |
331 | * mwait, to avoid the risk of loading native acpi pad driver | |
332 | */ | |
333 | if (!xen_running_on_version_or_later(4, 2)) | |
334 | return false; | |
335 | ||
73c154c6 KRW |
336 | ax = 1; |
337 | cx = 0; | |
338 | ||
339 | native_cpuid(&ax, &bx, &cx, &dx); | |
340 | ||
341 | mwait_mask = (1 << (X86_FEATURE_EST % 32)) | | |
342 | (1 << (X86_FEATURE_MWAIT % 32)); | |
343 | ||
344 | if ((cx & mwait_mask) != mwait_mask) | |
345 | return false; | |
346 | ||
347 | /* We need to emulate the MWAIT_LEAF and for that we need both | |
348 | * ecx and edx. The hypercall provides only partial information. | |
349 | */ | |
350 | ||
351 | ax = CPUID_MWAIT_LEAF; | |
352 | bx = 0; | |
353 | cx = 0; | |
354 | dx = 0; | |
355 | ||
356 | native_cpuid(&ax, &bx, &cx, &dx); | |
357 | ||
358 | /* Ask the Hypervisor whether to clear ACPI_PDC_C_C2C3_FFH. If so, | |
359 | * don't expose MWAIT_LEAF and let ACPI pick the IOPORT version of C3. | |
360 | */ | |
361 | buf[0] = ACPI_PDC_REVISION_ID; | |
362 | buf[1] = 1; | |
363 | buf[2] = (ACPI_PDC_C_CAPABILITY_SMP | ACPI_PDC_EST_CAPABILITY_SWSMP); | |
364 | ||
365 | set_xen_guest_handle(op.u.set_pminfo.pdc, buf); | |
366 | ||
367 | if ((HYPERVISOR_dom0_op(&op) == 0) && | |
368 | (buf[2] & (ACPI_PDC_C_C1_FFH | ACPI_PDC_C_C2C3_FFH))) { | |
369 | cpuid_leaf5_ecx_val = cx; | |
370 | cpuid_leaf5_edx_val = dx; | |
371 | } | |
372 | return true; | |
373 | #else | |
374 | return false; | |
375 | #endif | |
376 | } | |
ad3062a0 | 377 | static void __init xen_init_cpuid_mask(void) |
e826fe1b JF |
378 | { |
379 | unsigned int ax, bx, cx, dx; | |
947ccf9c | 380 | unsigned int xsave_mask; |
e826fe1b JF |
381 | |
382 | cpuid_leaf1_edx_mask = | |
cef12ee5 | 383 | ~((1 << X86_FEATURE_MTRR) | /* disable MTRR */ |
e826fe1b JF |
384 | (1 << X86_FEATURE_ACC)); /* thermal monitoring */ |
385 | ||
386 | if (!xen_initial_domain()) | |
387 | cpuid_leaf1_edx_mask &= | |
388 | ~((1 << X86_FEATURE_APIC) | /* disable local APIC */ | |
389 | (1 << X86_FEATURE_ACPI)); /* disable ACPI */ | |
947ccf9c | 390 | ax = 1; |
5e287830 | 391 | cx = 0; |
947ccf9c | 392 | xen_cpuid(&ax, &bx, &cx, &dx); |
e826fe1b | 393 | |
947ccf9c SH |
394 | xsave_mask = |
395 | (1 << (X86_FEATURE_XSAVE % 32)) | | |
396 | (1 << (X86_FEATURE_OSXSAVE % 32)); | |
397 | ||
398 | /* Xen will set CR4.OSXSAVE if supported and not disabled by force */ | |
399 | if ((cx & xsave_mask) != xsave_mask) | |
400 | cpuid_leaf1_ecx_mask &= ~xsave_mask; /* disable XSAVE & OSXSAVE */ | |
73c154c6 KRW |
401 | if (xen_check_mwait()) |
402 | cpuid_leaf1_ecx_set_mask = (1 << (X86_FEATURE_MWAIT % 32)); | |
e826fe1b JF |
403 | } |
404 | ||
5ead97c8 JF |
405 | static void xen_set_debugreg(int reg, unsigned long val) |
406 | { | |
407 | HYPERVISOR_set_debugreg(reg, val); | |
408 | } | |
409 | ||
410 | static unsigned long xen_get_debugreg(int reg) | |
411 | { | |
412 | return HYPERVISOR_get_debugreg(reg); | |
413 | } | |
414 | ||
224101ed | 415 | static void xen_end_context_switch(struct task_struct *next) |
5ead97c8 | 416 | { |
5ead97c8 | 417 | xen_mc_flush(); |
224101ed | 418 | paravirt_end_context_switch(next); |
5ead97c8 JF |
419 | } |
420 | ||
421 | static unsigned long xen_store_tr(void) | |
422 | { | |
423 | return 0; | |
424 | } | |
425 | ||
a05d2eba | 426 | /* |
cef43bf6 JF |
427 | * Set the page permissions for a particular virtual address. If the |
428 | * address is a vmalloc mapping (or other non-linear mapping), then | |
429 | * find the linear mapping of the page and also set its protections to | |
430 | * match. | |
a05d2eba JF |
431 | */ |
432 | static void set_aliased_prot(void *v, pgprot_t prot) | |
433 | { | |
434 | int level; | |
435 | pte_t *ptep; | |
436 | pte_t pte; | |
437 | unsigned long pfn; | |
438 | struct page *page; | |
439 | ||
440 | ptep = lookup_address((unsigned long)v, &level); | |
441 | BUG_ON(ptep == NULL); | |
442 | ||
443 | pfn = pte_pfn(*ptep); | |
444 | page = pfn_to_page(pfn); | |
445 | ||
446 | pte = pfn_pte(pfn, prot); | |
447 | ||
448 | if (HYPERVISOR_update_va_mapping((unsigned long)v, pte, 0)) | |
449 | BUG(); | |
450 | ||
451 | if (!PageHighMem(page)) { | |
452 | void *av = __va(PFN_PHYS(pfn)); | |
453 | ||
454 | if (av != v) | |
455 | if (HYPERVISOR_update_va_mapping((unsigned long)av, pte, 0)) | |
456 | BUG(); | |
457 | } else | |
458 | kmap_flush_unused(); | |
459 | } | |
460 | ||
38ffbe66 JF |
461 | static void xen_alloc_ldt(struct desc_struct *ldt, unsigned entries) |
462 | { | |
a05d2eba | 463 | const unsigned entries_per_page = PAGE_SIZE / LDT_ENTRY_SIZE; |
38ffbe66 JF |
464 | int i; |
465 | ||
a05d2eba JF |
466 | for(i = 0; i < entries; i += entries_per_page) |
467 | set_aliased_prot(ldt + i, PAGE_KERNEL_RO); | |
38ffbe66 JF |
468 | } |
469 | ||
470 | static void xen_free_ldt(struct desc_struct *ldt, unsigned entries) | |
471 | { | |
a05d2eba | 472 | const unsigned entries_per_page = PAGE_SIZE / LDT_ENTRY_SIZE; |
38ffbe66 JF |
473 | int i; |
474 | ||
a05d2eba JF |
475 | for(i = 0; i < entries; i += entries_per_page) |
476 | set_aliased_prot(ldt + i, PAGE_KERNEL); | |
38ffbe66 JF |
477 | } |
478 | ||
5ead97c8 JF |
479 | static void xen_set_ldt(const void *addr, unsigned entries) |
480 | { | |
5ead97c8 JF |
481 | struct mmuext_op *op; |
482 | struct multicall_space mcs = xen_mc_entry(sizeof(*op)); | |
483 | ||
ab78f7ad JF |
484 | trace_xen_cpu_set_ldt(addr, entries); |
485 | ||
5ead97c8 JF |
486 | op = mcs.args; |
487 | op->cmd = MMUEXT_SET_LDT; | |
4dbf7af6 | 488 | op->arg1.linear_addr = (unsigned long)addr; |
5ead97c8 JF |
489 | op->arg2.nr_ents = entries; |
490 | ||
491 | MULTI_mmuext_op(mcs.mc, op, 1, NULL, DOMID_SELF); | |
492 | ||
493 | xen_mc_issue(PARAVIRT_LAZY_CPU); | |
494 | } | |
495 | ||
6b68f01b | 496 | static void xen_load_gdt(const struct desc_ptr *dtr) |
5ead97c8 | 497 | { |
5ead97c8 JF |
498 | unsigned long va = dtr->address; |
499 | unsigned int size = dtr->size + 1; | |
500 | unsigned pages = (size + PAGE_SIZE - 1) / PAGE_SIZE; | |
3ce5fa7e | 501 | unsigned long frames[pages]; |
5ead97c8 | 502 | int f; |
5ead97c8 | 503 | |
577eebea JF |
504 | /* |
505 | * A GDT can be up to 64k in size, which corresponds to 8192 | |
506 | * 8-byte entries, or 16 4k pages.. | |
507 | */ | |
5ead97c8 JF |
508 | |
509 | BUG_ON(size > 65536); | |
510 | BUG_ON(va & ~PAGE_MASK); | |
511 | ||
5ead97c8 | 512 | for (f = 0; va < dtr->address + size; va += PAGE_SIZE, f++) { |
6ed6bf42 | 513 | int level; |
577eebea | 514 | pte_t *ptep; |
6ed6bf42 JF |
515 | unsigned long pfn, mfn; |
516 | void *virt; | |
517 | ||
577eebea JF |
518 | /* |
519 | * The GDT is per-cpu and is in the percpu data area. | |
520 | * That can be virtually mapped, so we need to do a | |
521 | * page-walk to get the underlying MFN for the | |
522 | * hypercall. The page can also be in the kernel's | |
523 | * linear range, so we need to RO that mapping too. | |
524 | */ | |
525 | ptep = lookup_address(va, &level); | |
6ed6bf42 JF |
526 | BUG_ON(ptep == NULL); |
527 | ||
528 | pfn = pte_pfn(*ptep); | |
529 | mfn = pfn_to_mfn(pfn); | |
530 | virt = __va(PFN_PHYS(pfn)); | |
531 | ||
532 | frames[f] = mfn; | |
9976b39b | 533 | |
5ead97c8 | 534 | make_lowmem_page_readonly((void *)va); |
6ed6bf42 | 535 | make_lowmem_page_readonly(virt); |
5ead97c8 JF |
536 | } |
537 | ||
3ce5fa7e JF |
538 | if (HYPERVISOR_set_gdt(frames, size / sizeof(struct desc_struct))) |
539 | BUG(); | |
5ead97c8 JF |
540 | } |
541 | ||
577eebea JF |
542 | /* |
543 | * load_gdt for early boot, when the gdt is only mapped once | |
544 | */ | |
ad3062a0 | 545 | static void __init xen_load_gdt_boot(const struct desc_ptr *dtr) |
577eebea JF |
546 | { |
547 | unsigned long va = dtr->address; | |
548 | unsigned int size = dtr->size + 1; | |
549 | unsigned pages = (size + PAGE_SIZE - 1) / PAGE_SIZE; | |
550 | unsigned long frames[pages]; | |
551 | int f; | |
552 | ||
553 | /* | |
554 | * A GDT can be up to 64k in size, which corresponds to 8192 | |
555 | * 8-byte entries, or 16 4k pages.. | |
556 | */ | |
557 | ||
558 | BUG_ON(size > 65536); | |
559 | BUG_ON(va & ~PAGE_MASK); | |
560 | ||
561 | for (f = 0; va < dtr->address + size; va += PAGE_SIZE, f++) { | |
562 | pte_t pte; | |
563 | unsigned long pfn, mfn; | |
564 | ||
565 | pfn = virt_to_pfn(va); | |
566 | mfn = pfn_to_mfn(pfn); | |
567 | ||
568 | pte = pfn_pte(pfn, PAGE_KERNEL_RO); | |
569 | ||
570 | if (HYPERVISOR_update_va_mapping((unsigned long)va, pte, 0)) | |
571 | BUG(); | |
572 | ||
573 | frames[f] = mfn; | |
574 | } | |
575 | ||
576 | if (HYPERVISOR_set_gdt(frames, size / sizeof(struct desc_struct))) | |
577 | BUG(); | |
578 | } | |
579 | ||
59290362 DV |
580 | static inline bool desc_equal(const struct desc_struct *d1, |
581 | const struct desc_struct *d2) | |
582 | { | |
583 | return d1->a == d2->a && d1->b == d2->b; | |
584 | } | |
585 | ||
5ead97c8 JF |
586 | static void load_TLS_descriptor(struct thread_struct *t, |
587 | unsigned int cpu, unsigned int i) | |
588 | { | |
1c32cdc6 DV |
589 | struct desc_struct *shadow = &per_cpu(shadow_tls_desc, cpu).desc[i]; |
590 | struct desc_struct *gdt; | |
591 | xmaddr_t maddr; | |
592 | struct multicall_space mc; | |
593 | ||
594 | if (desc_equal(shadow, &t->tls_array[i])) | |
595 | return; | |
596 | ||
597 | *shadow = t->tls_array[i]; | |
598 | ||
599 | gdt = get_cpu_gdt_table(cpu); | |
600 | maddr = arbitrary_virt_to_machine(&gdt[GDT_ENTRY_TLS_MIN+i]); | |
601 | mc = __xen_mc_entry(0); | |
5ead97c8 JF |
602 | |
603 | MULTI_update_descriptor(mc.mc, maddr.maddr, t->tls_array[i]); | |
604 | } | |
605 | ||
606 | static void xen_load_tls(struct thread_struct *t, unsigned int cpu) | |
607 | { | |
8b84ad94 | 608 | /* |
ccbeed3a TH |
609 | * XXX sleazy hack: If we're being called in a lazy-cpu zone |
610 | * and lazy gs handling is enabled, it means we're in a | |
611 | * context switch, and %gs has just been saved. This means we | |
612 | * can zero it out to prevent faults on exit from the | |
613 | * hypervisor if the next process has no %gs. Either way, it | |
614 | * has been saved, and the new value will get loaded properly. | |
615 | * This will go away as soon as Xen has been modified to not | |
616 | * save/restore %gs for normal hypercalls. | |
8a95408e EH |
617 | * |
618 | * On x86_64, this hack is not used for %gs, because gs points | |
619 | * to KERNEL_GS_BASE (and uses it for PDA references), so we | |
620 | * must not zero %gs on x86_64 | |
621 | * | |
622 | * For x86_64, we need to zero %fs, otherwise we may get an | |
623 | * exception between the new %fs descriptor being loaded and | |
624 | * %fs being effectively cleared at __switch_to(). | |
8b84ad94 | 625 | */ |
8a95408e EH |
626 | if (paravirt_get_lazy_mode() == PARAVIRT_LAZY_CPU) { |
627 | #ifdef CONFIG_X86_32 | |
ccbeed3a | 628 | lazy_load_gs(0); |
8a95408e EH |
629 | #else |
630 | loadsegment(fs, 0); | |
631 | #endif | |
632 | } | |
633 | ||
634 | xen_mc_batch(); | |
635 | ||
636 | load_TLS_descriptor(t, cpu, 0); | |
637 | load_TLS_descriptor(t, cpu, 1); | |
638 | load_TLS_descriptor(t, cpu, 2); | |
639 | ||
640 | xen_mc_issue(PARAVIRT_LAZY_CPU); | |
5ead97c8 JF |
641 | } |
642 | ||
a8fc1089 EH |
643 | #ifdef CONFIG_X86_64 |
644 | static void xen_load_gs_index(unsigned int idx) | |
645 | { | |
646 | if (HYPERVISOR_set_segment_base(SEGBASE_GS_USER_SEL, idx)) | |
647 | BUG(); | |
5ead97c8 | 648 | } |
a8fc1089 | 649 | #endif |
5ead97c8 JF |
650 | |
651 | static void xen_write_ldt_entry(struct desc_struct *dt, int entrynum, | |
75b8bb3e | 652 | const void *ptr) |
5ead97c8 | 653 | { |
cef43bf6 | 654 | xmaddr_t mach_lp = arbitrary_virt_to_machine(&dt[entrynum]); |
75b8bb3e | 655 | u64 entry = *(u64 *)ptr; |
5ead97c8 | 656 | |
ab78f7ad JF |
657 | trace_xen_cpu_write_ldt_entry(dt, entrynum, entry); |
658 | ||
f120f13e JF |
659 | preempt_disable(); |
660 | ||
5ead97c8 JF |
661 | xen_mc_flush(); |
662 | if (HYPERVISOR_update_descriptor(mach_lp.maddr, entry)) | |
663 | BUG(); | |
f120f13e JF |
664 | |
665 | preempt_enable(); | |
5ead97c8 JF |
666 | } |
667 | ||
e176d367 | 668 | static int cvt_gate_to_trap(int vector, const gate_desc *val, |
5ead97c8 JF |
669 | struct trap_info *info) |
670 | { | |
6cac5a92 JF |
671 | unsigned long addr; |
672 | ||
6d02c426 | 673 | if (val->type != GATE_TRAP && val->type != GATE_INTERRUPT) |
5ead97c8 JF |
674 | return 0; |
675 | ||
676 | info->vector = vector; | |
6cac5a92 JF |
677 | |
678 | addr = gate_offset(*val); | |
679 | #ifdef CONFIG_X86_64 | |
b80119bb JF |
680 | /* |
681 | * Look for known traps using IST, and substitute them | |
682 | * appropriately. The debugger ones are the only ones we care | |
05e36006 LJ |
683 | * about. Xen will handle faults like double_fault, |
684 | * so we should never see them. Warn if | |
b80119bb JF |
685 | * there's an unexpected IST-using fault handler. |
686 | */ | |
6cac5a92 JF |
687 | if (addr == (unsigned long)debug) |
688 | addr = (unsigned long)xen_debug; | |
689 | else if (addr == (unsigned long)int3) | |
690 | addr = (unsigned long)xen_int3; | |
691 | else if (addr == (unsigned long)stack_segment) | |
692 | addr = (unsigned long)xen_stack_segment; | |
b80119bb JF |
693 | else if (addr == (unsigned long)double_fault || |
694 | addr == (unsigned long)nmi) { | |
695 | /* Don't need to handle these */ | |
696 | return 0; | |
697 | #ifdef CONFIG_X86_MCE | |
698 | } else if (addr == (unsigned long)machine_check) { | |
05e36006 LJ |
699 | /* |
700 | * when xen hypervisor inject vMCE to guest, | |
701 | * use native mce handler to handle it | |
702 | */ | |
703 | ; | |
b80119bb JF |
704 | #endif |
705 | } else { | |
706 | /* Some other trap using IST? */ | |
707 | if (WARN_ON(val->ist != 0)) | |
708 | return 0; | |
709 | } | |
6cac5a92 JF |
710 | #endif /* CONFIG_X86_64 */ |
711 | info->address = addr; | |
712 | ||
e176d367 EH |
713 | info->cs = gate_segment(*val); |
714 | info->flags = val->dpl; | |
5ead97c8 | 715 | /* interrupt gates clear IF */ |
6d02c426 JF |
716 | if (val->type == GATE_INTERRUPT) |
717 | info->flags |= 1 << 2; | |
5ead97c8 JF |
718 | |
719 | return 1; | |
720 | } | |
721 | ||
722 | /* Locations of each CPU's IDT */ | |
6b68f01b | 723 | static DEFINE_PER_CPU(struct desc_ptr, idt_desc); |
5ead97c8 JF |
724 | |
725 | /* Set an IDT entry. If the entry is part of the current IDT, then | |
726 | also update Xen. */ | |
8d947344 | 727 | static void xen_write_idt_entry(gate_desc *dt, int entrynum, const gate_desc *g) |
5ead97c8 | 728 | { |
5ead97c8 | 729 | unsigned long p = (unsigned long)&dt[entrynum]; |
f120f13e JF |
730 | unsigned long start, end; |
731 | ||
ab78f7ad JF |
732 | trace_xen_cpu_write_idt_entry(dt, entrynum, g); |
733 | ||
f120f13e JF |
734 | preempt_disable(); |
735 | ||
780f36d8 CL |
736 | start = __this_cpu_read(idt_desc.address); |
737 | end = start + __this_cpu_read(idt_desc.size) + 1; | |
5ead97c8 JF |
738 | |
739 | xen_mc_flush(); | |
740 | ||
8d947344 | 741 | native_write_idt_entry(dt, entrynum, g); |
5ead97c8 JF |
742 | |
743 | if (p >= start && (p + 8) <= end) { | |
744 | struct trap_info info[2]; | |
745 | ||
746 | info[1].address = 0; | |
747 | ||
e176d367 | 748 | if (cvt_gate_to_trap(entrynum, g, &info[0])) |
5ead97c8 JF |
749 | if (HYPERVISOR_set_trap_table(info)) |
750 | BUG(); | |
751 | } | |
f120f13e JF |
752 | |
753 | preempt_enable(); | |
5ead97c8 JF |
754 | } |
755 | ||
6b68f01b | 756 | static void xen_convert_trap_info(const struct desc_ptr *desc, |
f87e4cac | 757 | struct trap_info *traps) |
5ead97c8 | 758 | { |
5ead97c8 JF |
759 | unsigned in, out, count; |
760 | ||
e176d367 | 761 | count = (desc->size+1) / sizeof(gate_desc); |
5ead97c8 JF |
762 | BUG_ON(count > 256); |
763 | ||
5ead97c8 | 764 | for (in = out = 0; in < count; in++) { |
e176d367 | 765 | gate_desc *entry = (gate_desc*)(desc->address) + in; |
5ead97c8 | 766 | |
e176d367 | 767 | if (cvt_gate_to_trap(in, entry, &traps[out])) |
5ead97c8 JF |
768 | out++; |
769 | } | |
770 | traps[out].address = 0; | |
f87e4cac JF |
771 | } |
772 | ||
773 | void xen_copy_trap_info(struct trap_info *traps) | |
774 | { | |
6b68f01b | 775 | const struct desc_ptr *desc = &__get_cpu_var(idt_desc); |
f87e4cac JF |
776 | |
777 | xen_convert_trap_info(desc, traps); | |
f87e4cac JF |
778 | } |
779 | ||
780 | /* Load a new IDT into Xen. In principle this can be per-CPU, so we | |
781 | hold a spinlock to protect the static traps[] array (static because | |
782 | it avoids allocation, and saves stack space). */ | |
6b68f01b | 783 | static void xen_load_idt(const struct desc_ptr *desc) |
f87e4cac JF |
784 | { |
785 | static DEFINE_SPINLOCK(lock); | |
786 | static struct trap_info traps[257]; | |
f87e4cac | 787 | |
ab78f7ad JF |
788 | trace_xen_cpu_load_idt(desc); |
789 | ||
f87e4cac JF |
790 | spin_lock(&lock); |
791 | ||
f120f13e JF |
792 | __get_cpu_var(idt_desc) = *desc; |
793 | ||
f87e4cac | 794 | xen_convert_trap_info(desc, traps); |
5ead97c8 JF |
795 | |
796 | xen_mc_flush(); | |
797 | if (HYPERVISOR_set_trap_table(traps)) | |
798 | BUG(); | |
799 | ||
800 | spin_unlock(&lock); | |
801 | } | |
802 | ||
803 | /* Write a GDT descriptor entry. Ignore LDT descriptors, since | |
804 | they're handled differently. */ | |
805 | static void xen_write_gdt_entry(struct desc_struct *dt, int entry, | |
014b15be | 806 | const void *desc, int type) |
5ead97c8 | 807 | { |
ab78f7ad JF |
808 | trace_xen_cpu_write_gdt_entry(dt, entry, desc, type); |
809 | ||
f120f13e JF |
810 | preempt_disable(); |
811 | ||
014b15be GOC |
812 | switch (type) { |
813 | case DESC_LDT: | |
814 | case DESC_TSS: | |
5ead97c8 JF |
815 | /* ignore */ |
816 | break; | |
817 | ||
818 | default: { | |
9976b39b | 819 | xmaddr_t maddr = arbitrary_virt_to_machine(&dt[entry]); |
5ead97c8 JF |
820 | |
821 | xen_mc_flush(); | |
014b15be | 822 | if (HYPERVISOR_update_descriptor(maddr.maddr, *(u64 *)desc)) |
5ead97c8 JF |
823 | BUG(); |
824 | } | |
825 | ||
826 | } | |
f120f13e JF |
827 | |
828 | preempt_enable(); | |
5ead97c8 JF |
829 | } |
830 | ||
577eebea JF |
831 | /* |
832 | * Version of write_gdt_entry for use at early boot-time needed to | |
833 | * update an entry as simply as possible. | |
834 | */ | |
ad3062a0 | 835 | static void __init xen_write_gdt_entry_boot(struct desc_struct *dt, int entry, |
577eebea JF |
836 | const void *desc, int type) |
837 | { | |
ab78f7ad JF |
838 | trace_xen_cpu_write_gdt_entry(dt, entry, desc, type); |
839 | ||
577eebea JF |
840 | switch (type) { |
841 | case DESC_LDT: | |
842 | case DESC_TSS: | |
843 | /* ignore */ | |
844 | break; | |
845 | ||
846 | default: { | |
847 | xmaddr_t maddr = virt_to_machine(&dt[entry]); | |
848 | ||
849 | if (HYPERVISOR_update_descriptor(maddr.maddr, *(u64 *)desc)) | |
850 | dt[entry] = *(struct desc_struct *)desc; | |
851 | } | |
852 | ||
853 | } | |
854 | } | |
855 | ||
faca6227 | 856 | static void xen_load_sp0(struct tss_struct *tss, |
a05d2eba | 857 | struct thread_struct *thread) |
5ead97c8 | 858 | { |
ab78f7ad JF |
859 | struct multicall_space mcs; |
860 | ||
861 | mcs = xen_mc_entry(0); | |
faca6227 | 862 | MULTI_stack_switch(mcs.mc, __KERNEL_DS, thread->sp0); |
5ead97c8 JF |
863 | xen_mc_issue(PARAVIRT_LAZY_CPU); |
864 | } | |
865 | ||
866 | static void xen_set_iopl_mask(unsigned mask) | |
867 | { | |
868 | struct physdev_set_iopl set_iopl; | |
869 | ||
870 | /* Force the change at ring 0. */ | |
871 | set_iopl.iopl = (mask == 0) ? 1 : (mask >> 12) & 3; | |
872 | HYPERVISOR_physdev_op(PHYSDEVOP_set_iopl, &set_iopl); | |
873 | } | |
874 | ||
875 | static void xen_io_delay(void) | |
876 | { | |
877 | } | |
878 | ||
879 | #ifdef CONFIG_X86_LOCAL_APIC | |
558daa28 KRW |
880 | static unsigned long xen_set_apic_id(unsigned int x) |
881 | { | |
882 | WARN_ON(1); | |
883 | return x; | |
884 | } | |
885 | static unsigned int xen_get_apic_id(unsigned long x) | |
886 | { | |
887 | return ((x)>>24) & 0xFFu; | |
888 | } | |
ad66dd34 | 889 | static u32 xen_apic_read(u32 reg) |
5ead97c8 | 890 | { |
558daa28 KRW |
891 | struct xen_platform_op op = { |
892 | .cmd = XENPF_get_cpuinfo, | |
893 | .interface_version = XENPF_INTERFACE_VERSION, | |
894 | .u.pcpu_info.xen_cpuid = 0, | |
895 | }; | |
896 | int ret = 0; | |
897 | ||
898 | /* Shouldn't need this as APIC is turned off for PV, and we only | |
899 | * get called on the bootup processor. But just in case. */ | |
900 | if (!xen_initial_domain() || smp_processor_id()) | |
901 | return 0; | |
902 | ||
903 | if (reg == APIC_LVR) | |
904 | return 0x10; | |
905 | ||
906 | if (reg != APIC_ID) | |
907 | return 0; | |
908 | ||
909 | ret = HYPERVISOR_dom0_op(&op); | |
910 | if (ret) | |
911 | return 0; | |
912 | ||
913 | return op.u.pcpu_info.apic_id << 24; | |
5ead97c8 | 914 | } |
f87e4cac | 915 | |
ad66dd34 | 916 | static void xen_apic_write(u32 reg, u32 val) |
f87e4cac JF |
917 | { |
918 | /* Warn to see if there's any stray references */ | |
919 | WARN_ON(1); | |
920 | } | |
ad66dd34 | 921 | |
ad66dd34 SS |
922 | static u64 xen_apic_icr_read(void) |
923 | { | |
924 | return 0; | |
925 | } | |
926 | ||
927 | static void xen_apic_icr_write(u32 low, u32 id) | |
928 | { | |
929 | /* Warn to see if there's any stray references */ | |
930 | WARN_ON(1); | |
931 | } | |
932 | ||
933 | static void xen_apic_wait_icr_idle(void) | |
934 | { | |
935 | return; | |
936 | } | |
937 | ||
94a8c3c2 YL |
938 | static u32 xen_safe_apic_wait_icr_idle(void) |
939 | { | |
940 | return 0; | |
941 | } | |
942 | ||
c1eeb2de YL |
943 | static void set_xen_basic_apic_ops(void) |
944 | { | |
945 | apic->read = xen_apic_read; | |
946 | apic->write = xen_apic_write; | |
947 | apic->icr_read = xen_apic_icr_read; | |
948 | apic->icr_write = xen_apic_icr_write; | |
949 | apic->wait_icr_idle = xen_apic_wait_icr_idle; | |
950 | apic->safe_wait_icr_idle = xen_safe_apic_wait_icr_idle; | |
558daa28 KRW |
951 | apic->set_apic_id = xen_set_apic_id; |
952 | apic->get_apic_id = xen_get_apic_id; | |
f447d56d BG |
953 | |
954 | #ifdef CONFIG_SMP | |
955 | apic->send_IPI_allbutself = xen_send_IPI_allbutself; | |
956 | apic->send_IPI_mask_allbutself = xen_send_IPI_mask_allbutself; | |
957 | apic->send_IPI_mask = xen_send_IPI_mask; | |
958 | apic->send_IPI_all = xen_send_IPI_all; | |
959 | apic->send_IPI_self = xen_send_IPI_self; | |
960 | #endif | |
c1eeb2de | 961 | } |
ad66dd34 | 962 | |
5ead97c8 JF |
963 | #endif |
964 | ||
7b1333aa JF |
965 | static void xen_clts(void) |
966 | { | |
967 | struct multicall_space mcs; | |
968 | ||
969 | mcs = xen_mc_entry(0); | |
970 | ||
971 | MULTI_fpu_taskswitch(mcs.mc, 0); | |
972 | ||
973 | xen_mc_issue(PARAVIRT_LAZY_CPU); | |
974 | } | |
975 | ||
a789ed5f JF |
976 | static DEFINE_PER_CPU(unsigned long, xen_cr0_value); |
977 | ||
978 | static unsigned long xen_read_cr0(void) | |
979 | { | |
2113f469 | 980 | unsigned long cr0 = this_cpu_read(xen_cr0_value); |
a789ed5f JF |
981 | |
982 | if (unlikely(cr0 == 0)) { | |
983 | cr0 = native_read_cr0(); | |
2113f469 | 984 | this_cpu_write(xen_cr0_value, cr0); |
a789ed5f JF |
985 | } |
986 | ||
987 | return cr0; | |
988 | } | |
989 | ||
7b1333aa JF |
990 | static void xen_write_cr0(unsigned long cr0) |
991 | { | |
992 | struct multicall_space mcs; | |
993 | ||
2113f469 | 994 | this_cpu_write(xen_cr0_value, cr0); |
a789ed5f | 995 | |
7b1333aa JF |
996 | /* Only pay attention to cr0.TS; everything else is |
997 | ignored. */ | |
998 | mcs = xen_mc_entry(0); | |
999 | ||
1000 | MULTI_fpu_taskswitch(mcs.mc, (cr0 & X86_CR0_TS) != 0); | |
1001 | ||
1002 | xen_mc_issue(PARAVIRT_LAZY_CPU); | |
1003 | } | |
1004 | ||
5ead97c8 JF |
1005 | static void xen_write_cr4(unsigned long cr4) |
1006 | { | |
2956a351 JF |
1007 | cr4 &= ~X86_CR4_PGE; |
1008 | cr4 &= ~X86_CR4_PSE; | |
1009 | ||
1010 | native_write_cr4(cr4); | |
5ead97c8 | 1011 | } |
1a7bbda5 KRW |
1012 | #ifdef CONFIG_X86_64 |
1013 | static inline unsigned long xen_read_cr8(void) | |
1014 | { | |
1015 | return 0; | |
1016 | } | |
1017 | static inline void xen_write_cr8(unsigned long val) | |
1018 | { | |
1019 | BUG_ON(val); | |
1020 | } | |
1021 | #endif | |
1153968a JF |
1022 | static int xen_write_msr_safe(unsigned int msr, unsigned low, unsigned high) |
1023 | { | |
1024 | int ret; | |
1025 | ||
1026 | ret = 0; | |
1027 | ||
f63c2f24 | 1028 | switch (msr) { |
1153968a JF |
1029 | #ifdef CONFIG_X86_64 |
1030 | unsigned which; | |
1031 | u64 base; | |
1032 | ||
1033 | case MSR_FS_BASE: which = SEGBASE_FS; goto set; | |
1034 | case MSR_KERNEL_GS_BASE: which = SEGBASE_GS_USER; goto set; | |
1035 | case MSR_GS_BASE: which = SEGBASE_GS_KERNEL; goto set; | |
1036 | ||
1037 | set: | |
1038 | base = ((u64)high << 32) | low; | |
1039 | if (HYPERVISOR_set_segment_base(which, base) != 0) | |
0cc0213e | 1040 | ret = -EIO; |
1153968a JF |
1041 | break; |
1042 | #endif | |
d89961e2 JF |
1043 | |
1044 | case MSR_STAR: | |
1045 | case MSR_CSTAR: | |
1046 | case MSR_LSTAR: | |
1047 | case MSR_SYSCALL_MASK: | |
1048 | case MSR_IA32_SYSENTER_CS: | |
1049 | case MSR_IA32_SYSENTER_ESP: | |
1050 | case MSR_IA32_SYSENTER_EIP: | |
1051 | /* Fast syscall setup is all done in hypercalls, so | |
1052 | these are all ignored. Stub them out here to stop | |
1053 | Xen console noise. */ | |
1054 | break; | |
1055 | ||
41f2e477 JF |
1056 | case MSR_IA32_CR_PAT: |
1057 | if (smp_processor_id() == 0) | |
1058 | xen_set_pat(((u64)high << 32) | low); | |
1059 | break; | |
1060 | ||
1153968a JF |
1061 | default: |
1062 | ret = native_write_msr_safe(msr, low, high); | |
1063 | } | |
1064 | ||
1065 | return ret; | |
1066 | } | |
1067 | ||
0e91398f | 1068 | void xen_setup_shared_info(void) |
5ead97c8 JF |
1069 | { |
1070 | if (!xen_feature(XENFEAT_auto_translated_physmap)) { | |
15664f96 JF |
1071 | set_fixmap(FIX_PARAVIRT_BOOTMAP, |
1072 | xen_start_info->shared_info); | |
1073 | ||
1074 | HYPERVISOR_shared_info = | |
1075 | (struct shared_info *)fix_to_virt(FIX_PARAVIRT_BOOTMAP); | |
5ead97c8 JF |
1076 | } else |
1077 | HYPERVISOR_shared_info = | |
1078 | (struct shared_info *)__va(xen_start_info->shared_info); | |
1079 | ||
2e8fe719 JF |
1080 | #ifndef CONFIG_SMP |
1081 | /* In UP this is as good a place as any to set up shared info */ | |
1082 | xen_setup_vcpu_info_placement(); | |
1083 | #endif | |
d5edbc1f JF |
1084 | |
1085 | xen_setup_mfn_list_list(); | |
2e8fe719 JF |
1086 | } |
1087 | ||
5f054e31 | 1088 | /* This is called once we have the cpu_possible_mask */ |
0e91398f | 1089 | void xen_setup_vcpu_info_placement(void) |
60223a32 JF |
1090 | { |
1091 | int cpu; | |
1092 | ||
1093 | for_each_possible_cpu(cpu) | |
1094 | xen_vcpu_setup(cpu); | |
1095 | ||
1096 | /* xen_vcpu_setup managed to place the vcpu_info within the | |
1097 | percpu area for all cpus, so make use of it */ | |
1098 | if (have_vcpu_info_placement) { | |
ecb93d1c JF |
1099 | pv_irq_ops.save_fl = __PV_IS_CALLEE_SAVE(xen_save_fl_direct); |
1100 | pv_irq_ops.restore_fl = __PV_IS_CALLEE_SAVE(xen_restore_fl_direct); | |
1101 | pv_irq_ops.irq_disable = __PV_IS_CALLEE_SAVE(xen_irq_disable_direct); | |
1102 | pv_irq_ops.irq_enable = __PV_IS_CALLEE_SAVE(xen_irq_enable_direct); | |
93b1eab3 | 1103 | pv_mmu_ops.read_cr2 = xen_read_cr2_direct; |
60223a32 | 1104 | } |
5ead97c8 JF |
1105 | } |
1106 | ||
ab144f5e AK |
1107 | static unsigned xen_patch(u8 type, u16 clobbers, void *insnbuf, |
1108 | unsigned long addr, unsigned len) | |
6487673b JF |
1109 | { |
1110 | char *start, *end, *reloc; | |
1111 | unsigned ret; | |
1112 | ||
1113 | start = end = reloc = NULL; | |
1114 | ||
93b1eab3 JF |
1115 | #define SITE(op, x) \ |
1116 | case PARAVIRT_PATCH(op.x): \ | |
6487673b JF |
1117 | if (have_vcpu_info_placement) { \ |
1118 | start = (char *)xen_##x##_direct; \ | |
1119 | end = xen_##x##_direct_end; \ | |
1120 | reloc = xen_##x##_direct_reloc; \ | |
1121 | } \ | |
1122 | goto patch_site | |
1123 | ||
1124 | switch (type) { | |
93b1eab3 JF |
1125 | SITE(pv_irq_ops, irq_enable); |
1126 | SITE(pv_irq_ops, irq_disable); | |
1127 | SITE(pv_irq_ops, save_fl); | |
1128 | SITE(pv_irq_ops, restore_fl); | |
6487673b JF |
1129 | #undef SITE |
1130 | ||
1131 | patch_site: | |
1132 | if (start == NULL || (end-start) > len) | |
1133 | goto default_patch; | |
1134 | ||
ab144f5e | 1135 | ret = paravirt_patch_insns(insnbuf, len, start, end); |
6487673b JF |
1136 | |
1137 | /* Note: because reloc is assigned from something that | |
1138 | appears to be an array, gcc assumes it's non-null, | |
1139 | but doesn't know its relationship with start and | |
1140 | end. */ | |
1141 | if (reloc > start && reloc < end) { | |
1142 | int reloc_off = reloc - start; | |
ab144f5e AK |
1143 | long *relocp = (long *)(insnbuf + reloc_off); |
1144 | long delta = start - (char *)addr; | |
6487673b JF |
1145 | |
1146 | *relocp += delta; | |
1147 | } | |
1148 | break; | |
1149 | ||
1150 | default_patch: | |
1151 | default: | |
ab144f5e AK |
1152 | ret = paravirt_patch_default(type, clobbers, insnbuf, |
1153 | addr, len); | |
6487673b JF |
1154 | break; |
1155 | } | |
1156 | ||
1157 | return ret; | |
1158 | } | |
1159 | ||
ad3062a0 | 1160 | static const struct pv_info xen_info __initconst = { |
5ead97c8 JF |
1161 | .paravirt_enabled = 1, |
1162 | .shared_kernel_pmd = 0, | |
1163 | ||
318f5a2a AL |
1164 | #ifdef CONFIG_X86_64 |
1165 | .extra_user_64bit_cs = FLAT_USER_CS64, | |
1166 | #endif | |
1167 | ||
5ead97c8 | 1168 | .name = "Xen", |
93b1eab3 | 1169 | }; |
5ead97c8 | 1170 | |
ad3062a0 | 1171 | static const struct pv_init_ops xen_init_ops __initconst = { |
6487673b | 1172 | .patch = xen_patch, |
93b1eab3 | 1173 | }; |
5ead97c8 | 1174 | |
ad3062a0 | 1175 | static const struct pv_cpu_ops xen_cpu_ops __initconst = { |
5ead97c8 JF |
1176 | .cpuid = xen_cpuid, |
1177 | ||
1178 | .set_debugreg = xen_set_debugreg, | |
1179 | .get_debugreg = xen_get_debugreg, | |
1180 | ||
7b1333aa | 1181 | .clts = xen_clts, |
5ead97c8 | 1182 | |
a789ed5f | 1183 | .read_cr0 = xen_read_cr0, |
7b1333aa | 1184 | .write_cr0 = xen_write_cr0, |
5ead97c8 | 1185 | |
5ead97c8 JF |
1186 | .read_cr4 = native_read_cr4, |
1187 | .read_cr4_safe = native_read_cr4_safe, | |
1188 | .write_cr4 = xen_write_cr4, | |
1189 | ||
1a7bbda5 KRW |
1190 | #ifdef CONFIG_X86_64 |
1191 | .read_cr8 = xen_read_cr8, | |
1192 | .write_cr8 = xen_write_cr8, | |
1193 | #endif | |
1194 | ||
5ead97c8 JF |
1195 | .wbinvd = native_wbinvd, |
1196 | ||
1197 | .read_msr = native_read_msr_safe, | |
1153968a | 1198 | .write_msr = xen_write_msr_safe, |
1ab46fd3 | 1199 | |
5ead97c8 JF |
1200 | .read_tsc = native_read_tsc, |
1201 | .read_pmc = native_read_pmc, | |
1202 | ||
cd0608e7 KRW |
1203 | .read_tscp = native_read_tscp, |
1204 | ||
81e103f1 | 1205 | .iret = xen_iret, |
d75cd22f | 1206 | .irq_enable_sysexit = xen_sysexit, |
6fcac6d3 JF |
1207 | #ifdef CONFIG_X86_64 |
1208 | .usergs_sysret32 = xen_sysret32, | |
1209 | .usergs_sysret64 = xen_sysret64, | |
1210 | #endif | |
5ead97c8 JF |
1211 | |
1212 | .load_tr_desc = paravirt_nop, | |
1213 | .set_ldt = xen_set_ldt, | |
1214 | .load_gdt = xen_load_gdt, | |
1215 | .load_idt = xen_load_idt, | |
1216 | .load_tls = xen_load_tls, | |
a8fc1089 EH |
1217 | #ifdef CONFIG_X86_64 |
1218 | .load_gs_index = xen_load_gs_index, | |
1219 | #endif | |
5ead97c8 | 1220 | |
38ffbe66 JF |
1221 | .alloc_ldt = xen_alloc_ldt, |
1222 | .free_ldt = xen_free_ldt, | |
1223 | ||
5ead97c8 JF |
1224 | .store_gdt = native_store_gdt, |
1225 | .store_idt = native_store_idt, | |
1226 | .store_tr = xen_store_tr, | |
1227 | ||
1228 | .write_ldt_entry = xen_write_ldt_entry, | |
1229 | .write_gdt_entry = xen_write_gdt_entry, | |
1230 | .write_idt_entry = xen_write_idt_entry, | |
faca6227 | 1231 | .load_sp0 = xen_load_sp0, |
5ead97c8 JF |
1232 | |
1233 | .set_iopl_mask = xen_set_iopl_mask, | |
1234 | .io_delay = xen_io_delay, | |
1235 | ||
952d1d70 JF |
1236 | /* Xen takes care of %gs when switching to usermode for us */ |
1237 | .swapgs = paravirt_nop, | |
1238 | ||
224101ed JF |
1239 | .start_context_switch = paravirt_start_context_switch, |
1240 | .end_context_switch = xen_end_context_switch, | |
93b1eab3 JF |
1241 | }; |
1242 | ||
ad3062a0 | 1243 | static const struct pv_apic_ops xen_apic_ops __initconst = { |
5ead97c8 | 1244 | #ifdef CONFIG_X86_LOCAL_APIC |
5ead97c8 JF |
1245 | .startup_ipi_hook = paravirt_nop, |
1246 | #endif | |
93b1eab3 JF |
1247 | }; |
1248 | ||
fefa629a JF |
1249 | static void xen_reboot(int reason) |
1250 | { | |
349c709f JF |
1251 | struct sched_shutdown r = { .reason = reason }; |
1252 | ||
349c709f | 1253 | if (HYPERVISOR_sched_op(SCHEDOP_shutdown, &r)) |
fefa629a JF |
1254 | BUG(); |
1255 | } | |
1256 | ||
1257 | static void xen_restart(char *msg) | |
1258 | { | |
1259 | xen_reboot(SHUTDOWN_reboot); | |
1260 | } | |
1261 | ||
1262 | static void xen_emergency_restart(void) | |
1263 | { | |
1264 | xen_reboot(SHUTDOWN_reboot); | |
1265 | } | |
1266 | ||
1267 | static void xen_machine_halt(void) | |
1268 | { | |
1269 | xen_reboot(SHUTDOWN_poweroff); | |
1270 | } | |
1271 | ||
b2abe506 TG |
1272 | static void xen_machine_power_off(void) |
1273 | { | |
1274 | if (pm_power_off) | |
1275 | pm_power_off(); | |
1276 | xen_reboot(SHUTDOWN_poweroff); | |
1277 | } | |
1278 | ||
fefa629a JF |
1279 | static void xen_crash_shutdown(struct pt_regs *regs) |
1280 | { | |
1281 | xen_reboot(SHUTDOWN_crash); | |
1282 | } | |
1283 | ||
f09f6d19 DD |
1284 | static int |
1285 | xen_panic_event(struct notifier_block *this, unsigned long event, void *ptr) | |
1286 | { | |
086748e5 | 1287 | xen_reboot(SHUTDOWN_crash); |
f09f6d19 DD |
1288 | return NOTIFY_DONE; |
1289 | } | |
1290 | ||
1291 | static struct notifier_block xen_panic_block = { | |
1292 | .notifier_call= xen_panic_event, | |
1293 | }; | |
1294 | ||
1295 | int xen_panic_handler_init(void) | |
1296 | { | |
1297 | atomic_notifier_chain_register(&panic_notifier_list, &xen_panic_block); | |
1298 | return 0; | |
1299 | } | |
1300 | ||
ad3062a0 | 1301 | static const struct machine_ops xen_machine_ops __initconst = { |
fefa629a JF |
1302 | .restart = xen_restart, |
1303 | .halt = xen_machine_halt, | |
b2abe506 | 1304 | .power_off = xen_machine_power_off, |
fefa629a JF |
1305 | .shutdown = xen_machine_halt, |
1306 | .crash_shutdown = xen_crash_shutdown, | |
1307 | .emergency_restart = xen_emergency_restart, | |
1308 | }; | |
1309 | ||
96f28bc6 DV |
1310 | static void __init xen_boot_params_init_edd(void) |
1311 | { | |
1312 | #if IS_ENABLED(CONFIG_EDD) | |
1313 | struct xen_platform_op op; | |
1314 | struct edd_info *edd_info; | |
1315 | u32 *mbr_signature; | |
1316 | unsigned nr; | |
1317 | int ret; | |
1318 | ||
1319 | edd_info = boot_params.eddbuf; | |
1320 | mbr_signature = boot_params.edd_mbr_sig_buffer; | |
1321 | ||
1322 | op.cmd = XENPF_firmware_info; | |
1323 | ||
1324 | op.u.firmware_info.type = XEN_FW_DISK_INFO; | |
1325 | for (nr = 0; nr < EDDMAXNR; nr++) { | |
1326 | struct edd_info *info = edd_info + nr; | |
1327 | ||
1328 | op.u.firmware_info.index = nr; | |
1329 | info->params.length = sizeof(info->params); | |
1330 | set_xen_guest_handle(op.u.firmware_info.u.disk_info.edd_params, | |
1331 | &info->params); | |
1332 | ret = HYPERVISOR_dom0_op(&op); | |
1333 | if (ret) | |
1334 | break; | |
1335 | ||
1336 | #define C(x) info->x = op.u.firmware_info.u.disk_info.x | |
1337 | C(device); | |
1338 | C(version); | |
1339 | C(interface_support); | |
1340 | C(legacy_max_cylinder); | |
1341 | C(legacy_max_head); | |
1342 | C(legacy_sectors_per_track); | |
1343 | #undef C | |
1344 | } | |
1345 | boot_params.eddbuf_entries = nr; | |
1346 | ||
1347 | op.u.firmware_info.type = XEN_FW_DISK_MBR_SIGNATURE; | |
1348 | for (nr = 0; nr < EDD_MBR_SIG_MAX; nr++) { | |
1349 | op.u.firmware_info.index = nr; | |
1350 | ret = HYPERVISOR_dom0_op(&op); | |
1351 | if (ret) | |
1352 | break; | |
1353 | mbr_signature[nr] = op.u.firmware_info.u.disk_mbr_signature.mbr_signature; | |
1354 | } | |
1355 | boot_params.edd_mbr_sig_buf_entries = nr; | |
1356 | #endif | |
1357 | } | |
1358 | ||
577eebea JF |
1359 | /* |
1360 | * Set up the GDT and segment registers for -fstack-protector. Until | |
1361 | * we do this, we have to be careful not to call any stack-protected | |
1362 | * function, which is most of the kernel. | |
1363 | */ | |
1364 | static void __init xen_setup_stackprotector(void) | |
1365 | { | |
1366 | pv_cpu_ops.write_gdt_entry = xen_write_gdt_entry_boot; | |
1367 | pv_cpu_ops.load_gdt = xen_load_gdt_boot; | |
1368 | ||
1369 | setup_stack_canary_segment(0); | |
1370 | switch_to_new_gdt(0); | |
1371 | ||
1372 | pv_cpu_ops.write_gdt_entry = xen_write_gdt_entry; | |
1373 | pv_cpu_ops.load_gdt = xen_load_gdt; | |
1374 | } | |
1375 | ||
5ead97c8 JF |
1376 | /* First C function to be called on Xen boot */ |
1377 | asmlinkage void __init xen_start_kernel(void) | |
1378 | { | |
ec35a69c KRW |
1379 | struct physdev_set_iopl set_iopl; |
1380 | int rc; | |
5ead97c8 JF |
1381 | |
1382 | if (!xen_start_info) | |
1383 | return; | |
1384 | ||
6e833587 JF |
1385 | xen_domain_type = XEN_PV_DOMAIN; |
1386 | ||
7e77506a IC |
1387 | xen_setup_machphys_mapping(); |
1388 | ||
5ead97c8 | 1389 | /* Install Xen paravirt ops */ |
93b1eab3 JF |
1390 | pv_info = xen_info; |
1391 | pv_init_ops = xen_init_ops; | |
93b1eab3 | 1392 | pv_cpu_ops = xen_cpu_ops; |
93b1eab3 | 1393 | pv_apic_ops = xen_apic_ops; |
93b1eab3 | 1394 | |
6b18ae3e | 1395 | x86_init.resources.memory_setup = xen_memory_setup; |
42bbdb43 | 1396 | x86_init.oem.arch_setup = xen_arch_setup; |
6f30c1ac | 1397 | x86_init.oem.banner = xen_banner; |
845b3944 | 1398 | |
409771d2 | 1399 | xen_init_time_ops(); |
93b1eab3 | 1400 | |
ce2eef33 | 1401 | /* |
577eebea | 1402 | * Set up some pagetable state before starting to set any ptes. |
ce2eef33 | 1403 | */ |
577eebea | 1404 | |
973df35e JF |
1405 | xen_init_mmu_ops(); |
1406 | ||
577eebea JF |
1407 | /* Prevent unwanted bits from being set in PTEs. */ |
1408 | __supported_pte_mask &= ~_PAGE_GLOBAL; | |
8eaffa67 | 1409 | #if 0 |
577eebea | 1410 | if (!xen_initial_domain()) |
8eaffa67 | 1411 | #endif |
577eebea JF |
1412 | __supported_pte_mask &= ~(_PAGE_PWT | _PAGE_PCD); |
1413 | ||
1414 | __supported_pte_mask |= _PAGE_IOMAP; | |
1415 | ||
817a824b IC |
1416 | /* |
1417 | * Prevent page tables from being allocated in highmem, even | |
1418 | * if CONFIG_HIGHPTE is enabled. | |
1419 | */ | |
1420 | __userpte_alloc_gfp &= ~__GFP_HIGHMEM; | |
1421 | ||
b75fe4e5 | 1422 | /* Work out if we support NX */ |
4763ed4d | 1423 | x86_configure_nx(); |
b75fe4e5 | 1424 | |
577eebea JF |
1425 | xen_setup_features(); |
1426 | ||
1427 | /* Get mfn list */ | |
1428 | if (!xen_feature(XENFEAT_auto_translated_physmap)) | |
1429 | xen_build_dynamic_phys_to_machine(); | |
1430 | ||
1431 | /* | |
1432 | * Set up kernel GDT and segment registers, mainly so that | |
1433 | * -fstack-protector code can be executed. | |
1434 | */ | |
1435 | xen_setup_stackprotector(); | |
0d1edf46 | 1436 | |
ce2eef33 | 1437 | xen_init_irq_ops(); |
e826fe1b JF |
1438 | xen_init_cpuid_mask(); |
1439 | ||
94a8c3c2 | 1440 | #ifdef CONFIG_X86_LOCAL_APIC |
ad66dd34 | 1441 | /* |
94a8c3c2 | 1442 | * set up the basic apic ops. |
ad66dd34 | 1443 | */ |
c1eeb2de | 1444 | set_xen_basic_apic_ops(); |
ad66dd34 | 1445 | #endif |
93b1eab3 | 1446 | |
e57778a1 JF |
1447 | if (xen_feature(XENFEAT_mmu_pt_update_preserve_ad)) { |
1448 | pv_mmu_ops.ptep_modify_prot_start = xen_ptep_modify_prot_start; | |
1449 | pv_mmu_ops.ptep_modify_prot_commit = xen_ptep_modify_prot_commit; | |
1450 | } | |
1451 | ||
fefa629a JF |
1452 | machine_ops = xen_machine_ops; |
1453 | ||
38341432 JF |
1454 | /* |
1455 | * The only reliable way to retain the initial address of the | |
1456 | * percpu gdt_page is to remember it here, so we can go and | |
1457 | * mark it RW later, when the initial percpu area is freed. | |
1458 | */ | |
1459 | xen_initial_gdt = &per_cpu(gdt_page, 0); | |
795f99b6 | 1460 | |
a9e7062d | 1461 | xen_smp_init(); |
5ead97c8 | 1462 | |
c1f5db1a IC |
1463 | #ifdef CONFIG_ACPI_NUMA |
1464 | /* | |
1465 | * The pages we from Xen are not related to machine pages, so | |
1466 | * any NUMA information the kernel tries to get from ACPI will | |
1467 | * be meaningless. Prevent it from trying. | |
1468 | */ | |
1469 | acpi_numa = -1; | |
1470 | #endif | |
c79c4982 KRW |
1471 | #ifdef CONFIG_X86_PAT |
1472 | /* | |
1473 | * For right now disable the PAT. We should remove this once | |
1474 | * git commit 8eaffa67b43e99ae581622c5133e20b0f48bcef1 | |
1475 | * (xen/pat: Disable PAT support for now) is reverted. | |
1476 | */ | |
1477 | pat_enabled = 0; | |
1478 | #endif | |
60223a32 | 1479 | /* Don't do the full vcpu_info placement stuff until we have a |
2e8fe719 | 1480 | possible map and a non-dummy shared_info. */ |
60223a32 | 1481 | per_cpu(xen_vcpu, 0) = &HYPERVISOR_shared_info->vcpu_info[0]; |
5ead97c8 | 1482 | |
55d80856 | 1483 | local_irq_disable(); |
2ce802f6 | 1484 | early_boot_irqs_disabled = true; |
55d80856 | 1485 | |
084a2a4e | 1486 | xen_raw_console_write("mapping kernel into physical memory\n"); |
3699aad0 | 1487 | xen_setup_kernel_pagetable((pgd_t *)xen_start_info->pt_base, xen_start_info->nr_pages); |
5ead97c8 | 1488 | |
33a84750 JF |
1489 | /* Allocate and initialize top and mid mfn levels for p2m structure */ |
1490 | xen_build_mfn_list_list(); | |
1491 | ||
5ead97c8 JF |
1492 | /* keep using Xen gdt for now; no urgent need to change it */ |
1493 | ||
e68266b7 | 1494 | #ifdef CONFIG_X86_32 |
93b1eab3 | 1495 | pv_info.kernel_rpl = 1; |
5ead97c8 | 1496 | if (xen_feature(XENFEAT_supervisor_mode_kernel)) |
93b1eab3 | 1497 | pv_info.kernel_rpl = 0; |
e68266b7 IC |
1498 | #else |
1499 | pv_info.kernel_rpl = 0; | |
1500 | #endif | |
5ead97c8 | 1501 | /* set the limit of our address space */ |
fb1d8404 | 1502 | xen_reserve_top(); |
5ead97c8 | 1503 | |
ec35a69c KRW |
1504 | /* We used to do this in xen_arch_setup, but that is too late on AMD |
1505 | * were early_cpu_init (run before ->arch_setup()) calls early_amd_init | |
1506 | * which pokes 0xcf8 port. | |
1507 | */ | |
1508 | set_iopl.iopl = 1; | |
1509 | rc = HYPERVISOR_physdev_op(PHYSDEVOP_set_iopl, &set_iopl); | |
1510 | if (rc != 0) | |
1511 | xen_raw_printk("physdev_op failed %d\n", rc); | |
1512 | ||
7d087b68 | 1513 | #ifdef CONFIG_X86_32 |
5ead97c8 JF |
1514 | /* set up basic CPUID stuff */ |
1515 | cpu_detect(&new_cpu_data); | |
1516 | new_cpu_data.hard_math = 1; | |
d560bc61 | 1517 | new_cpu_data.wp_works_ok = 1; |
5ead97c8 | 1518 | new_cpu_data.x86_capability[0] = cpuid_edx(1); |
7d087b68 | 1519 | #endif |
5ead97c8 JF |
1520 | |
1521 | /* Poke various useful things into boot_params */ | |
30c82645 PA |
1522 | boot_params.hdr.type_of_loader = (9 << 4) | 0; |
1523 | boot_params.hdr.ramdisk_image = xen_start_info->mod_start | |
1524 | ? __pa(xen_start_info->mod_start) : 0; | |
1525 | boot_params.hdr.ramdisk_size = xen_start_info->mod_len; | |
b7c3c5c1 | 1526 | boot_params.hdr.cmd_line_ptr = __pa(xen_start_info->cmd_line); |
5ead97c8 | 1527 | |
6e833587 | 1528 | if (!xen_initial_domain()) { |
83abc70a | 1529 | add_preferred_console("xenboot", 0, NULL); |
9e124fe1 | 1530 | add_preferred_console("tty", 0, NULL); |
b8c2d3df | 1531 | add_preferred_console("hvc", 0, NULL); |
b5401a96 AN |
1532 | if (pci_xen) |
1533 | x86_init.pci.arch_init = pci_xen_init; | |
5d990b62 | 1534 | } else { |
c2419b4a JF |
1535 | const struct dom0_vga_console_info *info = |
1536 | (void *)((char *)xen_start_info + | |
1537 | xen_start_info->console.dom0.info_off); | |
ffb8b233 KRW |
1538 | struct xen_platform_op op = { |
1539 | .cmd = XENPF_firmware_info, | |
1540 | .interface_version = XENPF_INTERFACE_VERSION, | |
1541 | .u.firmware_info.type = XEN_FW_KBD_SHIFT_FLAGS, | |
1542 | }; | |
c2419b4a JF |
1543 | |
1544 | xen_init_vga(info, xen_start_info->console.dom0.info_size); | |
1545 | xen_start_info->console.domU.mfn = 0; | |
1546 | xen_start_info->console.domU.evtchn = 0; | |
1547 | ||
ffb8b233 KRW |
1548 | if (HYPERVISOR_dom0_op(&op) == 0) |
1549 | boot_params.kbd_status = op.u.firmware_info.u.kbd_shift_flags; | |
1550 | ||
31b3c9d7 KRW |
1551 | xen_init_apic(); |
1552 | ||
5d990b62 CW |
1553 | /* Make sure ACS will be enabled */ |
1554 | pci_request_acs(); | |
211063dc KRW |
1555 | |
1556 | xen_acpi_sleep_register(); | |
bd49940a KRW |
1557 | |
1558 | /* Avoid searching for BIOS MP tables */ | |
1559 | x86_init.mpparse.find_smp_config = x86_init_noop; | |
1560 | x86_init.mpparse.get_smp_config = x86_init_uint_noop; | |
96f28bc6 DV |
1561 | |
1562 | xen_boot_params_init_edd(); | |
9e124fe1 | 1563 | } |
76a8df7b DV |
1564 | #ifdef CONFIG_PCI |
1565 | /* PCI BIOS service won't work from a PV guest. */ | |
1566 | pci_probe &= ~PCI_PROBE_BIOS; | |
1567 | #endif | |
084a2a4e JF |
1568 | xen_raw_console_write("about to get started...\n"); |
1569 | ||
499d19b8 JF |
1570 | xen_setup_runstate_info(0); |
1571 | ||
5ead97c8 | 1572 | /* Start the world */ |
f5d36de0 | 1573 | #ifdef CONFIG_X86_32 |
f0d43100 | 1574 | i386_start_kernel(); |
f5d36de0 | 1575 | #else |
084a2a4e | 1576 | x86_64_start_reservations((char *)__pa_symbol(&boot_params)); |
f5d36de0 | 1577 | #endif |
5ead97c8 | 1578 | } |
bee6ab53 | 1579 | |
e9daff24 | 1580 | void __ref xen_hvm_init_shared_info(void) |
bee6ab53 | 1581 | { |
e9daff24 | 1582 | int cpu; |
bee6ab53 | 1583 | struct xen_add_to_physmap xatp; |
e9daff24 | 1584 | static struct shared_info *shared_info_page = 0; |
bee6ab53 | 1585 | |
e9daff24 KRW |
1586 | if (!shared_info_page) |
1587 | shared_info_page = (struct shared_info *) | |
1588 | extend_brk(PAGE_SIZE, PAGE_SIZE); | |
bee6ab53 SY |
1589 | xatp.domid = DOMID_SELF; |
1590 | xatp.idx = 0; | |
1591 | xatp.space = XENMAPSPACE_shared_info; | |
e9daff24 | 1592 | xatp.gpfn = __pa(shared_info_page) >> PAGE_SHIFT; |
bee6ab53 SY |
1593 | if (HYPERVISOR_memory_op(XENMEM_add_to_physmap, &xatp)) |
1594 | BUG(); | |
1595 | ||
e9daff24 | 1596 | HYPERVISOR_shared_info = (struct shared_info *)shared_info_page; |
bee6ab53 | 1597 | |
016b6f5f SS |
1598 | /* xen_vcpu is a pointer to the vcpu_info struct in the shared_info |
1599 | * page, we use it in the event channel upcall and in some pvclock | |
1600 | * related functions. We don't need the vcpu_info placement | |
1601 | * optimizations because we don't use any pv_mmu or pv_irq op on | |
e9daff24 KRW |
1602 | * HVM. |
1603 | * When xen_hvm_init_shared_info is run at boot time only vcpu 0 is | |
1604 | * online but xen_hvm_init_shared_info is run at resume time too and | |
1605 | * in that case multiple vcpus might be online. */ | |
1606 | for_each_online_cpu(cpu) { | |
016b6f5f SS |
1607 | per_cpu(xen_vcpu, cpu) = &HYPERVISOR_shared_info->vcpu_info[cpu]; |
1608 | } | |
bee6ab53 SY |
1609 | } |
1610 | ||
e9daff24 | 1611 | #ifdef CONFIG_XEN_PVHVM |
4ff2d062 OH |
1612 | static void __init init_hvm_pv_info(void) |
1613 | { | |
e9daff24 | 1614 | int major, minor; |
5eb65be2 | 1615 | uint32_t eax, ebx, ecx, edx, pages, msr, base; |
4ff2d062 OH |
1616 | u64 pfn; |
1617 | ||
1618 | base = xen_cpuid_base(); | |
e9daff24 KRW |
1619 | cpuid(base + 1, &eax, &ebx, &ecx, &edx); |
1620 | ||
1621 | major = eax >> 16; | |
1622 | minor = eax & 0xffff; | |
1623 | printk(KERN_INFO "Xen version %d.%d.\n", major, minor); | |
1624 | ||
4ff2d062 OH |
1625 | cpuid(base + 2, &pages, &msr, &ecx, &edx); |
1626 | ||
1627 | pfn = __pa(hypercall_page); | |
1628 | wrmsr_safe(msr, (u32)pfn, (u32)(pfn >> 32)); | |
1629 | ||
1630 | xen_setup_features(); | |
1631 | ||
1632 | pv_info.name = "Xen HVM"; | |
1633 | ||
1634 | xen_domain_type = XEN_HVM_DOMAIN; | |
1635 | } | |
1636 | ||
38e20b07 SY |
1637 | static int __cpuinit xen_hvm_cpu_notify(struct notifier_block *self, |
1638 | unsigned long action, void *hcpu) | |
1639 | { | |
1640 | int cpu = (long)hcpu; | |
1641 | switch (action) { | |
1642 | case CPU_UP_PREPARE: | |
90d4f553 | 1643 | xen_vcpu_setup(cpu); |
7918c92a | 1644 | if (xen_have_vector_callback) { |
99bbb3a8 | 1645 | xen_init_lock_cpu(cpu); |
7918c92a KRW |
1646 | if (xen_feature(XENFEAT_hvm_safe_pvclock)) |
1647 | xen_setup_timer(cpu); | |
1648 | } | |
38e20b07 SY |
1649 | break; |
1650 | default: | |
1651 | break; | |
1652 | } | |
1653 | return NOTIFY_OK; | |
1654 | } | |
1655 | ||
ad3062a0 | 1656 | static struct notifier_block xen_hvm_cpu_notifier __cpuinitdata = { |
38e20b07 SY |
1657 | .notifier_call = xen_hvm_cpu_notify, |
1658 | }; | |
1659 | ||
bee6ab53 SY |
1660 | static void __init xen_hvm_guest_init(void) |
1661 | { | |
4ff2d062 | 1662 | init_hvm_pv_info(); |
bee6ab53 | 1663 | |
016b6f5f | 1664 | xen_hvm_init_shared_info(); |
38e20b07 SY |
1665 | |
1666 | if (xen_feature(XENFEAT_hvm_callback_vector)) | |
1667 | xen_have_vector_callback = 1; | |
99bbb3a8 | 1668 | xen_hvm_smp_init(); |
38e20b07 | 1669 | register_cpu_notifier(&xen_hvm_cpu_notifier); |
c1c5413a | 1670 | xen_unplug_emulated_devices(); |
38e20b07 | 1671 | x86_init.irqs.intr_init = xen_init_IRQ; |
409771d2 | 1672 | xen_hvm_init_time_ops(); |
59151001 | 1673 | xen_hvm_init_mmu_ops(); |
bee6ab53 SY |
1674 | } |
1675 | ||
1676 | static bool __init xen_hvm_platform(void) | |
1677 | { | |
1678 | if (xen_pv_domain()) | |
1679 | return false; | |
1680 | ||
e9daff24 | 1681 | if (!xen_cpuid_base()) |
bee6ab53 SY |
1682 | return false; |
1683 | ||
1684 | return true; | |
1685 | } | |
1686 | ||
d9b8ca84 SY |
1687 | bool xen_hvm_need_lapic(void) |
1688 | { | |
1689 | if (xen_pv_domain()) | |
1690 | return false; | |
1691 | if (!xen_hvm_domain()) | |
1692 | return false; | |
1693 | if (xen_feature(XENFEAT_hvm_pirqs) && xen_have_vector_callback) | |
1694 | return false; | |
1695 | return true; | |
1696 | } | |
1697 | EXPORT_SYMBOL_GPL(xen_hvm_need_lapic); | |
1698 | ||
ad3062a0 | 1699 | const struct hypervisor_x86 x86_hyper_xen_hvm __refconst = { |
bee6ab53 SY |
1700 | .name = "Xen HVM", |
1701 | .detect = xen_hvm_platform, | |
1702 | .init_platform = xen_hvm_guest_init, | |
4cca6ea0 | 1703 | .x2apic_available = xen_x2apic_para_available, |
bee6ab53 SY |
1704 | }; |
1705 | EXPORT_SYMBOL(x86_hyper_xen_hvm); | |
ca65f9fc | 1706 | #endif |