paravirt: add hooks for ptep_modify_prot_start/commit
[linux-2.6-block.git] / arch / x86 / xen / enlighten.c
CommitLineData
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1/*
2 * Core of Xen paravirt_ops implementation.
3 *
4 * This file contains the xen_paravirt_ops structure itself, and the
5 * implementations for:
6 * - privileged instructions
7 * - interrupt flags
8 * - segment operations
9 * - booting and setup
10 *
11 * Jeremy Fitzhardinge <jeremy@xensource.com>, XenSource Inc, 2007
12 */
13
14#include <linux/kernel.h>
15#include <linux/init.h>
16#include <linux/smp.h>
17#include <linux/preempt.h>
f120f13e 18#include <linux/hardirq.h>
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19#include <linux/percpu.h>
20#include <linux/delay.h>
21#include <linux/start_kernel.h>
22#include <linux/sched.h>
23#include <linux/bootmem.h>
24#include <linux/module.h>
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25#include <linux/mm.h>
26#include <linux/page-flags.h>
27#include <linux/highmem.h>
b8c2d3df 28#include <linux/console.h>
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29
30#include <xen/interface/xen.h>
31#include <xen/interface/physdev.h>
32#include <xen/interface/vcpu.h>
fefa629a 33#include <xen/interface/sched.h>
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34#include <xen/features.h>
35#include <xen/page.h>
36
37#include <asm/paravirt.h>
38#include <asm/page.h>
39#include <asm/xen/hypercall.h>
40#include <asm/xen/hypervisor.h>
41#include <asm/fixmap.h>
42#include <asm/processor.h>
43#include <asm/setup.h>
44#include <asm/desc.h>
45#include <asm/pgtable.h>
f87e4cac 46#include <asm/tlbflush.h>
fefa629a 47#include <asm/reboot.h>
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48
49#include "xen-ops.h"
3b827c1b 50#include "mmu.h"
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51#include "multicalls.h"
52
53EXPORT_SYMBOL_GPL(hypercall_page);
54
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55DEFINE_PER_CPU(struct vcpu_info *, xen_vcpu);
56DEFINE_PER_CPU(struct vcpu_info, xen_vcpu_info);
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57
58/*
59 * Note about cr3 (pagetable base) values:
60 *
61 * xen_cr3 contains the current logical cr3 value; it contains the
62 * last set cr3. This may not be the current effective cr3, because
63 * its update may be being lazily deferred. However, a vcpu looking
64 * at its own cr3 can use this value knowing that it everything will
65 * be self-consistent.
66 *
67 * xen_current_cr3 contains the actual vcpu cr3; it is set once the
68 * hypercall to set the vcpu cr3 is complete (so it may be a little
69 * out of date, but it will never be set early). If one vcpu is
70 * looking at another vcpu's cr3 value, it should use this variable.
71 */
72DEFINE_PER_CPU(unsigned long, xen_cr3); /* cr3 stored as physaddr */
73DEFINE_PER_CPU(unsigned long, xen_current_cr3); /* actual vcpu cr3 */
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74
75struct start_info *xen_start_info;
76EXPORT_SYMBOL_GPL(xen_start_info);
77
a0d695c8 78struct shared_info xen_dummy_shared_info;
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79
80/*
81 * Point at some empty memory to start with. We map the real shared_info
82 * page as soon as fixmap is up and running.
83 */
a0d695c8 84struct shared_info *HYPERVISOR_shared_info = (void *)&xen_dummy_shared_info;
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85
86/*
87 * Flag to determine whether vcpu info placement is available on all
88 * VCPUs. We assume it is to start with, and then set it to zero on
89 * the first failure. This is because it can succeed on some VCPUs
90 * and not others, since it can involve hypervisor memory allocation,
91 * or because the guest failed to guarantee all the appropriate
92 * constraints on all VCPUs (ie buffer can't cross a page boundary).
93 *
94 * Note that any particular CPU may be using a placed vcpu structure,
95 * but we can only optimise if the all are.
96 *
97 * 0: not available, 1: available
98 */
04c44a08 99static int have_vcpu_info_placement = 1;
60223a32 100
9c7a7942 101static void xen_vcpu_setup(int cpu)
5ead97c8 102{
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103 struct vcpu_register_vcpu_info info;
104 int err;
105 struct vcpu_info *vcpup;
106
a0d695c8 107 BUG_ON(HYPERVISOR_shared_info == &xen_dummy_shared_info);
5ead97c8 108 per_cpu(xen_vcpu, cpu) = &HYPERVISOR_shared_info->vcpu_info[cpu];
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109
110 if (!have_vcpu_info_placement)
111 return; /* already tested, not available */
112
113 vcpup = &per_cpu(xen_vcpu_info, cpu);
114
115 info.mfn = virt_to_mfn(vcpup);
116 info.offset = offset_in_page(vcpup);
117
e3d26976 118 printk(KERN_DEBUG "trying to map vcpu_info %d at %p, mfn %llx, offset %d\n",
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119 cpu, vcpup, info.mfn, info.offset);
120
121 /* Check to see if the hypervisor will put the vcpu_info
122 structure where we want it, which allows direct access via
123 a percpu-variable. */
124 err = HYPERVISOR_vcpu_op(VCPUOP_register_vcpu_info, cpu, &info);
125
126 if (err) {
127 printk(KERN_DEBUG "register_vcpu_info failed: err=%d\n", err);
128 have_vcpu_info_placement = 0;
129 } else {
130 /* This cpu is using the registered vcpu info, even if
131 later ones fail to. */
132 per_cpu(xen_vcpu, cpu) = vcpup;
6487673b 133
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134 printk(KERN_DEBUG "cpu %d using vcpu_info at %p\n",
135 cpu, vcpup);
136 }
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137}
138
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139/*
140 * On restore, set the vcpu placement up again.
141 * If it fails, then we're in a bad state, since
142 * we can't back out from using it...
143 */
144void xen_vcpu_restore(void)
145{
146 if (have_vcpu_info_placement) {
147 int cpu;
148
149 for_each_online_cpu(cpu) {
150 bool other_cpu = (cpu != smp_processor_id());
151
152 if (other_cpu &&
153 HYPERVISOR_vcpu_op(VCPUOP_down, cpu, NULL))
154 BUG();
155
156 xen_vcpu_setup(cpu);
157
158 if (other_cpu &&
159 HYPERVISOR_vcpu_op(VCPUOP_up, cpu, NULL))
160 BUG();
161 }
162
163 BUG_ON(!have_vcpu_info_placement);
164 }
165}
166
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167static void __init xen_banner(void)
168{
169 printk(KERN_INFO "Booting paravirtualized kernel on %s\n",
93b1eab3 170 pv_info.name);
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171 printk(KERN_INFO "Hypervisor signature: %s\n", xen_start_info->magic);
172}
173
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174static void xen_cpuid(unsigned int *ax, unsigned int *bx,
175 unsigned int *cx, unsigned int *dx)
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176{
177 unsigned maskedx = ~0;
178
179 /*
180 * Mask out inconvenient features, to try and disable as many
181 * unsupported kernel subsystems as possible.
182 */
65ea5b03 183 if (*ax == 1)
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184 maskedx = ~((1 << X86_FEATURE_APIC) | /* disable APIC */
185 (1 << X86_FEATURE_ACPI) | /* disable ACPI */
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186 (1 << X86_FEATURE_MCE) | /* disable MCE */
187 (1 << X86_FEATURE_MCA) | /* disable MCA */
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188 (1 << X86_FEATURE_ACC)); /* thermal monitoring */
189
190 asm(XEN_EMULATE_PREFIX "cpuid"
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191 : "=a" (*ax),
192 "=b" (*bx),
193 "=c" (*cx),
194 "=d" (*dx)
195 : "0" (*ax), "2" (*cx));
196 *dx &= maskedx;
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197}
198
199static void xen_set_debugreg(int reg, unsigned long val)
200{
201 HYPERVISOR_set_debugreg(reg, val);
202}
203
204static unsigned long xen_get_debugreg(int reg)
205{
206 return HYPERVISOR_get_debugreg(reg);
207}
208
209static unsigned long xen_save_fl(void)
210{
211 struct vcpu_info *vcpu;
212 unsigned long flags;
213
5ead97c8 214 vcpu = x86_read_percpu(xen_vcpu);
f120f13e 215
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216 /* flag has opposite sense of mask */
217 flags = !vcpu->evtchn_upcall_mask;
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218
219 /* convert to IF type flag
220 -0 -> 0x00000000
221 -1 -> 0xffffffff
222 */
223 return (-flags) & X86_EFLAGS_IF;
224}
225
226static void xen_restore_fl(unsigned long flags)
227{
228 struct vcpu_info *vcpu;
229
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230 /* convert from IF type flag */
231 flags = !(flags & X86_EFLAGS_IF);
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232
233 /* There's a one instruction preempt window here. We need to
234 make sure we're don't switch CPUs between getting the vcpu
235 pointer and updating the mask. */
236 preempt_disable();
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237 vcpu = x86_read_percpu(xen_vcpu);
238 vcpu->evtchn_upcall_mask = flags;
f120f13e 239 preempt_enable_no_resched();
5ead97c8 240
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241 /* Doesn't matter if we get preempted here, because any
242 pending event will get dealt with anyway. */
5ead97c8 243
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244 if (flags == 0) {
245 preempt_check_resched();
246 barrier(); /* unmask then check (avoid races) */
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247 if (unlikely(vcpu->evtchn_upcall_pending))
248 force_evtchn_callback();
f120f13e 249 }
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250}
251
252static void xen_irq_disable(void)
253{
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254 /* There's a one instruction preempt window here. We need to
255 make sure we're don't switch CPUs between getting the vcpu
256 pointer and updating the mask. */
5ead97c8 257 preempt_disable();
f120f13e 258 x86_read_percpu(xen_vcpu)->evtchn_upcall_mask = 1;
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259 preempt_enable_no_resched();
260}
261
262static void xen_irq_enable(void)
263{
264 struct vcpu_info *vcpu;
265
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266 /* We don't need to worry about being preempted here, since
267 either a) interrupts are disabled, so no preemption, or b)
268 the caller is confused and is trying to re-enable interrupts
269 on an indeterminate processor. */
270
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271 vcpu = x86_read_percpu(xen_vcpu);
272 vcpu->evtchn_upcall_mask = 0;
273
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274 /* Doesn't matter if we get preempted here, because any
275 pending event will get dealt with anyway. */
5ead97c8 276
f120f13e 277 barrier(); /* unmask then check (avoid races) */
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278 if (unlikely(vcpu->evtchn_upcall_pending))
279 force_evtchn_callback();
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280}
281
282static void xen_safe_halt(void)
283{
284 /* Blocking includes an implicit local_irq_enable(). */
349c709f 285 if (HYPERVISOR_sched_op(SCHEDOP_block, NULL) != 0)
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286 BUG();
287}
288
289static void xen_halt(void)
290{
291 if (irqs_disabled())
292 HYPERVISOR_vcpu_op(VCPUOP_down, smp_processor_id(), NULL);
293 else
294 xen_safe_halt();
295}
296
8965c1c0 297static void xen_leave_lazy(void)
5ead97c8 298{
8965c1c0 299 paravirt_leave_lazy(paravirt_get_lazy_mode());
5ead97c8 300 xen_mc_flush();
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301}
302
303static unsigned long xen_store_tr(void)
304{
305 return 0;
306}
307
308static void xen_set_ldt(const void *addr, unsigned entries)
309{
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310 struct mmuext_op *op;
311 struct multicall_space mcs = xen_mc_entry(sizeof(*op));
312
313 op = mcs.args;
314 op->cmd = MMUEXT_SET_LDT;
4dbf7af6 315 op->arg1.linear_addr = (unsigned long)addr;
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316 op->arg2.nr_ents = entries;
317
318 MULTI_mmuext_op(mcs.mc, op, 1, NULL, DOMID_SELF);
319
320 xen_mc_issue(PARAVIRT_LAZY_CPU);
321}
322
6b68f01b 323static void xen_load_gdt(const struct desc_ptr *dtr)
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324{
325 unsigned long *frames;
326 unsigned long va = dtr->address;
327 unsigned int size = dtr->size + 1;
328 unsigned pages = (size + PAGE_SIZE - 1) / PAGE_SIZE;
329 int f;
330 struct multicall_space mcs;
331
332 /* A GDT can be up to 64k in size, which corresponds to 8192
333 8-byte entries, or 16 4k pages.. */
334
335 BUG_ON(size > 65536);
336 BUG_ON(va & ~PAGE_MASK);
337
338 mcs = xen_mc_entry(sizeof(*frames) * pages);
339 frames = mcs.args;
340
341 for (f = 0; va < dtr->address + size; va += PAGE_SIZE, f++) {
342 frames[f] = virt_to_mfn(va);
343 make_lowmem_page_readonly((void *)va);
344 }
345
346 MULTI_set_gdt(mcs.mc, frames, size / sizeof(struct desc_struct));
347
348 xen_mc_issue(PARAVIRT_LAZY_CPU);
349}
350
351static void load_TLS_descriptor(struct thread_struct *t,
352 unsigned int cpu, unsigned int i)
353{
354 struct desc_struct *gdt = get_cpu_gdt_table(cpu);
355 xmaddr_t maddr = virt_to_machine(&gdt[GDT_ENTRY_TLS_MIN+i]);
356 struct multicall_space mc = __xen_mc_entry(0);
357
358 MULTI_update_descriptor(mc.mc, maddr.maddr, t->tls_array[i]);
359}
360
361static void xen_load_tls(struct thread_struct *t, unsigned int cpu)
362{
363 xen_mc_batch();
364
365 load_TLS_descriptor(t, cpu, 0);
366 load_TLS_descriptor(t, cpu, 1);
367 load_TLS_descriptor(t, cpu, 2);
368
369 xen_mc_issue(PARAVIRT_LAZY_CPU);
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370
371 /*
372 * XXX sleazy hack: If we're being called in a lazy-cpu zone,
373 * it means we're in a context switch, and %gs has just been
374 * saved. This means we can zero it out to prevent faults on
375 * exit from the hypervisor if the next process has no %gs.
376 * Either way, it has been saved, and the new value will get
377 * loaded properly. This will go away as soon as Xen has been
378 * modified to not save/restore %gs for normal hypercalls.
379 */
8965c1c0 380 if (paravirt_get_lazy_mode() == PARAVIRT_LAZY_CPU)
8b84ad94 381 loadsegment(gs, 0);
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382}
383
384static void xen_write_ldt_entry(struct desc_struct *dt, int entrynum,
75b8bb3e 385 const void *ptr)
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386{
387 unsigned long lp = (unsigned long)&dt[entrynum];
388 xmaddr_t mach_lp = virt_to_machine(lp);
75b8bb3e 389 u64 entry = *(u64 *)ptr;
5ead97c8 390
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391 preempt_disable();
392
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393 xen_mc_flush();
394 if (HYPERVISOR_update_descriptor(mach_lp.maddr, entry))
395 BUG();
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396
397 preempt_enable();
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398}
399
400static int cvt_gate_to_trap(int vector, u32 low, u32 high,
401 struct trap_info *info)
402{
403 u8 type, dpl;
404
405 type = (high >> 8) & 0x1f;
406 dpl = (high >> 13) & 3;
407
408 if (type != 0xf && type != 0xe)
409 return 0;
410
411 info->vector = vector;
412 info->address = (high & 0xffff0000) | (low & 0x0000ffff);
413 info->cs = low >> 16;
414 info->flags = dpl;
415 /* interrupt gates clear IF */
416 if (type == 0xe)
417 info->flags |= 4;
418
419 return 1;
420}
421
422/* Locations of each CPU's IDT */
6b68f01b 423static DEFINE_PER_CPU(struct desc_ptr, idt_desc);
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424
425/* Set an IDT entry. If the entry is part of the current IDT, then
426 also update Xen. */
8d947344 427static void xen_write_idt_entry(gate_desc *dt, int entrynum, const gate_desc *g)
5ead97c8 428{
5ead97c8 429 unsigned long p = (unsigned long)&dt[entrynum];
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430 unsigned long start, end;
431
432 preempt_disable();
433
434 start = __get_cpu_var(idt_desc).address;
435 end = start + __get_cpu_var(idt_desc).size + 1;
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436
437 xen_mc_flush();
438
8d947344 439 native_write_idt_entry(dt, entrynum, g);
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440
441 if (p >= start && (p + 8) <= end) {
442 struct trap_info info[2];
8d947344 443 u32 *desc = (u32 *)g;
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444
445 info[1].address = 0;
446
8d947344 447 if (cvt_gate_to_trap(entrynum, desc[0], desc[1], &info[0]))
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448 if (HYPERVISOR_set_trap_table(info))
449 BUG();
450 }
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451
452 preempt_enable();
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453}
454
6b68f01b 455static void xen_convert_trap_info(const struct desc_ptr *desc,
f87e4cac 456 struct trap_info *traps)
5ead97c8 457{
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458 unsigned in, out, count;
459
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460 count = (desc->size+1) / 8;
461 BUG_ON(count > 256);
462
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463 for (in = out = 0; in < count; in++) {
464 const u32 *entry = (u32 *)(desc->address + in * 8);
465
466 if (cvt_gate_to_trap(in, entry[0], entry[1], &traps[out]))
467 out++;
468 }
469 traps[out].address = 0;
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470}
471
472void xen_copy_trap_info(struct trap_info *traps)
473{
6b68f01b 474 const struct desc_ptr *desc = &__get_cpu_var(idt_desc);
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475
476 xen_convert_trap_info(desc, traps);
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477}
478
479/* Load a new IDT into Xen. In principle this can be per-CPU, so we
480 hold a spinlock to protect the static traps[] array (static because
481 it avoids allocation, and saves stack space). */
6b68f01b 482static void xen_load_idt(const struct desc_ptr *desc)
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483{
484 static DEFINE_SPINLOCK(lock);
485 static struct trap_info traps[257];
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486
487 spin_lock(&lock);
488
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489 __get_cpu_var(idt_desc) = *desc;
490
f87e4cac 491 xen_convert_trap_info(desc, traps);
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492
493 xen_mc_flush();
494 if (HYPERVISOR_set_trap_table(traps))
495 BUG();
496
497 spin_unlock(&lock);
498}
499
500/* Write a GDT descriptor entry. Ignore LDT descriptors, since
501 they're handled differently. */
502static void xen_write_gdt_entry(struct desc_struct *dt, int entry,
014b15be 503 const void *desc, int type)
5ead97c8 504{
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505 preempt_disable();
506
014b15be
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507 switch (type) {
508 case DESC_LDT:
509 case DESC_TSS:
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510 /* ignore */
511 break;
512
513 default: {
514 xmaddr_t maddr = virt_to_machine(&dt[entry]);
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515
516 xen_mc_flush();
014b15be 517 if (HYPERVISOR_update_descriptor(maddr.maddr, *(u64 *)desc))
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518 BUG();
519 }
520
521 }
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522
523 preempt_enable();
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524}
525
faca6227 526static void xen_load_sp0(struct tss_struct *tss,
f120f13e 527 struct thread_struct *thread)
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528{
529 struct multicall_space mcs = xen_mc_entry(0);
faca6227 530 MULTI_stack_switch(mcs.mc, __KERNEL_DS, thread->sp0);
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531 xen_mc_issue(PARAVIRT_LAZY_CPU);
532}
533
534static void xen_set_iopl_mask(unsigned mask)
535{
536 struct physdev_set_iopl set_iopl;
537
538 /* Force the change at ring 0. */
539 set_iopl.iopl = (mask == 0) ? 1 : (mask >> 12) & 3;
540 HYPERVISOR_physdev_op(PHYSDEVOP_set_iopl, &set_iopl);
541}
542
543static void xen_io_delay(void)
544{
545}
546
547#ifdef CONFIG_X86_LOCAL_APIC
42e0a9aa 548static u32 xen_apic_read(unsigned long reg)
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549{
550 return 0;
551}
f87e4cac 552
42e0a9aa 553static void xen_apic_write(unsigned long reg, u32 val)
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554{
555 /* Warn to see if there's any stray references */
556 WARN_ON(1);
557}
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558#endif
559
560static void xen_flush_tlb(void)
561{
d66bf8fc 562 struct mmuext_op *op;
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563 struct multicall_space mcs;
564
565 preempt_disable();
566
567 mcs = xen_mc_entry(sizeof(*op));
5ead97c8 568
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569 op = mcs.args;
570 op->cmd = MMUEXT_TLB_FLUSH_LOCAL;
571 MULTI_mmuext_op(mcs.mc, op, 1, NULL, DOMID_SELF);
572
573 xen_mc_issue(PARAVIRT_LAZY_MMU);
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574
575 preempt_enable();
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576}
577
578static void xen_flush_tlb_single(unsigned long addr)
579{
d66bf8fc 580 struct mmuext_op *op;
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581 struct multicall_space mcs;
582
583 preempt_disable();
5ead97c8 584
41e332b2 585 mcs = xen_mc_entry(sizeof(*op));
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586 op = mcs.args;
587 op->cmd = MMUEXT_INVLPG_LOCAL;
588 op->arg1.linear_addr = addr & PAGE_MASK;
589 MULTI_mmuext_op(mcs.mc, op, 1, NULL, DOMID_SELF);
590
591 xen_mc_issue(PARAVIRT_LAZY_MMU);
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592
593 preempt_enable();
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594}
595
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596static void xen_flush_tlb_others(const cpumask_t *cpus, struct mm_struct *mm,
597 unsigned long va)
598{
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599 struct {
600 struct mmuext_op op;
601 cpumask_t mask;
602 } *args;
f87e4cac 603 cpumask_t cpumask = *cpus;
d66bf8fc 604 struct multicall_space mcs;
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605
606 /*
607 * A couple of (to be removed) sanity checks:
608 *
609 * - current CPU must not be in mask
610 * - mask must exist :)
611 */
612 BUG_ON(cpus_empty(cpumask));
613 BUG_ON(cpu_isset(smp_processor_id(), cpumask));
614 BUG_ON(!mm);
615
616 /* If a CPU which we ran on has gone down, OK. */
617 cpus_and(cpumask, cpumask, cpu_online_map);
618 if (cpus_empty(cpumask))
619 return;
620
d66bf8fc
JF
621 mcs = xen_mc_entry(sizeof(*args));
622 args = mcs.args;
623 args->mask = cpumask;
624 args->op.arg2.vcpumask = &args->mask;
625
f87e4cac 626 if (va == TLB_FLUSH_ALL) {
d66bf8fc 627 args->op.cmd = MMUEXT_TLB_FLUSH_MULTI;
f87e4cac 628 } else {
d66bf8fc
JF
629 args->op.cmd = MMUEXT_INVLPG_MULTI;
630 args->op.arg1.linear_addr = va;
f87e4cac
JF
631 }
632
d66bf8fc
JF
633 MULTI_mmuext_op(mcs.mc, &args->op, 1, NULL, DOMID_SELF);
634
635 xen_mc_issue(PARAVIRT_LAZY_MMU);
f87e4cac
JF
636}
637
7b1333aa
JF
638static void xen_clts(void)
639{
640 struct multicall_space mcs;
641
642 mcs = xen_mc_entry(0);
643
644 MULTI_fpu_taskswitch(mcs.mc, 0);
645
646 xen_mc_issue(PARAVIRT_LAZY_CPU);
647}
648
649static void xen_write_cr0(unsigned long cr0)
650{
651 struct multicall_space mcs;
652
653 /* Only pay attention to cr0.TS; everything else is
654 ignored. */
655 mcs = xen_mc_entry(0);
656
657 MULTI_fpu_taskswitch(mcs.mc, (cr0 & X86_CR0_TS) != 0);
658
659 xen_mc_issue(PARAVIRT_LAZY_CPU);
660}
661
60223a32
JF
662static void xen_write_cr2(unsigned long cr2)
663{
664 x86_read_percpu(xen_vcpu)->arch.cr2 = cr2;
665}
666
5ead97c8
JF
667static unsigned long xen_read_cr2(void)
668{
669 return x86_read_percpu(xen_vcpu)->arch.cr2;
670}
671
60223a32
JF
672static unsigned long xen_read_cr2_direct(void)
673{
674 return x86_read_percpu(xen_vcpu_info.arch.cr2);
675}
676
5ead97c8
JF
677static void xen_write_cr4(unsigned long cr4)
678{
2956a351
JF
679 cr4 &= ~X86_CR4_PGE;
680 cr4 &= ~X86_CR4_PSE;
681
682 native_write_cr4(cr4);
5ead97c8
JF
683}
684
5ead97c8
JF
685static unsigned long xen_read_cr3(void)
686{
687 return x86_read_percpu(xen_cr3);
688}
689
9f79991d
JF
690static void set_current_cr3(void *v)
691{
692 x86_write_percpu(xen_current_cr3, (unsigned long)v);
693}
694
5ead97c8
JF
695static void xen_write_cr3(unsigned long cr3)
696{
9f79991d
JF
697 struct mmuext_op *op;
698 struct multicall_space mcs;
699 unsigned long mfn = pfn_to_mfn(PFN_DOWN(cr3));
700
f120f13e
JF
701 BUG_ON(preemptible());
702
9f79991d 703 mcs = xen_mc_entry(sizeof(*op)); /* disables interrupts */
5ead97c8 704
9f79991d
JF
705 /* Update while interrupts are disabled, so its atomic with
706 respect to ipis */
5ead97c8
JF
707 x86_write_percpu(xen_cr3, cr3);
708
9f79991d
JF
709 op = mcs.args;
710 op->cmd = MMUEXT_NEW_BASEPTR;
711 op->arg1.mfn = mfn;
5ead97c8 712
9f79991d 713 MULTI_mmuext_op(mcs.mc, op, 1, NULL, DOMID_SELF);
5ead97c8 714
9f79991d
JF
715 /* Update xen_update_cr3 once the batch has actually
716 been submitted. */
717 xen_mc_callback(set_current_cr3, (void *)cr3);
5ead97c8 718
9f79991d 719 xen_mc_issue(PARAVIRT_LAZY_CPU); /* interrupts restored */
5ead97c8
JF
720}
721
f4f97b3e
JF
722/* Early in boot, while setting up the initial pagetable, assume
723 everything is pinned. */
6944a9c8 724static __init void xen_alloc_pte_init(struct mm_struct *mm, u32 pfn)
5ead97c8 725{
af7ae3b9 726#ifdef CONFIG_FLATMEM
f4f97b3e 727 BUG_ON(mem_map); /* should only be used early */
af7ae3b9 728#endif
5ead97c8
JF
729 make_lowmem_page_readonly(__va(PFN_PHYS(pfn)));
730}
731
6944a9c8 732/* Early release_pte assumes that all pts are pinned, since there's
1c70e9bd 733 only init_mm and anything attached to that is pinned. */
6944a9c8 734static void xen_release_pte_init(u32 pfn)
1c70e9bd
JF
735{
736 make_lowmem_page_readwrite(__va(PFN_PHYS(pfn)));
737}
738
f6433706 739static void pin_pagetable_pfn(unsigned cmd, unsigned long pfn)
74260714
JF
740{
741 struct mmuext_op op;
f6433706 742 op.cmd = cmd;
74260714
JF
743 op.arg1.mfn = pfn_to_mfn(pfn);
744 if (HYPERVISOR_mmuext_op(&op, 1, NULL, DOMID_SELF))
745 BUG();
746}
747
f4f97b3e
JF
748/* This needs to make sure the new pte page is pinned iff its being
749 attached to a pinned pagetable. */
1c70e9bd 750static void xen_alloc_ptpage(struct mm_struct *mm, u32 pfn, unsigned level)
5ead97c8 751{
f4f97b3e 752 struct page *page = pfn_to_page(pfn);
5ead97c8 753
f4f97b3e
JF
754 if (PagePinned(virt_to_page(mm->pgd))) {
755 SetPagePinned(page);
756
74260714 757 if (!PageHighMem(page)) {
f4f97b3e 758 make_lowmem_page_readonly(__va(PFN_PHYS(pfn)));
f6433706
MM
759 if (level == PT_PTE)
760 pin_pagetable_pfn(MMUEXT_PIN_L1_TABLE, pfn);
74260714 761 } else
f4f97b3e
JF
762 /* make sure there are no stray mappings of
763 this page */
764 kmap_flush_unused();
765 }
5ead97c8
JF
766}
767
6944a9c8 768static void xen_alloc_pte(struct mm_struct *mm, u32 pfn)
1c70e9bd 769{
f6433706 770 xen_alloc_ptpage(mm, pfn, PT_PTE);
1c70e9bd
JF
771}
772
6944a9c8 773static void xen_alloc_pmd(struct mm_struct *mm, u32 pfn)
1c70e9bd 774{
f6433706 775 xen_alloc_ptpage(mm, pfn, PT_PMD);
1c70e9bd
JF
776}
777
f4f97b3e 778/* This should never happen until we're OK to use struct page */
f6433706 779static void xen_release_ptpage(u32 pfn, unsigned level)
5ead97c8 780{
f4f97b3e
JF
781 struct page *page = pfn_to_page(pfn);
782
783 if (PagePinned(page)) {
74260714 784 if (!PageHighMem(page)) {
a684d69d
MM
785 if (level == PT_PTE)
786 pin_pagetable_pfn(MMUEXT_UNPIN_TABLE, pfn);
f4f97b3e 787 make_lowmem_page_readwrite(__va(PFN_PHYS(pfn)));
74260714 788 }
c946c7de 789 ClearPagePinned(page);
f4f97b3e 790 }
5ead97c8
JF
791}
792
6944a9c8 793static void xen_release_pte(u32 pfn)
f6433706
MM
794{
795 xen_release_ptpage(pfn, PT_PTE);
796}
797
6944a9c8 798static void xen_release_pmd(u32 pfn)
f6433706
MM
799{
800 xen_release_ptpage(pfn, PT_PMD);
801}
802
f4f97b3e
JF
803#ifdef CONFIG_HIGHPTE
804static void *xen_kmap_atomic_pte(struct page *page, enum km_type type)
5ead97c8 805{
f4f97b3e
JF
806 pgprot_t prot = PAGE_KERNEL;
807
808 if (PagePinned(page))
809 prot = PAGE_KERNEL_RO;
810
811 if (0 && PageHighMem(page))
812 printk("mapping highpte %lx type %d prot %s\n",
813 page_to_pfn(page), type,
814 (unsigned long)pgprot_val(prot) & _PAGE_RW ? "WRITE" : "READ");
815
816 return kmap_atomic_prot(page, type, prot);
5ead97c8 817}
f4f97b3e 818#endif
5ead97c8 819
9a4029fd
JF
820static __init pte_t mask_rw_pte(pte_t *ptep, pte_t pte)
821{
822 /* If there's an existing pte, then don't allow _PAGE_RW to be set */
823 if (pte_val_ma(*ptep) & _PAGE_PRESENT)
824 pte = __pte_ma(((pte_val_ma(*ptep) & _PAGE_RW) | ~_PAGE_RW) &
825 pte_val_ma(pte));
826
827 return pte;
828}
829
830/* Init-time set_pte while constructing initial pagetables, which
831 doesn't allow RO pagetable pages to be remapped RW */
832static __init void xen_set_pte_init(pte_t *ptep, pte_t pte)
833{
834 pte = mask_rw_pte(ptep, pte);
835
836 xen_set_pte(ptep, pte);
837}
838
5ead97c8
JF
839static __init void xen_pagetable_setup_start(pgd_t *base)
840{
841 pgd_t *xen_pgd = (pgd_t *)xen_start_info->pt_base;
3843fc25 842 int i;
5ead97c8 843
9a4029fd 844 /* special set_pte for pagetable initialization */
93b1eab3 845 pv_mmu_ops.set_pte = xen_set_pte_init;
9a4029fd 846
5ead97c8
JF
847 init_mm.pgd = base;
848 /*
3843fc25
JF
849 * copy top-level of Xen-supplied pagetable into place. This
850 * is a stand-in while we copy the pmd pages.
5ead97c8
JF
851 */
852 memcpy(base, xen_pgd, PTRS_PER_PGD * sizeof(pgd_t));
853
3843fc25
JF
854 /*
855 * For PAE, need to allocate new pmds, rather than
856 * share Xen's, since Xen doesn't like pmd's being
857 * shared between address spaces.
858 */
859 for (i = 0; i < PTRS_PER_PGD; i++) {
860 if (pgd_val_ma(xen_pgd[i]) & _PAGE_PRESENT) {
861 pmd_t *pmd = (pmd_t *)alloc_bootmem_low_pages(PAGE_SIZE);
5ead97c8 862
3843fc25
JF
863 memcpy(pmd, (void *)pgd_page_vaddr(xen_pgd[i]),
864 PAGE_SIZE);
5ead97c8 865
3843fc25 866 make_lowmem_page_readonly(pmd);
5ead97c8 867
3843fc25
JF
868 set_pgd(&base[i], __pgd(1 + __pa(pmd)));
869 } else
870 pgd_clear(&base[i]);
5ead97c8
JF
871 }
872
873 /* make sure zero_page is mapped RO so we can use it in pagetables */
874 make_lowmem_page_readonly(empty_zero_page);
875 make_lowmem_page_readonly(base);
876 /*
877 * Switch to new pagetable. This is done before
878 * pagetable_init has done anything so that the new pages
879 * added to the table can be prepared properly for Xen.
880 */
881 xen_write_cr3(__pa(base));
2b540781
JF
882
883 /* Unpin initial Xen pagetable */
884 pin_pagetable_pfn(MMUEXT_UNPIN_TABLE,
885 PFN_DOWN(__pa(xen_start_info->pt_base)));
5ead97c8
JF
886}
887
0e91398f 888void xen_setup_shared_info(void)
5ead97c8
JF
889{
890 if (!xen_feature(XENFEAT_auto_translated_physmap)) {
2e8fe719
JF
891 unsigned long addr = fix_to_virt(FIX_PARAVIRT_BOOTMAP);
892
5ead97c8
JF
893 /*
894 * Create a mapping for the shared info page.
895 * Should be set_fixmap(), but shared_info is a machine
896 * address with no corresponding pseudo-phys address.
897 */
2e8fe719 898 set_pte_mfn(addr,
5ead97c8
JF
899 PFN_DOWN(xen_start_info->shared_info),
900 PAGE_KERNEL);
5ead97c8 901
2e8fe719 902 HYPERVISOR_shared_info = (struct shared_info *)addr;
5ead97c8
JF
903 } else
904 HYPERVISOR_shared_info =
905 (struct shared_info *)__va(xen_start_info->shared_info);
906
2e8fe719
JF
907#ifndef CONFIG_SMP
908 /* In UP this is as good a place as any to set up shared info */
909 xen_setup_vcpu_info_placement();
910#endif
d5edbc1f
JF
911
912 xen_setup_mfn_list_list();
2e8fe719
JF
913}
914
915static __init void xen_pagetable_setup_done(pgd_t *base)
916{
917 /* This will work as long as patching hasn't happened yet
918 (which it hasn't) */
6944a9c8
JF
919 pv_mmu_ops.alloc_pte = xen_alloc_pte;
920 pv_mmu_ops.alloc_pmd = xen_alloc_pmd;
921 pv_mmu_ops.release_pte = xen_release_pte;
922 pv_mmu_ops.release_pmd = xen_release_pmd;
2e8fe719
JF
923 pv_mmu_ops.set_pte = xen_set_pte;
924
0e91398f 925 xen_setup_shared_info();
2e8fe719 926
f4f97b3e
JF
927 /* Actually pin the pagetable down, but we can't set PG_pinned
928 yet because the page structures don't exist yet. */
3843fc25 929 pin_pagetable_pfn(MMUEXT_PIN_L3_TABLE, PFN_DOWN(__pa(base)));
60223a32 930}
5ead97c8 931
e2426cf8
JF
932static __init void xen_post_allocator_init(void)
933{
934 pv_mmu_ops.set_pmd = xen_set_pmd;
935 pv_mmu_ops.set_pud = xen_set_pud;
936
937 xen_mark_init_mm_pinned();
938}
939
60223a32 940/* This is called once we have the cpu_possible_map */
0e91398f 941void xen_setup_vcpu_info_placement(void)
60223a32
JF
942{
943 int cpu;
944
945 for_each_possible_cpu(cpu)
946 xen_vcpu_setup(cpu);
947
948 /* xen_vcpu_setup managed to place the vcpu_info within the
949 percpu area for all cpus, so make use of it */
950 if (have_vcpu_info_placement) {
951 printk(KERN_INFO "Xen: using vcpu_info placement\n");
952
93b1eab3
JF
953 pv_irq_ops.save_fl = xen_save_fl_direct;
954 pv_irq_ops.restore_fl = xen_restore_fl_direct;
955 pv_irq_ops.irq_disable = xen_irq_disable_direct;
956 pv_irq_ops.irq_enable = xen_irq_enable_direct;
957 pv_mmu_ops.read_cr2 = xen_read_cr2_direct;
60223a32 958 }
5ead97c8
JF
959}
960
ab144f5e
AK
961static unsigned xen_patch(u8 type, u16 clobbers, void *insnbuf,
962 unsigned long addr, unsigned len)
6487673b
JF
963{
964 char *start, *end, *reloc;
965 unsigned ret;
966
967 start = end = reloc = NULL;
968
93b1eab3
JF
969#define SITE(op, x) \
970 case PARAVIRT_PATCH(op.x): \
6487673b
JF
971 if (have_vcpu_info_placement) { \
972 start = (char *)xen_##x##_direct; \
973 end = xen_##x##_direct_end; \
974 reloc = xen_##x##_direct_reloc; \
975 } \
976 goto patch_site
977
978 switch (type) {
93b1eab3
JF
979 SITE(pv_irq_ops, irq_enable);
980 SITE(pv_irq_ops, irq_disable);
981 SITE(pv_irq_ops, save_fl);
982 SITE(pv_irq_ops, restore_fl);
6487673b
JF
983#undef SITE
984
985 patch_site:
986 if (start == NULL || (end-start) > len)
987 goto default_patch;
988
ab144f5e 989 ret = paravirt_patch_insns(insnbuf, len, start, end);
6487673b
JF
990
991 /* Note: because reloc is assigned from something that
992 appears to be an array, gcc assumes it's non-null,
993 but doesn't know its relationship with start and
994 end. */
995 if (reloc > start && reloc < end) {
996 int reloc_off = reloc - start;
ab144f5e
AK
997 long *relocp = (long *)(insnbuf + reloc_off);
998 long delta = start - (char *)addr;
6487673b
JF
999
1000 *relocp += delta;
1001 }
1002 break;
1003
1004 default_patch:
1005 default:
ab144f5e
AK
1006 ret = paravirt_patch_default(type, clobbers, insnbuf,
1007 addr, len);
6487673b
JF
1008 break;
1009 }
1010
1011 return ret;
1012}
1013
93b1eab3 1014static const struct pv_info xen_info __initdata = {
5ead97c8
JF
1015 .paravirt_enabled = 1,
1016 .shared_kernel_pmd = 0,
1017
1018 .name = "Xen",
93b1eab3 1019};
5ead97c8 1020
93b1eab3 1021static const struct pv_init_ops xen_init_ops __initdata = {
6487673b 1022 .patch = xen_patch,
5ead97c8 1023
93b1eab3 1024 .banner = xen_banner,
5ead97c8
JF
1025 .memory_setup = xen_memory_setup,
1026 .arch_setup = xen_arch_setup,
e2426cf8 1027 .post_allocator_init = xen_post_allocator_init,
93b1eab3 1028};
5ead97c8 1029
93b1eab3 1030static const struct pv_time_ops xen_time_ops __initdata = {
15c84731 1031 .time_init = xen_time_init,
93b1eab3 1032
15c84731
JF
1033 .set_wallclock = xen_set_wallclock,
1034 .get_wallclock = xen_get_wallclock,
1035 .get_cpu_khz = xen_cpu_khz,
ab550288 1036 .sched_clock = xen_sched_clock,
93b1eab3 1037};
15c84731 1038
93b1eab3 1039static const struct pv_cpu_ops xen_cpu_ops __initdata = {
5ead97c8
JF
1040 .cpuid = xen_cpuid,
1041
1042 .set_debugreg = xen_set_debugreg,
1043 .get_debugreg = xen_get_debugreg,
1044
7b1333aa 1045 .clts = xen_clts,
5ead97c8
JF
1046
1047 .read_cr0 = native_read_cr0,
7b1333aa 1048 .write_cr0 = xen_write_cr0,
5ead97c8 1049
5ead97c8
JF
1050 .read_cr4 = native_read_cr4,
1051 .read_cr4_safe = native_read_cr4_safe,
1052 .write_cr4 = xen_write_cr4,
1053
5ead97c8
JF
1054 .wbinvd = native_wbinvd,
1055
1056 .read_msr = native_read_msr_safe,
1057 .write_msr = native_write_msr_safe,
1058 .read_tsc = native_read_tsc,
1059 .read_pmc = native_read_pmc,
1060
81e103f1 1061 .iret = xen_iret,
e2a81baf 1062 .irq_enable_syscall_ret = xen_sysexit,
5ead97c8
JF
1063
1064 .load_tr_desc = paravirt_nop,
1065 .set_ldt = xen_set_ldt,
1066 .load_gdt = xen_load_gdt,
1067 .load_idt = xen_load_idt,
1068 .load_tls = xen_load_tls,
1069
1070 .store_gdt = native_store_gdt,
1071 .store_idt = native_store_idt,
1072 .store_tr = xen_store_tr,
1073
1074 .write_ldt_entry = xen_write_ldt_entry,
1075 .write_gdt_entry = xen_write_gdt_entry,
1076 .write_idt_entry = xen_write_idt_entry,
faca6227 1077 .load_sp0 = xen_load_sp0,
5ead97c8
JF
1078
1079 .set_iopl_mask = xen_set_iopl_mask,
1080 .io_delay = xen_io_delay,
1081
8965c1c0
JF
1082 .lazy_mode = {
1083 .enter = paravirt_enter_lazy_cpu,
1084 .leave = xen_leave_lazy,
1085 },
93b1eab3
JF
1086};
1087
1088static const struct pv_irq_ops xen_irq_ops __initdata = {
1089 .init_IRQ = xen_init_IRQ,
1090 .save_fl = xen_save_fl,
1091 .restore_fl = xen_restore_fl,
1092 .irq_disable = xen_irq_disable,
1093 .irq_enable = xen_irq_enable,
1094 .safe_halt = xen_safe_halt,
1095 .halt = xen_halt,
1096};
5ead97c8 1097
93b1eab3 1098static const struct pv_apic_ops xen_apic_ops __initdata = {
5ead97c8 1099#ifdef CONFIG_X86_LOCAL_APIC
f87e4cac
JF
1100 .apic_write = xen_apic_write,
1101 .apic_write_atomic = xen_apic_write,
5ead97c8
JF
1102 .apic_read = xen_apic_read,
1103 .setup_boot_clock = paravirt_nop,
1104 .setup_secondary_clock = paravirt_nop,
1105 .startup_ipi_hook = paravirt_nop,
1106#endif
93b1eab3
JF
1107};
1108
1109static const struct pv_mmu_ops xen_mmu_ops __initdata = {
1110 .pagetable_setup_start = xen_pagetable_setup_start,
1111 .pagetable_setup_done = xen_pagetable_setup_done,
1112
1113 .read_cr2 = xen_read_cr2,
1114 .write_cr2 = xen_write_cr2,
1115
1116 .read_cr3 = xen_read_cr3,
1117 .write_cr3 = xen_write_cr3,
5ead97c8
JF
1118
1119 .flush_tlb_user = xen_flush_tlb,
1120 .flush_tlb_kernel = xen_flush_tlb,
1121 .flush_tlb_single = xen_flush_tlb_single,
f87e4cac 1122 .flush_tlb_others = xen_flush_tlb_others,
5ead97c8
JF
1123
1124 .pte_update = paravirt_nop,
1125 .pte_update_defer = paravirt_nop,
1126
6944a9c8
JF
1127 .alloc_pte = xen_alloc_pte_init,
1128 .release_pte = xen_release_pte_init,
1129 .alloc_pmd = xen_alloc_pte_init,
1130 .alloc_pmd_clone = paravirt_nop,
1131 .release_pmd = xen_release_pte_init,
f4f97b3e
JF
1132
1133#ifdef CONFIG_HIGHPTE
1134 .kmap_atomic_pte = xen_kmap_atomic_pte,
1135#endif
5ead97c8 1136
9a4029fd 1137 .set_pte = NULL, /* see xen_pagetable_setup_* */
3b827c1b 1138 .set_pte_at = xen_set_pte_at,
e2426cf8 1139 .set_pmd = xen_set_pmd_hyper,
3b827c1b 1140
08b882c6
JF
1141 .ptep_modify_prot_start = __ptep_modify_prot_start,
1142 .ptep_modify_prot_commit = __ptep_modify_prot_commit,
1143
3b827c1b 1144 .pte_val = xen_pte_val,
a15af1c9 1145 .pte_flags = native_pte_val,
3b827c1b
JF
1146 .pgd_val = xen_pgd_val,
1147
1148 .make_pte = xen_make_pte,
1149 .make_pgd = xen_make_pgd,
1150
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1151 .set_pte_atomic = xen_set_pte_atomic,
1152 .set_pte_present = xen_set_pte_at,
e2426cf8 1153 .set_pud = xen_set_pud_hyper,
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1154 .pte_clear = xen_pte_clear,
1155 .pmd_clear = xen_pmd_clear,
1156
1157 .make_pmd = xen_make_pmd,
1158 .pmd_val = xen_pmd_val,
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1159
1160 .activate_mm = xen_activate_mm,
1161 .dup_mmap = xen_dup_mmap,
1162 .exit_mmap = xen_exit_mmap,
1163
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1164 .lazy_mode = {
1165 .enter = paravirt_enter_lazy_mmu,
1166 .leave = xen_leave_lazy,
1167 },
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1168};
1169
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1170#ifdef CONFIG_SMP
1171static const struct smp_ops xen_smp_ops __initdata = {
1172 .smp_prepare_boot_cpu = xen_smp_prepare_boot_cpu,
1173 .smp_prepare_cpus = xen_smp_prepare_cpus,
1174 .cpu_up = xen_cpu_up,
1175 .smp_cpus_done = xen_smp_cpus_done,
1176
1177 .smp_send_stop = xen_smp_send_stop,
1178 .smp_send_reschedule = xen_smp_send_reschedule,
1179 .smp_call_function_mask = xen_smp_call_function_mask,
1180};
1181#endif /* CONFIG_SMP */
1182
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1183static void xen_reboot(int reason)
1184{
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1185 struct sched_shutdown r = { .reason = reason };
1186
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1187#ifdef CONFIG_SMP
1188 smp_send_stop();
1189#endif
1190
349c709f 1191 if (HYPERVISOR_sched_op(SCHEDOP_shutdown, &r))
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1192 BUG();
1193}
1194
1195static void xen_restart(char *msg)
1196{
1197 xen_reboot(SHUTDOWN_reboot);
1198}
1199
1200static void xen_emergency_restart(void)
1201{
1202 xen_reboot(SHUTDOWN_reboot);
1203}
1204
1205static void xen_machine_halt(void)
1206{
1207 xen_reboot(SHUTDOWN_poweroff);
1208}
1209
1210static void xen_crash_shutdown(struct pt_regs *regs)
1211{
1212 xen_reboot(SHUTDOWN_crash);
1213}
1214
1215static const struct machine_ops __initdata xen_machine_ops = {
1216 .restart = xen_restart,
1217 .halt = xen_machine_halt,
1218 .power_off = xen_machine_halt,
1219 .shutdown = xen_machine_halt,
1220 .crash_shutdown = xen_crash_shutdown,
1221 .emergency_restart = xen_emergency_restart,
1222};
1223
6487673b 1224
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1225static void __init xen_reserve_top(void)
1226{
1227 unsigned long top = HYPERVISOR_VIRT_START;
1228 struct xen_platform_parameters pp;
1229
1230 if (HYPERVISOR_xen_version(XENVER_platform_parameters, &pp) == 0)
1231 top = pp.virt_start;
1232
1233 reserve_top_address(-top + 2 * PAGE_SIZE);
1234}
1235
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1236/* First C function to be called on Xen boot */
1237asmlinkage void __init xen_start_kernel(void)
1238{
1239 pgd_t *pgd;
1240
1241 if (!xen_start_info)
1242 return;
1243
7999f4b4 1244 BUG_ON(memcmp(xen_start_info->magic, "xen-3", 5) != 0);
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1245
1246 /* Install Xen paravirt ops */
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1247 pv_info = xen_info;
1248 pv_init_ops = xen_init_ops;
1249 pv_time_ops = xen_time_ops;
1250 pv_cpu_ops = xen_cpu_ops;
1251 pv_irq_ops = xen_irq_ops;
1252 pv_apic_ops = xen_apic_ops;
1253 pv_mmu_ops = xen_mmu_ops;
93b1eab3 1254
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1255 machine_ops = xen_machine_ops;
1256
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1257#ifdef CONFIG_SMP
1258 smp_ops = xen_smp_ops;
1259#endif
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1260
1261 xen_setup_features();
1262
1263 /* Get mfn list */
1264 if (!xen_feature(XENFEAT_auto_translated_physmap))
d451bb7a 1265 xen_build_dynamic_phys_to_machine();
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1266
1267 pgd = (pgd_t *)xen_start_info->pt_base;
1268
1269 init_pg_tables_end = __pa(pgd) + xen_start_info->nr_pt_frames*PAGE_SIZE;
1270
1271 init_mm.pgd = pgd; /* use the Xen pagetables to start */
1272
1273 /* keep using Xen gdt for now; no urgent need to change it */
1274
1275 x86_write_percpu(xen_cr3, __pa(pgd));
9f79991d 1276 x86_write_percpu(xen_current_cr3, __pa(pgd));
60223a32 1277
60223a32 1278 /* Don't do the full vcpu_info placement stuff until we have a
2e8fe719 1279 possible map and a non-dummy shared_info. */
60223a32 1280 per_cpu(xen_vcpu, 0) = &HYPERVISOR_shared_info->vcpu_info[0];
5ead97c8 1281
93b1eab3 1282 pv_info.kernel_rpl = 1;
5ead97c8 1283 if (xen_feature(XENFEAT_supervisor_mode_kernel))
93b1eab3 1284 pv_info.kernel_rpl = 0;
5ead97c8 1285
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1286 /* Prevent unwanted bits from being set in PTEs. */
1287 __supported_pte_mask &= ~_PAGE_GLOBAL;
1288 if (!is_initial_xendomain())
1289 __supported_pte_mask &= ~(_PAGE_PWT | _PAGE_PCD);
1290
5ead97c8 1291 /* set the limit of our address space */
fb1d8404 1292 xen_reserve_top();
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1293
1294 /* set up basic CPUID stuff */
1295 cpu_detect(&new_cpu_data);
1296 new_cpu_data.hard_math = 1;
1297 new_cpu_data.x86_capability[0] = cpuid_edx(1);
1298
1299 /* Poke various useful things into boot_params */
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1300 boot_params.hdr.type_of_loader = (9 << 4) | 0;
1301 boot_params.hdr.ramdisk_image = xen_start_info->mod_start
1302 ? __pa(xen_start_info->mod_start) : 0;
1303 boot_params.hdr.ramdisk_size = xen_start_info->mod_len;
5ead97c8 1304
9e124fe1 1305 if (!is_initial_xendomain()) {
83abc70a 1306 add_preferred_console("xenboot", 0, NULL);
9e124fe1 1307 add_preferred_console("tty", 0, NULL);
b8c2d3df 1308 add_preferred_console("hvc", 0, NULL);
9e124fe1 1309 }
b8c2d3df 1310
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1311 /* Start the world */
1312 start_kernel();
1313}