Commit | Line | Data |
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457c8996 | 1 | // SPDX-License-Identifier: GPL-2.0-only |
1da177e4 LT |
2 | /* |
3 | * Low-Level PCI Support for PC | |
4 | * | |
5 | * (c) 1999--2000 Martin Mares <mj@ucw.cz> | |
6 | */ | |
7 | ||
8 | #include <linux/sched.h> | |
9 | #include <linux/pci.h> | |
89016506 | 10 | #include <linux/pci-acpi.h> |
1da177e4 LT |
11 | #include <linux/ioport.h> |
12 | #include <linux/init.h> | |
8c4b2cf9 | 13 | #include <linux/dmi.h> |
5a0e3ad6 | 14 | #include <linux/slab.h> |
1da177e4 LT |
15 | |
16 | #include <asm/acpi.h> | |
17 | #include <asm/segment.h> | |
18 | #include <asm/io.h> | |
19 | #include <asm/smp.h> | |
82487711 | 20 | #include <asm/pci_x86.h> |
f9a37be0 | 21 | #include <asm/setup.h> |
2c681e6b | 22 | #include <asm/irqdomain.h> |
1da177e4 | 23 | |
1da177e4 LT |
24 | unsigned int pci_probe = PCI_PROBE_BIOS | PCI_PROBE_CONF1 | PCI_PROBE_CONF2 | |
25 | PCI_PROBE_MMCONF; | |
26 | ||
2b290da0 | 27 | static int pci_bf_sort; |
1da177e4 | 28 | int pci_routeirq; |
a9322f64 | 29 | int noioapicquirk; |
41b9eb26 SA |
30 | #ifdef CONFIG_X86_REROUTE_FOR_BROKEN_BOOT_IRQS |
31 | int noioapicreroute = 0; | |
32 | #else | |
9197979b | 33 | int noioapicreroute = 1; |
41b9eb26 | 34 | #endif |
1da177e4 | 35 | int pcibios_last_bus = -1; |
120bb424 | 36 | unsigned long pirq_table_addr; |
72da0b07 JB |
37 | const struct pci_raw_ops *__read_mostly raw_pci_ops; |
38 | const struct pci_raw_ops *__read_mostly raw_pci_ext_ops; | |
b6ce068a MW |
39 | |
40 | int raw_pci_read(unsigned int domain, unsigned int bus, unsigned int devfn, | |
41 | int reg, int len, u32 *val) | |
42 | { | |
beef3129 | 43 | if (domain == 0 && reg < 256 && raw_pci_ops) |
b6ce068a MW |
44 | return raw_pci_ops->read(domain, bus, devfn, reg, len, val); |
45 | if (raw_pci_ext_ops) | |
46 | return raw_pci_ext_ops->read(domain, bus, devfn, reg, len, val); | |
47 | return -EINVAL; | |
48 | } | |
49 | ||
50 | int raw_pci_write(unsigned int domain, unsigned int bus, unsigned int devfn, | |
51 | int reg, int len, u32 val) | |
52 | { | |
beef3129 | 53 | if (domain == 0 && reg < 256 && raw_pci_ops) |
b6ce068a MW |
54 | return raw_pci_ops->write(domain, bus, devfn, reg, len, val); |
55 | if (raw_pci_ext_ops) | |
56 | return raw_pci_ext_ops->write(domain, bus, devfn, reg, len, val); | |
57 | return -EINVAL; | |
58 | } | |
1da177e4 LT |
59 | |
60 | static int pci_read(struct pci_bus *bus, unsigned int devfn, int where, int size, u32 *value) | |
61 | { | |
b6ce068a | 62 | return raw_pci_read(pci_domain_nr(bus), bus->number, |
a79e4198 | 63 | devfn, where, size, value); |
1da177e4 LT |
64 | } |
65 | ||
66 | static int pci_write(struct pci_bus *bus, unsigned int devfn, int where, int size, u32 value) | |
67 | { | |
b6ce068a | 68 | return raw_pci_write(pci_domain_nr(bus), bus->number, |
a79e4198 | 69 | devfn, where, size, value); |
1da177e4 LT |
70 | } |
71 | ||
72 | struct pci_ops pci_root_ops = { | |
73 | .read = pci_read, | |
74 | .write = pci_write, | |
75 | }; | |
76 | ||
1da177e4 | 77 | /* |
df65c1bc TG |
78 | * This interrupt-safe spinlock protects all accesses to PCI configuration |
79 | * space, except for the mmconfig (ECAM) based operations. | |
1da177e4 | 80 | */ |
d19f61f0 | 81 | DEFINE_RAW_SPINLOCK(pci_config_lock); |
1da177e4 | 82 | |
4ac9cbfa | 83 | static int __init can_skip_ioresource_align(const struct dmi_system_id *d) |
13a6ddb0 YL |
84 | { |
85 | pci_probe |= PCI_CAN_SKIP_ISA_ALIGN; | |
86 | printk(KERN_INFO "PCI: %s detected, can skip ISA alignment\n", d->ident); | |
87 | return 0; | |
88 | } | |
89 | ||
4ac9cbfa | 90 | static const struct dmi_system_id can_skip_pciprobe_dmi_table[] __initconst = { |
13a6ddb0 YL |
91 | /* |
92 | * Systems where PCI IO resource ISA alignment can be skipped | |
93 | * when the ISA enable bit in the bridge control is not set | |
94 | */ | |
95 | { | |
96 | .callback = can_skip_ioresource_align, | |
97 | .ident = "IBM System x3800", | |
98 | .matches = { | |
99 | DMI_MATCH(DMI_SYS_VENDOR, "IBM"), | |
100 | DMI_MATCH(DMI_PRODUCT_NAME, "x3800"), | |
101 | }, | |
102 | }, | |
103 | { | |
104 | .callback = can_skip_ioresource_align, | |
105 | .ident = "IBM System x3850", | |
106 | .matches = { | |
107 | DMI_MATCH(DMI_SYS_VENDOR, "IBM"), | |
108 | DMI_MATCH(DMI_PRODUCT_NAME, "x3850"), | |
109 | }, | |
110 | }, | |
111 | { | |
112 | .callback = can_skip_ioresource_align, | |
113 | .ident = "IBM System x3950", | |
114 | .matches = { | |
115 | DMI_MATCH(DMI_SYS_VENDOR, "IBM"), | |
116 | DMI_MATCH(DMI_PRODUCT_NAME, "x3950"), | |
117 | }, | |
118 | }, | |
119 | {} | |
120 | }; | |
121 | ||
122 | void __init dmi_check_skip_isa_align(void) | |
123 | { | |
124 | dmi_check_system(can_skip_pciprobe_dmi_table); | |
125 | } | |
126 | ||
a18e3690 | 127 | static void pcibios_fixup_device_resources(struct pci_dev *dev) |
bb71ad88 GH |
128 | { |
129 | struct resource *rom_r = &dev->resource[PCI_ROM_RESOURCE]; | |
7bd1c365 MH |
130 | struct resource *bar_r; |
131 | int bar; | |
132 | ||
133 | if (pci_probe & PCI_NOASSIGN_BARS) { | |
134 | /* | |
135 | * If the BIOS did not assign the BAR, zero out the | |
386ed2ab | 136 | * resource so the kernel doesn't attempt to assign |
7bd1c365 MH |
137 | * it later on in pci_assign_unassigned_resources |
138 | */ | |
c9c13ba4 | 139 | for (bar = 0; bar < PCI_STD_NUM_BARS; bar++) { |
7bd1c365 MH |
140 | bar_r = &dev->resource[bar]; |
141 | if (bar_r->start == 0 && bar_r->end != 0) { | |
142 | bar_r->flags = 0; | |
143 | bar_r->end = 0; | |
144 | } | |
145 | } | |
146 | } | |
bb71ad88 GH |
147 | |
148 | if (pci_probe & PCI_NOASSIGN_ROMS) { | |
149 | if (rom_r->parent) | |
150 | return; | |
151 | if (rom_r->start) { | |
152 | /* we deal with BIOS assigned ROM later */ | |
153 | return; | |
154 | } | |
155 | rom_r->start = rom_r->end = rom_r->flags = 0; | |
156 | } | |
157 | } | |
158 | ||
1da177e4 LT |
159 | /* |
160 | * Called after each bus is probed, but before its children | |
161 | * are examined. | |
162 | */ | |
163 | ||
a18e3690 | 164 | void pcibios_fixup_bus(struct pci_bus *b) |
1da177e4 | 165 | { |
bb71ad88 GH |
166 | struct pci_dev *dev; |
167 | ||
237865f1 | 168 | pci_read_bridge_bases(b); |
bb71ad88 GH |
169 | list_for_each_entry(dev, &b->devices, bus_list) |
170 | pcibios_fixup_device_resources(dev); | |
1da177e4 LT |
171 | } |
172 | ||
89016506 JL |
173 | void pcibios_add_bus(struct pci_bus *bus) |
174 | { | |
175 | acpi_pci_add_bus(bus); | |
176 | } | |
177 | ||
178 | void pcibios_remove_bus(struct pci_bus *bus) | |
179 | { | |
180 | acpi_pci_remove_bus(bus); | |
181 | } | |
182 | ||
6b4b78fe MD |
183 | /* |
184 | * Only use DMI information to set this if nothing was passed | |
185 | * on the kernel command line (which was parsed earlier). | |
186 | */ | |
187 | ||
4ac9cbfa | 188 | static int __init set_bf_sort(const struct dmi_system_id *d) |
6b4b78fe MD |
189 | { |
190 | if (pci_bf_sort == pci_bf_sort_default) { | |
191 | pci_bf_sort = pci_dmi_bf; | |
192 | printk(KERN_INFO "PCI: %s detected, enabling pci=bfsort.\n", d->ident); | |
193 | } | |
194 | return 0; | |
195 | } | |
196 | ||
4ac9cbfa MK |
197 | static void __init read_dmi_type_b1(const struct dmi_header *dm, |
198 | void *private_data) | |
6e8af08d | 199 | { |
f5ab3b70 | 200 | u8 *data = (u8 *)dm + 4; |
6e8af08d ND |
201 | |
202 | if (dm->type != 0xB1) | |
203 | return; | |
f5ab3b70 JD |
204 | if ((((*(u32 *)data) >> 9) & 0x03) == 0x01) |
205 | set_bf_sort((const struct dmi_system_id *)private_data); | |
6e8af08d ND |
206 | } |
207 | ||
4ac9cbfa | 208 | static int __init find_sort_method(const struct dmi_system_id *d) |
6e8af08d | 209 | { |
f5ab3b70 JD |
210 | dmi_walk(read_dmi_type_b1, (void *)d); |
211 | return 0; | |
6e8af08d ND |
212 | } |
213 | ||
8c4b2cf9 BK |
214 | /* |
215 | * Enable renumbering of PCI bus# ranges to reach all PCI busses (Cardbus) | |
216 | */ | |
217 | #ifdef __i386__ | |
4ac9cbfa | 218 | static int __init assign_all_busses(const struct dmi_system_id *d) |
8c4b2cf9 BK |
219 | { |
220 | pci_probe |= PCI_ASSIGN_ALL_BUSSES; | |
221 | printk(KERN_INFO "%s detected: enabling PCI bus# renumbering" | |
222 | " (pci=assign-busses)\n", d->ident); | |
223 | return 0; | |
224 | } | |
225 | #endif | |
226 | ||
4ac9cbfa | 227 | static int __init set_scan_all(const struct dmi_system_id *d) |
284f5f9d BH |
228 | { |
229 | printk(KERN_INFO "PCI: %s detected, enabling pci=pcie_scan_all\n", | |
230 | d->ident); | |
231 | pci_add_flags(PCI_SCAN_ALL_PCIE_DEVS); | |
232 | return 0; | |
233 | } | |
234 | ||
4ac9cbfa | 235 | static const struct dmi_system_id pciprobe_dmi_table[] __initconst = { |
6b4b78fe | 236 | #ifdef __i386__ |
8c4b2cf9 BK |
237 | /* |
238 | * Laptops which need pci=assign-busses to see Cardbus cards | |
239 | */ | |
8c4b2cf9 BK |
240 | { |
241 | .callback = assign_all_busses, | |
242 | .ident = "Samsung X20 Laptop", | |
243 | .matches = { | |
244 | DMI_MATCH(DMI_SYS_VENDOR, "Samsung Electronics"), | |
245 | DMI_MATCH(DMI_PRODUCT_NAME, "SX20S"), | |
246 | }, | |
247 | }, | |
248 | #endif /* __i386__ */ | |
6b4b78fe MD |
249 | { |
250 | .callback = set_bf_sort, | |
251 | .ident = "Dell PowerEdge 1950", | |
252 | .matches = { | |
253 | DMI_MATCH(DMI_SYS_VENDOR, "Dell"), | |
254 | DMI_MATCH(DMI_PRODUCT_NAME, "PowerEdge 1950"), | |
255 | }, | |
256 | }, | |
257 | { | |
258 | .callback = set_bf_sort, | |
259 | .ident = "Dell PowerEdge 1955", | |
260 | .matches = { | |
261 | DMI_MATCH(DMI_SYS_VENDOR, "Dell"), | |
262 | DMI_MATCH(DMI_PRODUCT_NAME, "PowerEdge 1955"), | |
263 | }, | |
264 | }, | |
265 | { | |
266 | .callback = set_bf_sort, | |
267 | .ident = "Dell PowerEdge 2900", | |
268 | .matches = { | |
269 | DMI_MATCH(DMI_SYS_VENDOR, "Dell"), | |
270 | DMI_MATCH(DMI_PRODUCT_NAME, "PowerEdge 2900"), | |
271 | }, | |
272 | }, | |
273 | { | |
274 | .callback = set_bf_sort, | |
275 | .ident = "Dell PowerEdge 2950", | |
276 | .matches = { | |
277 | DMI_MATCH(DMI_SYS_VENDOR, "Dell"), | |
278 | DMI_MATCH(DMI_PRODUCT_NAME, "PowerEdge 2950"), | |
279 | }, | |
280 | }, | |
f7a9dae7 MD |
281 | { |
282 | .callback = set_bf_sort, | |
283 | .ident = "Dell PowerEdge R900", | |
284 | .matches = { | |
285 | DMI_MATCH(DMI_SYS_VENDOR, "Dell"), | |
286 | DMI_MATCH(DMI_PRODUCT_NAME, "PowerEdge R900"), | |
287 | }, | |
288 | }, | |
9b373ed1 ND |
289 | { |
290 | .callback = find_sort_method, | |
291 | .ident = "Dell System", | |
292 | .matches = { | |
293 | DMI_MATCH(DMI_SYS_VENDOR, "Dell Inc"), | |
294 | }, | |
295 | }, | |
f52383d3 AG |
296 | { |
297 | .callback = set_bf_sort, | |
298 | .ident = "HP ProLiant BL20p G3", | |
299 | .matches = { | |
300 | DMI_MATCH(DMI_SYS_VENDOR, "HP"), | |
301 | DMI_MATCH(DMI_PRODUCT_NAME, "ProLiant BL20p G3"), | |
302 | }, | |
303 | }, | |
304 | { | |
305 | .callback = set_bf_sort, | |
306 | .ident = "HP ProLiant BL20p G4", | |
307 | .matches = { | |
308 | DMI_MATCH(DMI_SYS_VENDOR, "HP"), | |
309 | DMI_MATCH(DMI_PRODUCT_NAME, "ProLiant BL20p G4"), | |
310 | }, | |
311 | }, | |
312 | { | |
313 | .callback = set_bf_sort, | |
314 | .ident = "HP ProLiant BL30p G1", | |
315 | .matches = { | |
316 | DMI_MATCH(DMI_SYS_VENDOR, "HP"), | |
317 | DMI_MATCH(DMI_PRODUCT_NAME, "ProLiant BL30p G1"), | |
318 | }, | |
319 | }, | |
320 | { | |
321 | .callback = set_bf_sort, | |
322 | .ident = "HP ProLiant BL25p G1", | |
323 | .matches = { | |
324 | DMI_MATCH(DMI_SYS_VENDOR, "HP"), | |
325 | DMI_MATCH(DMI_PRODUCT_NAME, "ProLiant BL25p G1"), | |
326 | }, | |
327 | }, | |
328 | { | |
329 | .callback = set_bf_sort, | |
330 | .ident = "HP ProLiant BL35p G1", | |
331 | .matches = { | |
332 | DMI_MATCH(DMI_SYS_VENDOR, "HP"), | |
333 | DMI_MATCH(DMI_PRODUCT_NAME, "ProLiant BL35p G1"), | |
334 | }, | |
335 | }, | |
336 | { | |
337 | .callback = set_bf_sort, | |
338 | .ident = "HP ProLiant BL45p G1", | |
339 | .matches = { | |
340 | DMI_MATCH(DMI_SYS_VENDOR, "HP"), | |
341 | DMI_MATCH(DMI_PRODUCT_NAME, "ProLiant BL45p G1"), | |
342 | }, | |
343 | }, | |
344 | { | |
345 | .callback = set_bf_sort, | |
346 | .ident = "HP ProLiant BL45p G2", | |
347 | .matches = { | |
348 | DMI_MATCH(DMI_SYS_VENDOR, "HP"), | |
349 | DMI_MATCH(DMI_PRODUCT_NAME, "ProLiant BL45p G2"), | |
350 | }, | |
351 | }, | |
352 | { | |
353 | .callback = set_bf_sort, | |
354 | .ident = "HP ProLiant BL460c G1", | |
355 | .matches = { | |
356 | DMI_MATCH(DMI_SYS_VENDOR, "HP"), | |
357 | DMI_MATCH(DMI_PRODUCT_NAME, "ProLiant BL460c G1"), | |
358 | }, | |
359 | }, | |
360 | { | |
361 | .callback = set_bf_sort, | |
362 | .ident = "HP ProLiant BL465c G1", | |
363 | .matches = { | |
364 | DMI_MATCH(DMI_SYS_VENDOR, "HP"), | |
365 | DMI_MATCH(DMI_PRODUCT_NAME, "ProLiant BL465c G1"), | |
366 | }, | |
367 | }, | |
368 | { | |
369 | .callback = set_bf_sort, | |
370 | .ident = "HP ProLiant BL480c G1", | |
371 | .matches = { | |
372 | DMI_MATCH(DMI_SYS_VENDOR, "HP"), | |
373 | DMI_MATCH(DMI_PRODUCT_NAME, "ProLiant BL480c G1"), | |
374 | }, | |
375 | }, | |
376 | { | |
377 | .callback = set_bf_sort, | |
378 | .ident = "HP ProLiant BL685c G1", | |
379 | .matches = { | |
380 | DMI_MATCH(DMI_SYS_VENDOR, "HP"), | |
381 | DMI_MATCH(DMI_PRODUCT_NAME, "ProLiant BL685c G1"), | |
382 | }, | |
383 | }, | |
8f8ae1a7 MS |
384 | { |
385 | .callback = set_bf_sort, | |
8d64c781 | 386 | .ident = "HP ProLiant DL360", |
8f8ae1a7 MS |
387 | .matches = { |
388 | DMI_MATCH(DMI_SYS_VENDOR, "HP"), | |
8d64c781 | 389 | DMI_MATCH(DMI_PRODUCT_NAME, "ProLiant DL360"), |
8f8ae1a7 MS |
390 | }, |
391 | }, | |
392 | { | |
393 | .callback = set_bf_sort, | |
8d64c781 | 394 | .ident = "HP ProLiant DL380", |
8f8ae1a7 MS |
395 | .matches = { |
396 | DMI_MATCH(DMI_SYS_VENDOR, "HP"), | |
8d64c781 | 397 | DMI_MATCH(DMI_PRODUCT_NAME, "ProLiant DL380"), |
8f8ae1a7 MS |
398 | }, |
399 | }, | |
5b1ea82f JL |
400 | #ifdef __i386__ |
401 | { | |
402 | .callback = assign_all_busses, | |
403 | .ident = "Compaq EVO N800c", | |
404 | .matches = { | |
405 | DMI_MATCH(DMI_SYS_VENDOR, "Compaq"), | |
406 | DMI_MATCH(DMI_PRODUCT_NAME, "EVO N800c"), | |
407 | }, | |
408 | }, | |
409 | #endif | |
c82bc5ad MS |
410 | { |
411 | .callback = set_bf_sort, | |
739db07f | 412 | .ident = "HP ProLiant DL385 G2", |
c82bc5ad MS |
413 | .matches = { |
414 | DMI_MATCH(DMI_SYS_VENDOR, "HP"), | |
739db07f | 415 | DMI_MATCH(DMI_PRODUCT_NAME, "ProLiant DL385 G2"), |
c82bc5ad MS |
416 | }, |
417 | }, | |
418 | { | |
419 | .callback = set_bf_sort, | |
739db07f | 420 | .ident = "HP ProLiant DL585 G2", |
c82bc5ad MS |
421 | .matches = { |
422 | DMI_MATCH(DMI_SYS_VENDOR, "HP"), | |
739db07f | 423 | DMI_MATCH(DMI_PRODUCT_NAME, "ProLiant DL585 G2"), |
c82bc5ad MS |
424 | }, |
425 | }, | |
284f5f9d BH |
426 | { |
427 | .callback = set_scan_all, | |
428 | .ident = "Stratus/NEC ftServer", | |
429 | .matches = { | |
1278998f MS |
430 | DMI_MATCH(DMI_SYS_VENDOR, "Stratus"), |
431 | DMI_MATCH(DMI_PRODUCT_NAME, "ftServer"), | |
284f5f9d BH |
432 | }, |
433 | }, | |
51ac3d2f CR |
434 | { |
435 | .callback = set_scan_all, | |
436 | .ident = "Stratus/NEC ftServer", | |
437 | .matches = { | |
438 | DMI_MATCH(DMI_SYS_VENDOR, "NEC"), | |
439 | DMI_MATCH(DMI_PRODUCT_NAME, "Express5800/R32"), | |
440 | }, | |
441 | }, | |
442 | { | |
443 | .callback = set_scan_all, | |
444 | .ident = "Stratus/NEC ftServer", | |
445 | .matches = { | |
446 | DMI_MATCH(DMI_SYS_VENDOR, "NEC"), | |
447 | DMI_MATCH(DMI_PRODUCT_NAME, "Express5800/R31"), | |
448 | }, | |
449 | }, | |
8c4b2cf9 BK |
450 | {} |
451 | }; | |
1da177e4 | 452 | |
0df18ff3 YL |
453 | void __init dmi_check_pciprobe(void) |
454 | { | |
455 | dmi_check_system(pciprobe_dmi_table); | |
456 | } | |
457 | ||
49886cf4 | 458 | void pcibios_scan_root(int busnum) |
1da177e4 | 459 | { |
289a24a6 BH |
460 | struct pci_bus *bus; |
461 | struct pci_sysdata *sd; | |
462 | LIST_HEAD(resources); | |
463 | ||
464 | sd = kzalloc(sizeof(*sd), GFP_KERNEL); | |
465 | if (!sd) { | |
466 | printk(KERN_ERR "PCI: OOM, skipping PCI bus %02x\n", busnum); | |
49886cf4 | 467 | return; |
289a24a6 | 468 | } |
6616dbdf | 469 | sd->node = x86_pci_root_bus_node(busnum); |
289a24a6 BH |
470 | x86_pci_root_bus_resources(busnum, &resources); |
471 | printk(KERN_DEBUG "PCI: Probing PCI hardware (bus %02x)\n", busnum); | |
472 | bus = pci_scan_root_bus(NULL, busnum, &pci_root_ops, sd, &resources); | |
473 | if (!bus) { | |
474 | pci_free_resource_list(&resources); | |
475 | kfree(sd); | |
b97ea289 | 476 | return; |
289a24a6 | 477 | } |
b97ea289 | 478 | pci_bus_add_devices(bus); |
1da177e4 | 479 | } |
c57ca65a | 480 | |
44de3395 | 481 | void __init pcibios_set_cache_line_size(void) |
1da177e4 LT |
482 | { |
483 | struct cpuinfo_x86 *c = &boot_cpu_data; | |
484 | ||
1da177e4 | 485 | /* |
76b1a87b DJ |
486 | * Set PCI cacheline size to that of the CPU if the CPU has reported it. |
487 | * (For older CPUs that don't support cpuid, we se it to 32 bytes | |
488 | * It's also good for 386/486s (which actually have 16) | |
1da177e4 LT |
489 | * as quite a few PCI devices do not support smaller values. |
490 | */ | |
76b1a87b DJ |
491 | if (c->x86_clflush_size > 0) { |
492 | pci_dfl_cache_line_size = c->x86_clflush_size >> 2; | |
493 | printk(KERN_DEBUG "PCI: pci_cache_line_size set to %d bytes\n", | |
494 | pci_dfl_cache_line_size << 2); | |
495 | } else { | |
496 | pci_dfl_cache_line_size = 32 >> 2; | |
497 | printk(KERN_DEBUG "PCI: Unknown cacheline size. Setting to 32 bytes\n"); | |
498 | } | |
44de3395 AN |
499 | } |
500 | ||
501 | int __init pcibios_init(void) | |
502 | { | |
35a6ae07 | 503 | if (!raw_pci_ops && !raw_pci_ext_ops) { |
44de3395 AN |
504 | printk(KERN_WARNING "PCI: System does not support PCI\n"); |
505 | return 0; | |
506 | } | |
1da177e4 | 507 | |
44de3395 | 508 | pcibios_set_cache_line_size(); |
1da177e4 LT |
509 | pcibios_resource_survey(); |
510 | ||
6b4b78fe MD |
511 | if (pci_bf_sort >= pci_force_bf) |
512 | pci_sort_breadthfirst(); | |
1da177e4 LT |
513 | return 0; |
514 | } | |
515 | ||
4ac9cbfa | 516 | char *__init pcibios_setup(char *str) |
1da177e4 LT |
517 | { |
518 | if (!strcmp(str, "off")) { | |
519 | pci_probe = 0; | |
520 | return NULL; | |
6b4b78fe MD |
521 | } else if (!strcmp(str, "bfsort")) { |
522 | pci_bf_sort = pci_force_bf; | |
523 | return NULL; | |
524 | } else if (!strcmp(str, "nobfsort")) { | |
525 | pci_bf_sort = pci_force_nobf; | |
526 | return NULL; | |
1da177e4 LT |
527 | } |
528 | #ifdef CONFIG_PCI_BIOS | |
529 | else if (!strcmp(str, "bios")) { | |
530 | pci_probe = PCI_PROBE_BIOS; | |
531 | return NULL; | |
532 | } else if (!strcmp(str, "nobios")) { | |
533 | pci_probe &= ~PCI_PROBE_BIOS; | |
534 | return NULL; | |
1da177e4 LT |
535 | } else if (!strcmp(str, "biosirq")) { |
536 | pci_probe |= PCI_BIOS_IRQ_SCAN; | |
537 | return NULL; | |
120bb424 | 538 | } else if (!strncmp(str, "pirqaddr=", 9)) { |
539 | pirq_table_addr = simple_strtoul(str+9, NULL, 0); | |
540 | return NULL; | |
1da177e4 LT |
541 | } |
542 | #endif | |
543 | #ifdef CONFIG_PCI_DIRECT | |
544 | else if (!strcmp(str, "conf1")) { | |
545 | pci_probe = PCI_PROBE_CONF1 | PCI_NO_CHECKS; | |
546 | return NULL; | |
547 | } | |
548 | else if (!strcmp(str, "conf2")) { | |
549 | pci_probe = PCI_PROBE_CONF2 | PCI_NO_CHECKS; | |
550 | return NULL; | |
551 | } | |
552 | #endif | |
553 | #ifdef CONFIG_PCI_MMCONFIG | |
554 | else if (!strcmp(str, "nommconf")) { | |
555 | pci_probe &= ~PCI_PROBE_MMCONF; | |
556 | return NULL; | |
557 | } | |
5f0b2976 YL |
558 | else if (!strcmp(str, "check_enable_amd_mmconf")) { |
559 | pci_probe |= PCI_CHECK_ENABLE_AMD_MMCONF; | |
560 | return NULL; | |
561 | } | |
1da177e4 LT |
562 | #endif |
563 | else if (!strcmp(str, "noacpi")) { | |
564 | acpi_noirq_set(); | |
565 | return NULL; | |
566 | } | |
0637a70a AK |
567 | else if (!strcmp(str, "noearly")) { |
568 | pci_probe |= PCI_PROBE_NOEARLY; | |
569 | return NULL; | |
570 | } | |
1da177e4 LT |
571 | else if (!strcmp(str, "usepirqmask")) { |
572 | pci_probe |= PCI_USE_PIRQ_MASK; | |
573 | return NULL; | |
574 | } else if (!strncmp(str, "irqmask=", 8)) { | |
575 | pcibios_irq_mask = simple_strtol(str+8, NULL, 0); | |
576 | return NULL; | |
577 | } else if (!strncmp(str, "lastbus=", 8)) { | |
578 | pcibios_last_bus = simple_strtol(str+8, NULL, 0); | |
579 | return NULL; | |
c5f9ee3d | 580 | } else if (!strcmp(str, "rom")) { |
1da177e4 LT |
581 | pci_probe |= PCI_ASSIGN_ROMS; |
582 | return NULL; | |
bb71ad88 GH |
583 | } else if (!strcmp(str, "norom")) { |
584 | pci_probe |= PCI_NOASSIGN_ROMS; | |
585 | return NULL; | |
7bd1c365 MH |
586 | } else if (!strcmp(str, "nobar")) { |
587 | pci_probe |= PCI_NOASSIGN_BARS; | |
588 | return NULL; | |
1da177e4 LT |
589 | } else if (!strcmp(str, "assign-busses")) { |
590 | pci_probe |= PCI_ASSIGN_ALL_BUSSES; | |
591 | return NULL; | |
236e946b LT |
592 | } else if (!strcmp(str, "use_crs")) { |
593 | pci_probe |= PCI_USE__CRS; | |
62f420f8 | 594 | return NULL; |
7bc5e3f2 BH |
595 | } else if (!strcmp(str, "nocrs")) { |
596 | pci_probe |= PCI_ROOT_NO_CRS; | |
597 | return NULL; | |
fa6dae5d HG |
598 | } else if (!strcmp(str, "use_e820")) { |
599 | pci_probe |= PCI_USE_E820; | |
600 | add_taint(TAINT_FIRMWARE_WORKAROUND, LOCKDEP_STILL_OK); | |
601 | return NULL; | |
602 | } else if (!strcmp(str, "no_e820")) { | |
603 | pci_probe |= PCI_NO_E820; | |
604 | add_taint(TAINT_FIRMWARE_WORKAROUND, LOCKDEP_STILL_OK); | |
605 | return NULL; | |
f32ab754 UCCB |
606 | #ifdef CONFIG_PHYS_ADDR_T_64BIT |
607 | } else if (!strcmp(str, "big_root_window")) { | |
608 | pci_probe |= PCI_BIG_ROOT_WINDOW; | |
609 | return NULL; | |
610 | #endif | |
1da177e4 LT |
611 | } else if (!strcmp(str, "routeirq")) { |
612 | pci_routeirq = 1; | |
613 | return NULL; | |
13a6ddb0 YL |
614 | } else if (!strcmp(str, "skip_isa_align")) { |
615 | pci_probe |= PCI_CAN_SKIP_ISA_ALIGN; | |
616 | return NULL; | |
a9322f64 SA |
617 | } else if (!strcmp(str, "noioapicquirk")) { |
618 | noioapicquirk = 1; | |
619 | return NULL; | |
9197979b SA |
620 | } else if (!strcmp(str, "ioapicreroute")) { |
621 | if (noioapicreroute != -1) | |
622 | noioapicreroute = 0; | |
623 | return NULL; | |
41b9eb26 SA |
624 | } else if (!strcmp(str, "noioapicreroute")) { |
625 | if (noioapicreroute != -1) | |
626 | noioapicreroute = 1; | |
627 | return NULL; | |
1da177e4 LT |
628 | } |
629 | return str; | |
630 | } | |
631 | ||
632 | unsigned int pcibios_assign_all_busses(void) | |
633 | { | |
634 | return (pci_probe & PCI_ASSIGN_ALL_BUSSES) ? 1 : 0; | |
635 | } | |
636 | ||
3161832d KB |
637 | static void set_dev_domain_options(struct pci_dev *pdev) |
638 | { | |
639 | if (is_vmd(pdev->bus)) | |
640 | pdev->hotplug_user_indicators = 1; | |
641 | } | |
642 | ||
06dc660e | 643 | int pcibios_device_add(struct pci_dev *dev) |
f9a37be0 | 644 | { |
f9a37be0 | 645 | struct pci_setup_rom *rom; |
2c681e6b TG |
646 | struct irq_domain *msidom; |
647 | struct setup_data *data; | |
f9a37be0 MG |
648 | u64 pa_data; |
649 | ||
650 | pa_data = boot_params.hdr.setup_data; | |
651 | while (pa_data) { | |
f7750a79 | 652 | data = memremap(pa_data, sizeof(*rom), MEMREMAP_WB); |
65694c5a MF |
653 | if (!data) |
654 | return -ENOMEM; | |
f9a37be0 MG |
655 | |
656 | if (data->type == SETUP_PCI) { | |
657 | rom = (struct pci_setup_rom *)data; | |
658 | ||
659 | if ((pci_domain_nr(dev->bus) == rom->segment) && | |
660 | (dev->bus->number == rom->bus) && | |
661 | (PCI_SLOT(dev->devfn) == rom->device) && | |
662 | (PCI_FUNC(dev->devfn) == rom->function) && | |
663 | (dev->vendor == rom->vendor) && | |
664 | (dev->device == rom->devid)) { | |
dbd3fc33 BH |
665 | dev->rom = pa_data + |
666 | offsetof(struct pci_setup_rom, romdata); | |
f9a37be0 MG |
667 | dev->romlen = rom->pcilen; |
668 | } | |
669 | } | |
670 | pa_data = data->next; | |
f7750a79 | 671 | memunmap(data); |
f9a37be0 | 672 | } |
3161832d | 673 | set_dev_domain_options(dev); |
2c681e6b TG |
674 | |
675 | /* | |
676 | * Setup the initial MSI domain of the device. If the underlying | |
677 | * bus has a PCI/MSI irqdomain associated use the bus domain, | |
678 | * otherwise set the default domain. This ensures that special irq | |
679 | * domains e.g. VMD are preserved. The default ensures initial | |
680 | * operation if irq remapping is not active. If irq remapping is | |
681 | * active it will overwrite the domain pointer when the device is | |
682 | * associated to a remapping domain. | |
683 | */ | |
684 | msidom = dev_get_msi_domain(&dev->bus->dev); | |
685 | if (!msidom) | |
686 | msidom = x86_pci_msi_default_domain; | |
687 | dev_set_msi_domain(&dev->dev, msidom); | |
f9a37be0 MG |
688 | return 0; |
689 | } | |
690 | ||
6c777e87 | 691 | int pcibios_enable_device(struct pci_dev *dev, int mask) |
1da177e4 | 692 | { |
6c777e87 | 693 | int err; |
87bec66b | 694 | |
6c777e87 BH |
695 | if ((err = pci_enable_resources(dev, mask)) < 0) |
696 | return err; | |
697 | ||
698 | if (!pci_dev_msi_enabled(dev)) | |
699 | return pcibios_enable_irq(dev); | |
700 | return 0; | |
9e8ce4b9 RW |
701 | } |
702 | ||
6c777e87 | 703 | void pcibios_disable_device (struct pci_dev *dev) |
991de2e5 | 704 | { |
6c777e87 BH |
705 | if (!pci_dev_msi_enabled(dev) && pcibios_disable_irq) |
706 | pcibios_disable_irq(dev); | |
991de2e5 JL |
707 | } |
708 | ||
153654db RW |
709 | #ifdef CONFIG_ACPI_HOTPLUG_IOAPIC |
710 | void pcibios_release_device(struct pci_dev *dev) | |
711 | { | |
712 | if (atomic_dec_return(&dev->enable_cnt) >= 0) | |
713 | pcibios_disable_device(dev); | |
714 | ||
715 | } | |
716 | #endif | |
717 | ||
642c92da | 718 | int pci_ext_cfg_avail(void) |
0ef5f8f6 AP |
719 | { |
720 | if (raw_pci_ext_ops) | |
721 | return 1; | |
722 | else | |
723 | return 0; | |
724 | } | |
2856ba60 JD |
725 | |
726 | #if IS_ENABLED(CONFIG_VMD) | |
727 | struct pci_dev *pci_real_dma_dev(struct pci_dev *dev) | |
728 | { | |
729 | if (is_vmd(dev->bus)) | |
730 | return to_pci_sysdata(dev->bus)->vmd_dev; | |
731 | ||
732 | return dev; | |
733 | } | |
734 | #endif |