Commit | Line | Data |
---|---|---|
1da177e4 LT |
1 | #include <linux/pci.h> |
2 | #include <linux/acpi.h> | |
3 | #include <linux/init.h> | |
b33fa1f3 | 4 | #include <linux/irq.h> |
036fff4c | 5 | #include <linux/dmi.h> |
5a0e3ad6 | 6 | #include <linux/slab.h> |
69e1a33f | 7 | #include <asm/numa.h> |
82487711 | 8 | #include <asm/pci_x86.h> |
1da177e4 | 9 | |
62f420f8 | 10 | struct pci_root_info { |
42887b29 | 11 | struct acpi_device *bridge; |
62f420f8 GH |
12 | char *name; |
13 | unsigned int res_num; | |
14 | struct resource *res; | |
62f420f8 GH |
15 | int busnum; |
16 | }; | |
17 | ||
7bc5e3f2 BH |
18 | static bool pci_use_crs = true; |
19 | ||
20 | static int __init set_use_crs(const struct dmi_system_id *id) | |
21 | { | |
22 | pci_use_crs = true; | |
23 | return 0; | |
24 | } | |
25 | ||
28c3c05d DJ |
26 | static int __init set_nouse_crs(const struct dmi_system_id *id) |
27 | { | |
28 | pci_use_crs = false; | |
29 | return 0; | |
30 | } | |
31 | ||
7bc5e3f2 BH |
32 | static const struct dmi_system_id pci_use_crs_table[] __initconst = { |
33 | /* http://bugzilla.kernel.org/show_bug.cgi?id=14183 */ | |
34 | { | |
35 | .callback = set_use_crs, | |
36 | .ident = "IBM System x3800", | |
37 | .matches = { | |
38 | DMI_MATCH(DMI_SYS_VENDOR, "IBM"), | |
39 | DMI_MATCH(DMI_PRODUCT_NAME, "x3800"), | |
40 | }, | |
41 | }, | |
2491762c BH |
42 | /* https://bugzilla.kernel.org/show_bug.cgi?id=16007 */ |
43 | /* 2006 AMD HT/VIA system with two host bridges */ | |
44 | { | |
45 | .callback = set_use_crs, | |
46 | .ident = "ASRock ALiveSATA2-GLAN", | |
47 | .matches = { | |
48 | DMI_MATCH(DMI_PRODUCT_NAME, "ALiveSATA2-GLAN"), | |
49 | }, | |
50 | }, | |
29cf7a30 PM |
51 | /* https://bugzilla.kernel.org/show_bug.cgi?id=30552 */ |
52 | /* 2006 AMD HT/VIA system with two host bridges */ | |
53 | { | |
54 | .callback = set_use_crs, | |
55 | .ident = "ASUS M2V-MX SE", | |
56 | .matches = { | |
57 | DMI_MATCH(DMI_BOARD_VENDOR, "ASUSTeK Computer INC."), | |
58 | DMI_MATCH(DMI_BOARD_NAME, "M2V-MX SE"), | |
59 | DMI_MATCH(DMI_BIOS_VENDOR, "American Megatrends Inc."), | |
60 | }, | |
61 | }, | |
84113717 JN |
62 | /* https://bugzilla.kernel.org/show_bug.cgi?id=42619 */ |
63 | { | |
64 | .callback = set_use_crs, | |
65 | .ident = "MSI MS-7253", | |
66 | .matches = { | |
67 | DMI_MATCH(DMI_BOARD_VENDOR, "MICRO-STAR INTERNATIONAL CO., LTD"), | |
68 | DMI_MATCH(DMI_BOARD_NAME, "MS-7253"), | |
69 | DMI_MATCH(DMI_BIOS_VENDOR, "Phoenix Technologies, LTD"), | |
84113717 JN |
70 | }, |
71 | }, | |
28c3c05d | 72 | |
e702781f DJ |
73 | /* Now for the blacklist.. */ |
74 | ||
75 | /* https://bugzilla.redhat.com/show_bug.cgi?id=769657 */ | |
76 | { | |
77 | .callback = set_nouse_crs, | |
78 | .ident = "Dell Studio 1557", | |
79 | .matches = { | |
80 | DMI_MATCH(DMI_BOARD_VENDOR, "Dell Inc."), | |
81 | DMI_MATCH(DMI_PRODUCT_NAME, "Studio 1557"), | |
82 | DMI_MATCH(DMI_BIOS_VERSION, "A09"), | |
83 | }, | |
84 | }, | |
8b6a5af9 DJ |
85 | /* https://bugzilla.redhat.com/show_bug.cgi?id=769657 */ |
86 | { | |
87 | .callback = set_nouse_crs, | |
88 | .ident = "Thinkpad SL510", | |
89 | .matches = { | |
90 | DMI_MATCH(DMI_BOARD_VENDOR, "LENOVO"), | |
91 | DMI_MATCH(DMI_BOARD_NAME, "2847DFG"), | |
92 | DMI_MATCH(DMI_BIOS_VERSION, "6JET85WW (1.43 )"), | |
93 | }, | |
94 | }, | |
7bc5e3f2 BH |
95 | {} |
96 | }; | |
97 | ||
98 | void __init pci_acpi_crs_quirks(void) | |
99 | { | |
100 | int year; | |
101 | ||
102 | if (dmi_get_date(DMI_BIOS_DATE, &year, NULL, NULL) && year < 2008) | |
103 | pci_use_crs = false; | |
104 | ||
105 | dmi_check_system(pci_use_crs_table); | |
106 | ||
107 | /* | |
108 | * If the user specifies "pci=use_crs" or "pci=nocrs" explicitly, that | |
109 | * takes precedence over anything we figured out above. | |
110 | */ | |
111 | if (pci_probe & PCI_ROOT_NO_CRS) | |
112 | pci_use_crs = false; | |
113 | else if (pci_probe & PCI_USE__CRS) | |
114 | pci_use_crs = true; | |
115 | ||
116 | printk(KERN_INFO "PCI: %s host bridge windows from ACPI; " | |
117 | "if necessary, use \"pci=%s\" and report a bug\n", | |
118 | pci_use_crs ? "Using" : "Ignoring", | |
119 | pci_use_crs ? "nocrs" : "use_crs"); | |
120 | } | |
121 | ||
62f420f8 GH |
122 | static acpi_status |
123 | resource_to_addr(struct acpi_resource *resource, | |
124 | struct acpi_resource_address64 *addr) | |
125 | { | |
126 | acpi_status status; | |
66528fdd BH |
127 | struct acpi_resource_memory24 *memory24; |
128 | struct acpi_resource_memory32 *memory32; | |
129 | struct acpi_resource_fixed_memory32 *fixed_memory32; | |
62f420f8 | 130 | |
66528fdd BH |
131 | memset(addr, 0, sizeof(*addr)); |
132 | switch (resource->type) { | |
133 | case ACPI_RESOURCE_TYPE_MEMORY24: | |
134 | memory24 = &resource->data.memory24; | |
135 | addr->resource_type = ACPI_MEMORY_RANGE; | |
136 | addr->minimum = memory24->minimum; | |
137 | addr->address_length = memory24->address_length; | |
138 | addr->maximum = addr->minimum + addr->address_length - 1; | |
62f420f8 | 139 | return AE_OK; |
66528fdd BH |
140 | case ACPI_RESOURCE_TYPE_MEMORY32: |
141 | memory32 = &resource->data.memory32; | |
142 | addr->resource_type = ACPI_MEMORY_RANGE; | |
143 | addr->minimum = memory32->minimum; | |
144 | addr->address_length = memory32->address_length; | |
145 | addr->maximum = addr->minimum + addr->address_length - 1; | |
146 | return AE_OK; | |
147 | case ACPI_RESOURCE_TYPE_FIXED_MEMORY32: | |
148 | fixed_memory32 = &resource->data.fixed_memory32; | |
149 | addr->resource_type = ACPI_MEMORY_RANGE; | |
150 | addr->minimum = fixed_memory32->address; | |
151 | addr->address_length = fixed_memory32->address_length; | |
152 | addr->maximum = addr->minimum + addr->address_length - 1; | |
153 | return AE_OK; | |
154 | case ACPI_RESOURCE_TYPE_ADDRESS16: | |
155 | case ACPI_RESOURCE_TYPE_ADDRESS32: | |
156 | case ACPI_RESOURCE_TYPE_ADDRESS64: | |
157 | status = acpi_resource_to_address64(resource, addr); | |
158 | if (ACPI_SUCCESS(status) && | |
159 | (addr->resource_type == ACPI_MEMORY_RANGE || | |
160 | addr->resource_type == ACPI_IO_RANGE) && | |
161 | addr->address_length > 0) { | |
162 | return AE_OK; | |
163 | } | |
164 | break; | |
62f420f8 GH |
165 | } |
166 | return AE_ERROR; | |
167 | } | |
168 | ||
169 | static acpi_status | |
170 | count_resource(struct acpi_resource *acpi_res, void *data) | |
171 | { | |
172 | struct pci_root_info *info = data; | |
173 | struct acpi_resource_address64 addr; | |
174 | acpi_status status; | |
175 | ||
176 | status = resource_to_addr(acpi_res, &addr); | |
177 | if (ACPI_SUCCESS(status)) | |
178 | info->res_num++; | |
179 | return AE_OK; | |
180 | } | |
181 | ||
182 | static acpi_status | |
183 | setup_resource(struct acpi_resource *acpi_res, void *data) | |
184 | { | |
185 | struct pci_root_info *info = data; | |
186 | struct resource *res; | |
187 | struct acpi_resource_address64 addr; | |
188 | acpi_status status; | |
189 | unsigned long flags; | |
ae5cd864 | 190 | u64 start, orig_end, end; |
2cdb3f1d | 191 | |
62f420f8 GH |
192 | status = resource_to_addr(acpi_res, &addr); |
193 | if (!ACPI_SUCCESS(status)) | |
194 | return AE_OK; | |
195 | ||
196 | if (addr.resource_type == ACPI_MEMORY_RANGE) { | |
62f420f8 GH |
197 | flags = IORESOURCE_MEM; |
198 | if (addr.info.mem.caching == ACPI_PREFETCHABLE_MEMORY) | |
199 | flags |= IORESOURCE_PREFETCH; | |
200 | } else if (addr.resource_type == ACPI_IO_RANGE) { | |
62f420f8 GH |
201 | flags = IORESOURCE_IO; |
202 | } else | |
203 | return AE_OK; | |
204 | ||
2cdb3f1d | 205 | start = addr.minimum + addr.translation_offset; |
ae5cd864 GH |
206 | orig_end = end = addr.maximum + addr.translation_offset; |
207 | ||
208 | /* Exclude non-addressable range or non-addressable portion of range */ | |
209 | end = min(end, (u64)iomem_resource.end); | |
210 | if (end <= start) { | |
211 | dev_info(&info->bridge->dev, | |
212 | "host bridge window [%#llx-%#llx] " | |
213 | "(ignored, not CPU addressable)\n", start, orig_end); | |
214 | return AE_OK; | |
215 | } else if (orig_end != end) { | |
216 | dev_info(&info->bridge->dev, | |
217 | "host bridge window [%#llx-%#llx] " | |
218 | "([%#llx-%#llx] ignored, not CPU addressable)\n", | |
219 | start, orig_end, end + 1, orig_end); | |
220 | } | |
f9cde5ff | 221 | |
2cdb3f1d YL |
222 | res = &info->res[info->res_num]; |
223 | res->name = info->name; | |
224 | res->flags = flags; | |
225 | res->start = start; | |
226 | res->end = end; | |
227 | res->child = NULL; | |
228 | ||
7bc5e3f2 | 229 | if (!pci_use_crs) { |
f1db6fde BH |
230 | dev_printk(KERN_DEBUG, &info->bridge->dev, |
231 | "host bridge window %pR (ignored)\n", res); | |
232 | return AE_OK; | |
233 | } | |
234 | ||
4723d0f2 BH |
235 | info->res_num++; |
236 | if (addr.translation_offset) | |
237 | dev_info(&info->bridge->dev, "host bridge window %pR " | |
238 | "(PCI address [%#llx-%#llx])\n", | |
239 | res, res->start - addr.translation_offset, | |
240 | res->end - addr.translation_offset); | |
241 | else | |
242 | dev_info(&info->bridge->dev, "host bridge window %pR\n", res); | |
243 | ||
244 | return AE_OK; | |
245 | } | |
246 | ||
247 | static bool resource_contains(struct resource *res, resource_size_t point) | |
248 | { | |
249 | if (res->start <= point && point <= res->end) | |
250 | return true; | |
251 | return false; | |
252 | } | |
253 | ||
6e33a852 | 254 | static void coalesce_windows(struct pci_root_info *info, unsigned long type) |
4723d0f2 BH |
255 | { |
256 | int i, j; | |
257 | struct resource *res1, *res2; | |
258 | ||
259 | for (i = 0; i < info->res_num; i++) { | |
260 | res1 = &info->res[i]; | |
261 | if (!(res1->flags & type)) | |
262 | continue; | |
263 | ||
264 | for (j = i + 1; j < info->res_num; j++) { | |
265 | res2 = &info->res[j]; | |
266 | if (!(res2->flags & type)) | |
267 | continue; | |
268 | ||
269 | /* | |
270 | * I don't like throwing away windows because then | |
271 | * our resources no longer match the ACPI _CRS, but | |
272 | * the kernel resource tree doesn't allow overlaps. | |
273 | */ | |
274 | if (resource_contains(res1, res2->start) || | |
275 | resource_contains(res1, res2->end) || | |
276 | resource_contains(res2, res1->start) || | |
277 | resource_contains(res2, res1->end)) { | |
278 | res1->start = min(res1->start, res2->start); | |
279 | res1->end = max(res1->end, res2->end); | |
280 | dev_info(&info->bridge->dev, | |
281 | "host bridge window expanded to %pR; %pR ignored\n", | |
282 | res1, res2); | |
283 | res2->flags = 0; | |
284 | } | |
285 | } | |
286 | } | |
287 | } | |
288 | ||
9a03d28d YL |
289 | static void add_resources(struct pci_root_info *info, |
290 | struct list_head *resources) | |
4723d0f2 BH |
291 | { |
292 | int i; | |
293 | struct resource *res, *root, *conflict; | |
294 | ||
4723d0f2 BH |
295 | coalesce_windows(info, IORESOURCE_MEM); |
296 | coalesce_windows(info, IORESOURCE_IO); | |
297 | ||
298 | for (i = 0; i < info->res_num; i++) { | |
299 | res = &info->res[i]; | |
300 | ||
301 | if (res->flags & IORESOURCE_MEM) | |
302 | root = &iomem_resource; | |
303 | else if (res->flags & IORESOURCE_IO) | |
304 | root = &ioport_resource; | |
42887b29 | 305 | else |
4723d0f2 BH |
306 | continue; |
307 | ||
308 | conflict = insert_resource_conflict(root, res); | |
309 | if (conflict) | |
43d786ed BH |
310 | dev_info(&info->bridge->dev, |
311 | "ignoring host bridge window %pR (conflicts with %s %pR)\n", | |
312 | res, conflict->name, conflict); | |
4723d0f2 | 313 | else |
9a03d28d | 314 | pci_add_resource(resources, res); |
62f420f8 | 315 | } |
62f420f8 GH |
316 | } |
317 | ||
fd3b0c1e | 318 | static void free_pci_root_info_res(struct pci_root_info *info) |
baa495d9 YL |
319 | { |
320 | kfree(info->name); | |
321 | kfree(info->res); | |
fd3b0c1e YL |
322 | info->res = NULL; |
323 | info->res_num = 0; | |
324 | } | |
325 | ||
326 | static void __release_pci_root_info(struct pci_root_info *info) | |
327 | { | |
328 | int i; | |
329 | struct resource *res; | |
330 | ||
331 | for (i = 0; i < info->res_num; i++) { | |
332 | res = &info->res[i]; | |
333 | ||
334 | if (!res->parent) | |
335 | continue; | |
336 | ||
337 | if (!(res->flags & (IORESOURCE_MEM | IORESOURCE_IO))) | |
338 | continue; | |
339 | ||
340 | release_resource(res); | |
341 | } | |
342 | ||
343 | free_pci_root_info_res(info); | |
344 | ||
345 | kfree(info); | |
346 | } | |
347 | static void release_pci_root_info(struct pci_host_bridge *bridge) | |
348 | { | |
349 | struct pci_root_info *info = bridge->release_data; | |
350 | ||
351 | __release_pci_root_info(info); | |
baa495d9 YL |
352 | } |
353 | ||
62f420f8 | 354 | static void |
9a03d28d YL |
355 | probe_pci_root_info(struct pci_root_info *info, struct acpi_device *device, |
356 | int busnum, int domain) | |
62f420f8 | 357 | { |
62f420f8 GH |
358 | size_t size; |
359 | ||
baa495d9 YL |
360 | info->bridge = device; |
361 | info->res_num = 0; | |
62f420f8 | 362 | acpi_walk_resources(device->handle, METHOD_NAME__CRS, count_resource, |
baa495d9 YL |
363 | info); |
364 | if (!info->res_num) | |
62f420f8 GH |
365 | return; |
366 | ||
baa495d9 | 367 | size = sizeof(*info->res) * info->res_num; |
9a03d28d | 368 | info->res_num = 0; |
baa495d9 YL |
369 | info->res = kmalloc(size, GFP_KERNEL); |
370 | if (!info->res) | |
2cd6975a | 371 | return; |
62f420f8 | 372 | |
baa495d9 YL |
373 | info->name = kasprintf(GFP_KERNEL, "PCI Bus %04x:%02x", domain, busnum); |
374 | if (!info->name) | |
9a03d28d | 375 | return; |
62f420f8 | 376 | |
62f420f8 | 377 | acpi_walk_resources(device->handle, METHOD_NAME__CRS, setup_resource, |
baa495d9 | 378 | info); |
62f420f8 GH |
379 | } |
380 | ||
57283776 | 381 | struct pci_bus * __devinit pci_acpi_scan_root(struct acpi_pci_root *root) |
1da177e4 | 382 | { |
57283776 | 383 | struct acpi_device *device = root->device; |
fd3b0c1e | 384 | struct pci_root_info *info = NULL; |
57283776 BH |
385 | int domain = root->segment; |
386 | int busnum = root->secondary.start; | |
2cd6975a | 387 | LIST_HEAD(resources); |
69e1a33f | 388 | struct pci_bus *bus; |
08f1c192 | 389 | struct pci_sysdata *sd; |
871d5f8d YL |
390 | int node; |
391 | #ifdef CONFIG_ACPI_NUMA | |
08f1c192 | 392 | int pxm; |
871d5f8d | 393 | #endif |
08f1c192 | 394 | |
a79e4198 | 395 | if (domain && !pci_domains_supported) { |
2a6bed83 BH |
396 | printk(KERN_WARNING "pci_bus %04x:%02x: " |
397 | "ignored (multiple domains not supported)\n", | |
398 | domain, busnum); | |
a79e4198 JG |
399 | return NULL; |
400 | } | |
401 | ||
871d5f8d YL |
402 | node = -1; |
403 | #ifdef CONFIG_ACPI_NUMA | |
404 | pxm = acpi_get_pxm(device->handle); | |
405 | if (pxm >= 0) | |
406 | node = pxm_to_node(pxm); | |
407 | if (node != -1) | |
408 | set_mp_bus_to_node(busnum, node); | |
409 | else | |
871d5f8d | 410 | #endif |
871d5f8d | 411 | node = get_mp_bus_to_node(busnum); |
b755de8d YL |
412 | |
413 | if (node != -1 && !node_online(node)) | |
414 | node = -1; | |
871d5f8d | 415 | |
08f1c192 MBY |
416 | /* Allocate per-root-bus (not per bus) arch-specific data. |
417 | * TODO: leak; this memory is never freed. | |
418 | * It's arguable whether it's worth the trouble to care. | |
419 | */ | |
420 | sd = kzalloc(sizeof(*sd), GFP_KERNEL); | |
421 | if (!sd) { | |
2a6bed83 BH |
422 | printk(KERN_WARNING "pci_bus %04x:%02x: " |
423 | "ignored (out of memory)\n", domain, busnum); | |
08f1c192 MBY |
424 | return NULL; |
425 | } | |
69e1a33f | 426 | |
a79e4198 | 427 | sd->domain = domain; |
871d5f8d | 428 | sd->node = node; |
fd3b0c1e YL |
429 | info = kzalloc(sizeof(*info), GFP_KERNEL); |
430 | if (!info) { | |
431 | kfree(sd); | |
432 | printk(KERN_WARNING "pci_bus %04x:%02x: " | |
433 | "ignored (out of memory)\n", domain, busnum); | |
434 | return NULL; | |
435 | } | |
b87e81e5 | 436 | /* |
437 | * Maybe the desired pci bus has been already scanned. In such case | |
438 | * it is unnecessary to scan the pci bus with the given domain,busnum. | |
439 | */ | |
440 | bus = pci_find_bus(domain, busnum); | |
441 | if (bus) { | |
442 | /* | |
443 | * If the desired bus exits, the content of bus->sysdata will | |
444 | * be replaced by sd. | |
445 | */ | |
446 | memcpy(bus->sysdata, sd, sizeof(*sd)); | |
fd3b0c1e | 447 | kfree(info); |
b87e81e5 | 448 | kfree(sd); |
626fdfec | 449 | } else { |
fd3b0c1e | 450 | probe_pci_root_info(info, device, busnum, domain); |
316d86fe BH |
451 | |
452 | /* | |
453 | * _CRS with no apertures is normal, so only fall back to | |
454 | * defaults or native bridge info if we're ignoring _CRS. | |
455 | */ | |
9a03d28d | 456 | if (pci_use_crs) |
fd3b0c1e | 457 | add_resources(info, &resources); |
9a03d28d | 458 | else { |
fd3b0c1e | 459 | free_pci_root_info_res(info); |
2cd6975a | 460 | x86_pci_root_bus_resources(busnum, &resources); |
9a03d28d | 461 | } |
fd3b0c1e | 462 | |
2cd6975a BH |
463 | bus = pci_create_root_bus(NULL, busnum, &pci_root_ops, sd, |
464 | &resources); | |
fd3b0c1e | 465 | if (bus) { |
626fdfec | 466 | bus->subordinate = pci_scan_child_bus(bus); |
fd3b0c1e YL |
467 | pci_set_host_bridge_release( |
468 | to_pci_host_bridge(bus->bridge), | |
469 | release_pci_root_info, info); | |
470 | } else { | |
2cd6975a | 471 | pci_free_resource_list(&resources); |
fd3b0c1e YL |
472 | __release_pci_root_info(info); |
473 | } | |
626fdfec | 474 | } |
08f1c192 | 475 | |
b03e7495 JM |
476 | /* After the PCI-E bus has been walked and all devices discovered, |
477 | * configure any settings of the fabric that might be necessary. | |
478 | */ | |
479 | if (bus) { | |
480 | struct pci_bus *child; | |
5307f6d5 SI |
481 | list_for_each_entry(child, &bus->children, node) { |
482 | struct pci_dev *self = child->self; | |
483 | if (!self) | |
484 | continue; | |
485 | ||
486 | pcie_bus_configure_settings(child, self->pcie_mpss); | |
487 | } | |
b03e7495 JM |
488 | } |
489 | ||
08f1c192 MBY |
490 | if (!bus) |
491 | kfree(sd); | |
492 | ||
dbb6152e | 493 | if (bus && node != -1) { |
69e1a33f | 494 | #ifdef CONFIG_ACPI_NUMA |
dbb6152e | 495 | if (pxm >= 0) |
2b8c2efe BH |
496 | dev_printk(KERN_DEBUG, &bus->dev, |
497 | "on NUMA node %d (pxm %d)\n", node, pxm); | |
dbb6152e | 498 | #else |
2b8c2efe | 499 | dev_printk(KERN_DEBUG, &bus->dev, "on NUMA node %d\n", node); |
69e1a33f | 500 | #endif |
dbb6152e | 501 | } |
62f420f8 | 502 | |
69e1a33f | 503 | return bus; |
1da177e4 LT |
504 | } |
505 | ||
8dd779b1 | 506 | int __init pci_acpi_init(void) |
1da177e4 LT |
507 | { |
508 | struct pci_dev *dev = NULL; | |
509 | ||
1da177e4 | 510 | if (acpi_noirq) |
b72d0db9 | 511 | return -ENODEV; |
1da177e4 LT |
512 | |
513 | printk(KERN_INFO "PCI: Using ACPI for IRQ routing\n"); | |
514 | acpi_irq_penalty_init(); | |
1da177e4 | 515 | pcibios_enable_irq = acpi_pci_irq_enable; |
87bec66b | 516 | pcibios_disable_irq = acpi_pci_irq_disable; |
ab3b3793 | 517 | x86_init.pci.init_irq = x86_init_noop; |
1da177e4 LT |
518 | |
519 | if (pci_routeirq) { | |
520 | /* | |
521 | * PCI IRQ routing is set up by pci_enable_device(), but we | |
522 | * also do it here in case there are still broken drivers that | |
523 | * don't use pci_enable_device(). | |
524 | */ | |
525 | printk(KERN_INFO "PCI: Routing PCI interrupts for all devices because \"pci=routeirq\" specified\n"); | |
fb37fb96 | 526 | for_each_pci_dev(dev) |
1da177e4 | 527 | acpi_pci_irq_enable(dev); |
657472e9 | 528 | } |
1da177e4 | 529 | |
1da177e4 LT |
530 | return 0; |
531 | } |