[linux-block.git] / arch / x86 / pci / acpi.c

#include <linux/pci.h>
#include <linux/acpi.h>
#include <linux/init.h>
#include <linux/irq.h>
#include <linux/dmi.h>
#include <linux/slab.h>
#include <asm/numa.h>
#include <asm/pci_x86.h>

struct pci_root_info {
	struct acpi_device *bridge;
	char name[16];
	unsigned int res_num;
	struct resource *res;
	resource_size_t *res_offset;
	struct pci_sysdata sd;
#ifdef	CONFIG_PCI_MMCONFIG
	bool mcfg_added;
	u16 segment;
	u8 start_bus;
	u8 end_bus;
#endif
};

static bool pci_use_crs = true;
static bool pci_ignore_seg = false;

static int __init set_use_crs(const struct dmi_system_id *id)
{
	pci_use_crs = true;
	return 0;
}

static int __init set_nouse_crs(const struct dmi_system_id *id)
{
	pci_use_crs = false;
	return 0;
}

static int __init set_ignore_seg(const struct dmi_system_id *id)
{
	printk(KERN_INFO "PCI: %s detected: ignoring ACPI _SEG\n", id->ident);
	pci_ignore_seg = true;
	return 0;
}

static const struct dmi_system_id pci_crs_quirks[] __initconst = {
	/* http://bugzilla.kernel.org/show_bug.cgi?id=14183 */
	{
		.callback = set_use_crs,
		.ident = "IBM System x3800",
		.matches = {
			DMI_MATCH(DMI_SYS_VENDOR, "IBM"),
			DMI_MATCH(DMI_PRODUCT_NAME, "x3800"),
		},
	},
	/* https://bugzilla.kernel.org/show_bug.cgi?id=16007 */
	/* 2006 AMD HT/VIA system with two host bridges */
        {
		.callback = set_use_crs,
		.ident = "ASRock ALiveSATA2-GLAN",
		.matches = {
			DMI_MATCH(DMI_PRODUCT_NAME, "ALiveSATA2-GLAN"),
                },
        },
	/* https://bugzilla.kernel.org/show_bug.cgi?id=30552 */
	/* 2006 AMD HT/VIA system with two host bridges */
	{
		.callback = set_use_crs,
		.ident = "ASUS M2V-MX SE",
		.matches = {
			DMI_MATCH(DMI_BOARD_VENDOR, "ASUSTeK Computer INC."),
			DMI_MATCH(DMI_BOARD_NAME, "M2V-MX SE"),
			DMI_MATCH(DMI_BIOS_VENDOR, "American Megatrends Inc."),
		},
	},
	/* https://bugzilla.kernel.org/show_bug.cgi?id=42619 */
	{
		.callback = set_use_crs,
		.ident = "MSI MS-7253",
		.matches = {
			DMI_MATCH(DMI_BOARD_VENDOR, "MICRO-STAR INTERNATIONAL CO., LTD"),
			DMI_MATCH(DMI_BOARD_NAME, "MS-7253"),
			DMI_MATCH(DMI_BIOS_VENDOR, "Phoenix Technologies, LTD"),
		},
	},

	/* Now for the blacklist.. */

	/* https://bugzilla.redhat.com/show_bug.cgi?id=769657 */
	{
		.callback = set_nouse_crs,
		.ident = "Dell Studio 1557",
		.matches = {
			DMI_MATCH(DMI_BOARD_VENDOR, "Dell Inc."),
			DMI_MATCH(DMI_PRODUCT_NAME, "Studio 1557"),
			DMI_MATCH(DMI_BIOS_VERSION, "A09"),
		},
	},
	/* https://bugzilla.redhat.com/show_bug.cgi?id=769657 */
	{
		.callback = set_nouse_crs,
		.ident = "Thinkpad SL510",
		.matches = {
			DMI_MATCH(DMI_BOARD_VENDOR, "LENOVO"),
			DMI_MATCH(DMI_BOARD_NAME, "2847DFG"),
			DMI_MATCH(DMI_BIOS_VERSION, "6JET85WW (1.43 )"),
		},
	},

	/* https://bugzilla.kernel.org/show_bug.cgi?id=15362 */
	{
		.callback = set_ignore_seg,
		.ident = "HP xw9300",
		.matches = {
			DMI_MATCH(DMI_SYS_VENDOR, "Hewlett-Packard"),
			DMI_MATCH(DMI_PRODUCT_NAME, "HP xw9300 Workstation"),
		},
	},
	{}
};

void __init pci_acpi_crs_quirks(void)
{
	int year;

	if (dmi_get_date(DMI_BIOS_DATE, &year, NULL, NULL) && year < 2008)
		pci_use_crs = false;

	dmi_check_system(pci_crs_quirks);

	/*
	 * If the user specifies "pci=use_crs" or "pci=nocrs" explicitly, that
	 * takes precedence over anything we figured out above.
	 */
	if (pci_probe & PCI_ROOT_NO_CRS)
		pci_use_crs = false;
	else if (pci_probe & PCI_USE__CRS)
		pci_use_crs = true;

	printk(KERN_INFO "PCI: %s host bridge windows from ACPI; "
	       "if necessary, use \"pci=%s\" and report a bug\n",
	       pci_use_crs ? "Using" : "Ignoring",
	       pci_use_crs ? "nocrs" : "use_crs");
}

#ifdef	CONFIG_PCI_MMCONFIG
static int __devinit check_segment(u16 seg, struct device *dev, char *estr)
{
	if (seg) {
		dev_err(dev,
			"%s can't access PCI configuration "
			"space under this host bridge.\n",
			estr);
		return -EIO;
	}

	/*
	 * Failure in adding MMCFG information is not fatal,
	 * just can't access extended configuration space of
	 * devices under this host bridge.
	 */
	dev_warn(dev,
		 "%s can't access extended PCI configuration "
		 "space under this bridge.\n",
		 estr);

	return 0;
}

static int __devinit setup_mcfg_map(struct pci_root_info *info,
				    u16 seg, u8 start, u8 end,
				    phys_addr_t addr)
{
	int result;
	struct device *dev = &info->bridge->dev;

	info->start_bus = start;
	info->end_bus = end;
	info->mcfg_added = false;

	/* return success if MMCFG is not in use */
	if (raw_pci_ext_ops && raw_pci_ext_ops != &pci_mmcfg)
		return 0;

	if (!(pci_probe & PCI_PROBE_MMCONF))
		return check_segment(seg, dev, "MMCONFIG is disabled,");

	result = pci_mmconfig_insert(dev, seg, start, end, addr);
	if (result == 0) {
		/* enable MMCFG if it hasn't been enabled yet */
		if (raw_pci_ext_ops == NULL)
			raw_pci_ext_ops = &pci_mmcfg;
		info->mcfg_added = true;
	} else if (result != -EEXIST)
		return check_segment(seg, dev,
			 "fail to add MMCONFIG information,");

	return 0;
}

static void teardown_mcfg_map(struct pci_root_info *info)
{
	if (info->mcfg_added) {
		pci_mmconfig_delete(info->segment, info->start_bus,
				    info->end_bus);
		info->mcfg_added = false;
	}
}
#else
static int __devinit setup_mcfg_map(struct pci_root_info *info,
				    u16 seg, u8 start, u8 end,
				    phys_addr_t addr)
{
	return 0;
}
static void teardown_mcfg_map(struct pci_root_info *info)
{
}
#endif

static acpi_status
resource_to_addr(struct acpi_resource *resource,
			struct acpi_resource_address64 *addr)
{
	acpi_status status;
	struct acpi_resource_memory24 *memory24;
	struct acpi_resource_memory32 *memory32;
	struct acpi_resource_fixed_memory32 *fixed_memory32;

	memset(addr, 0, sizeof(*addr));
	switch (resource->type) {
	case ACPI_RESOURCE_TYPE_MEMORY24:
		memory24 = &resource->data.memory24;
		addr->resource_type = ACPI_MEMORY_RANGE;
		addr->minimum = memory24->minimum;
		addr->address_length = memory24->address_length;
		addr->maximum = addr->minimum + addr->address_length - 1;
		return AE_OK;
	case ACPI_RESOURCE_TYPE_MEMORY32:
		memory32 = &resource->data.memory32;
		addr->resource_type = ACPI_MEMORY_RANGE;
		addr->minimum = memory32->minimum;
		addr->address_length = memory32->address_length;
		addr->maximum = addr->minimum + addr->address_length - 1;
		return AE_OK;
	case ACPI_RESOURCE_TYPE_FIXED_MEMORY32:
		fixed_memory32 = &resource->data.fixed_memory32;
		addr->resource_type = ACPI_MEMORY_RANGE;
		addr->minimum = fixed_memory32->address;
		addr->address_length = fixed_memory32->address_length;
		addr->maximum = addr->minimum + addr->address_length - 1;
		return AE_OK;
	case ACPI_RESOURCE_TYPE_ADDRESS16:
	case ACPI_RESOURCE_TYPE_ADDRESS32:
	case ACPI_RESOURCE_TYPE_ADDRESS64:
		status = acpi_resource_to_address64(resource, addr);
		if (ACPI_SUCCESS(status) &&
		    (addr->resource_type == ACPI_MEMORY_RANGE ||
		    addr->resource_type == ACPI_IO_RANGE) &&
		    addr->address_length > 0) {
			return AE_OK;
		}
		break;
	}
	return AE_ERROR;
}

static acpi_status
count_resource(struct acpi_resource *acpi_res, void *data)
{
	struct pci_root_info *info = data;
	struct acpi_resource_address64 addr;
	acpi_status status;

	status = resource_to_addr(acpi_res, &addr);
	if (ACPI_SUCCESS(status))
		info->res_num++;
	return AE_OK;
}

static acpi_status
setup_resource(struct acpi_resource *acpi_res, void *data)
{
	struct pci_root_info *info = data;
	struct resource *res;
	struct acpi_resource_address64 addr;
	acpi_status status;
	unsigned long flags;
	u64 start, orig_end, end;

	status = resource_to_addr(acpi_res, &addr);
	if (!ACPI_SUCCESS(status))
		return AE_OK;

	if (addr.resource_type == ACPI_MEMORY_RANGE) {
		flags = IORESOURCE_MEM;
		if (addr.info.mem.caching == ACPI_PREFETCHABLE_MEMORY)
			flags |= IORESOURCE_PREFETCH;
	} else if (addr.resource_type == ACPI_IO_RANGE) {
		flags = IORESOURCE_IO;
	} else
		return AE_OK;

	start = addr.minimum + addr.translation_offset;
	orig_end = end = addr.maximum + addr.translation_offset;

	/* Exclude non-addressable range or non-addressable portion of range */
	end = min(end, (u64)iomem_resource.end);
	if (end <= start) {
		dev_info(&info->bridge->dev,
			"host bridge window [%#llx-%#llx] "
			"(ignored, not CPU addressable)\n", start, orig_end);
		return AE_OK;
	} else if (orig_end != end) {
		dev_info(&info->bridge->dev,
			"host bridge window [%#llx-%#llx] "
			"([%#llx-%#llx] ignored, not CPU addressable)\n", 
			start, orig_end, end + 1, orig_end);
	}

	res = &info->res[info->res_num];
	res->name = info->name;
	res->flags = flags;
	res->start = start;
	res->end = end;
	info->res_offset[info->res_num] = addr.translation_offset;

	if (!pci_use_crs) {
		dev_printk(KERN_DEBUG, &info->bridge->dev,
			   "host bridge window %pR (ignored)\n", res);
		return AE_OK;
	}

	info->res_num++;

	return AE_OK;
}

static void coalesce_windows(struct pci_root_info *info, unsigned long type)
{
	int i, j;
	struct resource *res1, *res2;

	for (i = 0; i < info->res_num; i++) {
		res1 = &info->res[i];
		if (!(res1->flags & type))
			continue;

		for (j = i + 1; j < info->res_num; j++) {
			res2 = &info->res[j];
			if (!(res2->flags & type))
				continue;

			/*
			 * I don't like throwing away windows because then
			 * our resources no longer match the ACPI _CRS, but
			 * the kernel resource tree doesn't allow overlaps.
			 */
			if (resource_overlaps(res1, res2)) {
				res1->start = min(res1->start, res2->start);
				res1->end = max(res1->end, res2->end);
				dev_info(&info->bridge->dev,
					 "host bridge window expanded to %pR; %pR ignored\n",
					 res1, res2);
				res2->flags = 0;
			}
		}
	}
}

static void add_resources(struct pci_root_info *info,
			  struct list_head *resources)
{
	int i;
	struct resource *res, *root, *conflict;

	coalesce_windows(info, IORESOURCE_MEM);
	coalesce_windows(info, IORESOURCE_IO);

	for (i = 0; i < info->res_num; i++) {
		res = &info->res[i];

		if (res->flags & IORESOURCE_MEM)
			root = &iomem_resource;
		else if (res->flags & IORESOURCE_IO)
			root = &ioport_resource;
		else
			continue;

		conflict = insert_resource_conflict(root, res);
		if (conflict)
			dev_info(&info->bridge->dev,
				 "ignoring host bridge window %pR (conflicts with %s %pR)\n",
				 res, conflict->name, conflict);
		else
			pci_add_resource_offset(resources, res,
					info->res_offset[i]);
	}
}

static void free_pci_root_info_res(struct pci_root_info *info)
{
	kfree(info->res);
	info->res = NULL;
	kfree(info->res_offset);
	info->res_offset = NULL;
	info->res_num = 0;
}

static void __release_pci_root_info(struct pci_root_info *info)
{
	int i;
	struct resource *res;

	for (i = 0; i < info->res_num; i++) {
		res = &info->res[i];

		if (!res->parent)
			continue;

		if (!(res->flags & (IORESOURCE_MEM | IORESOURCE_IO)))
			continue;

		release_resource(res);
	}

	free_pci_root_info_res(info);

	teardown_mcfg_map(info);

	kfree(info);
}

static void release_pci_root_info(struct pci_host_bridge *bridge)
{
	struct pci_root_info *info = bridge->release_data;

	__release_pci_root_info(info);
}

static void
probe_pci_root_info(struct pci_root_info *info, struct acpi_device *device,
		    int busnum, int domain)
{
	size_t size;

	sprintf(info->name, "PCI Bus %04x:%02x", domain, busnum);
	info->bridge = device;

	info->res_num = 0;
	acpi_walk_resources(device->handle, METHOD_NAME__CRS, count_resource,
				info);
	if (!info->res_num)
		return;

	size = sizeof(*info->res) * info->res_num;
	info->res = kzalloc(size, GFP_KERNEL);
	if (!info->res) {
		info->res_num = 0;
		return;
	}

	size = sizeof(*info->res_offset) * info->res_num;
	info->res_num = 0;
	info->res_offset = kzalloc(size, GFP_KERNEL);
	if (!info->res_offset) {
		kfree(info->res);
		info->res = NULL;
		return;
	}

	acpi_walk_resources(device->handle, METHOD_NAME__CRS, setup_resource,
				info);
}

struct pci_bus * __devinit pci_acpi_scan_root(struct acpi_pci_root *root)
{
	struct acpi_device *device = root->device;
	struct pci_root_info *info = NULL;
	int domain = root->segment;
	int busnum = root->secondary.start;
	LIST_HEAD(resources);
	struct pci_bus *bus = NULL;
	struct pci_sysdata *sd;
	int node;
#ifdef CONFIG_ACPI_NUMA
	int pxm;
#endif

	if (pci_ignore_seg)
		domain = 0;

	if (domain && !pci_domains_supported) {
		printk(KERN_WARNING "pci_bus %04x:%02x: "
		       "ignored (multiple domains not supported)\n",
		       domain, busnum);
		return NULL;
	}

	node = -1;
#ifdef CONFIG_ACPI_NUMA
	pxm = acpi_get_pxm(device->handle);
	if (pxm >= 0)
		node = pxm_to_node(pxm);
	if (node != -1)
		set_mp_bus_to_node(busnum, node);
	else
#endif
		node = get_mp_bus_to_node(busnum);

	if (node != -1 && !node_online(node))
		node = -1;

	info = kzalloc(sizeof(*info), GFP_KERNEL);
	if (!info) {
		printk(KERN_WARNING "pci_bus %04x:%02x: "
		       "ignored (out of memory)\n", domain, busnum);
		return NULL;
	}

	sd = &info->sd;
	sd->domain = domain;
	sd->node = node;
	/*
	 * Maybe the desired pci bus has been already scanned. In such case
	 * it is unnecessary to scan the pci bus with the given domain,busnum.
	 */
	bus = pci_find_bus(domain, busnum);
	if (bus) {
		/*
		 * If the desired bus exits, the content of bus->sysdata will
		 * be replaced by sd.
		 */
		memcpy(bus->sysdata, sd, sizeof(*sd));
		kfree(info);
	} else {
		probe_pci_root_info(info, device, busnum, domain);

		/* insert busn res at first */
		pci_add_resource(&resources,  &root->secondary);
		/*
		 * _CRS with no apertures is normal, so only fall back to
		 * defaults or native bridge info if we're ignoring _CRS.
		 */
		if (pci_use_crs)
			add_resources(info, &resources);
		else {
			free_pci_root_info_res(info);
			x86_pci_root_bus_resources(busnum, &resources);
		}

		if (!setup_mcfg_map(info, domain, (u8)root->secondary.start,
				    (u8)root->secondary.end, root->mcfg_addr))
			bus = pci_create_root_bus(NULL, busnum, &pci_root_ops,
						  sd, &resources);

		if (bus) {
			pci_scan_child_bus(bus);
			pci_set_host_bridge_release(
				to_pci_host_bridge(bus->bridge),
				release_pci_root_info, info);
		} else {
			pci_free_resource_list(&resources);
			__release_pci_root_info(info);
		}
	}

	/* After the PCI-E bus has been walked and all devices discovered,
	 * configure any settings of the fabric that might be necessary.
	 */
	if (bus) {
		struct pci_bus *child;
		list_for_each_entry(child, &bus->children, node) {
			struct pci_dev *self = child->self;
			if (!self)
				continue;

			pcie_bus_configure_settings(child, self->pcie_mpss);
		}
	}

	if (bus && node != -1) {
#ifdef CONFIG_ACPI_NUMA
		if (pxm >= 0)
			dev_printk(KERN_DEBUG, &bus->dev,
				   "on NUMA node %d (pxm %d)\n", node, pxm);
#else
		dev_printk(KERN_DEBUG, &bus->dev, "on NUMA node %d\n", node);
#endif
	}

	return bus;
}

int __init pci_acpi_init(void)
{
	struct pci_dev *dev = NULL;

	if (acpi_noirq)
		return -ENODEV;

	printk(KERN_INFO "PCI: Using ACPI for IRQ routing\n");
	acpi_irq_penalty_init();
	pcibios_enable_irq = acpi_pci_irq_enable;
	pcibios_disable_irq = acpi_pci_irq_disable;
	x86_init.pci.init_irq = x86_init_noop;

	if (pci_routeirq) {
		/*
		 * PCI IRQ routing is set up by pci_enable_device(), but we
		 * also do it here in case there are still broken drivers that
		 * don't use pci_enable_device().
		 */
		printk(KERN_INFO "PCI: Routing PCI interrupts for all devices because \"pci=routeirq\" specified\n");
		for_each_pci_dev(dev)
			acpi_pci_irq_enable(dev);
	}

	return 0;
}
Commit	Line	Data
1da177e4 LT	1	#include <linux/pci.h>
	2	#include <linux/acpi.h>
	3	#include <linux/init.h>
b33fa1f3	4	#include <linux/irq.h>
036fff4c	5	#include <linux/dmi.h>
5a0e3ad6	6	#include <linux/slab.h>
69e1a33f	7	#include <asm/numa.h>
82487711	8	#include <asm/pci_x86.h>
1da177e4	9
62f420f8	10	struct pci_root_info {
42887b29	11	struct acpi_device *bridge;
fe05725f	12	char name[16];
62f420f8 GH	13	unsigned int res_num;
62f420f8 GH	14	struct resource *res;
b4873931	15	resource_size_t *res_offset;
35cb05e5	16	struct pci_sysdata sd;
c0fa4078 JL	17	#ifdef CONFIG_PCI_MMCONFIG
	18	bool mcfg_added;
	19	u16 segment;
	20	u8 start_bus;
	21	u8 end_bus;
	22	#endif
62f420f8 GH	23	};
62f420f8 GH	24
7bc5e3f2	25	static bool pci_use_crs = true;
1f09b09b	26	static bool pci_ignore_seg = false;
7bc5e3f2 BH	27
	28	static int __init set_use_crs(const struct dmi_system_id *id)
	29	{
	30	pci_use_crs = true;
	31	return 0;
	32	}
	33
28c3c05d DJ	34	static int __init set_nouse_crs(const struct dmi_system_id *id)
	35	{
	36	pci_use_crs = false;
	37	return 0;
	38	}
	39
1f09b09b BH	40	static int __init set_ignore_seg(const struct dmi_system_id *id)
	41	{
	42	printk(KERN_INFO "PCI: %s detected: ignoring ACPI _SEG\n", id->ident);
	43	pci_ignore_seg = true;
	44	return 0;
	45	}
	46
	47	static const struct dmi_system_id pci_crs_quirks[] __initconst = {
7bc5e3f2 BH	48	/* http://bugzilla.kernel.org/show_bug.cgi?id=14183 */
	49	{
	50	.callback = set_use_crs,
	51	.ident = "IBM System x3800",
	52	.matches = {
	53	DMI_MATCH(DMI_SYS_VENDOR, "IBM"),
	54	DMI_MATCH(DMI_PRODUCT_NAME, "x3800"),
	55	},
	56	},
2491762c BH	57	/* https://bugzilla.kernel.org/show_bug.cgi?id=16007 */
	58	/* 2006 AMD HT/VIA system with two host bridges */
	59	{
	60	.callback = set_use_crs,
	61	.ident = "ASRock ALiveSATA2-GLAN",
	62	.matches = {
	63	DMI_MATCH(DMI_PRODUCT_NAME, "ALiveSATA2-GLAN"),
	64	},
	65	},
29cf7a30 PM	66	/* https://bugzilla.kernel.org/show_bug.cgi?id=30552 */
	67	/* 2006 AMD HT/VIA system with two host bridges */
	68	{
	69	.callback = set_use_crs,
	70	.ident = "ASUS M2V-MX SE",
	71	.matches = {
	72	DMI_MATCH(DMI_BOARD_VENDOR, "ASUSTeK Computer INC."),
	73	DMI_MATCH(DMI_BOARD_NAME, "M2V-MX SE"),
	74	DMI_MATCH(DMI_BIOS_VENDOR, "American Megatrends Inc."),
	75	},
	76	},
84113717 JN	77	/* https://bugzilla.kernel.org/show_bug.cgi?id=42619 */
	78	{
	79	.callback = set_use_crs,
	80	.ident = "MSI MS-7253",
	81	.matches = {
	82	DMI_MATCH(DMI_BOARD_VENDOR, "MICRO-STAR INTERNATIONAL CO., LTD"),
	83	DMI_MATCH(DMI_BOARD_NAME, "MS-7253"),
	84	DMI_MATCH(DMI_BIOS_VENDOR, "Phoenix Technologies, LTD"),
84113717 JN	85	},
84113717 JN	86	},
28c3c05d	87
e702781f DJ	88	/* Now for the blacklist.. */
	89
	90	/* https://bugzilla.redhat.com/show_bug.cgi?id=769657 */
	91	{
	92	.callback = set_nouse_crs,
	93	.ident = "Dell Studio 1557",
	94	.matches = {
	95	DMI_MATCH(DMI_BOARD_VENDOR, "Dell Inc."),
	96	DMI_MATCH(DMI_PRODUCT_NAME, "Studio 1557"),
	97	DMI_MATCH(DMI_BIOS_VERSION, "A09"),
	98	},
	99	},
8b6a5af9 DJ	100	/* https://bugzilla.redhat.com/show_bug.cgi?id=769657 */
	101	{
	102	.callback = set_nouse_crs,
	103	.ident = "Thinkpad SL510",
	104	.matches = {
	105	DMI_MATCH(DMI_BOARD_VENDOR, "LENOVO"),
	106	DMI_MATCH(DMI_BOARD_NAME, "2847DFG"),
	107	DMI_MATCH(DMI_BIOS_VERSION, "6JET85WW (1.43 )"),
	108	},
	109	},
1f09b09b BH	110
	111	/* https://bugzilla.kernel.org/show_bug.cgi?id=15362 */
	112	{
	113	.callback = set_ignore_seg,
	114	.ident = "HP xw9300",
	115	.matches = {
	116	DMI_MATCH(DMI_SYS_VENDOR, "Hewlett-Packard"),
	117	DMI_MATCH(DMI_PRODUCT_NAME, "HP xw9300 Workstation"),
	118	},
	119	},
7bc5e3f2 BH	120	{}
	121	};
	122
	123	void __init pci_acpi_crs_quirks(void)
	124	{
	125	int year;
	126
	127	if (dmi_get_date(DMI_BIOS_DATE, &year, NULL, NULL) && year < 2008)
	128	pci_use_crs = false;
	129
1f09b09b	130	dmi_check_system(pci_crs_quirks);
7bc5e3f2 BH	131
	132	/*
	133	* If the user specifies "pci=use_crs" or "pci=nocrs" explicitly, that
	134	* takes precedence over anything we figured out above.
	135	*/
	136	if (pci_probe & PCI_ROOT_NO_CRS)
	137	pci_use_crs = false;
	138	else if (pci_probe & PCI_USE__CRS)
	139	pci_use_crs = true;
	140
	141	printk(KERN_INFO "PCI: %s host bridge windows from ACPI; "
	142	"if necessary, use \"pci=%s\" and report a bug\n",
	143	pci_use_crs ? "Using" : "Ignoring",
	144	pci_use_crs ? "nocrs" : "use_crs");
	145	}
	146
c0fa4078 JL	147	#ifdef CONFIG_PCI_MMCONFIG
	148	static int __devinit check_segment(u16 seg, struct device dev, char estr)
	149	{
	150	if (seg) {
	151	dev_err(dev,
	152	"%s can't access PCI configuration "
	153	"space under this host bridge.\n",
	154	estr);
	155	return -EIO;
	156	}
	157
	158	/*
	159	* Failure in adding MMCFG information is not fatal,
	160	* just can't access extended configuration space of
	161	* devices under this host bridge.
	162	*/
	163	dev_warn(dev,
	164	"%s can't access extended PCI configuration "
	165	"space under this bridge.\n",
	166	estr);
	167
	168	return 0;
	169	}
	170
	171	static int __devinit setup_mcfg_map(struct pci_root_info *info,
	172	u16 seg, u8 start, u8 end,
	173	phys_addr_t addr)
	174	{
	175	int result;
	176	struct device *dev = &info->bridge->dev;
	177
	178	info->start_bus = start;
	179	info->end_bus = end;
	180	info->mcfg_added = false;
	181
	182	/* return success if MMCFG is not in use */
	183	if (raw_pci_ext_ops && raw_pci_ext_ops != &pci_mmcfg)
	184	return 0;
	185
	186	if (!(pci_probe & PCI_PROBE_MMCONF))
	187	return check_segment(seg, dev, "MMCONFIG is disabled,");
	188
	189	result = pci_mmconfig_insert(dev, seg, start, end, addr);
	190	if (result == 0) {
	191	/* enable MMCFG if it hasn't been enabled yet */
	192	if (raw_pci_ext_ops == NULL)
	193	raw_pci_ext_ops = &pci_mmcfg;
	194	info->mcfg_added = true;
	195	} else if (result != -EEXIST)
	196	return check_segment(seg, dev,
	197	"fail to add MMCONFIG information,");
	198
	199	return 0;
	200	}
	201
	202	static void teardown_mcfg_map(struct pci_root_info *info)
	203	{
	204	if (info->mcfg_added) {
	205	pci_mmconfig_delete(info->segment, info->start_bus,
	206	info->end_bus);
	207	info->mcfg_added = false;
	208	}
	209	}
	210	#else
211	static int __devinit setup_mcfg_map(struct pci_root_info *info,
212	u16 seg, u8 start, u8 end,
213	phys_addr_t addr)
214	{
215	return 0;
216	}
217	static void teardown_mcfg_map(struct pci_root_info *info)
218	{
219	}
220	#endif
221
62f420f8 GH	222	static acpi_status
	223	resource_to_addr(struct acpi_resource *resource,
	224	struct acpi_resource_address64 *addr)
	225	{
	226	acpi_status status;
66528fdd BH	227	struct acpi_resource_memory24 *memory24;
	228	struct acpi_resource_memory32 *memory32;
	229	struct acpi_resource_fixed_memory32 *fixed_memory32;
62f420f8	230
66528fdd BH	231	memset(addr, 0, sizeof(*addr));
	232	switch (resource->type) {
	233	case ACPI_RESOURCE_TYPE_MEMORY24:
	234	memory24 = &resource->data.memory24;
	235	addr->resource_type = ACPI_MEMORY_RANGE;
	236	addr->minimum = memory24->minimum;
	237	addr->address_length = memory24->address_length;
	238	addr->maximum = addr->minimum + addr->address_length - 1;
62f420f8	239	return AE_OK;
66528fdd BH	240	case ACPI_RESOURCE_TYPE_MEMORY32:
	241	memory32 = &resource->data.memory32;
	242	addr->resource_type = ACPI_MEMORY_RANGE;
	243	addr->minimum = memory32->minimum;
	244	addr->address_length = memory32->address_length;
	245	addr->maximum = addr->minimum + addr->address_length - 1;
	246	return AE_OK;
	247	case ACPI_RESOURCE_TYPE_FIXED_MEMORY32:
	248	fixed_memory32 = &resource->data.fixed_memory32;
	249	addr->resource_type = ACPI_MEMORY_RANGE;
	250	addr->minimum = fixed_memory32->address;
	251	addr->address_length = fixed_memory32->address_length;
	252	addr->maximum = addr->minimum + addr->address_length - 1;
	253	return AE_OK;
	254	case ACPI_RESOURCE_TYPE_ADDRESS16:
	255	case ACPI_RESOURCE_TYPE_ADDRESS32:
	256	case ACPI_RESOURCE_TYPE_ADDRESS64:
	257	status = acpi_resource_to_address64(resource, addr);
	258	if (ACPI_SUCCESS(status) &&
	259	(addr->resource_type == ACPI_MEMORY_RANGE \|\|
	260	addr->resource_type == ACPI_IO_RANGE) &&
	261	addr->address_length > 0) {
	262	return AE_OK;
	263	}
	264	break;
62f420f8 GH	265	}
	266	return AE_ERROR;
	267	}
	268
	269	static acpi_status
	270	count_resource(struct acpi_resource acpi_res, void data)
	271	{
	272	struct pci_root_info *info = data;
	273	struct acpi_resource_address64 addr;
	274	acpi_status status;
	275
	276	status = resource_to_addr(acpi_res, &addr);
	277	if (ACPI_SUCCESS(status))
	278	info->res_num++;
	279	return AE_OK;
	280	}
	281
	282	static acpi_status
	283	setup_resource(struct acpi_resource acpi_res, void data)
	284	{
	285	struct pci_root_info *info = data;
	286	struct resource *res;
	287	struct acpi_resource_address64 addr;
	288	acpi_status status;
	289	unsigned long flags;
ae5cd864	290	u64 start, orig_end, end;
2cdb3f1d	291
62f420f8 GH	292	status = resource_to_addr(acpi_res, &addr);
	293	if (!ACPI_SUCCESS(status))
	294	return AE_OK;
	295
	296	if (addr.resource_type == ACPI_MEMORY_RANGE) {
62f420f8 GH	297	flags = IORESOURCE_MEM;
	298	if (addr.info.mem.caching == ACPI_PREFETCHABLE_MEMORY)
	299	flags \|= IORESOURCE_PREFETCH;
	300	} else if (addr.resource_type == ACPI_IO_RANGE) {
62f420f8 GH	301	flags = IORESOURCE_IO;
	302	} else
	303	return AE_OK;
	304
2cdb3f1d	305	start = addr.minimum + addr.translation_offset;
ae5cd864 GH	306	orig_end = end = addr.maximum + addr.translation_offset;
	307
	308	/* Exclude non-addressable range or non-addressable portion of range */
	309	end = min(end, (u64)iomem_resource.end);
	310	if (end <= start) {
	311	dev_info(&info->bridge->dev,
	312	"host bridge window [%#llx-%#llx] "
	313	"(ignored, not CPU addressable)\n", start, orig_end);
	314	return AE_OK;
	315	} else if (orig_end != end) {
	316	dev_info(&info->bridge->dev,
	317	"host bridge window [%#llx-%#llx] "
	318	"([%#llx-%#llx] ignored, not CPU addressable)\n",
	319	start, orig_end, end + 1, orig_end);
	320	}
f9cde5ff	321
2cdb3f1d YL	322	res = &info->res[info->res_num];
	323	res->name = info->name;
	324	res->flags = flags;
	325	res->start = start;
	326	res->end = end;
b4873931	327	info->res_offset[info->res_num] = addr.translation_offset;
2cdb3f1d	328
7bc5e3f2	329	if (!pci_use_crs) {
f1db6fde BH	330	dev_printk(KERN_DEBUG, &info->bridge->dev,
	331	"host bridge window %pR (ignored)\n", res);
	332	return AE_OK;
	333	}
	334
4723d0f2	335	info->res_num++;
4723d0f2 BH	336
	337	return AE_OK;
	338	}
	339
6e33a852	340	static void coalesce_windows(struct pci_root_info *info, unsigned long type)
4723d0f2 BH	341	{
	342	int i, j;
	343	struct resource res1, res2;
	344
	345	for (i = 0; i < info->res_num; i++) {
	346	res1 = &info->res[i];
	347	if (!(res1->flags & type))
	348	continue;
	349
	350	for (j = i + 1; j < info->res_num; j++) {
	351	res2 = &info->res[j];
	352	if (!(res2->flags & type))
	353	continue;
	354
	355	/*
	356	* I don't like throwing away windows because then
	357	* our resources no longer match the ACPI _CRS, but
	358	* the kernel resource tree doesn't allow overlaps.
	359	*/
74d24b21	360	if (resource_overlaps(res1, res2)) {
4723d0f2 BH	361	res1->start = min(res1->start, res2->start);
	362	res1->end = max(res1->end, res2->end);
	363	dev_info(&info->bridge->dev,
	364	"host bridge window expanded to %pR; %pR ignored\n",
	365	res1, res2);
	366	res2->flags = 0;
	367	}
	368	}
	369	}
	370	}
	371
9a03d28d YL	372	static void add_resources(struct pci_root_info *info,
9a03d28d YL	373	struct list_head *resources)
4723d0f2 BH	374	{
	375	int i;
	376	struct resource res, root, *conflict;
	377
4723d0f2 BH	378	coalesce_windows(info, IORESOURCE_MEM);
	379	coalesce_windows(info, IORESOURCE_IO);
	380
	381	for (i = 0; i < info->res_num; i++) {
	382	res = &info->res[i];
	383
	384	if (res->flags & IORESOURCE_MEM)
	385	root = &iomem_resource;
	386	else if (res->flags & IORESOURCE_IO)
	387	root = &ioport_resource;
42887b29	388	else
4723d0f2 BH	389	continue;
	390
	391	conflict = insert_resource_conflict(root, res);
	392	if (conflict)
43d786ed BH	393	dev_info(&info->bridge->dev,
	394	"ignoring host bridge window %pR (conflicts with %s %pR)\n",
	395	res, conflict->name, conflict);
4723d0f2	396	else
b4873931 MY	397	pci_add_resource_offset(resources, res,
b4873931 MY	398	info->res_offset[i]);
62f420f8	399	}
62f420f8 GH	400	}
62f420f8 GH	401
fd3b0c1e	402	static void free_pci_root_info_res(struct pci_root_info *info)
baa495d9	403	{
baa495d9	404	kfree(info->res);
fd3b0c1e	405	info->res = NULL;
b4873931 MY	406	kfree(info->res_offset);
b4873931 MY	407	info->res_offset = NULL;
fd3b0c1e YL	408	info->res_num = 0;
	409	}
	410
	411	static void __release_pci_root_info(struct pci_root_info *info)
	412	{
	413	int i;
	414	struct resource *res;
	415
	416	for (i = 0; i < info->res_num; i++) {
	417	res = &info->res[i];
	418
	419	if (!res->parent)
	420	continue;
	421
	422	if (!(res->flags & (IORESOURCE_MEM \| IORESOURCE_IO)))
	423	continue;
	424
	425	release_resource(res);
	426	}
	427
	428	free_pci_root_info_res(info);
	429
c0fa4078 JL	430	teardown_mcfg_map(info);
c0fa4078 JL	431
fd3b0c1e YL	432	kfree(info);
fd3b0c1e YL	433	}
c0fa4078	434
fd3b0c1e YL	435	static void release_pci_root_info(struct pci_host_bridge *bridge)
	436	{
	437	struct pci_root_info *info = bridge->release_data;
	438
	439	__release_pci_root_info(info);
baa495d9 YL	440	}
baa495d9 YL	441
62f420f8	442	static void
9a03d28d YL	443	probe_pci_root_info(struct pci_root_info info, struct acpi_device device,
9a03d28d YL	444	int busnum, int domain)
62f420f8	445	{
62f420f8 GH	446	size_t size;
62f420f8 GH	447
5c1d81d1	448	sprintf(info->name, "PCI Bus %04x:%02x", domain, busnum);
baa495d9	449	info->bridge = device;
5c1d81d1	450
baa495d9	451	info->res_num = 0;
62f420f8	452	acpi_walk_resources(device->handle, METHOD_NAME__CRS, count_resource,
baa495d9 YL	453	info);
baa495d9 YL	454	if (!info->res_num)
62f420f8 GH	455	return;
62f420f8 GH	456
baa495d9	457	size = sizeof(info->res) info->res_num;
4cd8daf0	458	info->res = kzalloc(size, GFP_KERNEL);
b4873931 MY	459	if (!info->res) {
	460	info->res_num = 0;
	461	return;
	462	}
	463
	464	size = sizeof(info->res_offset) info->res_num;
	465	info->res_num = 0;
	466	info->res_offset = kzalloc(size, GFP_KERNEL);
	467	if (!info->res_offset) {
	468	kfree(info->res);
	469	info->res = NULL;
2cd6975a	470	return;
b4873931	471	}
62f420f8	472
62f420f8	473	acpi_walk_resources(device->handle, METHOD_NAME__CRS, setup_resource,
baa495d9	474	info);
62f420f8 GH	475	}
62f420f8 GH	476
57283776	477	struct pci_bus * __devinit pci_acpi_scan_root(struct acpi_pci_root *root)
1da177e4	478	{
57283776	479	struct acpi_device *device = root->device;
fd3b0c1e	480	struct pci_root_info *info = NULL;
57283776 BH	481	int domain = root->segment;
57283776 BH	482	int busnum = root->secondary.start;
2cd6975a	483	LIST_HEAD(resources);
c0fa4078	484	struct pci_bus *bus = NULL;
08f1c192	485	struct pci_sysdata *sd;
871d5f8d YL	486	int node;
871d5f8d YL	487	#ifdef CONFIG_ACPI_NUMA
08f1c192	488	int pxm;
871d5f8d	489	#endif
08f1c192	490
1f09b09b BH	491	if (pci_ignore_seg)
	492	domain = 0;
	493
a79e4198	494	if (domain && !pci_domains_supported) {
2a6bed83 BH	495	printk(KERN_WARNING "pci_bus %04x:%02x: "
	496	"ignored (multiple domains not supported)\n",
	497	domain, busnum);
a79e4198 JG	498	return NULL;
	499	}
	500
871d5f8d YL	501	node = -1;
	502	#ifdef CONFIG_ACPI_NUMA
	503	pxm = acpi_get_pxm(device->handle);
	504	if (pxm >= 0)
	505	node = pxm_to_node(pxm);
	506	if (node != -1)
	507	set_mp_bus_to_node(busnum, node);
	508	else
871d5f8d	509	#endif
871d5f8d	510	node = get_mp_bus_to_node(busnum);
b755de8d YL	511
	512	if (node != -1 && !node_online(node))
	513	node = -1;
871d5f8d	514
35cb05e5 YL	515	info = kzalloc(sizeof(*info), GFP_KERNEL);
35cb05e5 YL	516	if (!info) {
2a6bed83 BH	517	printk(KERN_WARNING "pci_bus %04x:%02x: "
2a6bed83 BH	518	"ignored (out of memory)\n", domain, busnum);
08f1c192 MBY	519	return NULL;
08f1c192 MBY	520	}
69e1a33f	521
35cb05e5	522	sd = &info->sd;
a79e4198	523	sd->domain = domain;
871d5f8d	524	sd->node = node;
b87e81e5	525	/*
	526	* Maybe the desired pci bus has been already scanned. In such case
	527	* it is unnecessary to scan the pci bus with the given domain,busnum.
	528	*/
	529	bus = pci_find_bus(domain, busnum);
	530	if (bus) {
	531	/*
	532	* If the desired bus exits, the content of bus->sysdata will
	533	* be replaced by sd.
	534	*/
	535	memcpy(bus->sysdata, sd, sizeof(*sd));
fd3b0c1e	536	kfree(info);
626fdfec	537	} else {
fd3b0c1e	538	probe_pci_root_info(info, device, busnum, domain);
316d86fe	539
5c1d81d1 YL	540	/* insert busn res at first */
5c1d81d1 YL	541	pci_add_resource(&resources, &root->secondary);
316d86fe BH	542	/*
	543	* _CRS with no apertures is normal, so only fall back to
	544	* defaults or native bridge info if we're ignoring _CRS.
	545	*/
9a03d28d	546	if (pci_use_crs)
fd3b0c1e	547	add_resources(info, &resources);
9a03d28d	548	else {
fd3b0c1e	549	free_pci_root_info_res(info);
2cd6975a	550	x86_pci_root_bus_resources(busnum, &resources);
9a03d28d	551	}
fd3b0c1e	552
c0fa4078 JL	553	if (!setup_mcfg_map(info, domain, (u8)root->secondary.start,
	554	(u8)root->secondary.end, root->mcfg_addr))
	555	bus = pci_create_root_bus(NULL, busnum, &pci_root_ops,
	556	sd, &resources);
	557
fd3b0c1e	558	if (bus) {
5c1d81d1	559	pci_scan_child_bus(bus);
fd3b0c1e YL	560	pci_set_host_bridge_release(
	561	to_pci_host_bridge(bus->bridge),
	562	release_pci_root_info, info);
	563	} else {
2cd6975a	564	pci_free_resource_list(&resources);
fd3b0c1e YL	565	__release_pci_root_info(info);
fd3b0c1e YL	566	}
626fdfec	567	}
08f1c192	568
b03e7495 JM	569	/* After the PCI-E bus has been walked and all devices discovered,
	570	* configure any settings of the fabric that might be necessary.
	571	*/
	572	if (bus) {
	573	struct pci_bus *child;
5307f6d5 SI	574	list_for_each_entry(child, &bus->children, node) {
	575	struct pci_dev *self = child->self;
	576	if (!self)
	577	continue;
	578
	579	pcie_bus_configure_settings(child, self->pcie_mpss);
	580	}
b03e7495 JM	581	}
b03e7495 JM	582
dbb6152e	583	if (bus && node != -1) {
69e1a33f	584	#ifdef CONFIG_ACPI_NUMA
dbb6152e	585	if (pxm >= 0)
2b8c2efe BH	586	dev_printk(KERN_DEBUG, &bus->dev,
2b8c2efe BH	587	"on NUMA node %d (pxm %d)\n", node, pxm);
dbb6152e	588	#else
2b8c2efe	589	dev_printk(KERN_DEBUG, &bus->dev, "on NUMA node %d\n", node);
69e1a33f	590	#endif
dbb6152e	591	}
62f420f8	592
69e1a33f	593	return bus;
1da177e4 LT	594	}
1da177e4 LT	595
8dd779b1	596	int __init pci_acpi_init(void)
1da177e4 LT	597	{
	598	struct pci_dev *dev = NULL;
	599
1da177e4	600	if (acpi_noirq)
b72d0db9	601	return -ENODEV;
1da177e4 LT	602
	603	printk(KERN_INFO "PCI: Using ACPI for IRQ routing\n");
	604	acpi_irq_penalty_init();
1da177e4	605	pcibios_enable_irq = acpi_pci_irq_enable;
87bec66b	606	pcibios_disable_irq = acpi_pci_irq_disable;
ab3b3793	607	x86_init.pci.init_irq = x86_init_noop;
1da177e4 LT	608
	609	if (pci_routeirq) {
	610	/*
	611	* PCI IRQ routing is set up by pci_enable_device(), but we
	612	* also do it here in case there are still broken drivers that
	613	* don't use pci_enable_device().
	614	*/
	615	printk(KERN_INFO "PCI: Routing PCI interrupts for all devices because \"pci=routeirq\" specified\n");
fb37fb96	616	for_each_pci_dev(dev)
1da177e4	617	acpi_pci_irq_enable(dev);
657472e9	618	}
1da177e4	619
1da177e4 LT	620	return 0;
1da177e4 LT	621	}