Commit | Line | Data |
---|---|---|
b886d83c | 1 | // SPDX-License-Identifier: GPL-2.0-only |
a2c7a983 IM |
2 | /* |
3 | * bpf_jit_comp.c: BPF JIT compiler | |
0a14842f | 4 | * |
3b58908a | 5 | * Copyright (C) 2011-2013 Eric Dumazet (eric.dumazet@gmail.com) |
62258278 | 6 | * Internal BPF Copyright (c) 2011-2014 PLUMgrid, http://plumgrid.com |
0a14842f | 7 | */ |
0a14842f ED |
8 | #include <linux/netdevice.h> |
9 | #include <linux/filter.h> | |
855ddb56 | 10 | #include <linux/if_vlan.h> |
71d22d58 | 11 | #include <linux/bpf.h> |
5964b200 | 12 | #include <linux/memory.h> |
75ccbef6 | 13 | #include <linux/sort.h> |
3dec541b | 14 | #include <asm/extable.h> |
d1163651 | 15 | #include <asm/set_memory.h> |
a493a87f | 16 | #include <asm/nospec-branch.h> |
5964b200 | 17 | #include <asm/text-patching.h> |
75ccbef6 | 18 | #include <asm/asm-prototypes.h> |
0a14842f | 19 | |
5cccc702 | 20 | static u8 *emit_code(u8 *ptr, u32 bytes, unsigned int len) |
0a14842f ED |
21 | { |
22 | if (len == 1) | |
23 | *ptr = bytes; | |
24 | else if (len == 2) | |
25 | *(u16 *)ptr = bytes; | |
26 | else { | |
27 | *(u32 *)ptr = bytes; | |
28 | barrier(); | |
29 | } | |
30 | return ptr + len; | |
31 | } | |
32 | ||
b52f00e6 AS |
33 | #define EMIT(bytes, len) \ |
34 | do { prog = emit_code(prog, bytes, len); cnt += len; } while (0) | |
0a14842f ED |
35 | |
36 | #define EMIT1(b1) EMIT(b1, 1) | |
37 | #define EMIT2(b1, b2) EMIT((b1) + ((b2) << 8), 2) | |
38 | #define EMIT3(b1, b2, b3) EMIT((b1) + ((b2) << 8) + ((b3) << 16), 3) | |
39 | #define EMIT4(b1, b2, b3, b4) EMIT((b1) + ((b2) << 8) + ((b3) << 16) + ((b4) << 24), 4) | |
a2c7a983 | 40 | |
62258278 | 41 | #define EMIT1_off32(b1, off) \ |
a2c7a983 | 42 | do { EMIT1(b1); EMIT(off, 4); } while (0) |
62258278 | 43 | #define EMIT2_off32(b1, b2, off) \ |
a2c7a983 | 44 | do { EMIT2(b1, b2); EMIT(off, 4); } while (0) |
62258278 | 45 | #define EMIT3_off32(b1, b2, b3, off) \ |
a2c7a983 | 46 | do { EMIT3(b1, b2, b3); EMIT(off, 4); } while (0) |
62258278 | 47 | #define EMIT4_off32(b1, b2, b3, b4, off) \ |
a2c7a983 | 48 | do { EMIT4(b1, b2, b3, b4); EMIT(off, 4); } while (0) |
0a14842f | 49 | |
5cccc702 | 50 | static bool is_imm8(int value) |
0a14842f ED |
51 | { |
52 | return value <= 127 && value >= -128; | |
53 | } | |
54 | ||
5cccc702 | 55 | static bool is_simm32(s64 value) |
0a14842f | 56 | { |
6fe8b9c1 DB |
57 | return value == (s64)(s32)value; |
58 | } | |
59 | ||
60 | static bool is_uimm32(u64 value) | |
61 | { | |
62 | return value == (u64)(u32)value; | |
0a14842f ED |
63 | } |
64 | ||
e430f34e | 65 | /* mov dst, src */ |
a2c7a983 IM |
66 | #define EMIT_mov(DST, SRC) \ |
67 | do { \ | |
68 | if (DST != SRC) \ | |
69 | EMIT3(add_2mod(0x48, DST, SRC), 0x89, add_2reg(0xC0, DST, SRC)); \ | |
62258278 AS |
70 | } while (0) |
71 | ||
72 | static int bpf_size_to_x86_bytes(int bpf_size) | |
73 | { | |
74 | if (bpf_size == BPF_W) | |
75 | return 4; | |
76 | else if (bpf_size == BPF_H) | |
77 | return 2; | |
78 | else if (bpf_size == BPF_B) | |
79 | return 1; | |
80 | else if (bpf_size == BPF_DW) | |
81 | return 4; /* imm32 */ | |
82 | else | |
83 | return 0; | |
84 | } | |
0a14842f | 85 | |
a2c7a983 IM |
86 | /* |
87 | * List of x86 cond jumps opcodes (. + s8) | |
0a14842f ED |
88 | * Add 0x10 (and an extra 0x0f) to generate far jumps (. + s32) |
89 | */ | |
90 | #define X86_JB 0x72 | |
91 | #define X86_JAE 0x73 | |
92 | #define X86_JE 0x74 | |
93 | #define X86_JNE 0x75 | |
94 | #define X86_JBE 0x76 | |
95 | #define X86_JA 0x77 | |
52afc51e | 96 | #define X86_JL 0x7C |
62258278 | 97 | #define X86_JGE 0x7D |
52afc51e | 98 | #define X86_JLE 0x7E |
62258278 | 99 | #define X86_JG 0x7F |
0a14842f | 100 | |
a2c7a983 | 101 | /* Pick a register outside of BPF range for JIT internal work */ |
959a7579 | 102 | #define AUX_REG (MAX_BPF_JIT_REG + 1) |
fec56f58 | 103 | #define X86_REG_R9 (MAX_BPF_JIT_REG + 2) |
62258278 | 104 | |
a2c7a983 IM |
105 | /* |
106 | * The following table maps BPF registers to x86-64 registers. | |
959a7579 | 107 | * |
a2c7a983 | 108 | * x86-64 register R12 is unused, since if used as base address |
959a7579 DB |
109 | * register in load/store instructions, it always needs an |
110 | * extra byte of encoding and is callee saved. | |
111 | * | |
fec56f58 AS |
112 | * x86-64 register R9 is not used by BPF programs, but can be used by BPF |
113 | * trampoline. x86-64 register R10 is used for blinding (if enabled). | |
62258278 AS |
114 | */ |
115 | static const int reg2hex[] = { | |
a2c7a983 IM |
116 | [BPF_REG_0] = 0, /* RAX */ |
117 | [BPF_REG_1] = 7, /* RDI */ | |
118 | [BPF_REG_2] = 6, /* RSI */ | |
119 | [BPF_REG_3] = 2, /* RDX */ | |
120 | [BPF_REG_4] = 1, /* RCX */ | |
121 | [BPF_REG_5] = 0, /* R8 */ | |
122 | [BPF_REG_6] = 3, /* RBX callee saved */ | |
123 | [BPF_REG_7] = 5, /* R13 callee saved */ | |
124 | [BPF_REG_8] = 6, /* R14 callee saved */ | |
125 | [BPF_REG_9] = 7, /* R15 callee saved */ | |
126 | [BPF_REG_FP] = 5, /* RBP readonly */ | |
127 | [BPF_REG_AX] = 2, /* R10 temp register */ | |
128 | [AUX_REG] = 3, /* R11 temp register */ | |
fec56f58 | 129 | [X86_REG_R9] = 1, /* R9 register, 6th function argument */ |
62258278 AS |
130 | }; |
131 | ||
3dec541b AS |
132 | static const int reg2pt_regs[] = { |
133 | [BPF_REG_0] = offsetof(struct pt_regs, ax), | |
134 | [BPF_REG_1] = offsetof(struct pt_regs, di), | |
135 | [BPF_REG_2] = offsetof(struct pt_regs, si), | |
136 | [BPF_REG_3] = offsetof(struct pt_regs, dx), | |
137 | [BPF_REG_4] = offsetof(struct pt_regs, cx), | |
138 | [BPF_REG_5] = offsetof(struct pt_regs, r8), | |
139 | [BPF_REG_6] = offsetof(struct pt_regs, bx), | |
140 | [BPF_REG_7] = offsetof(struct pt_regs, r13), | |
141 | [BPF_REG_8] = offsetof(struct pt_regs, r14), | |
142 | [BPF_REG_9] = offsetof(struct pt_regs, r15), | |
143 | }; | |
144 | ||
a2c7a983 IM |
145 | /* |
146 | * is_ereg() == true if BPF register 'reg' maps to x86-64 r8..r15 | |
62258278 AS |
147 | * which need extra byte of encoding. |
148 | * rax,rcx,...,rbp have simpler encoding | |
149 | */ | |
5cccc702 | 150 | static bool is_ereg(u32 reg) |
62258278 | 151 | { |
d148134b JP |
152 | return (1 << reg) & (BIT(BPF_REG_5) | |
153 | BIT(AUX_REG) | | |
154 | BIT(BPF_REG_7) | | |
155 | BIT(BPF_REG_8) | | |
959a7579 | 156 | BIT(BPF_REG_9) | |
fec56f58 | 157 | BIT(X86_REG_R9) | |
959a7579 | 158 | BIT(BPF_REG_AX)); |
62258278 AS |
159 | } |
160 | ||
aee194b1 LN |
161 | /* |
162 | * is_ereg_8l() == true if BPF register 'reg' is mapped to access x86-64 | |
163 | * lower 8-bit registers dil,sil,bpl,spl,r8b..r15b, which need extra byte | |
164 | * of encoding. al,cl,dl,bl have simpler encoding. | |
165 | */ | |
166 | static bool is_ereg_8l(u32 reg) | |
167 | { | |
168 | return is_ereg(reg) || | |
169 | (1 << reg) & (BIT(BPF_REG_1) | | |
170 | BIT(BPF_REG_2) | | |
171 | BIT(BPF_REG_FP)); | |
172 | } | |
173 | ||
de0a444d DB |
174 | static bool is_axreg(u32 reg) |
175 | { | |
176 | return reg == BPF_REG_0; | |
177 | } | |
178 | ||
a2c7a983 | 179 | /* Add modifiers if 'reg' maps to x86-64 registers R8..R15 */ |
5cccc702 | 180 | static u8 add_1mod(u8 byte, u32 reg) |
62258278 AS |
181 | { |
182 | if (is_ereg(reg)) | |
183 | byte |= 1; | |
184 | return byte; | |
185 | } | |
186 | ||
5cccc702 | 187 | static u8 add_2mod(u8 byte, u32 r1, u32 r2) |
62258278 AS |
188 | { |
189 | if (is_ereg(r1)) | |
190 | byte |= 1; | |
191 | if (is_ereg(r2)) | |
192 | byte |= 4; | |
193 | return byte; | |
194 | } | |
195 | ||
a2c7a983 | 196 | /* Encode 'dst_reg' register into x86-64 opcode 'byte' */ |
5cccc702 | 197 | static u8 add_1reg(u8 byte, u32 dst_reg) |
62258278 | 198 | { |
e430f34e | 199 | return byte + reg2hex[dst_reg]; |
62258278 AS |
200 | } |
201 | ||
a2c7a983 | 202 | /* Encode 'dst_reg' and 'src_reg' registers into x86-64 opcode 'byte' */ |
5cccc702 | 203 | static u8 add_2reg(u8 byte, u32 dst_reg, u32 src_reg) |
62258278 | 204 | { |
e430f34e | 205 | return byte + reg2hex[dst_reg] + (reg2hex[src_reg] << 3); |
62258278 AS |
206 | } |
207 | ||
738cbe72 DB |
208 | static void jit_fill_hole(void *area, unsigned int size) |
209 | { | |
a2c7a983 | 210 | /* Fill whole space with INT3 instructions */ |
738cbe72 DB |
211 | memset(area, 0xcc, size); |
212 | } | |
213 | ||
f3c2af7b | 214 | struct jit_context { |
a2c7a983 | 215 | int cleanup_addr; /* Epilogue code offset */ |
f3c2af7b AS |
216 | }; |
217 | ||
a2c7a983 | 218 | /* Maximum number of bytes emitted while JITing one eBPF insn */ |
e0ee9c12 AS |
219 | #define BPF_MAX_INSN_SIZE 128 |
220 | #define BPF_INSN_SAFETY 64 | |
4b3da77b DB |
221 | |
222 | /* Number of bytes emit_patch() needs to generate instructions */ | |
223 | #define X86_PATCH_SIZE 5 | |
ebf7d1f5 MF |
224 | /* Number of bytes that will be skipped on tailcall */ |
225 | #define X86_TAIL_CALL_OFFSET 11 | |
e0ee9c12 | 226 | |
ebf7d1f5 MF |
227 | static void push_callee_regs(u8 **pprog, bool *callee_regs_used) |
228 | { | |
229 | u8 *prog = *pprog; | |
230 | int cnt = 0; | |
231 | ||
232 | if (callee_regs_used[0]) | |
233 | EMIT1(0x53); /* push rbx */ | |
234 | if (callee_regs_used[1]) | |
235 | EMIT2(0x41, 0x55); /* push r13 */ | |
236 | if (callee_regs_used[2]) | |
237 | EMIT2(0x41, 0x56); /* push r14 */ | |
238 | if (callee_regs_used[3]) | |
239 | EMIT2(0x41, 0x57); /* push r15 */ | |
240 | *pprog = prog; | |
241 | } | |
242 | ||
243 | static void pop_callee_regs(u8 **pprog, bool *callee_regs_used) | |
244 | { | |
245 | u8 *prog = *pprog; | |
246 | int cnt = 0; | |
247 | ||
248 | if (callee_regs_used[3]) | |
249 | EMIT2(0x41, 0x5F); /* pop r15 */ | |
250 | if (callee_regs_used[2]) | |
251 | EMIT2(0x41, 0x5E); /* pop r14 */ | |
252 | if (callee_regs_used[1]) | |
253 | EMIT2(0x41, 0x5D); /* pop r13 */ | |
254 | if (callee_regs_used[0]) | |
255 | EMIT1(0x5B); /* pop rbx */ | |
256 | *pprog = prog; | |
257 | } | |
b52f00e6 | 258 | |
a2c7a983 | 259 | /* |
ebf7d1f5 MF |
260 | * Emit x86-64 prologue code for BPF program. |
261 | * bpf_tail_call helper will skip the first X86_TAIL_CALL_OFFSET bytes | |
262 | * while jumping to another program | |
b52f00e6 | 263 | */ |
ebf7d1f5 MF |
264 | static void emit_prologue(u8 **pprog, u32 stack_depth, bool ebpf_from_cbpf, |
265 | bool tail_call_reachable, bool is_subprog) | |
0a14842f | 266 | { |
b52f00e6 | 267 | u8 *prog = *pprog; |
4b3da77b | 268 | int cnt = X86_PATCH_SIZE; |
0a14842f | 269 | |
9fd4a39d AS |
270 | /* BPF trampoline can be made to work without these nops, |
271 | * but let's waste 5 bytes for now and optimize later | |
272 | */ | |
273 | memcpy(prog, ideal_nops[NOP_ATOMIC5], cnt); | |
274 | prog += cnt; | |
ebf7d1f5 MF |
275 | if (!ebpf_from_cbpf) { |
276 | if (tail_call_reachable && !is_subprog) | |
277 | EMIT2(0x31, 0xC0); /* xor eax, eax */ | |
278 | else | |
279 | EMIT2(0x66, 0x90); /* nop2 */ | |
280 | } | |
fe8d9571 AS |
281 | EMIT1(0x55); /* push rbp */ |
282 | EMIT3(0x48, 0x89, 0xE5); /* mov rbp, rsp */ | |
283 | /* sub rsp, rounded_stack_depth */ | |
4d0b8c0b MF |
284 | if (stack_depth) |
285 | EMIT3_off32(0x48, 0x81, 0xEC, round_up(stack_depth, 8)); | |
ebf7d1f5 MF |
286 | if (tail_call_reachable) |
287 | EMIT1(0x50); /* push rax */ | |
b52f00e6 AS |
288 | *pprog = prog; |
289 | } | |
290 | ||
428d5df1 DB |
291 | static int emit_patch(u8 **pprog, void *func, void *ip, u8 opcode) |
292 | { | |
293 | u8 *prog = *pprog; | |
294 | int cnt = 0; | |
295 | s64 offset; | |
296 | ||
297 | offset = func - (ip + X86_PATCH_SIZE); | |
298 | if (!is_simm32(offset)) { | |
299 | pr_err("Target call %p is out of range\n", func); | |
300 | return -ERANGE; | |
301 | } | |
302 | EMIT1_off32(opcode, offset); | |
303 | *pprog = prog; | |
304 | return 0; | |
305 | } | |
306 | ||
307 | static int emit_call(u8 **pprog, void *func, void *ip) | |
308 | { | |
309 | return emit_patch(pprog, func, ip, 0xE8); | |
310 | } | |
311 | ||
312 | static int emit_jump(u8 **pprog, void *func, void *ip) | |
313 | { | |
314 | return emit_patch(pprog, func, ip, 0xE9); | |
315 | } | |
316 | ||
317 | static int __bpf_arch_text_poke(void *ip, enum bpf_text_poke_type t, | |
318 | void *old_addr, void *new_addr, | |
319 | const bool text_live) | |
320 | { | |
428d5df1 | 321 | const u8 *nop_insn = ideal_nops[NOP_ATOMIC5]; |
b553a6ec DB |
322 | u8 old_insn[X86_PATCH_SIZE]; |
323 | u8 new_insn[X86_PATCH_SIZE]; | |
428d5df1 DB |
324 | u8 *prog; |
325 | int ret; | |
326 | ||
b553a6ec DB |
327 | memcpy(old_insn, nop_insn, X86_PATCH_SIZE); |
328 | if (old_addr) { | |
329 | prog = old_insn; | |
330 | ret = t == BPF_MOD_CALL ? | |
331 | emit_call(&prog, old_addr, ip) : | |
332 | emit_jump(&prog, old_addr, ip); | |
333 | if (ret) | |
334 | return ret; | |
428d5df1 DB |
335 | } |
336 | ||
b553a6ec DB |
337 | memcpy(new_insn, nop_insn, X86_PATCH_SIZE); |
338 | if (new_addr) { | |
339 | prog = new_insn; | |
340 | ret = t == BPF_MOD_CALL ? | |
341 | emit_call(&prog, new_addr, ip) : | |
342 | emit_jump(&prog, new_addr, ip); | |
343 | if (ret) | |
344 | return ret; | |
428d5df1 DB |
345 | } |
346 | ||
347 | ret = -EBUSY; | |
348 | mutex_lock(&text_mutex); | |
349 | if (memcmp(ip, old_insn, X86_PATCH_SIZE)) | |
350 | goto out; | |
ebf7d1f5 | 351 | ret = 1; |
b553a6ec DB |
352 | if (memcmp(ip, new_insn, X86_PATCH_SIZE)) { |
353 | if (text_live) | |
354 | text_poke_bp(ip, new_insn, X86_PATCH_SIZE, NULL); | |
355 | else | |
356 | memcpy(ip, new_insn, X86_PATCH_SIZE); | |
ebf7d1f5 | 357 | ret = 0; |
b553a6ec | 358 | } |
428d5df1 DB |
359 | out: |
360 | mutex_unlock(&text_mutex); | |
361 | return ret; | |
362 | } | |
363 | ||
364 | int bpf_arch_text_poke(void *ip, enum bpf_text_poke_type t, | |
365 | void *old_addr, void *new_addr) | |
366 | { | |
367 | if (!is_kernel_text((long)ip) && | |
368 | !is_bpf_text_address((long)ip)) | |
369 | /* BPF poking in modules is not supported */ | |
370 | return -EINVAL; | |
371 | ||
372 | return __bpf_arch_text_poke(ip, t, old_addr, new_addr, true); | |
373 | } | |
374 | ||
ebf7d1f5 MF |
375 | static int get_pop_bytes(bool *callee_regs_used) |
376 | { | |
377 | int bytes = 0; | |
378 | ||
379 | if (callee_regs_used[3]) | |
380 | bytes += 2; | |
381 | if (callee_regs_used[2]) | |
382 | bytes += 2; | |
383 | if (callee_regs_used[1]) | |
384 | bytes += 2; | |
385 | if (callee_regs_used[0]) | |
386 | bytes += 1; | |
387 | ||
388 | return bytes; | |
389 | } | |
390 | ||
a2c7a983 IM |
391 | /* |
392 | * Generate the following code: | |
393 | * | |
b52f00e6 AS |
394 | * ... bpf_tail_call(void *ctx, struct bpf_array *array, u64 index) ... |
395 | * if (index >= array->map.max_entries) | |
396 | * goto out; | |
397 | * if (++tail_call_cnt > MAX_TAIL_CALL_CNT) | |
398 | * goto out; | |
2a36f0b9 | 399 | * prog = array->ptrs[index]; |
b52f00e6 AS |
400 | * if (prog == NULL) |
401 | * goto out; | |
402 | * goto *(prog->bpf_func + prologue_size); | |
403 | * out: | |
404 | */ | |
ebf7d1f5 MF |
405 | static void emit_bpf_tail_call_indirect(u8 **pprog, bool *callee_regs_used, |
406 | u32 stack_depth) | |
b52f00e6 | 407 | { |
ebf7d1f5 | 408 | int tcc_off = -4 - round_up(stack_depth, 8); |
b52f00e6 | 409 | u8 *prog = *pprog; |
ebf7d1f5 | 410 | int pop_bytes = 0; |
4d0b8c0b MF |
411 | int off1 = 42; |
412 | int off2 = 31; | |
413 | int off3 = 9; | |
b52f00e6 AS |
414 | int cnt = 0; |
415 | ||
ebf7d1f5 MF |
416 | /* count the additional bytes used for popping callee regs from stack |
417 | * that need to be taken into account for each of the offsets that | |
418 | * are used for bailing out of the tail call | |
419 | */ | |
420 | pop_bytes = get_pop_bytes(callee_regs_used); | |
421 | off1 += pop_bytes; | |
422 | off2 += pop_bytes; | |
423 | off3 += pop_bytes; | |
424 | ||
4d0b8c0b MF |
425 | if (stack_depth) { |
426 | off1 += 7; | |
427 | off2 += 7; | |
428 | off3 += 7; | |
429 | } | |
430 | ||
a2c7a983 IM |
431 | /* |
432 | * rdi - pointer to ctx | |
b52f00e6 AS |
433 | * rsi - pointer to bpf_array |
434 | * rdx - index in bpf_array | |
435 | */ | |
436 | ||
a2c7a983 IM |
437 | /* |
438 | * if (index >= array->map.max_entries) | |
439 | * goto out; | |
b52f00e6 | 440 | */ |
90caccdd AS |
441 | EMIT2(0x89, 0xD2); /* mov edx, edx */ |
442 | EMIT3(0x39, 0x56, /* cmp dword ptr [rsi + 16], edx */ | |
b52f00e6 | 443 | offsetof(struct bpf_array, map.max_entries)); |
ebf7d1f5 | 444 | #define OFFSET1 (off1 + RETPOLINE_RCX_BPF_JIT_SIZE) /* Number of bytes to jump */ |
b52f00e6 | 445 | EMIT2(X86_JBE, OFFSET1); /* jbe out */ |
b52f00e6 | 446 | |
a2c7a983 IM |
447 | /* |
448 | * if (tail_call_cnt > MAX_TAIL_CALL_CNT) | |
449 | * goto out; | |
b52f00e6 | 450 | */ |
ebf7d1f5 | 451 | EMIT2_off32(0x8B, 0x85, tcc_off); /* mov eax, dword ptr [rbp - tcc_off] */ |
b52f00e6 | 452 | EMIT3(0x83, 0xF8, MAX_TAIL_CALL_CNT); /* cmp eax, MAX_TAIL_CALL_CNT */ |
ebf7d1f5 | 453 | #define OFFSET2 (off2 + RETPOLINE_RCX_BPF_JIT_SIZE) |
b52f00e6 | 454 | EMIT2(X86_JA, OFFSET2); /* ja out */ |
b52f00e6 | 455 | EMIT3(0x83, 0xC0, 0x01); /* add eax, 1 */ |
ebf7d1f5 | 456 | EMIT2_off32(0x89, 0x85, tcc_off); /* mov dword ptr [rbp - tcc_off], eax */ |
b52f00e6 | 457 | |
2a36f0b9 | 458 | /* prog = array->ptrs[index]; */ |
0d4ddce3 | 459 | EMIT4_off32(0x48, 0x8B, 0x8C, 0xD6, /* mov rcx, [rsi + rdx * 8 + offsetof(...)] */ |
2a36f0b9 | 460 | offsetof(struct bpf_array, ptrs)); |
b52f00e6 | 461 | |
a2c7a983 IM |
462 | /* |
463 | * if (prog == NULL) | |
464 | * goto out; | |
b52f00e6 | 465 | */ |
ebf7d1f5 MF |
466 | EMIT3(0x48, 0x85, 0xC9); /* test rcx,rcx */ |
467 | #define OFFSET3 (off3 + RETPOLINE_RCX_BPF_JIT_SIZE) | |
b52f00e6 | 468 | EMIT2(X86_JE, OFFSET3); /* je out */ |
b52f00e6 | 469 | |
ebf7d1f5 MF |
470 | *pprog = prog; |
471 | pop_callee_regs(pprog, callee_regs_used); | |
472 | prog = *pprog; | |
473 | ||
474 | EMIT1(0x58); /* pop rax */ | |
4d0b8c0b MF |
475 | if (stack_depth) |
476 | EMIT3_off32(0x48, 0x81, 0xC4, /* add rsp, sd */ | |
477 | round_up(stack_depth, 8)); | |
ebf7d1f5 MF |
478 | |
479 | /* goto *(prog->bpf_func + X86_TAIL_CALL_OFFSET); */ | |
0d4ddce3 | 480 | EMIT4(0x48, 0x8B, 0x49, /* mov rcx, qword ptr [rcx + 32] */ |
b52f00e6 | 481 | offsetof(struct bpf_prog, bpf_func)); |
ebf7d1f5 MF |
482 | EMIT4(0x48, 0x83, 0xC1, /* add rcx, X86_TAIL_CALL_OFFSET */ |
483 | X86_TAIL_CALL_OFFSET); | |
a2c7a983 | 484 | /* |
0d4ddce3 | 485 | * Now we're ready to jump into next BPF program |
b52f00e6 | 486 | * rdi == ctx (1st arg) |
ebf7d1f5 | 487 | * rcx == prog->bpf_func + X86_TAIL_CALL_OFFSET |
b52f00e6 | 488 | */ |
0d4ddce3 | 489 | RETPOLINE_RCX_BPF_JIT(); |
b52f00e6 AS |
490 | |
491 | /* out: */ | |
b52f00e6 AS |
492 | *pprog = prog; |
493 | } | |
494 | ||
428d5df1 | 495 | static void emit_bpf_tail_call_direct(struct bpf_jit_poke_descriptor *poke, |
ebf7d1f5 MF |
496 | u8 **pprog, int addr, u8 *image, |
497 | bool *callee_regs_used, u32 stack_depth) | |
428d5df1 | 498 | { |
ebf7d1f5 | 499 | int tcc_off = -4 - round_up(stack_depth, 8); |
428d5df1 | 500 | u8 *prog = *pprog; |
ebf7d1f5 | 501 | int pop_bytes = 0; |
4d0b8c0b | 502 | int off1 = 20; |
ebf7d1f5 | 503 | int poke_off; |
428d5df1 DB |
504 | int cnt = 0; |
505 | ||
ebf7d1f5 MF |
506 | /* count the additional bytes used for popping callee regs to stack |
507 | * that need to be taken into account for jump offset that is used for | |
508 | * bailing out from of the tail call when limit is reached | |
509 | */ | |
510 | pop_bytes = get_pop_bytes(callee_regs_used); | |
511 | off1 += pop_bytes; | |
512 | ||
513 | /* | |
514 | * total bytes for: | |
515 | * - nop5/ jmpq $off | |
516 | * - pop callee regs | |
4d0b8c0b | 517 | * - sub rsp, $val if depth > 0 |
ebf7d1f5 MF |
518 | * - pop rax |
519 | */ | |
4d0b8c0b MF |
520 | poke_off = X86_PATCH_SIZE + pop_bytes + 1; |
521 | if (stack_depth) { | |
522 | poke_off += 7; | |
523 | off1 += 7; | |
524 | } | |
ebf7d1f5 | 525 | |
428d5df1 DB |
526 | /* |
527 | * if (tail_call_cnt > MAX_TAIL_CALL_CNT) | |
528 | * goto out; | |
529 | */ | |
ebf7d1f5 | 530 | EMIT2_off32(0x8B, 0x85, tcc_off); /* mov eax, dword ptr [rbp - tcc_off] */ |
428d5df1 | 531 | EMIT3(0x83, 0xF8, MAX_TAIL_CALL_CNT); /* cmp eax, MAX_TAIL_CALL_CNT */ |
ebf7d1f5 | 532 | EMIT2(X86_JA, off1); /* ja out */ |
428d5df1 | 533 | EMIT3(0x83, 0xC0, 0x01); /* add eax, 1 */ |
ebf7d1f5 | 534 | EMIT2_off32(0x89, 0x85, tcc_off); /* mov dword ptr [rbp - tcc_off], eax */ |
428d5df1 | 535 | |
ebf7d1f5 MF |
536 | poke->tailcall_bypass = image + (addr - poke_off - X86_PATCH_SIZE); |
537 | poke->adj_off = X86_TAIL_CALL_OFFSET; | |
cf71b174 | 538 | poke->tailcall_target = image + (addr - X86_PATCH_SIZE); |
ebf7d1f5 MF |
539 | poke->bypass_addr = (u8 *)poke->tailcall_target + X86_PATCH_SIZE; |
540 | ||
541 | emit_jump(&prog, (u8 *)poke->tailcall_target + X86_PATCH_SIZE, | |
542 | poke->tailcall_bypass); | |
543 | ||
544 | *pprog = prog; | |
545 | pop_callee_regs(pprog, callee_regs_used); | |
546 | prog = *pprog; | |
547 | EMIT1(0x58); /* pop rax */ | |
4d0b8c0b MF |
548 | if (stack_depth) |
549 | EMIT3_off32(0x48, 0x81, 0xC4, round_up(stack_depth, 8)); | |
428d5df1 DB |
550 | |
551 | memcpy(prog, ideal_nops[NOP_ATOMIC5], X86_PATCH_SIZE); | |
552 | prog += X86_PATCH_SIZE; | |
553 | /* out: */ | |
554 | ||
555 | *pprog = prog; | |
556 | } | |
557 | ||
558 | static void bpf_tail_call_direct_fixup(struct bpf_prog *prog) | |
559 | { | |
428d5df1 DB |
560 | struct bpf_jit_poke_descriptor *poke; |
561 | struct bpf_array *array; | |
562 | struct bpf_prog *target; | |
563 | int i, ret; | |
564 | ||
565 | for (i = 0; i < prog->aux->size_poke_tab; i++) { | |
566 | poke = &prog->aux->poke_tab[i]; | |
cf71b174 | 567 | WARN_ON_ONCE(READ_ONCE(poke->tailcall_target_stable)); |
428d5df1 DB |
568 | |
569 | if (poke->reason != BPF_POKE_REASON_TAIL_CALL) | |
570 | continue; | |
571 | ||
572 | array = container_of(poke->tail_call.map, struct bpf_array, map); | |
573 | mutex_lock(&array->aux->poke_mutex); | |
574 | target = array->ptrs[poke->tail_call.key]; | |
575 | if (target) { | |
576 | /* Plain memcpy is used when image is not live yet | |
577 | * and still not locked as read-only. Once poke | |
cf71b174 MF |
578 | * location is active (poke->tailcall_target_stable), |
579 | * any parallel bpf_arch_text_poke() might occur | |
580 | * still on the read-write image until we finally | |
581 | * locked it as read-only. Both modifications on | |
582 | * the given image are under text_mutex to avoid | |
583 | * interference. | |
428d5df1 | 584 | */ |
cf71b174 MF |
585 | ret = __bpf_arch_text_poke(poke->tailcall_target, |
586 | BPF_MOD_JUMP, NULL, | |
428d5df1 DB |
587 | (u8 *)target->bpf_func + |
588 | poke->adj_off, false); | |
589 | BUG_ON(ret < 0); | |
ebf7d1f5 MF |
590 | ret = __bpf_arch_text_poke(poke->tailcall_bypass, |
591 | BPF_MOD_JUMP, | |
592 | (u8 *)poke->tailcall_target + | |
593 | X86_PATCH_SIZE, NULL, false); | |
594 | BUG_ON(ret < 0); | |
428d5df1 | 595 | } |
cf71b174 | 596 | WRITE_ONCE(poke->tailcall_target_stable, true); |
428d5df1 DB |
597 | mutex_unlock(&array->aux->poke_mutex); |
598 | } | |
599 | } | |
600 | ||
6fe8b9c1 DB |
601 | static void emit_mov_imm32(u8 **pprog, bool sign_propagate, |
602 | u32 dst_reg, const u32 imm32) | |
603 | { | |
604 | u8 *prog = *pprog; | |
605 | u8 b1, b2, b3; | |
606 | int cnt = 0; | |
607 | ||
a2c7a983 IM |
608 | /* |
609 | * Optimization: if imm32 is positive, use 'mov %eax, imm32' | |
6fe8b9c1 DB |
610 | * (which zero-extends imm32) to save 2 bytes. |
611 | */ | |
612 | if (sign_propagate && (s32)imm32 < 0) { | |
613 | /* 'mov %rax, imm32' sign extends imm32 */ | |
614 | b1 = add_1mod(0x48, dst_reg); | |
615 | b2 = 0xC7; | |
616 | b3 = 0xC0; | |
617 | EMIT3_off32(b1, b2, add_1reg(b3, dst_reg), imm32); | |
618 | goto done; | |
619 | } | |
620 | ||
a2c7a983 IM |
621 | /* |
622 | * Optimization: if imm32 is zero, use 'xor %eax, %eax' | |
6fe8b9c1 DB |
623 | * to save 3 bytes. |
624 | */ | |
625 | if (imm32 == 0) { | |
626 | if (is_ereg(dst_reg)) | |
627 | EMIT1(add_2mod(0x40, dst_reg, dst_reg)); | |
628 | b2 = 0x31; /* xor */ | |
629 | b3 = 0xC0; | |
630 | EMIT2(b2, add_2reg(b3, dst_reg, dst_reg)); | |
631 | goto done; | |
632 | } | |
633 | ||
634 | /* mov %eax, imm32 */ | |
635 | if (is_ereg(dst_reg)) | |
636 | EMIT1(add_1mod(0x40, dst_reg)); | |
637 | EMIT1_off32(add_1reg(0xB8, dst_reg), imm32); | |
638 | done: | |
639 | *pprog = prog; | |
640 | } | |
641 | ||
642 | static void emit_mov_imm64(u8 **pprog, u32 dst_reg, | |
643 | const u32 imm32_hi, const u32 imm32_lo) | |
644 | { | |
645 | u8 *prog = *pprog; | |
646 | int cnt = 0; | |
647 | ||
648 | if (is_uimm32(((u64)imm32_hi << 32) | (u32)imm32_lo)) { | |
a2c7a983 IM |
649 | /* |
650 | * For emitting plain u32, where sign bit must not be | |
6fe8b9c1 DB |
651 | * propagated LLVM tends to load imm64 over mov32 |
652 | * directly, so save couple of bytes by just doing | |
653 | * 'mov %eax, imm32' instead. | |
654 | */ | |
655 | emit_mov_imm32(&prog, false, dst_reg, imm32_lo); | |
656 | } else { | |
657 | /* movabsq %rax, imm64 */ | |
658 | EMIT2(add_1mod(0x48, dst_reg), add_1reg(0xB8, dst_reg)); | |
659 | EMIT(imm32_lo, 4); | |
660 | EMIT(imm32_hi, 4); | |
661 | } | |
662 | ||
663 | *pprog = prog; | |
664 | } | |
665 | ||
4c38e2f3 DB |
666 | static void emit_mov_reg(u8 **pprog, bool is64, u32 dst_reg, u32 src_reg) |
667 | { | |
668 | u8 *prog = *pprog; | |
669 | int cnt = 0; | |
670 | ||
671 | if (is64) { | |
672 | /* mov dst, src */ | |
673 | EMIT_mov(dst_reg, src_reg); | |
674 | } else { | |
675 | /* mov32 dst, src */ | |
676 | if (is_ereg(dst_reg) || is_ereg(src_reg)) | |
677 | EMIT1(add_2mod(0x40, dst_reg, src_reg)); | |
678 | EMIT2(0x89, add_2reg(0xC0, dst_reg, src_reg)); | |
679 | } | |
680 | ||
681 | *pprog = prog; | |
682 | } | |
683 | ||
11c11d07 BJ |
684 | /* Emit the suffix (ModR/M etc) for addressing *(ptr_reg + off) and val_reg */ |
685 | static void emit_insn_suffix(u8 **pprog, u32 ptr_reg, u32 val_reg, int off) | |
686 | { | |
687 | u8 *prog = *pprog; | |
688 | int cnt = 0; | |
689 | ||
690 | if (is_imm8(off)) { | |
691 | /* 1-byte signed displacement. | |
692 | * | |
693 | * If off == 0 we could skip this and save one extra byte, but | |
694 | * special case of x86 R13 which always needs an offset is not | |
695 | * worth the hassle | |
696 | */ | |
697 | EMIT2(add_2reg(0x40, ptr_reg, val_reg), off); | |
698 | } else { | |
699 | /* 4-byte signed displacement */ | |
700 | EMIT1_off32(add_2reg(0x80, ptr_reg, val_reg), off); | |
701 | } | |
702 | *pprog = prog; | |
703 | } | |
704 | ||
74007cfc BJ |
705 | /* |
706 | * Emit a REX byte if it will be necessary to address these registers | |
707 | */ | |
708 | static void maybe_emit_mod(u8 **pprog, u32 dst_reg, u32 src_reg, bool is64) | |
709 | { | |
710 | u8 *prog = *pprog; | |
711 | int cnt = 0; | |
712 | ||
713 | if (is64) | |
714 | EMIT1(add_2mod(0x48, dst_reg, src_reg)); | |
715 | else if (is_ereg(dst_reg) || is_ereg(src_reg)) | |
716 | EMIT1(add_2mod(0x40, dst_reg, src_reg)); | |
717 | *pprog = prog; | |
718 | } | |
719 | ||
3b2744e6 AS |
720 | /* LDX: dst_reg = *(u8*)(src_reg + off) */ |
721 | static void emit_ldx(u8 **pprog, u32 size, u32 dst_reg, u32 src_reg, int off) | |
722 | { | |
723 | u8 *prog = *pprog; | |
724 | int cnt = 0; | |
725 | ||
726 | switch (size) { | |
727 | case BPF_B: | |
728 | /* Emit 'movzx rax, byte ptr [rax + off]' */ | |
729 | EMIT3(add_2mod(0x48, src_reg, dst_reg), 0x0F, 0xB6); | |
730 | break; | |
731 | case BPF_H: | |
732 | /* Emit 'movzx rax, word ptr [rax + off]' */ | |
733 | EMIT3(add_2mod(0x48, src_reg, dst_reg), 0x0F, 0xB7); | |
734 | break; | |
735 | case BPF_W: | |
736 | /* Emit 'mov eax, dword ptr [rax+0x14]' */ | |
737 | if (is_ereg(dst_reg) || is_ereg(src_reg)) | |
738 | EMIT2(add_2mod(0x40, src_reg, dst_reg), 0x8B); | |
739 | else | |
740 | EMIT1(0x8B); | |
741 | break; | |
742 | case BPF_DW: | |
743 | /* Emit 'mov rax, qword ptr [rax+0x14]' */ | |
744 | EMIT2(add_2mod(0x48, src_reg, dst_reg), 0x8B); | |
745 | break; | |
746 | } | |
11c11d07 | 747 | emit_insn_suffix(&prog, src_reg, dst_reg, off); |
3b2744e6 AS |
748 | *pprog = prog; |
749 | } | |
750 | ||
751 | /* STX: *(u8*)(dst_reg + off) = src_reg */ | |
752 | static void emit_stx(u8 **pprog, u32 size, u32 dst_reg, u32 src_reg, int off) | |
753 | { | |
754 | u8 *prog = *pprog; | |
755 | int cnt = 0; | |
756 | ||
757 | switch (size) { | |
758 | case BPF_B: | |
759 | /* Emit 'mov byte ptr [rax + off], al' */ | |
aee194b1 LN |
760 | if (is_ereg(dst_reg) || is_ereg_8l(src_reg)) |
761 | /* Add extra byte for eregs or SIL,DIL,BPL in src_reg */ | |
3b2744e6 AS |
762 | EMIT2(add_2mod(0x40, dst_reg, src_reg), 0x88); |
763 | else | |
764 | EMIT1(0x88); | |
765 | break; | |
766 | case BPF_H: | |
767 | if (is_ereg(dst_reg) || is_ereg(src_reg)) | |
768 | EMIT3(0x66, add_2mod(0x40, dst_reg, src_reg), 0x89); | |
769 | else | |
770 | EMIT2(0x66, 0x89); | |
771 | break; | |
772 | case BPF_W: | |
773 | if (is_ereg(dst_reg) || is_ereg(src_reg)) | |
774 | EMIT2(add_2mod(0x40, dst_reg, src_reg), 0x89); | |
775 | else | |
776 | EMIT1(0x89); | |
777 | break; | |
778 | case BPF_DW: | |
779 | EMIT2(add_2mod(0x48, dst_reg, src_reg), 0x89); | |
780 | break; | |
781 | } | |
11c11d07 | 782 | emit_insn_suffix(&prog, dst_reg, src_reg, off); |
3b2744e6 AS |
783 | *pprog = prog; |
784 | } | |
785 | ||
3dec541b AS |
786 | static bool ex_handler_bpf(const struct exception_table_entry *x, |
787 | struct pt_regs *regs, int trapnr, | |
788 | unsigned long error_code, unsigned long fault_addr) | |
789 | { | |
790 | u32 reg = x->fixup >> 8; | |
791 | ||
792 | /* jump over faulting load and clear dest register */ | |
793 | *(unsigned long *)((void *)regs + reg) = 0; | |
794 | regs->ip += x->fixup & 0xff; | |
795 | return true; | |
796 | } | |
797 | ||
ebf7d1f5 MF |
798 | static void detect_reg_usage(struct bpf_insn *insn, int insn_cnt, |
799 | bool *regs_used, bool *tail_call_seen) | |
800 | { | |
801 | int i; | |
802 | ||
803 | for (i = 1; i <= insn_cnt; i++, insn++) { | |
804 | if (insn->code == (BPF_JMP | BPF_TAIL_CALL)) | |
805 | *tail_call_seen = true; | |
806 | if (insn->dst_reg == BPF_REG_6 || insn->src_reg == BPF_REG_6) | |
807 | regs_used[0] = true; | |
808 | if (insn->dst_reg == BPF_REG_7 || insn->src_reg == BPF_REG_7) | |
809 | regs_used[1] = true; | |
810 | if (insn->dst_reg == BPF_REG_8 || insn->src_reg == BPF_REG_8) | |
811 | regs_used[2] = true; | |
812 | if (insn->dst_reg == BPF_REG_9 || insn->src_reg == BPF_REG_9) | |
813 | regs_used[3] = true; | |
814 | } | |
815 | } | |
816 | ||
b52f00e6 AS |
817 | static int do_jit(struct bpf_prog *bpf_prog, int *addrs, u8 *image, |
818 | int oldproglen, struct jit_context *ctx) | |
819 | { | |
ebf7d1f5 | 820 | bool tail_call_reachable = bpf_prog->aux->tail_call_reachable; |
b52f00e6 | 821 | struct bpf_insn *insn = bpf_prog->insnsi; |
ebf7d1f5 | 822 | bool callee_regs_used[4] = {}; |
b52f00e6 | 823 | int insn_cnt = bpf_prog->len; |
ebf7d1f5 | 824 | bool tail_call_seen = false; |
b52f00e6 AS |
825 | bool seen_exit = false; |
826 | u8 temp[BPF_MAX_INSN_SIZE + BPF_INSN_SAFETY]; | |
3dec541b | 827 | int i, cnt = 0, excnt = 0; |
b52f00e6 AS |
828 | int proglen = 0; |
829 | u8 *prog = temp; | |
830 | ||
ebf7d1f5 MF |
831 | detect_reg_usage(insn, insn_cnt, callee_regs_used, |
832 | &tail_call_seen); | |
833 | ||
834 | /* tail call's presence in current prog implies it is reachable */ | |
835 | tail_call_reachable |= tail_call_seen; | |
836 | ||
08691752 | 837 | emit_prologue(&prog, bpf_prog->aux->stack_depth, |
ebf7d1f5 MF |
838 | bpf_prog_was_classic(bpf_prog), tail_call_reachable, |
839 | bpf_prog->aux->func_idx != 0); | |
840 | push_callee_regs(&prog, callee_regs_used); | |
7c2e988f | 841 | addrs[0] = prog - temp; |
b52f00e6 | 842 | |
7c2e988f | 843 | for (i = 1; i <= insn_cnt; i++, insn++) { |
e430f34e AS |
844 | const s32 imm32 = insn->imm; |
845 | u32 dst_reg = insn->dst_reg; | |
846 | u32 src_reg = insn->src_reg; | |
6fe8b9c1 | 847 | u8 b2 = 0, b3 = 0; |
62258278 AS |
848 | s64 jmp_offset; |
849 | u8 jmp_cond; | |
850 | int ilen; | |
851 | u8 *func; | |
852 | ||
853 | switch (insn->code) { | |
854 | /* ALU */ | |
855 | case BPF_ALU | BPF_ADD | BPF_X: | |
856 | case BPF_ALU | BPF_SUB | BPF_X: | |
857 | case BPF_ALU | BPF_AND | BPF_X: | |
858 | case BPF_ALU | BPF_OR | BPF_X: | |
859 | case BPF_ALU | BPF_XOR | BPF_X: | |
860 | case BPF_ALU64 | BPF_ADD | BPF_X: | |
861 | case BPF_ALU64 | BPF_SUB | BPF_X: | |
862 | case BPF_ALU64 | BPF_AND | BPF_X: | |
863 | case BPF_ALU64 | BPF_OR | BPF_X: | |
864 | case BPF_ALU64 | BPF_XOR | BPF_X: | |
865 | switch (BPF_OP(insn->code)) { | |
866 | case BPF_ADD: b2 = 0x01; break; | |
867 | case BPF_SUB: b2 = 0x29; break; | |
868 | case BPF_AND: b2 = 0x21; break; | |
869 | case BPF_OR: b2 = 0x09; break; | |
870 | case BPF_XOR: b2 = 0x31; break; | |
0a14842f | 871 | } |
74007cfc BJ |
872 | maybe_emit_mod(&prog, dst_reg, src_reg, |
873 | BPF_CLASS(insn->code) == BPF_ALU64); | |
e430f34e | 874 | EMIT2(b2, add_2reg(0xC0, dst_reg, src_reg)); |
62258278 | 875 | break; |
0a14842f | 876 | |
62258278 | 877 | case BPF_ALU64 | BPF_MOV | BPF_X: |
62258278 | 878 | case BPF_ALU | BPF_MOV | BPF_X: |
4c38e2f3 DB |
879 | emit_mov_reg(&prog, |
880 | BPF_CLASS(insn->code) == BPF_ALU64, | |
881 | dst_reg, src_reg); | |
62258278 | 882 | break; |
0a14842f | 883 | |
e430f34e | 884 | /* neg dst */ |
62258278 AS |
885 | case BPF_ALU | BPF_NEG: |
886 | case BPF_ALU64 | BPF_NEG: | |
887 | if (BPF_CLASS(insn->code) == BPF_ALU64) | |
e430f34e AS |
888 | EMIT1(add_1mod(0x48, dst_reg)); |
889 | else if (is_ereg(dst_reg)) | |
890 | EMIT1(add_1mod(0x40, dst_reg)); | |
891 | EMIT2(0xF7, add_1reg(0xD8, dst_reg)); | |
62258278 AS |
892 | break; |
893 | ||
894 | case BPF_ALU | BPF_ADD | BPF_K: | |
895 | case BPF_ALU | BPF_SUB | BPF_K: | |
896 | case BPF_ALU | BPF_AND | BPF_K: | |
897 | case BPF_ALU | BPF_OR | BPF_K: | |
898 | case BPF_ALU | BPF_XOR | BPF_K: | |
899 | case BPF_ALU64 | BPF_ADD | BPF_K: | |
900 | case BPF_ALU64 | BPF_SUB | BPF_K: | |
901 | case BPF_ALU64 | BPF_AND | BPF_K: | |
902 | case BPF_ALU64 | BPF_OR | BPF_K: | |
903 | case BPF_ALU64 | BPF_XOR | BPF_K: | |
904 | if (BPF_CLASS(insn->code) == BPF_ALU64) | |
e430f34e AS |
905 | EMIT1(add_1mod(0x48, dst_reg)); |
906 | else if (is_ereg(dst_reg)) | |
907 | EMIT1(add_1mod(0x40, dst_reg)); | |
62258278 | 908 | |
a2c7a983 IM |
909 | /* |
910 | * b3 holds 'normal' opcode, b2 short form only valid | |
de0a444d DB |
911 | * in case dst is eax/rax. |
912 | */ | |
62258278 | 913 | switch (BPF_OP(insn->code)) { |
de0a444d DB |
914 | case BPF_ADD: |
915 | b3 = 0xC0; | |
916 | b2 = 0x05; | |
917 | break; | |
918 | case BPF_SUB: | |
919 | b3 = 0xE8; | |
920 | b2 = 0x2D; | |
921 | break; | |
922 | case BPF_AND: | |
923 | b3 = 0xE0; | |
924 | b2 = 0x25; | |
925 | break; | |
926 | case BPF_OR: | |
927 | b3 = 0xC8; | |
928 | b2 = 0x0D; | |
929 | break; | |
930 | case BPF_XOR: | |
931 | b3 = 0xF0; | |
932 | b2 = 0x35; | |
933 | break; | |
62258278 AS |
934 | } |
935 | ||
e430f34e AS |
936 | if (is_imm8(imm32)) |
937 | EMIT3(0x83, add_1reg(b3, dst_reg), imm32); | |
de0a444d DB |
938 | else if (is_axreg(dst_reg)) |
939 | EMIT1_off32(b2, imm32); | |
62258278 | 940 | else |
e430f34e | 941 | EMIT2_off32(0x81, add_1reg(b3, dst_reg), imm32); |
62258278 AS |
942 | break; |
943 | ||
944 | case BPF_ALU64 | BPF_MOV | BPF_K: | |
62258278 | 945 | case BPF_ALU | BPF_MOV | BPF_K: |
6fe8b9c1 DB |
946 | emit_mov_imm32(&prog, BPF_CLASS(insn->code) == BPF_ALU64, |
947 | dst_reg, imm32); | |
62258278 AS |
948 | break; |
949 | ||
02ab695b | 950 | case BPF_LD | BPF_IMM | BPF_DW: |
6fe8b9c1 | 951 | emit_mov_imm64(&prog, dst_reg, insn[1].imm, insn[0].imm); |
02ab695b AS |
952 | insn++; |
953 | i++; | |
954 | break; | |
955 | ||
e430f34e | 956 | /* dst %= src, dst /= src, dst %= imm32, dst /= imm32 */ |
62258278 AS |
957 | case BPF_ALU | BPF_MOD | BPF_X: |
958 | case BPF_ALU | BPF_DIV | BPF_X: | |
959 | case BPF_ALU | BPF_MOD | BPF_K: | |
960 | case BPF_ALU | BPF_DIV | BPF_K: | |
961 | case BPF_ALU64 | BPF_MOD | BPF_X: | |
962 | case BPF_ALU64 | BPF_DIV | BPF_X: | |
963 | case BPF_ALU64 | BPF_MOD | BPF_K: | |
964 | case BPF_ALU64 | BPF_DIV | BPF_K: | |
965 | EMIT1(0x50); /* push rax */ | |
966 | EMIT1(0x52); /* push rdx */ | |
967 | ||
968 | if (BPF_SRC(insn->code) == BPF_X) | |
e430f34e AS |
969 | /* mov r11, src_reg */ |
970 | EMIT_mov(AUX_REG, src_reg); | |
62258278 | 971 | else |
e430f34e AS |
972 | /* mov r11, imm32 */ |
973 | EMIT3_off32(0x49, 0xC7, 0xC3, imm32); | |
62258278 | 974 | |
e430f34e AS |
975 | /* mov rax, dst_reg */ |
976 | EMIT_mov(BPF_REG_0, dst_reg); | |
62258278 | 977 | |
a2c7a983 IM |
978 | /* |
979 | * xor edx, edx | |
62258278 AS |
980 | * equivalent to 'xor rdx, rdx', but one byte less |
981 | */ | |
982 | EMIT2(0x31, 0xd2); | |
983 | ||
62258278 AS |
984 | if (BPF_CLASS(insn->code) == BPF_ALU64) |
985 | /* div r11 */ | |
986 | EMIT3(0x49, 0xF7, 0xF3); | |
987 | else | |
988 | /* div r11d */ | |
989 | EMIT3(0x41, 0xF7, 0xF3); | |
990 | ||
991 | if (BPF_OP(insn->code) == BPF_MOD) | |
992 | /* mov r11, rdx */ | |
993 | EMIT3(0x49, 0x89, 0xD3); | |
994 | else | |
995 | /* mov r11, rax */ | |
996 | EMIT3(0x49, 0x89, 0xC3); | |
997 | ||
998 | EMIT1(0x5A); /* pop rdx */ | |
999 | EMIT1(0x58); /* pop rax */ | |
1000 | ||
e430f34e AS |
1001 | /* mov dst_reg, r11 */ |
1002 | EMIT_mov(dst_reg, AUX_REG); | |
62258278 AS |
1003 | break; |
1004 | ||
1005 | case BPF_ALU | BPF_MUL | BPF_K: | |
1006 | case BPF_ALU | BPF_MUL | BPF_X: | |
1007 | case BPF_ALU64 | BPF_MUL | BPF_K: | |
1008 | case BPF_ALU64 | BPF_MUL | BPF_X: | |
4c38e2f3 DB |
1009 | { |
1010 | bool is64 = BPF_CLASS(insn->code) == BPF_ALU64; | |
1011 | ||
d806a0cf DB |
1012 | if (dst_reg != BPF_REG_0) |
1013 | EMIT1(0x50); /* push rax */ | |
1014 | if (dst_reg != BPF_REG_3) | |
1015 | EMIT1(0x52); /* push rdx */ | |
62258278 | 1016 | |
e430f34e AS |
1017 | /* mov r11, dst_reg */ |
1018 | EMIT_mov(AUX_REG, dst_reg); | |
62258278 AS |
1019 | |
1020 | if (BPF_SRC(insn->code) == BPF_X) | |
4c38e2f3 | 1021 | emit_mov_reg(&prog, is64, BPF_REG_0, src_reg); |
62258278 | 1022 | else |
4c38e2f3 | 1023 | emit_mov_imm32(&prog, is64, BPF_REG_0, imm32); |
62258278 | 1024 | |
4c38e2f3 | 1025 | if (is64) |
62258278 AS |
1026 | EMIT1(add_1mod(0x48, AUX_REG)); |
1027 | else if (is_ereg(AUX_REG)) | |
1028 | EMIT1(add_1mod(0x40, AUX_REG)); | |
1029 | /* mul(q) r11 */ | |
1030 | EMIT2(0xF7, add_1reg(0xE0, AUX_REG)); | |
1031 | ||
d806a0cf DB |
1032 | if (dst_reg != BPF_REG_3) |
1033 | EMIT1(0x5A); /* pop rdx */ | |
1034 | if (dst_reg != BPF_REG_0) { | |
1035 | /* mov dst_reg, rax */ | |
1036 | EMIT_mov(dst_reg, BPF_REG_0); | |
1037 | EMIT1(0x58); /* pop rax */ | |
1038 | } | |
62258278 | 1039 | break; |
4c38e2f3 | 1040 | } |
a2c7a983 | 1041 | /* Shifts */ |
62258278 AS |
1042 | case BPF_ALU | BPF_LSH | BPF_K: |
1043 | case BPF_ALU | BPF_RSH | BPF_K: | |
1044 | case BPF_ALU | BPF_ARSH | BPF_K: | |
1045 | case BPF_ALU64 | BPF_LSH | BPF_K: | |
1046 | case BPF_ALU64 | BPF_RSH | BPF_K: | |
1047 | case BPF_ALU64 | BPF_ARSH | BPF_K: | |
1048 | if (BPF_CLASS(insn->code) == BPF_ALU64) | |
e430f34e AS |
1049 | EMIT1(add_1mod(0x48, dst_reg)); |
1050 | else if (is_ereg(dst_reg)) | |
1051 | EMIT1(add_1mod(0x40, dst_reg)); | |
62258278 AS |
1052 | |
1053 | switch (BPF_OP(insn->code)) { | |
1054 | case BPF_LSH: b3 = 0xE0; break; | |
1055 | case BPF_RSH: b3 = 0xE8; break; | |
1056 | case BPF_ARSH: b3 = 0xF8; break; | |
1057 | } | |
88e69a1f DB |
1058 | |
1059 | if (imm32 == 1) | |
1060 | EMIT2(0xD1, add_1reg(b3, dst_reg)); | |
1061 | else | |
1062 | EMIT3(0xC1, add_1reg(b3, dst_reg), imm32); | |
62258278 AS |
1063 | break; |
1064 | ||
72b603ee AS |
1065 | case BPF_ALU | BPF_LSH | BPF_X: |
1066 | case BPF_ALU | BPF_RSH | BPF_X: | |
1067 | case BPF_ALU | BPF_ARSH | BPF_X: | |
1068 | case BPF_ALU64 | BPF_LSH | BPF_X: | |
1069 | case BPF_ALU64 | BPF_RSH | BPF_X: | |
1070 | case BPF_ALU64 | BPF_ARSH | BPF_X: | |
1071 | ||
a2c7a983 | 1072 | /* Check for bad case when dst_reg == rcx */ |
72b603ee AS |
1073 | if (dst_reg == BPF_REG_4) { |
1074 | /* mov r11, dst_reg */ | |
1075 | EMIT_mov(AUX_REG, dst_reg); | |
1076 | dst_reg = AUX_REG; | |
1077 | } | |
1078 | ||
1079 | if (src_reg != BPF_REG_4) { /* common case */ | |
1080 | EMIT1(0x51); /* push rcx */ | |
1081 | ||
1082 | /* mov rcx, src_reg */ | |
1083 | EMIT_mov(BPF_REG_4, src_reg); | |
1084 | } | |
1085 | ||
1086 | /* shl %rax, %cl | shr %rax, %cl | sar %rax, %cl */ | |
1087 | if (BPF_CLASS(insn->code) == BPF_ALU64) | |
1088 | EMIT1(add_1mod(0x48, dst_reg)); | |
1089 | else if (is_ereg(dst_reg)) | |
1090 | EMIT1(add_1mod(0x40, dst_reg)); | |
1091 | ||
1092 | switch (BPF_OP(insn->code)) { | |
1093 | case BPF_LSH: b3 = 0xE0; break; | |
1094 | case BPF_RSH: b3 = 0xE8; break; | |
1095 | case BPF_ARSH: b3 = 0xF8; break; | |
1096 | } | |
1097 | EMIT2(0xD3, add_1reg(b3, dst_reg)); | |
1098 | ||
1099 | if (src_reg != BPF_REG_4) | |
1100 | EMIT1(0x59); /* pop rcx */ | |
1101 | ||
1102 | if (insn->dst_reg == BPF_REG_4) | |
1103 | /* mov dst_reg, r11 */ | |
1104 | EMIT_mov(insn->dst_reg, AUX_REG); | |
1105 | break; | |
1106 | ||
62258278 | 1107 | case BPF_ALU | BPF_END | BPF_FROM_BE: |
e430f34e | 1108 | switch (imm32) { |
62258278 | 1109 | case 16: |
a2c7a983 | 1110 | /* Emit 'ror %ax, 8' to swap lower 2 bytes */ |
62258278 | 1111 | EMIT1(0x66); |
e430f34e | 1112 | if (is_ereg(dst_reg)) |
62258278 | 1113 | EMIT1(0x41); |
e430f34e | 1114 | EMIT3(0xC1, add_1reg(0xC8, dst_reg), 8); |
343f845b | 1115 | |
a2c7a983 | 1116 | /* Emit 'movzwl eax, ax' */ |
343f845b AS |
1117 | if (is_ereg(dst_reg)) |
1118 | EMIT3(0x45, 0x0F, 0xB7); | |
1119 | else | |
1120 | EMIT2(0x0F, 0xB7); | |
1121 | EMIT1(add_2reg(0xC0, dst_reg, dst_reg)); | |
62258278 AS |
1122 | break; |
1123 | case 32: | |
a2c7a983 | 1124 | /* Emit 'bswap eax' to swap lower 4 bytes */ |
e430f34e | 1125 | if (is_ereg(dst_reg)) |
62258278 | 1126 | EMIT2(0x41, 0x0F); |
0a14842f | 1127 | else |
62258278 | 1128 | EMIT1(0x0F); |
e430f34e | 1129 | EMIT1(add_1reg(0xC8, dst_reg)); |
0a14842f | 1130 | break; |
62258278 | 1131 | case 64: |
a2c7a983 | 1132 | /* Emit 'bswap rax' to swap 8 bytes */ |
e430f34e AS |
1133 | EMIT3(add_1mod(0x48, dst_reg), 0x0F, |
1134 | add_1reg(0xC8, dst_reg)); | |
3b58908a ED |
1135 | break; |
1136 | } | |
62258278 AS |
1137 | break; |
1138 | ||
1139 | case BPF_ALU | BPF_END | BPF_FROM_LE: | |
343f845b AS |
1140 | switch (imm32) { |
1141 | case 16: | |
a2c7a983 IM |
1142 | /* |
1143 | * Emit 'movzwl eax, ax' to zero extend 16-bit | |
343f845b AS |
1144 | * into 64 bit |
1145 | */ | |
1146 | if (is_ereg(dst_reg)) | |
1147 | EMIT3(0x45, 0x0F, 0xB7); | |
1148 | else | |
1149 | EMIT2(0x0F, 0xB7); | |
1150 | EMIT1(add_2reg(0xC0, dst_reg, dst_reg)); | |
1151 | break; | |
1152 | case 32: | |
a2c7a983 | 1153 | /* Emit 'mov eax, eax' to clear upper 32-bits */ |
343f845b AS |
1154 | if (is_ereg(dst_reg)) |
1155 | EMIT1(0x45); | |
1156 | EMIT2(0x89, add_2reg(0xC0, dst_reg, dst_reg)); | |
1157 | break; | |
1158 | case 64: | |
1159 | /* nop */ | |
1160 | break; | |
1161 | } | |
62258278 AS |
1162 | break; |
1163 | ||
e430f34e | 1164 | /* ST: *(u8*)(dst_reg + off) = imm */ |
62258278 | 1165 | case BPF_ST | BPF_MEM | BPF_B: |
e430f34e | 1166 | if (is_ereg(dst_reg)) |
62258278 AS |
1167 | EMIT2(0x41, 0xC6); |
1168 | else | |
1169 | EMIT1(0xC6); | |
1170 | goto st; | |
1171 | case BPF_ST | BPF_MEM | BPF_H: | |
e430f34e | 1172 | if (is_ereg(dst_reg)) |
62258278 AS |
1173 | EMIT3(0x66, 0x41, 0xC7); |
1174 | else | |
1175 | EMIT2(0x66, 0xC7); | |
1176 | goto st; | |
1177 | case BPF_ST | BPF_MEM | BPF_W: | |
e430f34e | 1178 | if (is_ereg(dst_reg)) |
62258278 AS |
1179 | EMIT2(0x41, 0xC7); |
1180 | else | |
1181 | EMIT1(0xC7); | |
1182 | goto st; | |
1183 | case BPF_ST | BPF_MEM | BPF_DW: | |
e430f34e | 1184 | EMIT2(add_1mod(0x48, dst_reg), 0xC7); |
62258278 AS |
1185 | |
1186 | st: if (is_imm8(insn->off)) | |
e430f34e | 1187 | EMIT2(add_1reg(0x40, dst_reg), insn->off); |
62258278 | 1188 | else |
e430f34e | 1189 | EMIT1_off32(add_1reg(0x80, dst_reg), insn->off); |
62258278 | 1190 | |
e430f34e | 1191 | EMIT(imm32, bpf_size_to_x86_bytes(BPF_SIZE(insn->code))); |
62258278 AS |
1192 | break; |
1193 | ||
e430f34e | 1194 | /* STX: *(u8*)(dst_reg + off) = src_reg */ |
62258278 | 1195 | case BPF_STX | BPF_MEM | BPF_B: |
62258278 | 1196 | case BPF_STX | BPF_MEM | BPF_H: |
62258278 | 1197 | case BPF_STX | BPF_MEM | BPF_W: |
62258278 | 1198 | case BPF_STX | BPF_MEM | BPF_DW: |
3b2744e6 | 1199 | emit_stx(&prog, BPF_SIZE(insn->code), dst_reg, src_reg, insn->off); |
62258278 AS |
1200 | break; |
1201 | ||
e430f34e | 1202 | /* LDX: dst_reg = *(u8*)(src_reg + off) */ |
62258278 | 1203 | case BPF_LDX | BPF_MEM | BPF_B: |
3dec541b | 1204 | case BPF_LDX | BPF_PROBE_MEM | BPF_B: |
62258278 | 1205 | case BPF_LDX | BPF_MEM | BPF_H: |
3dec541b | 1206 | case BPF_LDX | BPF_PROBE_MEM | BPF_H: |
62258278 | 1207 | case BPF_LDX | BPF_MEM | BPF_W: |
3dec541b | 1208 | case BPF_LDX | BPF_PROBE_MEM | BPF_W: |
62258278 | 1209 | case BPF_LDX | BPF_MEM | BPF_DW: |
3dec541b | 1210 | case BPF_LDX | BPF_PROBE_MEM | BPF_DW: |
3b2744e6 | 1211 | emit_ldx(&prog, BPF_SIZE(insn->code), dst_reg, src_reg, insn->off); |
3dec541b AS |
1212 | if (BPF_MODE(insn->code) == BPF_PROBE_MEM) { |
1213 | struct exception_table_entry *ex; | |
1214 | u8 *_insn = image + proglen; | |
1215 | s64 delta; | |
1216 | ||
1217 | if (!bpf_prog->aux->extable) | |
1218 | break; | |
1219 | ||
1220 | if (excnt >= bpf_prog->aux->num_exentries) { | |
1221 | pr_err("ex gen bug\n"); | |
1222 | return -EFAULT; | |
1223 | } | |
1224 | ex = &bpf_prog->aux->extable[excnt++]; | |
1225 | ||
1226 | delta = _insn - (u8 *)&ex->insn; | |
1227 | if (!is_simm32(delta)) { | |
1228 | pr_err("extable->insn doesn't fit into 32-bit\n"); | |
1229 | return -EFAULT; | |
1230 | } | |
1231 | ex->insn = delta; | |
1232 | ||
1233 | delta = (u8 *)ex_handler_bpf - (u8 *)&ex->handler; | |
1234 | if (!is_simm32(delta)) { | |
1235 | pr_err("extable->handler doesn't fit into 32-bit\n"); | |
1236 | return -EFAULT; | |
1237 | } | |
1238 | ex->handler = delta; | |
1239 | ||
1240 | if (dst_reg > BPF_REG_9) { | |
1241 | pr_err("verifier error\n"); | |
1242 | return -EFAULT; | |
1243 | } | |
1244 | /* | |
1245 | * Compute size of x86 insn and its target dest x86 register. | |
1246 | * ex_handler_bpf() will use lower 8 bits to adjust | |
1247 | * pt_regs->ip to jump over this x86 instruction | |
1248 | * and upper bits to figure out which pt_regs to zero out. | |
1249 | * End result: x86 insn "mov rbx, qword ptr [rax+0x14]" | |
1250 | * of 4 bytes will be ignored and rbx will be zero inited. | |
1251 | */ | |
1252 | ex->fixup = (prog - temp) | (reg2pt_regs[dst_reg] << 8); | |
1253 | } | |
62258278 AS |
1254 | break; |
1255 | ||
e430f34e | 1256 | /* STX XADD: lock *(u32*)(dst_reg + off) += src_reg */ |
62258278 | 1257 | case BPF_STX | BPF_XADD | BPF_W: |
a2c7a983 | 1258 | /* Emit 'lock add dword ptr [rax + off], eax' */ |
e430f34e AS |
1259 | if (is_ereg(dst_reg) || is_ereg(src_reg)) |
1260 | EMIT3(0xF0, add_2mod(0x40, dst_reg, src_reg), 0x01); | |
62258278 AS |
1261 | else |
1262 | EMIT2(0xF0, 0x01); | |
1263 | goto xadd; | |
1264 | case BPF_STX | BPF_XADD | BPF_DW: | |
e430f34e | 1265 | EMIT3(0xF0, add_2mod(0x48, dst_reg, src_reg), 0x01); |
11c11d07 BJ |
1266 | xadd: |
1267 | emit_modrm_dstoff(&prog, dst_reg, src_reg, insn->off); | |
62258278 AS |
1268 | break; |
1269 | ||
1270 | /* call */ | |
1271 | case BPF_JMP | BPF_CALL: | |
e430f34e | 1272 | func = (u8 *) __bpf_call_base + imm32; |
ebf7d1f5 MF |
1273 | if (tail_call_reachable) { |
1274 | EMIT3_off32(0x48, 0x8B, 0x85, | |
1275 | -(bpf_prog->aux->stack_depth + 8)); | |
1276 | if (!imm32 || emit_call(&prog, func, image + addrs[i - 1] + 7)) | |
1277 | return -EINVAL; | |
1278 | } else { | |
1279 | if (!imm32 || emit_call(&prog, func, image + addrs[i - 1])) | |
1280 | return -EINVAL; | |
1281 | } | |
62258278 AS |
1282 | break; |
1283 | ||
71189fa9 | 1284 | case BPF_JMP | BPF_TAIL_CALL: |
428d5df1 DB |
1285 | if (imm32) |
1286 | emit_bpf_tail_call_direct(&bpf_prog->aux->poke_tab[imm32 - 1], | |
ebf7d1f5 MF |
1287 | &prog, addrs[i], image, |
1288 | callee_regs_used, | |
1289 | bpf_prog->aux->stack_depth); | |
428d5df1 | 1290 | else |
ebf7d1f5 MF |
1291 | emit_bpf_tail_call_indirect(&prog, |
1292 | callee_regs_used, | |
1293 | bpf_prog->aux->stack_depth); | |
b52f00e6 AS |
1294 | break; |
1295 | ||
62258278 AS |
1296 | /* cond jump */ |
1297 | case BPF_JMP | BPF_JEQ | BPF_X: | |
1298 | case BPF_JMP | BPF_JNE | BPF_X: | |
1299 | case BPF_JMP | BPF_JGT | BPF_X: | |
52afc51e | 1300 | case BPF_JMP | BPF_JLT | BPF_X: |
62258278 | 1301 | case BPF_JMP | BPF_JGE | BPF_X: |
52afc51e | 1302 | case BPF_JMP | BPF_JLE | BPF_X: |
62258278 | 1303 | case BPF_JMP | BPF_JSGT | BPF_X: |
52afc51e | 1304 | case BPF_JMP | BPF_JSLT | BPF_X: |
62258278 | 1305 | case BPF_JMP | BPF_JSGE | BPF_X: |
52afc51e | 1306 | case BPF_JMP | BPF_JSLE | BPF_X: |
3f5d6525 JW |
1307 | case BPF_JMP32 | BPF_JEQ | BPF_X: |
1308 | case BPF_JMP32 | BPF_JNE | BPF_X: | |
1309 | case BPF_JMP32 | BPF_JGT | BPF_X: | |
1310 | case BPF_JMP32 | BPF_JLT | BPF_X: | |
1311 | case BPF_JMP32 | BPF_JGE | BPF_X: | |
1312 | case BPF_JMP32 | BPF_JLE | BPF_X: | |
1313 | case BPF_JMP32 | BPF_JSGT | BPF_X: | |
1314 | case BPF_JMP32 | BPF_JSLT | BPF_X: | |
1315 | case BPF_JMP32 | BPF_JSGE | BPF_X: | |
1316 | case BPF_JMP32 | BPF_JSLE | BPF_X: | |
e430f34e | 1317 | /* cmp dst_reg, src_reg */ |
74007cfc BJ |
1318 | maybe_emit_mod(&prog, dst_reg, src_reg, |
1319 | BPF_CLASS(insn->code) == BPF_JMP); | |
3f5d6525 | 1320 | EMIT2(0x39, add_2reg(0xC0, dst_reg, src_reg)); |
62258278 AS |
1321 | goto emit_cond_jmp; |
1322 | ||
1323 | case BPF_JMP | BPF_JSET | BPF_X: | |
3f5d6525 | 1324 | case BPF_JMP32 | BPF_JSET | BPF_X: |
e430f34e | 1325 | /* test dst_reg, src_reg */ |
74007cfc BJ |
1326 | maybe_emit_mod(&prog, dst_reg, src_reg, |
1327 | BPF_CLASS(insn->code) == BPF_JMP); | |
3f5d6525 | 1328 | EMIT2(0x85, add_2reg(0xC0, dst_reg, src_reg)); |
62258278 AS |
1329 | goto emit_cond_jmp; |
1330 | ||
1331 | case BPF_JMP | BPF_JSET | BPF_K: | |
3f5d6525 | 1332 | case BPF_JMP32 | BPF_JSET | BPF_K: |
e430f34e | 1333 | /* test dst_reg, imm32 */ |
3f5d6525 JW |
1334 | if (BPF_CLASS(insn->code) == BPF_JMP) |
1335 | EMIT1(add_1mod(0x48, dst_reg)); | |
1336 | else if (is_ereg(dst_reg)) | |
1337 | EMIT1(add_1mod(0x40, dst_reg)); | |
e430f34e | 1338 | EMIT2_off32(0xF7, add_1reg(0xC0, dst_reg), imm32); |
62258278 AS |
1339 | goto emit_cond_jmp; |
1340 | ||
1341 | case BPF_JMP | BPF_JEQ | BPF_K: | |
1342 | case BPF_JMP | BPF_JNE | BPF_K: | |
1343 | case BPF_JMP | BPF_JGT | BPF_K: | |
52afc51e | 1344 | case BPF_JMP | BPF_JLT | BPF_K: |
62258278 | 1345 | case BPF_JMP | BPF_JGE | BPF_K: |
52afc51e | 1346 | case BPF_JMP | BPF_JLE | BPF_K: |
62258278 | 1347 | case BPF_JMP | BPF_JSGT | BPF_K: |
52afc51e | 1348 | case BPF_JMP | BPF_JSLT | BPF_K: |
62258278 | 1349 | case BPF_JMP | BPF_JSGE | BPF_K: |
52afc51e | 1350 | case BPF_JMP | BPF_JSLE | BPF_K: |
3f5d6525 JW |
1351 | case BPF_JMP32 | BPF_JEQ | BPF_K: |
1352 | case BPF_JMP32 | BPF_JNE | BPF_K: | |
1353 | case BPF_JMP32 | BPF_JGT | BPF_K: | |
1354 | case BPF_JMP32 | BPF_JLT | BPF_K: | |
1355 | case BPF_JMP32 | BPF_JGE | BPF_K: | |
1356 | case BPF_JMP32 | BPF_JLE | BPF_K: | |
1357 | case BPF_JMP32 | BPF_JSGT | BPF_K: | |
1358 | case BPF_JMP32 | BPF_JSLT | BPF_K: | |
1359 | case BPF_JMP32 | BPF_JSGE | BPF_K: | |
1360 | case BPF_JMP32 | BPF_JSLE | BPF_K: | |
38f51c07 DB |
1361 | /* test dst_reg, dst_reg to save one extra byte */ |
1362 | if (imm32 == 0) { | |
74007cfc BJ |
1363 | maybe_emit_mod(&prog, dst_reg, dst_reg, |
1364 | BPF_CLASS(insn->code) == BPF_JMP); | |
38f51c07 DB |
1365 | EMIT2(0x85, add_2reg(0xC0, dst_reg, dst_reg)); |
1366 | goto emit_cond_jmp; | |
1367 | } | |
1368 | ||
e430f34e | 1369 | /* cmp dst_reg, imm8/32 */ |
3f5d6525 JW |
1370 | if (BPF_CLASS(insn->code) == BPF_JMP) |
1371 | EMIT1(add_1mod(0x48, dst_reg)); | |
1372 | else if (is_ereg(dst_reg)) | |
1373 | EMIT1(add_1mod(0x40, dst_reg)); | |
62258278 | 1374 | |
e430f34e AS |
1375 | if (is_imm8(imm32)) |
1376 | EMIT3(0x83, add_1reg(0xF8, dst_reg), imm32); | |
62258278 | 1377 | else |
e430f34e | 1378 | EMIT2_off32(0x81, add_1reg(0xF8, dst_reg), imm32); |
62258278 | 1379 | |
a2c7a983 | 1380 | emit_cond_jmp: /* Convert BPF opcode to x86 */ |
62258278 AS |
1381 | switch (BPF_OP(insn->code)) { |
1382 | case BPF_JEQ: | |
1383 | jmp_cond = X86_JE; | |
1384 | break; | |
1385 | case BPF_JSET: | |
1386 | case BPF_JNE: | |
1387 | jmp_cond = X86_JNE; | |
1388 | break; | |
1389 | case BPF_JGT: | |
1390 | /* GT is unsigned '>', JA in x86 */ | |
1391 | jmp_cond = X86_JA; | |
1392 | break; | |
52afc51e DB |
1393 | case BPF_JLT: |
1394 | /* LT is unsigned '<', JB in x86 */ | |
1395 | jmp_cond = X86_JB; | |
1396 | break; | |
62258278 AS |
1397 | case BPF_JGE: |
1398 | /* GE is unsigned '>=', JAE in x86 */ | |
1399 | jmp_cond = X86_JAE; | |
1400 | break; | |
52afc51e DB |
1401 | case BPF_JLE: |
1402 | /* LE is unsigned '<=', JBE in x86 */ | |
1403 | jmp_cond = X86_JBE; | |
1404 | break; | |
62258278 | 1405 | case BPF_JSGT: |
a2c7a983 | 1406 | /* Signed '>', GT in x86 */ |
62258278 AS |
1407 | jmp_cond = X86_JG; |
1408 | break; | |
52afc51e | 1409 | case BPF_JSLT: |
a2c7a983 | 1410 | /* Signed '<', LT in x86 */ |
52afc51e DB |
1411 | jmp_cond = X86_JL; |
1412 | break; | |
62258278 | 1413 | case BPF_JSGE: |
a2c7a983 | 1414 | /* Signed '>=', GE in x86 */ |
62258278 AS |
1415 | jmp_cond = X86_JGE; |
1416 | break; | |
52afc51e | 1417 | case BPF_JSLE: |
a2c7a983 | 1418 | /* Signed '<=', LE in x86 */ |
52afc51e DB |
1419 | jmp_cond = X86_JLE; |
1420 | break; | |
a2c7a983 | 1421 | default: /* to silence GCC warning */ |
62258278 AS |
1422 | return -EFAULT; |
1423 | } | |
1424 | jmp_offset = addrs[i + insn->off] - addrs[i]; | |
1425 | if (is_imm8(jmp_offset)) { | |
1426 | EMIT2(jmp_cond, jmp_offset); | |
1427 | } else if (is_simm32(jmp_offset)) { | |
1428 | EMIT2_off32(0x0F, jmp_cond + 0x10, jmp_offset); | |
1429 | } else { | |
1430 | pr_err("cond_jmp gen bug %llx\n", jmp_offset); | |
1431 | return -EFAULT; | |
1432 | } | |
1433 | ||
1434 | break; | |
0a14842f | 1435 | |
62258278 | 1436 | case BPF_JMP | BPF_JA: |
1612a981 GB |
1437 | if (insn->off == -1) |
1438 | /* -1 jmp instructions will always jump | |
1439 | * backwards two bytes. Explicitly handling | |
1440 | * this case avoids wasting too many passes | |
1441 | * when there are long sequences of replaced | |
1442 | * dead code. | |
1443 | */ | |
1444 | jmp_offset = -2; | |
1445 | else | |
1446 | jmp_offset = addrs[i + insn->off] - addrs[i]; | |
1447 | ||
62258278 | 1448 | if (!jmp_offset) |
a2c7a983 | 1449 | /* Optimize out nop jumps */ |
62258278 AS |
1450 | break; |
1451 | emit_jmp: | |
1452 | if (is_imm8(jmp_offset)) { | |
1453 | EMIT2(0xEB, jmp_offset); | |
1454 | } else if (is_simm32(jmp_offset)) { | |
1455 | EMIT1_off32(0xE9, jmp_offset); | |
1456 | } else { | |
1457 | pr_err("jmp gen bug %llx\n", jmp_offset); | |
1458 | return -EFAULT; | |
1459 | } | |
1460 | break; | |
1461 | ||
62258278 | 1462 | case BPF_JMP | BPF_EXIT: |
769e0de6 | 1463 | if (seen_exit) { |
62258278 AS |
1464 | jmp_offset = ctx->cleanup_addr - addrs[i]; |
1465 | goto emit_jmp; | |
1466 | } | |
769e0de6 | 1467 | seen_exit = true; |
a2c7a983 | 1468 | /* Update cleanup_addr */ |
62258278 | 1469 | ctx->cleanup_addr = proglen; |
ebf7d1f5 | 1470 | pop_callee_regs(&prog, callee_regs_used); |
fe8d9571 AS |
1471 | EMIT1(0xC9); /* leave */ |
1472 | EMIT1(0xC3); /* ret */ | |
62258278 AS |
1473 | break; |
1474 | ||
f3c2af7b | 1475 | default: |
a2c7a983 IM |
1476 | /* |
1477 | * By design x86-64 JIT should support all BPF instructions. | |
62258278 | 1478 | * This error will be seen if new instruction was added |
a2c7a983 IM |
1479 | * to the interpreter, but not to the JIT, or if there is |
1480 | * junk in bpf_prog. | |
62258278 AS |
1481 | */ |
1482 | pr_err("bpf_jit: unknown opcode %02x\n", insn->code); | |
f3c2af7b AS |
1483 | return -EINVAL; |
1484 | } | |
62258278 | 1485 | |
f3c2af7b | 1486 | ilen = prog - temp; |
e0ee9c12 | 1487 | if (ilen > BPF_MAX_INSN_SIZE) { |
9383191d | 1488 | pr_err("bpf_jit: fatal insn size error\n"); |
e0ee9c12 AS |
1489 | return -EFAULT; |
1490 | } | |
1491 | ||
f3c2af7b AS |
1492 | if (image) { |
1493 | if (unlikely(proglen + ilen > oldproglen)) { | |
9383191d | 1494 | pr_err("bpf_jit: fatal error\n"); |
f3c2af7b | 1495 | return -EFAULT; |
0a14842f | 1496 | } |
f3c2af7b | 1497 | memcpy(image + proglen, temp, ilen); |
0a14842f | 1498 | } |
f3c2af7b AS |
1499 | proglen += ilen; |
1500 | addrs[i] = proglen; | |
1501 | prog = temp; | |
1502 | } | |
3dec541b AS |
1503 | |
1504 | if (image && excnt != bpf_prog->aux->num_exentries) { | |
1505 | pr_err("extable is not populated\n"); | |
1506 | return -EFAULT; | |
1507 | } | |
f3c2af7b AS |
1508 | return proglen; |
1509 | } | |
1510 | ||
85d33df3 | 1511 | static void save_regs(const struct btf_func_model *m, u8 **prog, int nr_args, |
fec56f58 AS |
1512 | int stack_size) |
1513 | { | |
1514 | int i; | |
1515 | /* Store function arguments to stack. | |
1516 | * For a function that accepts two pointers the sequence will be: | |
1517 | * mov QWORD PTR [rbp-0x10],rdi | |
1518 | * mov QWORD PTR [rbp-0x8],rsi | |
1519 | */ | |
1520 | for (i = 0; i < min(nr_args, 6); i++) | |
1521 | emit_stx(prog, bytes_to_bpf_size(m->arg_size[i]), | |
1522 | BPF_REG_FP, | |
1523 | i == 5 ? X86_REG_R9 : BPF_REG_1 + i, | |
1524 | -(stack_size - i * 8)); | |
1525 | } | |
1526 | ||
85d33df3 | 1527 | static void restore_regs(const struct btf_func_model *m, u8 **prog, int nr_args, |
fec56f58 AS |
1528 | int stack_size) |
1529 | { | |
1530 | int i; | |
1531 | ||
1532 | /* Restore function arguments from stack. | |
1533 | * For a function that accepts two pointers the sequence will be: | |
1534 | * EMIT4(0x48, 0x8B, 0x7D, 0xF0); mov rdi,QWORD PTR [rbp-0x10] | |
1535 | * EMIT4(0x48, 0x8B, 0x75, 0xF8); mov rsi,QWORD PTR [rbp-0x8] | |
1536 | */ | |
1537 | for (i = 0; i < min(nr_args, 6); i++) | |
1538 | emit_ldx(prog, bytes_to_bpf_size(m->arg_size[i]), | |
1539 | i == 5 ? X86_REG_R9 : BPF_REG_1 + i, | |
1540 | BPF_REG_FP, | |
1541 | -(stack_size - i * 8)); | |
1542 | } | |
1543 | ||
7e639208 | 1544 | static int invoke_bpf_prog(const struct btf_func_model *m, u8 **pprog, |
ae240823 | 1545 | struct bpf_prog *p, int stack_size, bool mod_ret) |
7e639208 KS |
1546 | { |
1547 | u8 *prog = *pprog; | |
1548 | int cnt = 0; | |
1549 | ||
1e6c62a8 AS |
1550 | if (p->aux->sleepable) { |
1551 | if (emit_call(&prog, __bpf_prog_enter_sleepable, prog)) | |
1552 | return -EINVAL; | |
1553 | } else { | |
1554 | if (emit_call(&prog, __bpf_prog_enter, prog)) | |
1555 | return -EINVAL; | |
1556 | /* remember prog start time returned by __bpf_prog_enter */ | |
1557 | emit_mov_reg(&prog, true, BPF_REG_6, BPF_REG_0); | |
1558 | } | |
7e639208 KS |
1559 | |
1560 | /* arg1: lea rdi, [rbp - stack_size] */ | |
1561 | EMIT4(0x48, 0x8D, 0x7D, -stack_size); | |
1562 | /* arg2: progs[i]->insnsi for interpreter */ | |
1563 | if (!p->jited) | |
1564 | emit_mov_imm64(&prog, BPF_REG_2, | |
1565 | (long) p->insnsi >> 32, | |
1566 | (u32) (long) p->insnsi); | |
1567 | /* call JITed bpf program or interpreter */ | |
1568 | if (emit_call(&prog, p->bpf_func, prog)) | |
1569 | return -EINVAL; | |
1570 | ||
ae240823 KS |
1571 | /* BPF_TRAMP_MODIFY_RETURN trampolines can modify the return |
1572 | * of the previous call which is then passed on the stack to | |
1573 | * the next BPF program. | |
1574 | */ | |
1575 | if (mod_ret) | |
1576 | emit_stx(&prog, BPF_DW, BPF_REG_FP, BPF_REG_0, -8); | |
1577 | ||
1e6c62a8 AS |
1578 | if (p->aux->sleepable) { |
1579 | if (emit_call(&prog, __bpf_prog_exit_sleepable, prog)) | |
1580 | return -EINVAL; | |
1581 | } else { | |
1582 | /* arg1: mov rdi, progs[i] */ | |
1583 | emit_mov_imm64(&prog, BPF_REG_1, (long) p >> 32, | |
1584 | (u32) (long) p); | |
1585 | /* arg2: mov rsi, rbx <- start time in nsec */ | |
1586 | emit_mov_reg(&prog, true, BPF_REG_2, BPF_REG_6); | |
1587 | if (emit_call(&prog, __bpf_prog_exit, prog)) | |
1588 | return -EINVAL; | |
1589 | } | |
7e639208 KS |
1590 | |
1591 | *pprog = prog; | |
1592 | return 0; | |
1593 | } | |
1594 | ||
1595 | static void emit_nops(u8 **pprog, unsigned int len) | |
1596 | { | |
1597 | unsigned int i, noplen; | |
1598 | u8 *prog = *pprog; | |
1599 | int cnt = 0; | |
1600 | ||
1601 | while (len > 0) { | |
1602 | noplen = len; | |
1603 | ||
1604 | if (noplen > ASM_NOP_MAX) | |
1605 | noplen = ASM_NOP_MAX; | |
1606 | ||
1607 | for (i = 0; i < noplen; i++) | |
1608 | EMIT1(ideal_nops[noplen][i]); | |
1609 | len -= noplen; | |
1610 | } | |
1611 | ||
1612 | *pprog = prog; | |
1613 | } | |
1614 | ||
1615 | static void emit_align(u8 **pprog, u32 align) | |
1616 | { | |
1617 | u8 *target, *prog = *pprog; | |
1618 | ||
1619 | target = PTR_ALIGN(prog, align); | |
1620 | if (target != prog) | |
1621 | emit_nops(&prog, target - prog); | |
1622 | ||
1623 | *pprog = prog; | |
1624 | } | |
1625 | ||
1626 | static int emit_cond_near_jump(u8 **pprog, void *func, void *ip, u8 jmp_cond) | |
1627 | { | |
1628 | u8 *prog = *pprog; | |
1629 | int cnt = 0; | |
1630 | s64 offset; | |
1631 | ||
1632 | offset = func - (ip + 2 + 4); | |
1633 | if (!is_simm32(offset)) { | |
1634 | pr_err("Target %p is out of range\n", func); | |
1635 | return -EINVAL; | |
1636 | } | |
1637 | EMIT2_off32(0x0F, jmp_cond + 0x10, offset); | |
1638 | *pprog = prog; | |
1639 | return 0; | |
1640 | } | |
1641 | ||
85d33df3 | 1642 | static int invoke_bpf(const struct btf_func_model *m, u8 **pprog, |
88fd9e53 | 1643 | struct bpf_tramp_progs *tp, int stack_size) |
fec56f58 | 1644 | { |
7e639208 | 1645 | int i; |
fec56f58 | 1646 | u8 *prog = *pprog; |
fec56f58 | 1647 | |
88fd9e53 | 1648 | for (i = 0; i < tp->nr_progs; i++) { |
ae240823 KS |
1649 | if (invoke_bpf_prog(m, &prog, tp->progs[i], stack_size, false)) |
1650 | return -EINVAL; | |
1651 | } | |
1652 | *pprog = prog; | |
1653 | return 0; | |
1654 | } | |
1655 | ||
1656 | static int invoke_bpf_mod_ret(const struct btf_func_model *m, u8 **pprog, | |
1657 | struct bpf_tramp_progs *tp, int stack_size, | |
1658 | u8 **branches) | |
1659 | { | |
1660 | u8 *prog = *pprog; | |
13fac1d8 | 1661 | int i, cnt = 0; |
ae240823 KS |
1662 | |
1663 | /* The first fmod_ret program will receive a garbage return value. | |
1664 | * Set this to 0 to avoid confusing the program. | |
1665 | */ | |
1666 | emit_mov_imm32(&prog, false, BPF_REG_0, 0); | |
1667 | emit_stx(&prog, BPF_DW, BPF_REG_FP, BPF_REG_0, -8); | |
1668 | for (i = 0; i < tp->nr_progs; i++) { | |
1669 | if (invoke_bpf_prog(m, &prog, tp->progs[i], stack_size, true)) | |
fec56f58 | 1670 | return -EINVAL; |
ae240823 | 1671 | |
13fac1d8 AS |
1672 | /* mod_ret prog stored return value into [rbp - 8]. Emit: |
1673 | * if (*(u64 *)(rbp - 8) != 0) | |
ae240823 | 1674 | * goto do_fexit; |
ae240823 | 1675 | */ |
13fac1d8 AS |
1676 | /* cmp QWORD PTR [rbp - 0x8], 0x0 */ |
1677 | EMIT4(0x48, 0x83, 0x7d, 0xf8); EMIT1(0x00); | |
ae240823 KS |
1678 | |
1679 | /* Save the location of the branch and Generate 6 nops | |
1680 | * (4 bytes for an offset and 2 bytes for the jump) These nops | |
1681 | * are replaced with a conditional jump once do_fexit (i.e. the | |
1682 | * start of the fexit invocation) is finalized. | |
1683 | */ | |
1684 | branches[i] = prog; | |
1685 | emit_nops(&prog, 4 + 2); | |
fec56f58 | 1686 | } |
ae240823 | 1687 | |
fec56f58 AS |
1688 | *pprog = prog; |
1689 | return 0; | |
1690 | } | |
1691 | ||
1692 | /* Example: | |
1693 | * __be16 eth_type_trans(struct sk_buff *skb, struct net_device *dev); | |
1694 | * its 'struct btf_func_model' will be nr_args=2 | |
1695 | * The assembly code when eth_type_trans is executing after trampoline: | |
1696 | * | |
1697 | * push rbp | |
1698 | * mov rbp, rsp | |
1699 | * sub rsp, 16 // space for skb and dev | |
1700 | * push rbx // temp regs to pass start time | |
1701 | * mov qword ptr [rbp - 16], rdi // save skb pointer to stack | |
1702 | * mov qword ptr [rbp - 8], rsi // save dev pointer to stack | |
1703 | * call __bpf_prog_enter // rcu_read_lock and preempt_disable | |
1704 | * mov rbx, rax // remember start time in bpf stats are enabled | |
1705 | * lea rdi, [rbp - 16] // R1==ctx of bpf prog | |
1706 | * call addr_of_jited_FENTRY_prog | |
1707 | * movabsq rdi, 64bit_addr_of_struct_bpf_prog // unused if bpf stats are off | |
1708 | * mov rsi, rbx // prog start time | |
1709 | * call __bpf_prog_exit // rcu_read_unlock, preempt_enable and stats math | |
1710 | * mov rdi, qword ptr [rbp - 16] // restore skb pointer from stack | |
1711 | * mov rsi, qword ptr [rbp - 8] // restore dev pointer from stack | |
1712 | * pop rbx | |
1713 | * leave | |
1714 | * ret | |
1715 | * | |
1716 | * eth_type_trans has 5 byte nop at the beginning. These 5 bytes will be | |
1717 | * replaced with 'call generated_bpf_trampoline'. When it returns | |
1718 | * eth_type_trans will continue executing with original skb and dev pointers. | |
1719 | * | |
1720 | * The assembly code when eth_type_trans is called from trampoline: | |
1721 | * | |
1722 | * push rbp | |
1723 | * mov rbp, rsp | |
1724 | * sub rsp, 24 // space for skb, dev, return value | |
1725 | * push rbx // temp regs to pass start time | |
1726 | * mov qword ptr [rbp - 24], rdi // save skb pointer to stack | |
1727 | * mov qword ptr [rbp - 16], rsi // save dev pointer to stack | |
1728 | * call __bpf_prog_enter // rcu_read_lock and preempt_disable | |
1729 | * mov rbx, rax // remember start time if bpf stats are enabled | |
1730 | * lea rdi, [rbp - 24] // R1==ctx of bpf prog | |
1731 | * call addr_of_jited_FENTRY_prog // bpf prog can access skb and dev | |
1732 | * movabsq rdi, 64bit_addr_of_struct_bpf_prog // unused if bpf stats are off | |
1733 | * mov rsi, rbx // prog start time | |
1734 | * call __bpf_prog_exit // rcu_read_unlock, preempt_enable and stats math | |
1735 | * mov rdi, qword ptr [rbp - 24] // restore skb pointer from stack | |
1736 | * mov rsi, qword ptr [rbp - 16] // restore dev pointer from stack | |
1737 | * call eth_type_trans+5 // execute body of eth_type_trans | |
1738 | * mov qword ptr [rbp - 8], rax // save return value | |
1739 | * call __bpf_prog_enter // rcu_read_lock and preempt_disable | |
1740 | * mov rbx, rax // remember start time in bpf stats are enabled | |
1741 | * lea rdi, [rbp - 24] // R1==ctx of bpf prog | |
1742 | * call addr_of_jited_FEXIT_prog // bpf prog can access skb, dev, return value | |
1743 | * movabsq rdi, 64bit_addr_of_struct_bpf_prog // unused if bpf stats are off | |
1744 | * mov rsi, rbx // prog start time | |
1745 | * call __bpf_prog_exit // rcu_read_unlock, preempt_enable and stats math | |
1746 | * mov rax, qword ptr [rbp - 8] // restore eth_type_trans's return value | |
1747 | * pop rbx | |
1748 | * leave | |
1749 | * add rsp, 8 // skip eth_type_trans's frame | |
1750 | * ret // return to its caller | |
1751 | */ | |
85d33df3 MKL |
1752 | int arch_prepare_bpf_trampoline(void *image, void *image_end, |
1753 | const struct btf_func_model *m, u32 flags, | |
88fd9e53 | 1754 | struct bpf_tramp_progs *tprogs, |
fec56f58 AS |
1755 | void *orig_call) |
1756 | { | |
ae240823 | 1757 | int ret, i, cnt = 0, nr_args = m->nr_args; |
fec56f58 | 1758 | int stack_size = nr_args * 8; |
88fd9e53 KS |
1759 | struct bpf_tramp_progs *fentry = &tprogs[BPF_TRAMP_FENTRY]; |
1760 | struct bpf_tramp_progs *fexit = &tprogs[BPF_TRAMP_FEXIT]; | |
ae240823 KS |
1761 | struct bpf_tramp_progs *fmod_ret = &tprogs[BPF_TRAMP_MODIFY_RETURN]; |
1762 | u8 **branches = NULL; | |
fec56f58 AS |
1763 | u8 *prog; |
1764 | ||
1765 | /* x86-64 supports up to 6 arguments. 7+ can be added in the future */ | |
1766 | if (nr_args > 6) | |
1767 | return -ENOTSUPP; | |
1768 | ||
1769 | if ((flags & BPF_TRAMP_F_RESTORE_REGS) && | |
1770 | (flags & BPF_TRAMP_F_SKIP_FRAME)) | |
1771 | return -EINVAL; | |
1772 | ||
1773 | if (flags & BPF_TRAMP_F_CALL_ORIG) | |
1774 | stack_size += 8; /* room for return value of orig_call */ | |
1775 | ||
1776 | if (flags & BPF_TRAMP_F_SKIP_FRAME) | |
1777 | /* skip patched call instruction and point orig_call to actual | |
1778 | * body of the kernel function. | |
1779 | */ | |
4b3da77b | 1780 | orig_call += X86_PATCH_SIZE; |
fec56f58 AS |
1781 | |
1782 | prog = image; | |
1783 | ||
1784 | EMIT1(0x55); /* push rbp */ | |
1785 | EMIT3(0x48, 0x89, 0xE5); /* mov rbp, rsp */ | |
1786 | EMIT4(0x48, 0x83, 0xEC, stack_size); /* sub rsp, stack_size */ | |
1787 | EMIT1(0x53); /* push rbx */ | |
1788 | ||
1789 | save_regs(m, &prog, nr_args, stack_size); | |
1790 | ||
88fd9e53 KS |
1791 | if (fentry->nr_progs) |
1792 | if (invoke_bpf(m, &prog, fentry, stack_size)) | |
fec56f58 AS |
1793 | return -EINVAL; |
1794 | ||
ae240823 KS |
1795 | if (fmod_ret->nr_progs) { |
1796 | branches = kcalloc(fmod_ret->nr_progs, sizeof(u8 *), | |
1797 | GFP_KERNEL); | |
1798 | if (!branches) | |
1799 | return -ENOMEM; | |
1800 | ||
1801 | if (invoke_bpf_mod_ret(m, &prog, fmod_ret, stack_size, | |
1802 | branches)) { | |
1803 | ret = -EINVAL; | |
1804 | goto cleanup; | |
1805 | } | |
1806 | } | |
1807 | ||
fec56f58 | 1808 | if (flags & BPF_TRAMP_F_CALL_ORIG) { |
ae240823 | 1809 | if (fentry->nr_progs || fmod_ret->nr_progs) |
fec56f58 AS |
1810 | restore_regs(m, &prog, nr_args, stack_size); |
1811 | ||
1812 | /* call original function */ | |
ae240823 KS |
1813 | if (emit_call(&prog, orig_call, prog)) { |
1814 | ret = -EINVAL; | |
1815 | goto cleanup; | |
1816 | } | |
fec56f58 AS |
1817 | /* remember return value in a stack for bpf prog to access */ |
1818 | emit_stx(&prog, BPF_DW, BPF_REG_FP, BPF_REG_0, -8); | |
1819 | } | |
1820 | ||
ae240823 KS |
1821 | if (fmod_ret->nr_progs) { |
1822 | /* From Intel 64 and IA-32 Architectures Optimization | |
1823 | * Reference Manual, 3.4.1.4 Code Alignment, Assembly/Compiler | |
1824 | * Coding Rule 11: All branch targets should be 16-byte | |
1825 | * aligned. | |
1826 | */ | |
1827 | emit_align(&prog, 16); | |
1828 | /* Update the branches saved in invoke_bpf_mod_ret with the | |
1829 | * aligned address of do_fexit. | |
1830 | */ | |
1831 | for (i = 0; i < fmod_ret->nr_progs; i++) | |
1832 | emit_cond_near_jump(&branches[i], prog, branches[i], | |
1833 | X86_JNE); | |
1834 | } | |
1835 | ||
88fd9e53 | 1836 | if (fexit->nr_progs) |
ae240823 KS |
1837 | if (invoke_bpf(m, &prog, fexit, stack_size)) { |
1838 | ret = -EINVAL; | |
1839 | goto cleanup; | |
1840 | } | |
fec56f58 AS |
1841 | |
1842 | if (flags & BPF_TRAMP_F_RESTORE_REGS) | |
1843 | restore_regs(m, &prog, nr_args, stack_size); | |
1844 | ||
ae240823 KS |
1845 | /* This needs to be done regardless. If there were fmod_ret programs, |
1846 | * the return value is only updated on the stack and still needs to be | |
1847 | * restored to R0. | |
1848 | */ | |
fec56f58 AS |
1849 | if (flags & BPF_TRAMP_F_CALL_ORIG) |
1850 | /* restore original return value back into RAX */ | |
1851 | emit_ldx(&prog, BPF_DW, BPF_REG_0, BPF_REG_FP, -8); | |
1852 | ||
1853 | EMIT1(0x5B); /* pop rbx */ | |
1854 | EMIT1(0xC9); /* leave */ | |
1855 | if (flags & BPF_TRAMP_F_SKIP_FRAME) | |
1856 | /* skip our return address and return to parent */ | |
1857 | EMIT4(0x48, 0x83, 0xC4, 8); /* add rsp, 8 */ | |
1858 | EMIT1(0xC3); /* ret */ | |
85d33df3 | 1859 | /* Make sure the trampoline generation logic doesn't overflow */ |
ae240823 KS |
1860 | if (WARN_ON_ONCE(prog > (u8 *)image_end - BPF_INSN_SAFETY)) { |
1861 | ret = -EFAULT; | |
1862 | goto cleanup; | |
1863 | } | |
1864 | ret = prog - (u8 *)image; | |
1865 | ||
1866 | cleanup: | |
1867 | kfree(branches); | |
1868 | return ret; | |
fec56f58 AS |
1869 | } |
1870 | ||
75ccbef6 BT |
1871 | static int emit_fallback_jump(u8 **pprog) |
1872 | { | |
1873 | u8 *prog = *pprog; | |
1874 | int err = 0; | |
1875 | ||
1876 | #ifdef CONFIG_RETPOLINE | |
1877 | /* Note that this assumes the the compiler uses external | |
1878 | * thunks for indirect calls. Both clang and GCC use the same | |
1879 | * naming convention for external thunks. | |
1880 | */ | |
1881 | err = emit_jump(&prog, __x86_indirect_thunk_rdx, prog); | |
1882 | #else | |
1883 | int cnt = 0; | |
1884 | ||
1885 | EMIT2(0xFF, 0xE2); /* jmp rdx */ | |
1886 | #endif | |
1887 | *pprog = prog; | |
1888 | return err; | |
1889 | } | |
1890 | ||
1891 | static int emit_bpf_dispatcher(u8 **pprog, int a, int b, s64 *progs) | |
1892 | { | |
7e639208 | 1893 | u8 *jg_reloc, *prog = *pprog; |
75ccbef6 | 1894 | int pivot, err, jg_bytes = 1, cnt = 0; |
75ccbef6 BT |
1895 | s64 jg_offset; |
1896 | ||
1897 | if (a == b) { | |
1898 | /* Leaf node of recursion, i.e. not a range of indices | |
1899 | * anymore. | |
1900 | */ | |
1901 | EMIT1(add_1mod(0x48, BPF_REG_3)); /* cmp rdx,func */ | |
1902 | if (!is_simm32(progs[a])) | |
1903 | return -1; | |
1904 | EMIT2_off32(0x81, add_1reg(0xF8, BPF_REG_3), | |
1905 | progs[a]); | |
1906 | err = emit_cond_near_jump(&prog, /* je func */ | |
1907 | (void *)progs[a], prog, | |
1908 | X86_JE); | |
1909 | if (err) | |
1910 | return err; | |
1911 | ||
1912 | err = emit_fallback_jump(&prog); /* jmp thunk/indirect */ | |
1913 | if (err) | |
1914 | return err; | |
1915 | ||
1916 | *pprog = prog; | |
1917 | return 0; | |
1918 | } | |
1919 | ||
1920 | /* Not a leaf node, so we pivot, and recursively descend into | |
1921 | * the lower and upper ranges. | |
1922 | */ | |
1923 | pivot = (b - a) / 2; | |
1924 | EMIT1(add_1mod(0x48, BPF_REG_3)); /* cmp rdx,func */ | |
1925 | if (!is_simm32(progs[a + pivot])) | |
1926 | return -1; | |
1927 | EMIT2_off32(0x81, add_1reg(0xF8, BPF_REG_3), progs[a + pivot]); | |
1928 | ||
1929 | if (pivot > 2) { /* jg upper_part */ | |
1930 | /* Require near jump. */ | |
1931 | jg_bytes = 4; | |
1932 | EMIT2_off32(0x0F, X86_JG + 0x10, 0); | |
1933 | } else { | |
1934 | EMIT2(X86_JG, 0); | |
1935 | } | |
1936 | jg_reloc = prog; | |
1937 | ||
1938 | err = emit_bpf_dispatcher(&prog, a, a + pivot, /* emit lower_part */ | |
1939 | progs); | |
1940 | if (err) | |
1941 | return err; | |
1942 | ||
116eb788 BT |
1943 | /* From Intel 64 and IA-32 Architectures Optimization |
1944 | * Reference Manual, 3.4.1.4 Code Alignment, Assembly/Compiler | |
1945 | * Coding Rule 11: All branch targets should be 16-byte | |
1946 | * aligned. | |
1947 | */ | |
7e639208 | 1948 | emit_align(&prog, 16); |
75ccbef6 BT |
1949 | jg_offset = prog - jg_reloc; |
1950 | emit_code(jg_reloc - jg_bytes, jg_offset, jg_bytes); | |
1951 | ||
1952 | err = emit_bpf_dispatcher(&prog, a + pivot + 1, /* emit upper_part */ | |
1953 | b, progs); | |
1954 | if (err) | |
1955 | return err; | |
1956 | ||
1957 | *pprog = prog; | |
1958 | return 0; | |
1959 | } | |
1960 | ||
1961 | static int cmp_ips(const void *a, const void *b) | |
1962 | { | |
1963 | const s64 *ipa = a; | |
1964 | const s64 *ipb = b; | |
1965 | ||
1966 | if (*ipa > *ipb) | |
1967 | return 1; | |
1968 | if (*ipa < *ipb) | |
1969 | return -1; | |
1970 | return 0; | |
1971 | } | |
1972 | ||
1973 | int arch_prepare_bpf_dispatcher(void *image, s64 *funcs, int num_funcs) | |
1974 | { | |
1975 | u8 *prog = image; | |
1976 | ||
1977 | sort(funcs, num_funcs, sizeof(funcs[0]), cmp_ips, NULL); | |
1978 | return emit_bpf_dispatcher(&prog, 0, num_funcs - 1, funcs); | |
1979 | } | |
1980 | ||
1c2a088a AS |
1981 | struct x64_jit_data { |
1982 | struct bpf_binary_header *header; | |
1983 | int *addrs; | |
1984 | u8 *image; | |
1985 | int proglen; | |
1986 | struct jit_context ctx; | |
1987 | }; | |
1988 | ||
d1c55ab5 | 1989 | struct bpf_prog *bpf_int_jit_compile(struct bpf_prog *prog) |
f3c2af7b AS |
1990 | { |
1991 | struct bpf_binary_header *header = NULL; | |
959a7579 | 1992 | struct bpf_prog *tmp, *orig_prog = prog; |
1c2a088a | 1993 | struct x64_jit_data *jit_data; |
f3c2af7b AS |
1994 | int proglen, oldproglen = 0; |
1995 | struct jit_context ctx = {}; | |
959a7579 | 1996 | bool tmp_blinded = false; |
1c2a088a | 1997 | bool extra_pass = false; |
f3c2af7b AS |
1998 | u8 *image = NULL; |
1999 | int *addrs; | |
2000 | int pass; | |
2001 | int i; | |
2002 | ||
60b58afc | 2003 | if (!prog->jit_requested) |
959a7579 DB |
2004 | return orig_prog; |
2005 | ||
2006 | tmp = bpf_jit_blind_constants(prog); | |
a2c7a983 IM |
2007 | /* |
2008 | * If blinding was requested and we failed during blinding, | |
959a7579 DB |
2009 | * we must fall back to the interpreter. |
2010 | */ | |
2011 | if (IS_ERR(tmp)) | |
2012 | return orig_prog; | |
2013 | if (tmp != prog) { | |
2014 | tmp_blinded = true; | |
2015 | prog = tmp; | |
2016 | } | |
0a14842f | 2017 | |
1c2a088a AS |
2018 | jit_data = prog->aux->jit_data; |
2019 | if (!jit_data) { | |
2020 | jit_data = kzalloc(sizeof(*jit_data), GFP_KERNEL); | |
2021 | if (!jit_data) { | |
2022 | prog = orig_prog; | |
2023 | goto out; | |
2024 | } | |
2025 | prog->aux->jit_data = jit_data; | |
2026 | } | |
2027 | addrs = jit_data->addrs; | |
2028 | if (addrs) { | |
2029 | ctx = jit_data->ctx; | |
2030 | oldproglen = jit_data->proglen; | |
2031 | image = jit_data->image; | |
2032 | header = jit_data->header; | |
2033 | extra_pass = true; | |
2034 | goto skip_init_addrs; | |
2035 | } | |
7c2e988f | 2036 | addrs = kmalloc_array(prog->len + 1, sizeof(*addrs), GFP_KERNEL); |
959a7579 DB |
2037 | if (!addrs) { |
2038 | prog = orig_prog; | |
1c2a088a | 2039 | goto out_addrs; |
959a7579 | 2040 | } |
f3c2af7b | 2041 | |
a2c7a983 IM |
2042 | /* |
2043 | * Before first pass, make a rough estimation of addrs[] | |
2044 | * each BPF instruction is translated to less than 64 bytes | |
f3c2af7b | 2045 | */ |
7c2e988f | 2046 | for (proglen = 0, i = 0; i <= prog->len; i++) { |
f3c2af7b AS |
2047 | proglen += 64; |
2048 | addrs[i] = proglen; | |
2049 | } | |
2050 | ctx.cleanup_addr = proglen; | |
1c2a088a | 2051 | skip_init_addrs: |
f3c2af7b | 2052 | |
a2c7a983 IM |
2053 | /* |
2054 | * JITed image shrinks with every pass and the loop iterates | |
2055 | * until the image stops shrinking. Very large BPF programs | |
3f7352bf | 2056 | * may converge on the last pass. In such case do one more |
a2c7a983 | 2057 | * pass to emit the final image. |
3f7352bf | 2058 | */ |
6007b080 | 2059 | for (pass = 0; pass < 20 || image; pass++) { |
f3c2af7b AS |
2060 | proglen = do_jit(prog, addrs, image, oldproglen, &ctx); |
2061 | if (proglen <= 0) { | |
3aab8884 | 2062 | out_image: |
f3c2af7b AS |
2063 | image = NULL; |
2064 | if (header) | |
738cbe72 | 2065 | bpf_jit_binary_free(header); |
959a7579 DB |
2066 | prog = orig_prog; |
2067 | goto out_addrs; | |
f3c2af7b | 2068 | } |
0a14842f | 2069 | if (image) { |
e0ee9c12 | 2070 | if (proglen != oldproglen) { |
f3c2af7b AS |
2071 | pr_err("bpf_jit: proglen=%d != oldproglen=%d\n", |
2072 | proglen, oldproglen); | |
3aab8884 | 2073 | goto out_image; |
e0ee9c12 | 2074 | } |
0a14842f ED |
2075 | break; |
2076 | } | |
2077 | if (proglen == oldproglen) { | |
3dec541b AS |
2078 | /* |
2079 | * The number of entries in extable is the number of BPF_LDX | |
2080 | * insns that access kernel memory via "pointer to BTF type". | |
2081 | * The verifier changed their opcode from LDX|MEM|size | |
2082 | * to LDX|PROBE_MEM|size to make JITing easier. | |
2083 | */ | |
2084 | u32 align = __alignof__(struct exception_table_entry); | |
2085 | u32 extable_size = prog->aux->num_exentries * | |
2086 | sizeof(struct exception_table_entry); | |
2087 | ||
2088 | /* allocate module memory for x86 insns and extable */ | |
2089 | header = bpf_jit_binary_alloc(roundup(proglen, align) + extable_size, | |
2090 | &image, align, jit_fill_hole); | |
959a7579 DB |
2091 | if (!header) { |
2092 | prog = orig_prog; | |
2093 | goto out_addrs; | |
2094 | } | |
3dec541b | 2095 | prog->aux->extable = (void *) image + roundup(proglen, align); |
0a14842f ED |
2096 | } |
2097 | oldproglen = proglen; | |
6007b080 | 2098 | cond_resched(); |
0a14842f | 2099 | } |
79617801 | 2100 | |
0a14842f | 2101 | if (bpf_jit_enable > 1) |
485d6511 | 2102 | bpf_jit_dump(prog->len, proglen, pass + 1, image); |
0a14842f ED |
2103 | |
2104 | if (image) { | |
1c2a088a | 2105 | if (!prog->is_func || extra_pass) { |
428d5df1 | 2106 | bpf_tail_call_direct_fixup(prog); |
1c2a088a AS |
2107 | bpf_jit_binary_lock_ro(header); |
2108 | } else { | |
2109 | jit_data->addrs = addrs; | |
2110 | jit_data->ctx = ctx; | |
2111 | jit_data->proglen = proglen; | |
2112 | jit_data->image = image; | |
2113 | jit_data->header = header; | |
2114 | } | |
f3c2af7b | 2115 | prog->bpf_func = (void *)image; |
a91263d5 | 2116 | prog->jited = 1; |
783d28dd | 2117 | prog->jited_len = proglen; |
9d5ecb09 DB |
2118 | } else { |
2119 | prog = orig_prog; | |
0a14842f | 2120 | } |
959a7579 | 2121 | |
39f56ca9 | 2122 | if (!image || !prog->is_func || extra_pass) { |
c454a46b | 2123 | if (image) |
7c2e988f | 2124 | bpf_prog_fill_jited_linfo(prog, addrs + 1); |
959a7579 | 2125 | out_addrs: |
1c2a088a AS |
2126 | kfree(addrs); |
2127 | kfree(jit_data); | |
2128 | prog->aux->jit_data = NULL; | |
2129 | } | |
959a7579 DB |
2130 | out: |
2131 | if (tmp_blinded) | |
2132 | bpf_jit_prog_release_other(prog, prog == orig_prog ? | |
2133 | tmp : orig_prog); | |
d1c55ab5 | 2134 | return prog; |
0a14842f | 2135 | } |