Merge tag 'usb-4.12-rc1' of git://git.kernel.org/pub/scm/linux/kernel/git/gregkh/usb
[linux-2.6-block.git] / arch / x86 / net / bpf_jit_comp.c
CommitLineData
0a14842f
ED
1/* bpf_jit_comp.c : BPF JIT compiler
2 *
3b58908a 3 * Copyright (C) 2011-2013 Eric Dumazet (eric.dumazet@gmail.com)
62258278 4 * Internal BPF Copyright (c) 2011-2014 PLUMgrid, http://plumgrid.com
0a14842f
ED
5 *
6 * This program is free software; you can redistribute it and/or
7 * modify it under the terms of the GNU General Public License
8 * as published by the Free Software Foundation; version 2
9 * of the License.
10 */
0a14842f
ED
11#include <linux/netdevice.h>
12#include <linux/filter.h>
855ddb56 13#include <linux/if_vlan.h>
738cbe72 14#include <asm/cacheflush.h>
b52f00e6 15#include <linux/bpf.h>
0a14842f 16
0a14842f
ED
17int bpf_jit_enable __read_mostly;
18
19/*
20 * assembly code in arch/x86/net/bpf_jit.S
21 */
62258278 22extern u8 sk_load_word[], sk_load_half[], sk_load_byte[];
a998d434 23extern u8 sk_load_word_positive_offset[], sk_load_half_positive_offset[];
62258278 24extern u8 sk_load_byte_positive_offset[];
a998d434 25extern u8 sk_load_word_negative_offset[], sk_load_half_negative_offset[];
62258278 26extern u8 sk_load_byte_negative_offset[];
0a14842f 27
5cccc702 28static u8 *emit_code(u8 *ptr, u32 bytes, unsigned int len)
0a14842f
ED
29{
30 if (len == 1)
31 *ptr = bytes;
32 else if (len == 2)
33 *(u16 *)ptr = bytes;
34 else {
35 *(u32 *)ptr = bytes;
36 barrier();
37 }
38 return ptr + len;
39}
40
b52f00e6
AS
41#define EMIT(bytes, len) \
42 do { prog = emit_code(prog, bytes, len); cnt += len; } while (0)
0a14842f
ED
43
44#define EMIT1(b1) EMIT(b1, 1)
45#define EMIT2(b1, b2) EMIT((b1) + ((b2) << 8), 2)
46#define EMIT3(b1, b2, b3) EMIT((b1) + ((b2) << 8) + ((b3) << 16), 3)
47#define EMIT4(b1, b2, b3, b4) EMIT((b1) + ((b2) << 8) + ((b3) << 16) + ((b4) << 24), 4)
62258278
AS
48#define EMIT1_off32(b1, off) \
49 do {EMIT1(b1); EMIT(off, 4); } while (0)
50#define EMIT2_off32(b1, b2, off) \
51 do {EMIT2(b1, b2); EMIT(off, 4); } while (0)
52#define EMIT3_off32(b1, b2, b3, off) \
53 do {EMIT3(b1, b2, b3); EMIT(off, 4); } while (0)
54#define EMIT4_off32(b1, b2, b3, b4, off) \
55 do {EMIT4(b1, b2, b3, b4); EMIT(off, 4); } while (0)
0a14842f 56
5cccc702 57static bool is_imm8(int value)
0a14842f
ED
58{
59 return value <= 127 && value >= -128;
60}
61
5cccc702 62static bool is_simm32(s64 value)
0a14842f 63{
62258278 64 return value == (s64) (s32) value;
0a14842f
ED
65}
66
e430f34e
AS
67/* mov dst, src */
68#define EMIT_mov(DST, SRC) \
69 do {if (DST != SRC) \
70 EMIT3(add_2mod(0x48, DST, SRC), 0x89, add_2reg(0xC0, DST, SRC)); \
62258278
AS
71 } while (0)
72
73static int bpf_size_to_x86_bytes(int bpf_size)
74{
75 if (bpf_size == BPF_W)
76 return 4;
77 else if (bpf_size == BPF_H)
78 return 2;
79 else if (bpf_size == BPF_B)
80 return 1;
81 else if (bpf_size == BPF_DW)
82 return 4; /* imm32 */
83 else
84 return 0;
85}
0a14842f
ED
86
87/* list of x86 cond jumps opcodes (. + s8)
88 * Add 0x10 (and an extra 0x0f) to generate far jumps (. + s32)
89 */
90#define X86_JB 0x72
91#define X86_JAE 0x73
92#define X86_JE 0x74
93#define X86_JNE 0x75
94#define X86_JBE 0x76
95#define X86_JA 0x77
62258278
AS
96#define X86_JGE 0x7D
97#define X86_JG 0x7F
0a14842f 98
5cccc702 99static void bpf_flush_icache(void *start, void *end)
0a14842f
ED
100{
101 mm_segment_t old_fs = get_fs();
102
103 set_fs(KERNEL_DS);
104 smp_wmb();
105 flush_icache_range((unsigned long)start, (unsigned long)end);
106 set_fs(old_fs);
107}
108
a998d434
JS
109#define CHOOSE_LOAD_FUNC(K, func) \
110 ((int)K < 0 ? ((int)K >= SKF_LL_OFF ? func##_negative_offset : func) : func##_positive_offset)
0a14842f 111
62258278 112/* pick a register outside of BPF range for JIT internal work */
959a7579 113#define AUX_REG (MAX_BPF_JIT_REG + 1)
62258278 114
959a7579
DB
115/* The following table maps BPF registers to x64 registers.
116 *
117 * x64 register r12 is unused, since if used as base address
118 * register in load/store instructions, it always needs an
119 * extra byte of encoding and is callee saved.
120 *
121 * r9 caches skb->len - skb->data_len
122 * r10 caches skb->data, and used for blinding (if enabled)
62258278
AS
123 */
124static const int reg2hex[] = {
125 [BPF_REG_0] = 0, /* rax */
126 [BPF_REG_1] = 7, /* rdi */
127 [BPF_REG_2] = 6, /* rsi */
128 [BPF_REG_3] = 2, /* rdx */
129 [BPF_REG_4] = 1, /* rcx */
130 [BPF_REG_5] = 0, /* r8 */
131 [BPF_REG_6] = 3, /* rbx callee saved */
132 [BPF_REG_7] = 5, /* r13 callee saved */
133 [BPF_REG_8] = 6, /* r14 callee saved */
134 [BPF_REG_9] = 7, /* r15 callee saved */
135 [BPF_REG_FP] = 5, /* rbp readonly */
959a7579 136 [BPF_REG_AX] = 2, /* r10 temp register */
62258278
AS
137 [AUX_REG] = 3, /* r11 temp register */
138};
139
140/* is_ereg() == true if BPF register 'reg' maps to x64 r8..r15
141 * which need extra byte of encoding.
142 * rax,rcx,...,rbp have simpler encoding
143 */
5cccc702 144static bool is_ereg(u32 reg)
62258278 145{
d148134b
JP
146 return (1 << reg) & (BIT(BPF_REG_5) |
147 BIT(AUX_REG) |
148 BIT(BPF_REG_7) |
149 BIT(BPF_REG_8) |
959a7579
DB
150 BIT(BPF_REG_9) |
151 BIT(BPF_REG_AX));
62258278
AS
152}
153
154/* add modifiers if 'reg' maps to x64 registers r8..r15 */
5cccc702 155static u8 add_1mod(u8 byte, u32 reg)
62258278
AS
156{
157 if (is_ereg(reg))
158 byte |= 1;
159 return byte;
160}
161
5cccc702 162static u8 add_2mod(u8 byte, u32 r1, u32 r2)
62258278
AS
163{
164 if (is_ereg(r1))
165 byte |= 1;
166 if (is_ereg(r2))
167 byte |= 4;
168 return byte;
169}
170
e430f34e 171/* encode 'dst_reg' register into x64 opcode 'byte' */
5cccc702 172static u8 add_1reg(u8 byte, u32 dst_reg)
62258278 173{
e430f34e 174 return byte + reg2hex[dst_reg];
62258278
AS
175}
176
e430f34e 177/* encode 'dst_reg' and 'src_reg' registers into x64 opcode 'byte' */
5cccc702 178static u8 add_2reg(u8 byte, u32 dst_reg, u32 src_reg)
62258278 179{
e430f34e 180 return byte + reg2hex[dst_reg] + (reg2hex[src_reg] << 3);
62258278
AS
181}
182
738cbe72
DB
183static void jit_fill_hole(void *area, unsigned int size)
184{
185 /* fill whole space with int3 instructions */
186 memset(area, 0xcc, size);
187}
188
f3c2af7b 189struct jit_context {
769e0de6 190 int cleanup_addr; /* epilogue code offset */
62258278 191 bool seen_ld_abs;
959a7579 192 bool seen_ax_reg;
f3c2af7b
AS
193};
194
e0ee9c12
AS
195/* maximum number of bytes emitted while JITing one eBPF insn */
196#define BPF_MAX_INSN_SIZE 128
197#define BPF_INSN_SAFETY 64
198
b52f00e6
AS
199#define STACKSIZE \
200 (MAX_BPF_STACK + \
201 32 /* space for rbx, r13, r14, r15 */ + \
202 8 /* space for skb_copy_bits() buffer */)
203
8b614aeb 204#define PROLOGUE_SIZE 48
b52f00e6
AS
205
206/* emit x64 prologue code for BPF program and check it's size.
207 * bpf_tail_call helper will skip it while jumping into another program
208 */
209static void emit_prologue(u8 **pprog)
0a14842f 210{
b52f00e6
AS
211 u8 *prog = *pprog;
212 int cnt = 0;
0a14842f 213
62258278
AS
214 EMIT1(0x55); /* push rbp */
215 EMIT3(0x48, 0x89, 0xE5); /* mov rbp,rsp */
0a14842f 216
b52f00e6
AS
217 /* sub rsp, STACKSIZE */
218 EMIT3_off32(0x48, 0x81, 0xEC, STACKSIZE);
62258278
AS
219
220 /* all classic BPF filters use R6(rbx) save it */
221
222 /* mov qword ptr [rbp-X],rbx */
b52f00e6 223 EMIT3_off32(0x48, 0x89, 0x9D, -STACKSIZE);
62258278 224
8fb575ca 225 /* bpf_convert_filter() maps classic BPF register X to R7 and uses R8
62258278
AS
226 * as temporary, so all tcpdump filters need to spill/fill R7(r13) and
227 * R8(r14). R9(r15) spill could be made conditional, but there is only
228 * one 'bpf_error' return path out of helper functions inside bpf_jit.S
229 * The overhead of extra spill is negligible for any filter other
230 * than synthetic ones. Therefore not worth adding complexity.
231 */
232
233 /* mov qword ptr [rbp-X],r13 */
b52f00e6 234 EMIT3_off32(0x4C, 0x89, 0xAD, -STACKSIZE + 8);
62258278 235 /* mov qword ptr [rbp-X],r14 */
b52f00e6 236 EMIT3_off32(0x4C, 0x89, 0xB5, -STACKSIZE + 16);
62258278 237 /* mov qword ptr [rbp-X],r15 */
b52f00e6 238 EMIT3_off32(0x4C, 0x89, 0xBD, -STACKSIZE + 24);
62258278 239
8b614aeb
DB
240 /* Clear the tail call counter (tail_call_cnt): for eBPF tail calls
241 * we need to reset the counter to 0. It's done in two instructions,
242 * resetting rax register to 0 (xor on eax gets 0 extended), and
243 * moving it to the counter location.
244 */
62258278 245
8b614aeb
DB
246 /* xor eax, eax */
247 EMIT2(0x31, 0xc0);
248 /* mov qword ptr [rbp-X], rax */
b52f00e6
AS
249 EMIT3_off32(0x48, 0x89, 0x85, -STACKSIZE + 32);
250
251 BUILD_BUG_ON(cnt != PROLOGUE_SIZE);
252 *pprog = prog;
253}
254
255/* generate the following code:
256 * ... bpf_tail_call(void *ctx, struct bpf_array *array, u64 index) ...
257 * if (index >= array->map.max_entries)
258 * goto out;
259 * if (++tail_call_cnt > MAX_TAIL_CALL_CNT)
260 * goto out;
2a36f0b9 261 * prog = array->ptrs[index];
b52f00e6
AS
262 * if (prog == NULL)
263 * goto out;
264 * goto *(prog->bpf_func + prologue_size);
265 * out:
266 */
267static void emit_bpf_tail_call(u8 **pprog)
268{
269 u8 *prog = *pprog;
270 int label1, label2, label3;
271 int cnt = 0;
272
273 /* rdi - pointer to ctx
274 * rsi - pointer to bpf_array
275 * rdx - index in bpf_array
276 */
277
278 /* if (index >= array->map.max_entries)
279 * goto out;
280 */
281 EMIT4(0x48, 0x8B, 0x46, /* mov rax, qword ptr [rsi + 16] */
282 offsetof(struct bpf_array, map.max_entries));
283 EMIT3(0x48, 0x39, 0xD0); /* cmp rax, rdx */
2482abb9 284#define OFFSET1 47 /* number of bytes to jump */
b52f00e6
AS
285 EMIT2(X86_JBE, OFFSET1); /* jbe out */
286 label1 = cnt;
287
288 /* if (tail_call_cnt > MAX_TAIL_CALL_CNT)
289 * goto out;
290 */
291 EMIT2_off32(0x8B, 0x85, -STACKSIZE + 36); /* mov eax, dword ptr [rbp - 516] */
292 EMIT3(0x83, 0xF8, MAX_TAIL_CALL_CNT); /* cmp eax, MAX_TAIL_CALL_CNT */
2482abb9 293#define OFFSET2 36
b52f00e6
AS
294 EMIT2(X86_JA, OFFSET2); /* ja out */
295 label2 = cnt;
296 EMIT3(0x83, 0xC0, 0x01); /* add eax, 1 */
297 EMIT2_off32(0x89, 0x85, -STACKSIZE + 36); /* mov dword ptr [rbp - 516], eax */
298
2a36f0b9 299 /* prog = array->ptrs[index]; */
2482abb9 300 EMIT4_off32(0x48, 0x8D, 0x84, 0xD6, /* lea rax, [rsi + rdx * 8 + offsetof(...)] */
2a36f0b9 301 offsetof(struct bpf_array, ptrs));
b52f00e6
AS
302 EMIT3(0x48, 0x8B, 0x00); /* mov rax, qword ptr [rax] */
303
304 /* if (prog == NULL)
305 * goto out;
306 */
307 EMIT4(0x48, 0x83, 0xF8, 0x00); /* cmp rax, 0 */
308#define OFFSET3 10
309 EMIT2(X86_JE, OFFSET3); /* je out */
310 label3 = cnt;
311
312 /* goto *(prog->bpf_func + prologue_size); */
313 EMIT4(0x48, 0x8B, 0x40, /* mov rax, qword ptr [rax + 32] */
314 offsetof(struct bpf_prog, bpf_func));
315 EMIT4(0x48, 0x83, 0xC0, PROLOGUE_SIZE); /* add rax, prologue_size */
316
317 /* now we're ready to jump into next BPF program
318 * rdi == ctx (1st arg)
319 * rax == prog->bpf_func + prologue_size
320 */
321 EMIT2(0xFF, 0xE0); /* jmp rax */
322
323 /* out: */
324 BUILD_BUG_ON(cnt - label1 != OFFSET1);
325 BUILD_BUG_ON(cnt - label2 != OFFSET2);
326 BUILD_BUG_ON(cnt - label3 != OFFSET3);
327 *pprog = prog;
328}
329
4e10df9a
AS
330
331static void emit_load_skb_data_hlen(u8 **pprog)
332{
333 u8 *prog = *pprog;
334 int cnt = 0;
335
336 /* r9d = skb->len - skb->data_len (headlen)
337 * r10 = skb->data
338 */
339 /* mov %r9d, off32(%rdi) */
340 EMIT3_off32(0x44, 0x8b, 0x8f, offsetof(struct sk_buff, len));
341
342 /* sub %r9d, off32(%rdi) */
343 EMIT3_off32(0x44, 0x2b, 0x8f, offsetof(struct sk_buff, data_len));
344
345 /* mov %r10, off32(%rdi) */
346 EMIT3_off32(0x4c, 0x8b, 0x97, offsetof(struct sk_buff, data));
347 *pprog = prog;
348}
349
b52f00e6
AS
350static int do_jit(struct bpf_prog *bpf_prog, int *addrs, u8 *image,
351 int oldproglen, struct jit_context *ctx)
352{
353 struct bpf_insn *insn = bpf_prog->insnsi;
354 int insn_cnt = bpf_prog->len;
355 bool seen_ld_abs = ctx->seen_ld_abs | (oldproglen == 0);
959a7579 356 bool seen_ax_reg = ctx->seen_ax_reg | (oldproglen == 0);
b52f00e6
AS
357 bool seen_exit = false;
358 u8 temp[BPF_MAX_INSN_SIZE + BPF_INSN_SAFETY];
359 int i, cnt = 0;
360 int proglen = 0;
361 u8 *prog = temp;
362
363 emit_prologue(&prog);
364
4e10df9a
AS
365 if (seen_ld_abs)
366 emit_load_skb_data_hlen(&prog);
62258278
AS
367
368 for (i = 0; i < insn_cnt; i++, insn++) {
e430f34e
AS
369 const s32 imm32 = insn->imm;
370 u32 dst_reg = insn->dst_reg;
371 u32 src_reg = insn->src_reg;
62258278
AS
372 u8 b1 = 0, b2 = 0, b3 = 0;
373 s64 jmp_offset;
374 u8 jmp_cond;
4e10df9a 375 bool reload_skb_data;
62258278
AS
376 int ilen;
377 u8 *func;
378
959a7579
DB
379 if (dst_reg == BPF_REG_AX || src_reg == BPF_REG_AX)
380 ctx->seen_ax_reg = seen_ax_reg = true;
381
62258278
AS
382 switch (insn->code) {
383 /* ALU */
384 case BPF_ALU | BPF_ADD | BPF_X:
385 case BPF_ALU | BPF_SUB | BPF_X:
386 case BPF_ALU | BPF_AND | BPF_X:
387 case BPF_ALU | BPF_OR | BPF_X:
388 case BPF_ALU | BPF_XOR | BPF_X:
389 case BPF_ALU64 | BPF_ADD | BPF_X:
390 case BPF_ALU64 | BPF_SUB | BPF_X:
391 case BPF_ALU64 | BPF_AND | BPF_X:
392 case BPF_ALU64 | BPF_OR | BPF_X:
393 case BPF_ALU64 | BPF_XOR | BPF_X:
394 switch (BPF_OP(insn->code)) {
395 case BPF_ADD: b2 = 0x01; break;
396 case BPF_SUB: b2 = 0x29; break;
397 case BPF_AND: b2 = 0x21; break;
398 case BPF_OR: b2 = 0x09; break;
399 case BPF_XOR: b2 = 0x31; break;
0a14842f 400 }
62258278 401 if (BPF_CLASS(insn->code) == BPF_ALU64)
e430f34e
AS
402 EMIT1(add_2mod(0x48, dst_reg, src_reg));
403 else if (is_ereg(dst_reg) || is_ereg(src_reg))
404 EMIT1(add_2mod(0x40, dst_reg, src_reg));
405 EMIT2(b2, add_2reg(0xC0, dst_reg, src_reg));
62258278 406 break;
0a14842f 407
e430f34e 408 /* mov dst, src */
62258278 409 case BPF_ALU64 | BPF_MOV | BPF_X:
e430f34e 410 EMIT_mov(dst_reg, src_reg);
0a14842f 411 break;
0a14842f 412
e430f34e 413 /* mov32 dst, src */
62258278 414 case BPF_ALU | BPF_MOV | BPF_X:
e430f34e
AS
415 if (is_ereg(dst_reg) || is_ereg(src_reg))
416 EMIT1(add_2mod(0x40, dst_reg, src_reg));
417 EMIT2(0x89, add_2reg(0xC0, dst_reg, src_reg));
62258278 418 break;
0a14842f 419
e430f34e 420 /* neg dst */
62258278
AS
421 case BPF_ALU | BPF_NEG:
422 case BPF_ALU64 | BPF_NEG:
423 if (BPF_CLASS(insn->code) == BPF_ALU64)
e430f34e
AS
424 EMIT1(add_1mod(0x48, dst_reg));
425 else if (is_ereg(dst_reg))
426 EMIT1(add_1mod(0x40, dst_reg));
427 EMIT2(0xF7, add_1reg(0xD8, dst_reg));
62258278
AS
428 break;
429
430 case BPF_ALU | BPF_ADD | BPF_K:
431 case BPF_ALU | BPF_SUB | BPF_K:
432 case BPF_ALU | BPF_AND | BPF_K:
433 case BPF_ALU | BPF_OR | BPF_K:
434 case BPF_ALU | BPF_XOR | BPF_K:
435 case BPF_ALU64 | BPF_ADD | BPF_K:
436 case BPF_ALU64 | BPF_SUB | BPF_K:
437 case BPF_ALU64 | BPF_AND | BPF_K:
438 case BPF_ALU64 | BPF_OR | BPF_K:
439 case BPF_ALU64 | BPF_XOR | BPF_K:
440 if (BPF_CLASS(insn->code) == BPF_ALU64)
e430f34e
AS
441 EMIT1(add_1mod(0x48, dst_reg));
442 else if (is_ereg(dst_reg))
443 EMIT1(add_1mod(0x40, dst_reg));
62258278
AS
444
445 switch (BPF_OP(insn->code)) {
446 case BPF_ADD: b3 = 0xC0; break;
447 case BPF_SUB: b3 = 0xE8; break;
448 case BPF_AND: b3 = 0xE0; break;
449 case BPF_OR: b3 = 0xC8; break;
450 case BPF_XOR: b3 = 0xF0; break;
451 }
452
e430f34e
AS
453 if (is_imm8(imm32))
454 EMIT3(0x83, add_1reg(b3, dst_reg), imm32);
62258278 455 else
e430f34e 456 EMIT2_off32(0x81, add_1reg(b3, dst_reg), imm32);
62258278
AS
457 break;
458
459 case BPF_ALU64 | BPF_MOV | BPF_K:
460 /* optimization: if imm32 is positive,
461 * use 'mov eax, imm32' (which zero-extends imm32)
462 * to save 2 bytes
463 */
e430f34e 464 if (imm32 < 0) {
62258278 465 /* 'mov rax, imm32' sign extends imm32 */
e430f34e 466 b1 = add_1mod(0x48, dst_reg);
62258278
AS
467 b2 = 0xC7;
468 b3 = 0xC0;
e430f34e 469 EMIT3_off32(b1, b2, add_1reg(b3, dst_reg), imm32);
0a14842f 470 break;
62258278
AS
471 }
472
473 case BPF_ALU | BPF_MOV | BPF_K:
606c88a8
DB
474 /* optimization: if imm32 is zero, use 'xor <dst>,<dst>'
475 * to save 3 bytes.
476 */
477 if (imm32 == 0) {
478 if (is_ereg(dst_reg))
479 EMIT1(add_2mod(0x40, dst_reg, dst_reg));
480 b2 = 0x31; /* xor */
481 b3 = 0xC0;
482 EMIT2(b2, add_2reg(b3, dst_reg, dst_reg));
483 break;
484 }
485
62258278 486 /* mov %eax, imm32 */
e430f34e
AS
487 if (is_ereg(dst_reg))
488 EMIT1(add_1mod(0x40, dst_reg));
489 EMIT1_off32(add_1reg(0xB8, dst_reg), imm32);
62258278
AS
490 break;
491
02ab695b 492 case BPF_LD | BPF_IMM | BPF_DW:
606c88a8
DB
493 /* optimization: if imm64 is zero, use 'xor <dst>,<dst>'
494 * to save 7 bytes.
495 */
496 if (insn[0].imm == 0 && insn[1].imm == 0) {
497 b1 = add_2mod(0x48, dst_reg, dst_reg);
498 b2 = 0x31; /* xor */
499 b3 = 0xC0;
500 EMIT3(b1, b2, add_2reg(b3, dst_reg, dst_reg));
501
502 insn++;
503 i++;
504 break;
505 }
506
02ab695b
AS
507 /* movabsq %rax, imm64 */
508 EMIT2(add_1mod(0x48, dst_reg), add_1reg(0xB8, dst_reg));
509 EMIT(insn[0].imm, 4);
510 EMIT(insn[1].imm, 4);
511
512 insn++;
513 i++;
514 break;
515
e430f34e 516 /* dst %= src, dst /= src, dst %= imm32, dst /= imm32 */
62258278
AS
517 case BPF_ALU | BPF_MOD | BPF_X:
518 case BPF_ALU | BPF_DIV | BPF_X:
519 case BPF_ALU | BPF_MOD | BPF_K:
520 case BPF_ALU | BPF_DIV | BPF_K:
521 case BPF_ALU64 | BPF_MOD | BPF_X:
522 case BPF_ALU64 | BPF_DIV | BPF_X:
523 case BPF_ALU64 | BPF_MOD | BPF_K:
524 case BPF_ALU64 | BPF_DIV | BPF_K:
525 EMIT1(0x50); /* push rax */
526 EMIT1(0x52); /* push rdx */
527
528 if (BPF_SRC(insn->code) == BPF_X)
e430f34e
AS
529 /* mov r11, src_reg */
530 EMIT_mov(AUX_REG, src_reg);
62258278 531 else
e430f34e
AS
532 /* mov r11, imm32 */
533 EMIT3_off32(0x49, 0xC7, 0xC3, imm32);
62258278 534
e430f34e
AS
535 /* mov rax, dst_reg */
536 EMIT_mov(BPF_REG_0, dst_reg);
62258278
AS
537
538 /* xor edx, edx
539 * equivalent to 'xor rdx, rdx', but one byte less
540 */
541 EMIT2(0x31, 0xd2);
542
543 if (BPF_SRC(insn->code) == BPF_X) {
e430f34e 544 /* if (src_reg == 0) return 0 */
62258278
AS
545
546 /* cmp r11, 0 */
547 EMIT4(0x49, 0x83, 0xFB, 0x00);
548
549 /* jne .+9 (skip over pop, pop, xor and jmp) */
550 EMIT2(X86_JNE, 1 + 1 + 2 + 5);
551 EMIT1(0x5A); /* pop rdx */
552 EMIT1(0x58); /* pop rax */
553 EMIT2(0x31, 0xc0); /* xor eax, eax */
554
555 /* jmp cleanup_addr
556 * addrs[i] - 11, because there are 11 bytes
557 * after this insn: div, mov, pop, pop, mov
558 */
559 jmp_offset = ctx->cleanup_addr - (addrs[i] - 11);
560 EMIT1_off32(0xE9, jmp_offset);
561 }
562
563 if (BPF_CLASS(insn->code) == BPF_ALU64)
564 /* div r11 */
565 EMIT3(0x49, 0xF7, 0xF3);
566 else
567 /* div r11d */
568 EMIT3(0x41, 0xF7, 0xF3);
569
570 if (BPF_OP(insn->code) == BPF_MOD)
571 /* mov r11, rdx */
572 EMIT3(0x49, 0x89, 0xD3);
573 else
574 /* mov r11, rax */
575 EMIT3(0x49, 0x89, 0xC3);
576
577 EMIT1(0x5A); /* pop rdx */
578 EMIT1(0x58); /* pop rax */
579
e430f34e
AS
580 /* mov dst_reg, r11 */
581 EMIT_mov(dst_reg, AUX_REG);
62258278
AS
582 break;
583
584 case BPF_ALU | BPF_MUL | BPF_K:
585 case BPF_ALU | BPF_MUL | BPF_X:
586 case BPF_ALU64 | BPF_MUL | BPF_K:
587 case BPF_ALU64 | BPF_MUL | BPF_X:
588 EMIT1(0x50); /* push rax */
589 EMIT1(0x52); /* push rdx */
590
e430f34e
AS
591 /* mov r11, dst_reg */
592 EMIT_mov(AUX_REG, dst_reg);
62258278
AS
593
594 if (BPF_SRC(insn->code) == BPF_X)
e430f34e
AS
595 /* mov rax, src_reg */
596 EMIT_mov(BPF_REG_0, src_reg);
62258278 597 else
e430f34e
AS
598 /* mov rax, imm32 */
599 EMIT3_off32(0x48, 0xC7, 0xC0, imm32);
62258278
AS
600
601 if (BPF_CLASS(insn->code) == BPF_ALU64)
602 EMIT1(add_1mod(0x48, AUX_REG));
603 else if (is_ereg(AUX_REG))
604 EMIT1(add_1mod(0x40, AUX_REG));
605 /* mul(q) r11 */
606 EMIT2(0xF7, add_1reg(0xE0, AUX_REG));
607
608 /* mov r11, rax */
609 EMIT_mov(AUX_REG, BPF_REG_0);
610
611 EMIT1(0x5A); /* pop rdx */
612 EMIT1(0x58); /* pop rax */
613
e430f34e
AS
614 /* mov dst_reg, r11 */
615 EMIT_mov(dst_reg, AUX_REG);
62258278
AS
616 break;
617
618 /* shifts */
619 case BPF_ALU | BPF_LSH | BPF_K:
620 case BPF_ALU | BPF_RSH | BPF_K:
621 case BPF_ALU | BPF_ARSH | BPF_K:
622 case BPF_ALU64 | BPF_LSH | BPF_K:
623 case BPF_ALU64 | BPF_RSH | BPF_K:
624 case BPF_ALU64 | BPF_ARSH | BPF_K:
625 if (BPF_CLASS(insn->code) == BPF_ALU64)
e430f34e
AS
626 EMIT1(add_1mod(0x48, dst_reg));
627 else if (is_ereg(dst_reg))
628 EMIT1(add_1mod(0x40, dst_reg));
62258278
AS
629
630 switch (BPF_OP(insn->code)) {
631 case BPF_LSH: b3 = 0xE0; break;
632 case BPF_RSH: b3 = 0xE8; break;
633 case BPF_ARSH: b3 = 0xF8; break;
634 }
e430f34e 635 EMIT3(0xC1, add_1reg(b3, dst_reg), imm32);
62258278
AS
636 break;
637
72b603ee
AS
638 case BPF_ALU | BPF_LSH | BPF_X:
639 case BPF_ALU | BPF_RSH | BPF_X:
640 case BPF_ALU | BPF_ARSH | BPF_X:
641 case BPF_ALU64 | BPF_LSH | BPF_X:
642 case BPF_ALU64 | BPF_RSH | BPF_X:
643 case BPF_ALU64 | BPF_ARSH | BPF_X:
644
645 /* check for bad case when dst_reg == rcx */
646 if (dst_reg == BPF_REG_4) {
647 /* mov r11, dst_reg */
648 EMIT_mov(AUX_REG, dst_reg);
649 dst_reg = AUX_REG;
650 }
651
652 if (src_reg != BPF_REG_4) { /* common case */
653 EMIT1(0x51); /* push rcx */
654
655 /* mov rcx, src_reg */
656 EMIT_mov(BPF_REG_4, src_reg);
657 }
658
659 /* shl %rax, %cl | shr %rax, %cl | sar %rax, %cl */
660 if (BPF_CLASS(insn->code) == BPF_ALU64)
661 EMIT1(add_1mod(0x48, dst_reg));
662 else if (is_ereg(dst_reg))
663 EMIT1(add_1mod(0x40, dst_reg));
664
665 switch (BPF_OP(insn->code)) {
666 case BPF_LSH: b3 = 0xE0; break;
667 case BPF_RSH: b3 = 0xE8; break;
668 case BPF_ARSH: b3 = 0xF8; break;
669 }
670 EMIT2(0xD3, add_1reg(b3, dst_reg));
671
672 if (src_reg != BPF_REG_4)
673 EMIT1(0x59); /* pop rcx */
674
675 if (insn->dst_reg == BPF_REG_4)
676 /* mov dst_reg, r11 */
677 EMIT_mov(insn->dst_reg, AUX_REG);
678 break;
679
62258278 680 case BPF_ALU | BPF_END | BPF_FROM_BE:
e430f34e 681 switch (imm32) {
62258278
AS
682 case 16:
683 /* emit 'ror %ax, 8' to swap lower 2 bytes */
684 EMIT1(0x66);
e430f34e 685 if (is_ereg(dst_reg))
62258278 686 EMIT1(0x41);
e430f34e 687 EMIT3(0xC1, add_1reg(0xC8, dst_reg), 8);
343f845b
AS
688
689 /* emit 'movzwl eax, ax' */
690 if (is_ereg(dst_reg))
691 EMIT3(0x45, 0x0F, 0xB7);
692 else
693 EMIT2(0x0F, 0xB7);
694 EMIT1(add_2reg(0xC0, dst_reg, dst_reg));
62258278
AS
695 break;
696 case 32:
697 /* emit 'bswap eax' to swap lower 4 bytes */
e430f34e 698 if (is_ereg(dst_reg))
62258278 699 EMIT2(0x41, 0x0F);
0a14842f 700 else
62258278 701 EMIT1(0x0F);
e430f34e 702 EMIT1(add_1reg(0xC8, dst_reg));
0a14842f 703 break;
62258278
AS
704 case 64:
705 /* emit 'bswap rax' to swap 8 bytes */
e430f34e
AS
706 EMIT3(add_1mod(0x48, dst_reg), 0x0F,
707 add_1reg(0xC8, dst_reg));
3b58908a
ED
708 break;
709 }
62258278
AS
710 break;
711
712 case BPF_ALU | BPF_END | BPF_FROM_LE:
343f845b
AS
713 switch (imm32) {
714 case 16:
715 /* emit 'movzwl eax, ax' to zero extend 16-bit
716 * into 64 bit
717 */
718 if (is_ereg(dst_reg))
719 EMIT3(0x45, 0x0F, 0xB7);
720 else
721 EMIT2(0x0F, 0xB7);
722 EMIT1(add_2reg(0xC0, dst_reg, dst_reg));
723 break;
724 case 32:
725 /* emit 'mov eax, eax' to clear upper 32-bits */
726 if (is_ereg(dst_reg))
727 EMIT1(0x45);
728 EMIT2(0x89, add_2reg(0xC0, dst_reg, dst_reg));
729 break;
730 case 64:
731 /* nop */
732 break;
733 }
62258278
AS
734 break;
735
e430f34e 736 /* ST: *(u8*)(dst_reg + off) = imm */
62258278 737 case BPF_ST | BPF_MEM | BPF_B:
e430f34e 738 if (is_ereg(dst_reg))
62258278
AS
739 EMIT2(0x41, 0xC6);
740 else
741 EMIT1(0xC6);
742 goto st;
743 case BPF_ST | BPF_MEM | BPF_H:
e430f34e 744 if (is_ereg(dst_reg))
62258278
AS
745 EMIT3(0x66, 0x41, 0xC7);
746 else
747 EMIT2(0x66, 0xC7);
748 goto st;
749 case BPF_ST | BPF_MEM | BPF_W:
e430f34e 750 if (is_ereg(dst_reg))
62258278
AS
751 EMIT2(0x41, 0xC7);
752 else
753 EMIT1(0xC7);
754 goto st;
755 case BPF_ST | BPF_MEM | BPF_DW:
e430f34e 756 EMIT2(add_1mod(0x48, dst_reg), 0xC7);
62258278
AS
757
758st: if (is_imm8(insn->off))
e430f34e 759 EMIT2(add_1reg(0x40, dst_reg), insn->off);
62258278 760 else
e430f34e 761 EMIT1_off32(add_1reg(0x80, dst_reg), insn->off);
62258278 762
e430f34e 763 EMIT(imm32, bpf_size_to_x86_bytes(BPF_SIZE(insn->code)));
62258278
AS
764 break;
765
e430f34e 766 /* STX: *(u8*)(dst_reg + off) = src_reg */
62258278
AS
767 case BPF_STX | BPF_MEM | BPF_B:
768 /* emit 'mov byte ptr [rax + off], al' */
e430f34e 769 if (is_ereg(dst_reg) || is_ereg(src_reg) ||
62258278 770 /* have to add extra byte for x86 SIL, DIL regs */
e430f34e
AS
771 src_reg == BPF_REG_1 || src_reg == BPF_REG_2)
772 EMIT2(add_2mod(0x40, dst_reg, src_reg), 0x88);
62258278
AS
773 else
774 EMIT1(0x88);
775 goto stx;
776 case BPF_STX | BPF_MEM | BPF_H:
e430f34e
AS
777 if (is_ereg(dst_reg) || is_ereg(src_reg))
778 EMIT3(0x66, add_2mod(0x40, dst_reg, src_reg), 0x89);
62258278
AS
779 else
780 EMIT2(0x66, 0x89);
781 goto stx;
782 case BPF_STX | BPF_MEM | BPF_W:
e430f34e
AS
783 if (is_ereg(dst_reg) || is_ereg(src_reg))
784 EMIT2(add_2mod(0x40, dst_reg, src_reg), 0x89);
62258278
AS
785 else
786 EMIT1(0x89);
787 goto stx;
788 case BPF_STX | BPF_MEM | BPF_DW:
e430f34e 789 EMIT2(add_2mod(0x48, dst_reg, src_reg), 0x89);
62258278 790stx: if (is_imm8(insn->off))
e430f34e 791 EMIT2(add_2reg(0x40, dst_reg, src_reg), insn->off);
62258278 792 else
e430f34e 793 EMIT1_off32(add_2reg(0x80, dst_reg, src_reg),
62258278
AS
794 insn->off);
795 break;
796
e430f34e 797 /* LDX: dst_reg = *(u8*)(src_reg + off) */
62258278
AS
798 case BPF_LDX | BPF_MEM | BPF_B:
799 /* emit 'movzx rax, byte ptr [rax + off]' */
e430f34e 800 EMIT3(add_2mod(0x48, src_reg, dst_reg), 0x0F, 0xB6);
62258278
AS
801 goto ldx;
802 case BPF_LDX | BPF_MEM | BPF_H:
803 /* emit 'movzx rax, word ptr [rax + off]' */
e430f34e 804 EMIT3(add_2mod(0x48, src_reg, dst_reg), 0x0F, 0xB7);
62258278
AS
805 goto ldx;
806 case BPF_LDX | BPF_MEM | BPF_W:
807 /* emit 'mov eax, dword ptr [rax+0x14]' */
e430f34e
AS
808 if (is_ereg(dst_reg) || is_ereg(src_reg))
809 EMIT2(add_2mod(0x40, src_reg, dst_reg), 0x8B);
62258278
AS
810 else
811 EMIT1(0x8B);
812 goto ldx;
813 case BPF_LDX | BPF_MEM | BPF_DW:
814 /* emit 'mov rax, qword ptr [rax+0x14]' */
e430f34e 815 EMIT2(add_2mod(0x48, src_reg, dst_reg), 0x8B);
62258278
AS
816ldx: /* if insn->off == 0 we can save one extra byte, but
817 * special case of x86 r13 which always needs an offset
818 * is not worth the hassle
819 */
820 if (is_imm8(insn->off))
e430f34e 821 EMIT2(add_2reg(0x40, src_reg, dst_reg), insn->off);
62258278 822 else
e430f34e 823 EMIT1_off32(add_2reg(0x80, src_reg, dst_reg),
62258278
AS
824 insn->off);
825 break;
826
e430f34e 827 /* STX XADD: lock *(u32*)(dst_reg + off) += src_reg */
62258278
AS
828 case BPF_STX | BPF_XADD | BPF_W:
829 /* emit 'lock add dword ptr [rax + off], eax' */
e430f34e
AS
830 if (is_ereg(dst_reg) || is_ereg(src_reg))
831 EMIT3(0xF0, add_2mod(0x40, dst_reg, src_reg), 0x01);
62258278
AS
832 else
833 EMIT2(0xF0, 0x01);
834 goto xadd;
835 case BPF_STX | BPF_XADD | BPF_DW:
e430f34e 836 EMIT3(0xF0, add_2mod(0x48, dst_reg, src_reg), 0x01);
62258278 837xadd: if (is_imm8(insn->off))
e430f34e 838 EMIT2(add_2reg(0x40, dst_reg, src_reg), insn->off);
62258278 839 else
e430f34e 840 EMIT1_off32(add_2reg(0x80, dst_reg, src_reg),
62258278
AS
841 insn->off);
842 break;
843
844 /* call */
845 case BPF_JMP | BPF_CALL:
e430f34e 846 func = (u8 *) __bpf_call_base + imm32;
62258278 847 jmp_offset = func - (image + addrs[i]);
e0ee9c12 848 if (seen_ld_abs) {
17bedab2 849 reload_skb_data = bpf_helper_changes_pkt_data(func);
4e10df9a
AS
850 if (reload_skb_data) {
851 EMIT1(0x57); /* push %rdi */
852 jmp_offset += 22; /* pop, mov, sub, mov */
853 } else {
854 EMIT2(0x41, 0x52); /* push %r10 */
855 EMIT2(0x41, 0x51); /* push %r9 */
856 /* need to adjust jmp offset, since
857 * pop %r9, pop %r10 take 4 bytes after call insn
858 */
859 jmp_offset += 4;
860 }
62258278 861 }
e430f34e 862 if (!imm32 || !is_simm32(jmp_offset)) {
62258278 863 pr_err("unsupported bpf func %d addr %p image %p\n",
e430f34e 864 imm32, func, image);
62258278
AS
865 return -EINVAL;
866 }
867 EMIT1_off32(0xE8, jmp_offset);
e0ee9c12 868 if (seen_ld_abs) {
4e10df9a
AS
869 if (reload_skb_data) {
870 EMIT1(0x5F); /* pop %rdi */
871 emit_load_skb_data_hlen(&prog);
872 } else {
873 EMIT2(0x41, 0x59); /* pop %r9 */
874 EMIT2(0x41, 0x5A); /* pop %r10 */
875 }
62258278
AS
876 }
877 break;
878
b52f00e6
AS
879 case BPF_JMP | BPF_CALL | BPF_X:
880 emit_bpf_tail_call(&prog);
881 break;
882
62258278
AS
883 /* cond jump */
884 case BPF_JMP | BPF_JEQ | BPF_X:
885 case BPF_JMP | BPF_JNE | BPF_X:
886 case BPF_JMP | BPF_JGT | BPF_X:
887 case BPF_JMP | BPF_JGE | BPF_X:
888 case BPF_JMP | BPF_JSGT | BPF_X:
889 case BPF_JMP | BPF_JSGE | BPF_X:
e430f34e
AS
890 /* cmp dst_reg, src_reg */
891 EMIT3(add_2mod(0x48, dst_reg, src_reg), 0x39,
892 add_2reg(0xC0, dst_reg, src_reg));
62258278
AS
893 goto emit_cond_jmp;
894
895 case BPF_JMP | BPF_JSET | BPF_X:
e430f34e
AS
896 /* test dst_reg, src_reg */
897 EMIT3(add_2mod(0x48, dst_reg, src_reg), 0x85,
898 add_2reg(0xC0, dst_reg, src_reg));
62258278
AS
899 goto emit_cond_jmp;
900
901 case BPF_JMP | BPF_JSET | BPF_K:
e430f34e
AS
902 /* test dst_reg, imm32 */
903 EMIT1(add_1mod(0x48, dst_reg));
904 EMIT2_off32(0xF7, add_1reg(0xC0, dst_reg), imm32);
62258278
AS
905 goto emit_cond_jmp;
906
907 case BPF_JMP | BPF_JEQ | BPF_K:
908 case BPF_JMP | BPF_JNE | BPF_K:
909 case BPF_JMP | BPF_JGT | BPF_K:
910 case BPF_JMP | BPF_JGE | BPF_K:
911 case BPF_JMP | BPF_JSGT | BPF_K:
912 case BPF_JMP | BPF_JSGE | BPF_K:
e430f34e
AS
913 /* cmp dst_reg, imm8/32 */
914 EMIT1(add_1mod(0x48, dst_reg));
62258278 915
e430f34e
AS
916 if (is_imm8(imm32))
917 EMIT3(0x83, add_1reg(0xF8, dst_reg), imm32);
62258278 918 else
e430f34e 919 EMIT2_off32(0x81, add_1reg(0xF8, dst_reg), imm32);
62258278
AS
920
921emit_cond_jmp: /* convert BPF opcode to x86 */
922 switch (BPF_OP(insn->code)) {
923 case BPF_JEQ:
924 jmp_cond = X86_JE;
925 break;
926 case BPF_JSET:
927 case BPF_JNE:
928 jmp_cond = X86_JNE;
929 break;
930 case BPF_JGT:
931 /* GT is unsigned '>', JA in x86 */
932 jmp_cond = X86_JA;
933 break;
934 case BPF_JGE:
935 /* GE is unsigned '>=', JAE in x86 */
936 jmp_cond = X86_JAE;
937 break;
938 case BPF_JSGT:
939 /* signed '>', GT in x86 */
940 jmp_cond = X86_JG;
941 break;
942 case BPF_JSGE:
943 /* signed '>=', GE in x86 */
944 jmp_cond = X86_JGE;
945 break;
946 default: /* to silence gcc warning */
947 return -EFAULT;
948 }
949 jmp_offset = addrs[i + insn->off] - addrs[i];
950 if (is_imm8(jmp_offset)) {
951 EMIT2(jmp_cond, jmp_offset);
952 } else if (is_simm32(jmp_offset)) {
953 EMIT2_off32(0x0F, jmp_cond + 0x10, jmp_offset);
954 } else {
955 pr_err("cond_jmp gen bug %llx\n", jmp_offset);
956 return -EFAULT;
957 }
958
959 break;
0a14842f 960
62258278
AS
961 case BPF_JMP | BPF_JA:
962 jmp_offset = addrs[i + insn->off] - addrs[i];
963 if (!jmp_offset)
964 /* optimize out nop jumps */
965 break;
966emit_jmp:
967 if (is_imm8(jmp_offset)) {
968 EMIT2(0xEB, jmp_offset);
969 } else if (is_simm32(jmp_offset)) {
970 EMIT1_off32(0xE9, jmp_offset);
971 } else {
972 pr_err("jmp gen bug %llx\n", jmp_offset);
973 return -EFAULT;
974 }
975 break;
976
977 case BPF_LD | BPF_IND | BPF_W:
978 func = sk_load_word;
979 goto common_load;
980 case BPF_LD | BPF_ABS | BPF_W:
e430f34e 981 func = CHOOSE_LOAD_FUNC(imm32, sk_load_word);
e0ee9c12
AS
982common_load:
983 ctx->seen_ld_abs = seen_ld_abs = true;
62258278
AS
984 jmp_offset = func - (image + addrs[i]);
985 if (!func || !is_simm32(jmp_offset)) {
986 pr_err("unsupported bpf func %d addr %p image %p\n",
e430f34e 987 imm32, func, image);
62258278
AS
988 return -EINVAL;
989 }
990 if (BPF_MODE(insn->code) == BPF_ABS) {
991 /* mov %esi, imm32 */
e430f34e 992 EMIT1_off32(0xBE, imm32);
62258278 993 } else {
e430f34e
AS
994 /* mov %rsi, src_reg */
995 EMIT_mov(BPF_REG_2, src_reg);
996 if (imm32) {
997 if (is_imm8(imm32))
62258278 998 /* add %esi, imm8 */
e430f34e 999 EMIT3(0x83, 0xC6, imm32);
0a14842f 1000 else
62258278 1001 /* add %esi, imm32 */
e430f34e 1002 EMIT2_off32(0x81, 0xC6, imm32);
0a14842f 1003 }
62258278
AS
1004 }
1005 /* skb pointer is in R6 (%rbx), it will be copied into
1006 * %rdi if skb_copy_bits() call is necessary.
1007 * sk_load_* helpers also use %r10 and %r9d.
1008 * See bpf_jit.S
1009 */
959a7579
DB
1010 if (seen_ax_reg)
1011 /* r10 = skb->data, mov %r10, off32(%rbx) */
1012 EMIT3_off32(0x4c, 0x8b, 0x93,
1013 offsetof(struct sk_buff, data));
62258278
AS
1014 EMIT1_off32(0xE8, jmp_offset); /* call */
1015 break;
1016
1017 case BPF_LD | BPF_IND | BPF_H:
1018 func = sk_load_half;
1019 goto common_load;
1020 case BPF_LD | BPF_ABS | BPF_H:
e430f34e 1021 func = CHOOSE_LOAD_FUNC(imm32, sk_load_half);
62258278
AS
1022 goto common_load;
1023 case BPF_LD | BPF_IND | BPF_B:
1024 func = sk_load_byte;
1025 goto common_load;
1026 case BPF_LD | BPF_ABS | BPF_B:
e430f34e 1027 func = CHOOSE_LOAD_FUNC(imm32, sk_load_byte);
62258278
AS
1028 goto common_load;
1029
1030 case BPF_JMP | BPF_EXIT:
769e0de6 1031 if (seen_exit) {
62258278
AS
1032 jmp_offset = ctx->cleanup_addr - addrs[i];
1033 goto emit_jmp;
1034 }
769e0de6 1035 seen_exit = true;
62258278
AS
1036 /* update cleanup_addr */
1037 ctx->cleanup_addr = proglen;
1038 /* mov rbx, qword ptr [rbp-X] */
b52f00e6 1039 EMIT3_off32(0x48, 0x8B, 0x9D, -STACKSIZE);
62258278 1040 /* mov r13, qword ptr [rbp-X] */
b52f00e6 1041 EMIT3_off32(0x4C, 0x8B, 0xAD, -STACKSIZE + 8);
62258278 1042 /* mov r14, qword ptr [rbp-X] */
b52f00e6 1043 EMIT3_off32(0x4C, 0x8B, 0xB5, -STACKSIZE + 16);
62258278 1044 /* mov r15, qword ptr [rbp-X] */
b52f00e6 1045 EMIT3_off32(0x4C, 0x8B, 0xBD, -STACKSIZE + 24);
62258278
AS
1046
1047 EMIT1(0xC9); /* leave */
1048 EMIT1(0xC3); /* ret */
1049 break;
1050
f3c2af7b 1051 default:
62258278
AS
1052 /* By design x64 JIT should support all BPF instructions
1053 * This error will be seen if new instruction was added
1054 * to interpreter, but not to JIT
7ae457c1 1055 * or if there is junk in bpf_prog
62258278
AS
1056 */
1057 pr_err("bpf_jit: unknown opcode %02x\n", insn->code);
f3c2af7b
AS
1058 return -EINVAL;
1059 }
62258278 1060
f3c2af7b 1061 ilen = prog - temp;
e0ee9c12 1062 if (ilen > BPF_MAX_INSN_SIZE) {
9383191d 1063 pr_err("bpf_jit: fatal insn size error\n");
e0ee9c12
AS
1064 return -EFAULT;
1065 }
1066
f3c2af7b
AS
1067 if (image) {
1068 if (unlikely(proglen + ilen > oldproglen)) {
9383191d 1069 pr_err("bpf_jit: fatal error\n");
f3c2af7b 1070 return -EFAULT;
0a14842f 1071 }
f3c2af7b 1072 memcpy(image + proglen, temp, ilen);
0a14842f 1073 }
f3c2af7b
AS
1074 proglen += ilen;
1075 addrs[i] = proglen;
1076 prog = temp;
1077 }
f3c2af7b
AS
1078 return proglen;
1079}
1080
d1c55ab5 1081struct bpf_prog *bpf_int_jit_compile(struct bpf_prog *prog)
f3c2af7b
AS
1082{
1083 struct bpf_binary_header *header = NULL;
959a7579 1084 struct bpf_prog *tmp, *orig_prog = prog;
f3c2af7b
AS
1085 int proglen, oldproglen = 0;
1086 struct jit_context ctx = {};
959a7579 1087 bool tmp_blinded = false;
f3c2af7b
AS
1088 u8 *image = NULL;
1089 int *addrs;
1090 int pass;
1091 int i;
1092
1093 if (!bpf_jit_enable)
959a7579
DB
1094 return orig_prog;
1095
1096 tmp = bpf_jit_blind_constants(prog);
1097 /* If blinding was requested and we failed during blinding,
1098 * we must fall back to the interpreter.
1099 */
1100 if (IS_ERR(tmp))
1101 return orig_prog;
1102 if (tmp != prog) {
1103 tmp_blinded = true;
1104 prog = tmp;
1105 }
0a14842f 1106
f3c2af7b 1107 addrs = kmalloc(prog->len * sizeof(*addrs), GFP_KERNEL);
959a7579
DB
1108 if (!addrs) {
1109 prog = orig_prog;
1110 goto out;
1111 }
f3c2af7b
AS
1112
1113 /* Before first pass, make a rough estimation of addrs[]
1114 * each bpf instruction is translated to less than 64 bytes
1115 */
1116 for (proglen = 0, i = 0; i < prog->len; i++) {
1117 proglen += 64;
1118 addrs[i] = proglen;
1119 }
1120 ctx.cleanup_addr = proglen;
f3c2af7b 1121
3f7352bf
AS
1122 /* JITed image shrinks with every pass and the loop iterates
1123 * until the image stops shrinking. Very large bpf programs
1124 * may converge on the last pass. In such case do one more
1125 * pass to emit the final image
1126 */
1127 for (pass = 0; pass < 10 || image; pass++) {
f3c2af7b
AS
1128 proglen = do_jit(prog, addrs, image, oldproglen, &ctx);
1129 if (proglen <= 0) {
1130 image = NULL;
1131 if (header)
738cbe72 1132 bpf_jit_binary_free(header);
959a7579
DB
1133 prog = orig_prog;
1134 goto out_addrs;
f3c2af7b 1135 }
0a14842f 1136 if (image) {
e0ee9c12 1137 if (proglen != oldproglen) {
f3c2af7b
AS
1138 pr_err("bpf_jit: proglen=%d != oldproglen=%d\n",
1139 proglen, oldproglen);
959a7579
DB
1140 prog = orig_prog;
1141 goto out_addrs;
e0ee9c12 1142 }
0a14842f
ED
1143 break;
1144 }
1145 if (proglen == oldproglen) {
738cbe72
DB
1146 header = bpf_jit_binary_alloc(proglen, &image,
1147 1, jit_fill_hole);
959a7579
DB
1148 if (!header) {
1149 prog = orig_prog;
1150 goto out_addrs;
1151 }
0a14842f
ED
1152 }
1153 oldproglen = proglen;
1154 }
79617801 1155
0a14842f 1156 if (bpf_jit_enable > 1)
485d6511 1157 bpf_jit_dump(prog->len, proglen, pass + 1, image);
0a14842f
ED
1158
1159 if (image) {
314beb9b 1160 bpf_flush_icache(header, image + proglen);
9d876e79 1161 bpf_jit_binary_lock_ro(header);
f3c2af7b 1162 prog->bpf_func = (void *)image;
a91263d5 1163 prog->jited = 1;
9d5ecb09
DB
1164 } else {
1165 prog = orig_prog;
0a14842f 1166 }
959a7579
DB
1167
1168out_addrs:
0a14842f 1169 kfree(addrs);
959a7579
DB
1170out:
1171 if (tmp_blinded)
1172 bpf_jit_prog_release_other(prog, prog == orig_prog ?
1173 tmp : orig_prog);
d1c55ab5 1174 return prog;
0a14842f 1175}