mm: consolidate pgtable_cache_init() and pgd_cache_init()
[linux-2.6-block.git] / arch / x86 / mm / pgtable.c
CommitLineData
b2441318 1// SPDX-License-Identifier: GPL-2.0
4f76cd38 2#include <linux/mm.h>
5a0e3ad6 3#include <linux/gfp.h>
e3e28812 4#include <linux/hugetlb.h>
4f76cd38 5#include <asm/pgalloc.h>
ee5aa8d3 6#include <asm/pgtable.h>
4f76cd38 7#include <asm/tlb.h>
a1d5a869 8#include <asm/fixmap.h>
6b637835 9#include <asm/mtrr.h>
4f76cd38 10
94d49eb3
KS
11#ifdef CONFIG_DYNAMIC_PHYSICAL_MASK
12phys_addr_t physical_mask __ro_after_init = (1ULL << __PHYSICAL_MASK_SHIFT) - 1;
13EXPORT_SYMBOL(physical_mask);
14#endif
15
14315592 16#ifdef CONFIG_HIGHPTE
5fba4af4 17#define PGTABLE_HIGHMEM __GFP_HIGHMEM
14315592 18#else
5fba4af4 19#define PGTABLE_HIGHMEM 0
14315592
IC
20#endif
21
5fba4af4 22gfp_t __userpte_alloc_gfp = GFP_PGTABLE_USER | PGTABLE_HIGHMEM;
4f76cd38 23
4cf58924 24pgtable_t pte_alloc_one(struct mm_struct *mm)
4f76cd38 25{
5fba4af4 26 return __pte_alloc_one(mm, __userpte_alloc_gfp);
4f76cd38
JF
27}
28
14315592
IC
29static int __init setup_userpte(char *arg)
30{
31 if (!arg)
32 return -EINVAL;
33
34 /*
35 * "userpte=nohigh" disables allocation of user pagetables in
36 * high memory.
37 */
38 if (strcmp(arg, "nohigh") == 0)
39 __userpte_alloc_gfp &= ~__GFP_HIGHMEM;
40 else
41 return -EINVAL;
42 return 0;
43}
44early_param("userpte", setup_userpte);
45
9e1b32ca 46void ___pte_free_tlb(struct mmu_gather *tlb, struct page *pte)
397f687a
JF
47{
48 pgtable_page_dtor(pte);
6944a9c8 49 paravirt_release_pte(page_to_pfn(pte));
48a8b97c 50 paravirt_tlb_remove_table(tlb, pte);
397f687a
JF
51}
52
98233368 53#if CONFIG_PGTABLE_LEVELS > 2
9e1b32ca 54void ___pmd_free_tlb(struct mmu_gather *tlb, pmd_t *pmd)
170fdff7 55{
c283610e 56 struct page *page = virt_to_page(pmd);
6944a9c8 57 paravirt_release_pmd(__pa(pmd) >> PAGE_SHIFT);
1de14c3c
DH
58 /*
59 * NOTE! For PAE, any changes to the top page-directory-pointer-table
60 * entries need a full cr3 reload to flush.
61 */
62#ifdef CONFIG_X86_PAE
63 tlb->need_flush_all = 1;
64#endif
c283610e 65 pgtable_pmd_page_dtor(page);
48a8b97c 66 paravirt_tlb_remove_table(tlb, page);
170fdff7 67}
5a5f8f42 68
98233368 69#if CONFIG_PGTABLE_LEVELS > 3
9e1b32ca 70void ___pud_free_tlb(struct mmu_gather *tlb, pud_t *pud)
5a5f8f42 71{
2761fa09 72 paravirt_release_pud(__pa(pud) >> PAGE_SHIFT);
48a8b97c 73 paravirt_tlb_remove_table(tlb, virt_to_page(pud));
5a5f8f42 74}
b8504058
KS
75
76#if CONFIG_PGTABLE_LEVELS > 4
77void ___p4d_free_tlb(struct mmu_gather *tlb, p4d_t *p4d)
78{
79 paravirt_release_p4d(__pa(p4d) >> PAGE_SHIFT);
48a8b97c 80 paravirt_tlb_remove_table(tlb, virt_to_page(p4d));
b8504058
KS
81}
82#endif /* CONFIG_PGTABLE_LEVELS > 4 */
98233368
KS
83#endif /* CONFIG_PGTABLE_LEVELS > 3 */
84#endif /* CONFIG_PGTABLE_LEVELS > 2 */
170fdff7 85
4f76cd38
JF
86static inline void pgd_list_add(pgd_t *pgd)
87{
88 struct page *page = virt_to_page(pgd);
4f76cd38 89
4f76cd38 90 list_add(&page->lru, &pgd_list);
4f76cd38
JF
91}
92
93static inline void pgd_list_del(pgd_t *pgd)
94{
95 struct page *page = virt_to_page(pgd);
4f76cd38 96
4f76cd38 97 list_del(&page->lru);
4f76cd38
JF
98}
99
4f76cd38 100#define UNSHARED_PTRS_PER_PGD \
68db065c 101 (SHARED_KERNEL_PMD ? KERNEL_PGD_BOUNDARY : PTRS_PER_PGD)
184d47f0
KC
102#define MAX_UNSHARED_PTRS_PER_PGD \
103 max_t(size_t, KERNEL_PGD_BOUNDARY, PTRS_PER_PGD)
4f76cd38 104
617d34d9
JF
105
106static void pgd_set_mm(pgd_t *pgd, struct mm_struct *mm)
107{
a052f0a5 108 virt_to_page(pgd)->pt_mm = mm;
617d34d9
JF
109}
110
111struct mm_struct *pgd_page_get_mm(struct page *page)
112{
a052f0a5 113 return page->pt_mm;
617d34d9
JF
114}
115
116static void pgd_ctor(struct mm_struct *mm, pgd_t *pgd)
4f76cd38 117{
4f76cd38
JF
118 /* If the pgd points to a shared pagetable level (either the
119 ptes in non-PAE, or shared PMD in PAE), then just copy the
120 references from swapper_pg_dir. */
98233368
KS
121 if (CONFIG_PGTABLE_LEVELS == 2 ||
122 (CONFIG_PGTABLE_LEVELS == 3 && SHARED_KERNEL_PMD) ||
b8504058 123 CONFIG_PGTABLE_LEVELS >= 4) {
68db065c
JF
124 clone_pgd_range(pgd + KERNEL_PGD_BOUNDARY,
125 swapper_pg_dir + KERNEL_PGD_BOUNDARY,
4f76cd38 126 KERNEL_PGD_PTRS);
4f76cd38
JF
127 }
128
129 /* list required to sync kernel mapping updates */
617d34d9
JF
130 if (!SHARED_KERNEL_PMD) {
131 pgd_set_mm(pgd, mm);
4f76cd38 132 pgd_list_add(pgd);
617d34d9 133 }
4f76cd38
JF
134}
135
17b74627 136static void pgd_dtor(pgd_t *pgd)
4f76cd38 137{
4f76cd38
JF
138 if (SHARED_KERNEL_PMD)
139 return;
140
a79e53d8 141 spin_lock(&pgd_lock);
4f76cd38 142 pgd_list_del(pgd);
a79e53d8 143 spin_unlock(&pgd_lock);
4f76cd38
JF
144}
145
85958b46
JF
146/*
147 * List of all pgd's needed for non-PAE so it can invalidate entries
148 * in both cached and uncached pgd's; not needed for PAE since the
149 * kernel pmd is shared. If PAE were not to share the pmd a similar
150 * tactic would be needed. This is essentially codepath-based locking
151 * against pageattr.c; it is the unique case in which a valid change
152 * of kernel pagetables can't be lazily synchronized by vmalloc faults.
153 * vmalloc faults work because attached pagetables are never freed.
6d49e352 154 * -- nyc
85958b46
JF
155 */
156
4f76cd38 157#ifdef CONFIG_X86_PAE
d8d5900e
JF
158/*
159 * In PAE mode, we need to do a cr3 reload (=tlb flush) when
160 * updating the top-level pagetable entries to guarantee the
161 * processor notices the update. Since this is expensive, and
162 * all 4 top-level entries are used almost immediately in a
163 * new process's life, we just pre-populate them here.
164 *
165 * Also, if we're in a paravirt environment where the kernel pmd is
166 * not shared between pagetables (!SHARED_KERNEL_PMDS), we allocate
167 * and initialize the kernel pmds here.
168 */
169#define PREALLOCATED_PMDS UNSHARED_PTRS_PER_PGD
184d47f0 170#define MAX_PREALLOCATED_PMDS MAX_UNSHARED_PTRS_PER_PGD
d8d5900e 171
f59dbe9c
JR
172/*
173 * We allocate separate PMDs for the kernel part of the user page-table
174 * when PTI is enabled. We need them to map the per-process LDT into the
175 * user-space page-table.
176 */
28e3ace7 177#define PREALLOCATED_USER_PMDS (boot_cpu_has(X86_FEATURE_PTI) ? \
f59dbe9c 178 KERNEL_PGD_PTRS : 0)
184d47f0 179#define MAX_PREALLOCATED_USER_PMDS KERNEL_PGD_PTRS
f59dbe9c 180
d8d5900e
JF
181void pud_populate(struct mm_struct *mm, pud_t *pudp, pmd_t *pmd)
182{
183 paravirt_alloc_pmd(mm, __pa(pmd) >> PAGE_SHIFT);
184
185 /* Note: almost everything apart from _PAGE_PRESENT is
186 reserved at the pmd (PDPT) level. */
187 set_pud(pudp, __pud(__pa(pmd) | _PAGE_PRESENT));
188
189 /*
190 * According to Intel App note "TLBs, Paging-Structure Caches,
191 * and Their Invalidation", April 2007, document 317080-001,
192 * section 8.1: in PAE mode we explicitly have to flush the
193 * TLB via cr3 if the top-level pgd is changed...
194 */
4981d01e 195 flush_tlb_mm(mm);
d8d5900e
JF
196}
197#else /* !CONFIG_X86_PAE */
198
199/* No need to prepopulate any pagetable entries in non-PAE modes. */
200#define PREALLOCATED_PMDS 0
184d47f0 201#define MAX_PREALLOCATED_PMDS 0
f59dbe9c 202#define PREALLOCATED_USER_PMDS 0
184d47f0 203#define MAX_PREALLOCATED_USER_PMDS 0
d8d5900e
JF
204#endif /* CONFIG_X86_PAE */
205
f59dbe9c 206static void free_pmds(struct mm_struct *mm, pmd_t *pmds[], int count)
d8d5900e
JF
207{
208 int i;
209
f59dbe9c 210 for (i = 0; i < count; i++)
09ef4939
KS
211 if (pmds[i]) {
212 pgtable_pmd_page_dtor(virt_to_page(pmds[i]));
d8d5900e 213 free_page((unsigned long)pmds[i]);
dc6c9a35 214 mm_dec_nr_pmds(mm);
09ef4939 215 }
d8d5900e
JF
216}
217
f59dbe9c 218static int preallocate_pmds(struct mm_struct *mm, pmd_t *pmds[], int count)
d8d5900e
JF
219{
220 int i;
221 bool failed = false;
5fba4af4 222 gfp_t gfp = GFP_PGTABLE_USER;
3e79ec7d
VD
223
224 if (mm == &init_mm)
225 gfp &= ~__GFP_ACCOUNT;
d8d5900e 226
f59dbe9c 227 for (i = 0; i < count; i++) {
3e79ec7d 228 pmd_t *pmd = (pmd_t *)__get_free_page(gfp);
09ef4939 229 if (!pmd)
d8d5900e 230 failed = true;
09ef4939 231 if (pmd && !pgtable_pmd_page_ctor(virt_to_page(pmd))) {
2a46eed5 232 free_page((unsigned long)pmd);
09ef4939
KS
233 pmd = NULL;
234 failed = true;
235 }
dc6c9a35
KS
236 if (pmd)
237 mm_inc_nr_pmds(mm);
d8d5900e
JF
238 pmds[i] = pmd;
239 }
240
241 if (failed) {
f59dbe9c 242 free_pmds(mm, pmds, count);
d8d5900e
JF
243 return -ENOMEM;
244 }
245
246 return 0;
247}
248
4f76cd38
JF
249/*
250 * Mop up any pmd pages which may still be attached to the pgd.
251 * Normally they will be freed by munmap/exit_mmap, but any pmd we
252 * preallocate which never got a corresponding vma will need to be
253 * freed manually.
254 */
f59dbe9c
JR
255static void mop_up_one_pmd(struct mm_struct *mm, pgd_t *pgdp)
256{
257 pgd_t pgd = *pgdp;
258
259 if (pgd_val(pgd) != 0) {
260 pmd_t *pmd = (pmd_t *)pgd_page_vaddr(pgd);
261
9bc4f28a 262 pgd_clear(pgdp);
f59dbe9c
JR
263
264 paravirt_release_pmd(pgd_val(pgd) >> PAGE_SHIFT);
265 pmd_free(mm, pmd);
266 mm_dec_nr_pmds(mm);
267 }
268}
269
4f76cd38
JF
270static void pgd_mop_up_pmds(struct mm_struct *mm, pgd_t *pgdp)
271{
272 int i;
273
f59dbe9c
JR
274 for (i = 0; i < PREALLOCATED_PMDS; i++)
275 mop_up_one_pmd(mm, &pgdp[i]);
4f76cd38 276
f59dbe9c 277#ifdef CONFIG_PAGE_TABLE_ISOLATION
4f76cd38 278
28e3ace7 279 if (!boot_cpu_has(X86_FEATURE_PTI))
f59dbe9c 280 return;
4f76cd38 281
f59dbe9c
JR
282 pgdp = kernel_to_user_pgdp(pgdp);
283
284 for (i = 0; i < PREALLOCATED_USER_PMDS; i++)
285 mop_up_one_pmd(mm, &pgdp[i + KERNEL_PGD_BOUNDARY]);
286#endif
4f76cd38
JF
287}
288
d8d5900e 289static void pgd_prepopulate_pmd(struct mm_struct *mm, pgd_t *pgd, pmd_t *pmds[])
4f76cd38 290{
e0c4f675 291 p4d_t *p4d;
4f76cd38 292 pud_t *pud;
4f76cd38
JF
293 int i;
294
cf3e5050
JF
295 if (PREALLOCATED_PMDS == 0) /* Work around gcc-3.4.x bug */
296 return;
297
e0c4f675
KS
298 p4d = p4d_offset(pgd, 0);
299 pud = pud_offset(p4d, 0);
4f76cd38 300
73b44ff4 301 for (i = 0; i < PREALLOCATED_PMDS; i++, pud++) {
d8d5900e 302 pmd_t *pmd = pmds[i];
4f76cd38 303
68db065c 304 if (i >= KERNEL_PGD_BOUNDARY)
4f76cd38
JF
305 memcpy(pmd, (pmd_t *)pgd_page_vaddr(swapper_pg_dir[i]),
306 sizeof(pmd_t) * PTRS_PER_PMD);
307
308 pud_populate(mm, pud, pmd);
309 }
4f76cd38 310}
1ec1fe73 311
f59dbe9c
JR
312#ifdef CONFIG_PAGE_TABLE_ISOLATION
313static void pgd_prepopulate_user_pmd(struct mm_struct *mm,
314 pgd_t *k_pgd, pmd_t *pmds[])
315{
316 pgd_t *s_pgd = kernel_to_user_pgdp(swapper_pg_dir);
317 pgd_t *u_pgd = kernel_to_user_pgdp(k_pgd);
318 p4d_t *u_p4d;
319 pud_t *u_pud;
320 int i;
321
322 u_p4d = p4d_offset(u_pgd, 0);
323 u_pud = pud_offset(u_p4d, 0);
324
325 s_pgd += KERNEL_PGD_BOUNDARY;
326 u_pud += KERNEL_PGD_BOUNDARY;
327
328 for (i = 0; i < PREALLOCATED_USER_PMDS; i++, u_pud++, s_pgd++) {
329 pmd_t *pmd = pmds[i];
330
331 memcpy(pmd, (pmd_t *)pgd_page_vaddr(*s_pgd),
332 sizeof(pmd_t) * PTRS_PER_PMD);
333
334 pud_populate(mm, u_pud, pmd);
335 }
336
337}
338#else
339static void pgd_prepopulate_user_pmd(struct mm_struct *mm,
340 pgd_t *k_pgd, pmd_t *pmds[])
341{
342}
343#endif
1db491f7
FY
344/*
345 * Xen paravirt assumes pgd table should be in one page. 64 bit kernel also
346 * assumes that pgd should be in one page.
347 *
348 * But kernel with PAE paging that is not running as a Xen domain
349 * only needs to allocate 32 bytes for pgd instead of one page.
350 */
351#ifdef CONFIG_X86_PAE
352
353#include <linux/slab.h>
354
355#define PGD_SIZE (PTRS_PER_PGD * sizeof(pgd_t))
356#define PGD_ALIGN 32
357
358static struct kmem_cache *pgd_cache;
359
782de70c 360void __init pgtable_cache_init(void)
1db491f7
FY
361{
362 /*
363 * When PAE kernel is running as a Xen domain, it does not use
364 * shared kernel pmd. And this requires a whole page for pgd.
365 */
366 if (!SHARED_KERNEL_PMD)
caa84136 367 return;
1db491f7
FY
368
369 /*
370 * when PAE kernel is not running as a Xen domain, it uses
371 * shared kernel pmd. Shared kernel pmd does not require a whole
372 * page for pgd. We are able to just allocate a 32-byte for pgd.
373 * During boot time, we create a 32-byte slab for pgd table allocation.
374 */
375 pgd_cache = kmem_cache_create("pgd_cache", PGD_SIZE, PGD_ALIGN,
376 SLAB_PANIC, NULL);
1db491f7 377}
1db491f7
FY
378
379static inline pgd_t *_pgd_alloc(void)
380{
381 /*
382 * If no SHARED_KERNEL_PMD, PAE kernel is running as a Xen domain.
383 * We allocate one page for pgd.
384 */
385 if (!SHARED_KERNEL_PMD)
5fba4af4 386 return (pgd_t *)__get_free_pages(GFP_PGTABLE_USER,
e3238faf 387 PGD_ALLOCATION_ORDER);
1db491f7
FY
388
389 /*
390 * Now PAE kernel is not running as a Xen domain. We can allocate
391 * a 32-byte slab for pgd to save memory space.
392 */
5fba4af4 393 return kmem_cache_alloc(pgd_cache, GFP_PGTABLE_USER);
1db491f7
FY
394}
395
396static inline void _pgd_free(pgd_t *pgd)
397{
398 if (!SHARED_KERNEL_PMD)
e3238faf 399 free_pages((unsigned long)pgd, PGD_ALLOCATION_ORDER);
1db491f7
FY
400 else
401 kmem_cache_free(pgd_cache, pgd);
402}
403#else
d9e9a641 404
1db491f7
FY
405static inline pgd_t *_pgd_alloc(void)
406{
5fba4af4
MR
407 return (pgd_t *)__get_free_pages(GFP_PGTABLE_USER,
408 PGD_ALLOCATION_ORDER);
1db491f7
FY
409}
410
411static inline void _pgd_free(pgd_t *pgd)
412{
d9e9a641 413 free_pages((unsigned long)pgd, PGD_ALLOCATION_ORDER);
1db491f7
FY
414}
415#endif /* CONFIG_X86_PAE */
416
d8d5900e 417pgd_t *pgd_alloc(struct mm_struct *mm)
1ec1fe73 418{
d8d5900e 419 pgd_t *pgd;
184d47f0
KC
420 pmd_t *u_pmds[MAX_PREALLOCATED_USER_PMDS];
421 pmd_t *pmds[MAX_PREALLOCATED_PMDS];
1ec1fe73 422
1db491f7 423 pgd = _pgd_alloc();
d8d5900e
JF
424
425 if (pgd == NULL)
426 goto out;
427
428 mm->pgd = pgd;
429
f59dbe9c 430 if (preallocate_pmds(mm, pmds, PREALLOCATED_PMDS) != 0)
d8d5900e
JF
431 goto out_free_pgd;
432
f59dbe9c 433 if (preallocate_pmds(mm, u_pmds, PREALLOCATED_USER_PMDS) != 0)
d8d5900e 434 goto out_free_pmds;
1ec1fe73 435
f59dbe9c
JR
436 if (paravirt_pgd_alloc(mm) != 0)
437 goto out_free_user_pmds;
438
1ec1fe73 439 /*
d8d5900e
JF
440 * Make sure that pre-populating the pmds is atomic with
441 * respect to anything walking the pgd_list, so that they
442 * never see a partially populated pgd.
1ec1fe73 443 */
a79e53d8 444 spin_lock(&pgd_lock);
4f76cd38 445
617d34d9 446 pgd_ctor(mm, pgd);
d8d5900e 447 pgd_prepopulate_pmd(mm, pgd, pmds);
f59dbe9c 448 pgd_prepopulate_user_pmd(mm, pgd, u_pmds);
4f76cd38 449
a79e53d8 450 spin_unlock(&pgd_lock);
4f76cd38
JF
451
452 return pgd;
d8d5900e 453
f59dbe9c
JR
454out_free_user_pmds:
455 free_pmds(mm, u_pmds, PREALLOCATED_USER_PMDS);
d8d5900e 456out_free_pmds:
f59dbe9c 457 free_pmds(mm, pmds, PREALLOCATED_PMDS);
d8d5900e 458out_free_pgd:
1db491f7 459 _pgd_free(pgd);
d8d5900e
JF
460out:
461 return NULL;
4f76cd38
JF
462}
463
464void pgd_free(struct mm_struct *mm, pgd_t *pgd)
465{
466 pgd_mop_up_pmds(mm, pgd);
467 pgd_dtor(pgd);
eba0045f 468 paravirt_pgd_free(mm, pgd);
1db491f7 469 _pgd_free(pgd);
4f76cd38 470}
ee5aa8d3 471
0f9a921c
RR
472/*
473 * Used to set accessed or dirty bits in the page table entries
474 * on other architectures. On x86, the accessed and dirty bits
475 * are tracked by hardware. However, do_wp_page calls this function
476 * to also make the pte writeable at the same time the dirty bit is
477 * set. In that case we do actually need to write the PTE.
478 */
ee5aa8d3
JF
479int ptep_set_access_flags(struct vm_area_struct *vma,
480 unsigned long address, pte_t *ptep,
481 pte_t entry, int dirty)
482{
483 int changed = !pte_same(*ptep, entry);
484
87930019 485 if (changed && dirty)
9bc4f28a 486 set_pte(ptep, entry);
ee5aa8d3
JF
487
488 return changed;
489}
f9fbf1a3 490
db3eb96f
AA
491#ifdef CONFIG_TRANSPARENT_HUGEPAGE
492int pmdp_set_access_flags(struct vm_area_struct *vma,
493 unsigned long address, pmd_t *pmdp,
494 pmd_t entry, int dirty)
495{
496 int changed = !pmd_same(*pmdp, entry);
497
498 VM_BUG_ON(address & ~HPAGE_PMD_MASK);
499
500 if (changed && dirty) {
9bc4f28a 501 set_pmd(pmdp, entry);
5e4bf1a5
IM
502 /*
503 * We had a write-protection fault here and changed the pmd
504 * to to more permissive. No need to flush the TLB for that,
505 * #PF is architecturally guaranteed to do that and in the
506 * worst-case we'll generate a spurious fault.
507 */
db3eb96f
AA
508 }
509
510 return changed;
511}
a00cc7d9
MW
512
513int pudp_set_access_flags(struct vm_area_struct *vma, unsigned long address,
514 pud_t *pudp, pud_t entry, int dirty)
515{
516 int changed = !pud_same(*pudp, entry);
517
518 VM_BUG_ON(address & ~HPAGE_PUD_MASK);
519
520 if (changed && dirty) {
9bc4f28a 521 set_pud(pudp, entry);
a00cc7d9
MW
522 /*
523 * We had a write-protection fault here and changed the pud
524 * to to more permissive. No need to flush the TLB for that,
525 * #PF is architecturally guaranteed to do that and in the
526 * worst-case we'll generate a spurious fault.
527 */
528 }
529
530 return changed;
531}
db3eb96f
AA
532#endif
533
f9fbf1a3
JF
534int ptep_test_and_clear_young(struct vm_area_struct *vma,
535 unsigned long addr, pte_t *ptep)
536{
537 int ret = 0;
538
539 if (pte_young(*ptep))
540 ret = test_and_clear_bit(_PAGE_BIT_ACCESSED,
48e23957 541 (unsigned long *) &ptep->pte);
f9fbf1a3 542
f9fbf1a3
JF
543 return ret;
544}
c20311e1 545
db3eb96f
AA
546#ifdef CONFIG_TRANSPARENT_HUGEPAGE
547int pmdp_test_and_clear_young(struct vm_area_struct *vma,
548 unsigned long addr, pmd_t *pmdp)
549{
550 int ret = 0;
551
552 if (pmd_young(*pmdp))
553 ret = test_and_clear_bit(_PAGE_BIT_ACCESSED,
f2d6bfe9 554 (unsigned long *)pmdp);
db3eb96f 555
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556 return ret;
557}
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MW
558int pudp_test_and_clear_young(struct vm_area_struct *vma,
559 unsigned long addr, pud_t *pudp)
560{
561 int ret = 0;
562
563 if (pud_young(*pudp))
564 ret = test_and_clear_bit(_PAGE_BIT_ACCESSED,
565 (unsigned long *)pudp);
566
567 return ret;
568}
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AA
569#endif
570
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571int ptep_clear_flush_young(struct vm_area_struct *vma,
572 unsigned long address, pte_t *ptep)
573{
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SL
574 /*
575 * On x86 CPUs, clearing the accessed bit without a TLB flush
576 * doesn't cause data corruption. [ It could cause incorrect
577 * page aging and the (mistaken) reclaim of hot pages, but the
578 * chance of that should be relatively low. ]
579 *
580 * So as a performance optimization don't flush the TLB when
581 * clearing the accessed bit, it will eventually be flushed by
582 * a context switch or a VM operation anyway. [ In the rare
583 * event of it not getting flushed for a long time the delay
584 * shouldn't really matter because there's no real memory
585 * pressure for swapout to react to. ]
586 */
587 return ptep_test_and_clear_young(vma, address, ptep);
c20311e1 588}
7c7e6e07 589
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590#ifdef CONFIG_TRANSPARENT_HUGEPAGE
591int pmdp_clear_flush_young(struct vm_area_struct *vma,
592 unsigned long address, pmd_t *pmdp)
593{
594 int young;
595
596 VM_BUG_ON(address & ~HPAGE_PMD_MASK);
597
598 young = pmdp_test_and_clear_young(vma, address, pmdp);
599 if (young)
600 flush_tlb_range(vma, address, address + HPAGE_PMD_SIZE);
601
602 return young;
603}
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604#endif
605
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606/**
607 * reserve_top_address - reserves a hole in the top of kernel address space
608 * @reserve - size of hole to reserve
609 *
610 * Can be used to relocate the fixmap area and poke a hole in the top
611 * of kernel address space to make room for a hypervisor.
612 */
613void __init reserve_top_address(unsigned long reserve)
614{
615#ifdef CONFIG_X86_32
616 BUG_ON(fixmaps_set > 0);
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617 __FIXADDR_TOP = round_down(-reserve, 1 << PMD_SHIFT) - PAGE_SIZE;
618 printk(KERN_INFO "Reserving virtual address space above 0x%08lx (rounded to 0x%08lx)\n",
619 -reserve, __FIXADDR_TOP + PAGE_SIZE);
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620#endif
621}
622
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JF
623int fixmaps_set;
624
aeaaa59c 625void __native_set_fixmap(enum fixed_addresses idx, pte_t pte)
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JF
626{
627 unsigned long address = __fix_to_virt(idx);
628
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629#ifdef CONFIG_X86_64
630 /*
631 * Ensure that the static initial page tables are covering the
632 * fixmap completely.
633 */
634 BUILD_BUG_ON(__end_of_permanent_fixed_addresses >
635 (FIXMAP_PMD_NUM * PTRS_PER_PTE));
636#endif
637
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638 if (idx >= __end_of_fixed_addresses) {
639 BUG();
640 return;
641 }
aeaaa59c 642 set_pte_vaddr(address, pte);
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JF
643 fixmaps_set++;
644}
aeaaa59c 645
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MH
646void native_set_fixmap(enum fixed_addresses idx, phys_addr_t phys,
647 pgprot_t flags)
aeaaa59c 648{
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DH
649 /* Sanitize 'prot' against any unsupported bits: */
650 pgprot_val(flags) &= __default_kernel_pte_mask;
651
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652 __native_set_fixmap(idx, pfn_pte(phys >> PAGE_SHIFT, flags));
653}
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654
655#ifdef CONFIG_HAVE_ARCH_HUGE_VMAP
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KS
656#ifdef CONFIG_X86_5LEVEL
657/**
658 * p4d_set_huge - setup kernel P4D mapping
659 *
660 * No 512GB pages yet -- always return 0
661 */
662int p4d_set_huge(p4d_t *p4d, phys_addr_t addr, pgprot_t prot)
663{
664 return 0;
665}
666
667/**
668 * p4d_clear_huge - clear kernel P4D mapping when it is set
669 *
670 * No 512GB pages yet -- always return 0
671 */
672int p4d_clear_huge(p4d_t *p4d)
673{
674 return 0;
675}
676#endif
677
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678/**
679 * pud_set_huge - setup kernel PUD mapping
680 *
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681 * MTRRs can override PAT memory types with 4KiB granularity. Therefore, this
682 * function sets up a huge page only if any of the following conditions are met:
683 *
684 * - MTRRs are disabled, or
685 *
686 * - MTRRs are enabled and the range is completely covered by a single MTRR, or
687 *
688 * - MTRRs are enabled and the corresponding MTRR memory type is WB, which
689 * has no effect on the requested PAT memory type.
690 *
691 * Callers should try to decrease page size (1GB -> 2MB -> 4K) if the bigger
692 * page mapping attempt fails.
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693 *
694 * Returns 1 on success and 0 on failure.
695 */
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696int pud_set_huge(pud_t *pud, phys_addr_t addr, pgprot_t prot)
697{
b73522e0 698 u8 mtrr, uniform;
6b637835 699
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700 mtrr = mtrr_type_lookup(addr, addr + PUD_SIZE, &uniform);
701 if ((mtrr != MTRR_TYPE_INVALID) && (!uniform) &&
702 (mtrr != MTRR_TYPE_WRBACK))
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703 return 0;
704
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705 /* Bail out if we are we on a populated non-leaf entry: */
706 if (pud_present(*pud) && !pud_huge(*pud))
707 return 0;
708
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709 prot = pgprot_4k_2_large(prot);
710
711 set_pte((pte_t *)pud, pfn_pte(
712 (u64)addr >> PAGE_SHIFT,
713 __pgprot(pgprot_val(prot) | _PAGE_PSE)));
714
715 return 1;
716}
717
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718/**
719 * pmd_set_huge - setup kernel PMD mapping
720 *
b73522e0 721 * See text over pud_set_huge() above.
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722 *
723 * Returns 1 on success and 0 on failure.
724 */
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725int pmd_set_huge(pmd_t *pmd, phys_addr_t addr, pgprot_t prot)
726{
b73522e0 727 u8 mtrr, uniform;
6b637835 728
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729 mtrr = mtrr_type_lookup(addr, addr + PMD_SIZE, &uniform);
730 if ((mtrr != MTRR_TYPE_INVALID) && (!uniform) &&
731 (mtrr != MTRR_TYPE_WRBACK)) {
732 pr_warn_once("%s: Cannot satisfy [mem %#010llx-%#010llx] with a huge-page mapping due to MTRR override.\n",
733 __func__, addr, addr + PMD_SIZE);
6b637835 734 return 0;
b73522e0 735 }
6b637835 736
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JR
737 /* Bail out if we are we on a populated non-leaf entry: */
738 if (pmd_present(*pmd) && !pmd_huge(*pmd))
739 return 0;
740
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TK
741 prot = pgprot_4k_2_large(prot);
742
743 set_pte((pte_t *)pmd, pfn_pte(
744 (u64)addr >> PAGE_SHIFT,
745 __pgprot(pgprot_val(prot) | _PAGE_PSE)));
746
747 return 1;
748}
749
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750/**
751 * pud_clear_huge - clear kernel PUD mapping when it is set
752 *
753 * Returns 1 on success and 0 on failure (no PUD map is found).
754 */
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755int pud_clear_huge(pud_t *pud)
756{
757 if (pud_large(*pud)) {
758 pud_clear(pud);
759 return 1;
760 }
761
762 return 0;
763}
764
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765/**
766 * pmd_clear_huge - clear kernel PMD mapping when it is set
767 *
768 * Returns 1 on success and 0 on failure (no PMD map is found).
769 */
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770int pmd_clear_huge(pmd_t *pmd)
771{
772 if (pmd_large(*pmd)) {
773 pmd_clear(pmd);
774 return 1;
775 }
776
777 return 0;
778}
b6bdb751 779
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WD
780/*
781 * Until we support 512GB pages, skip them in the vmap area.
782 */
783int p4d_free_pud_page(p4d_t *p4d, unsigned long addr)
784{
785 return 0;
786}
787
f967db0b 788#ifdef CONFIG_X86_64
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TK
789/**
790 * pud_free_pmd_page - Clear pud entry and free pmd page.
791 * @pud: Pointer to a PUD.
785a19f9 792 * @addr: Virtual address associated with pud.
b6bdb751 793 *
5e0fb5df 794 * Context: The pud range has been unmapped and TLB purged.
b6bdb751 795 * Return: 1 if clearing the entry succeeded. 0 otherwise.
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796 *
797 * NOTE: Callers must allow a single page allocation.
b6bdb751 798 */
785a19f9 799int pud_free_pmd_page(pud_t *pud, unsigned long addr)
b6bdb751 800{
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TK
801 pmd_t *pmd, *pmd_sv;
802 pte_t *pte;
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TK
803 int i;
804
28ee90fe 805 pmd = (pmd_t *)pud_page_vaddr(*pud);
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806 pmd_sv = (pmd_t *)__get_free_page(GFP_KERNEL);
807 if (!pmd_sv)
808 return 0;
28ee90fe 809
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810 for (i = 0; i < PTRS_PER_PMD; i++) {
811 pmd_sv[i] = pmd[i];
812 if (!pmd_none(pmd[i]))
813 pmd_clear(&pmd[i]);
814 }
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815
816 pud_clear(pud);
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817
818 /* INVLPG to clear all paging-structure caches */
819 flush_tlb_kernel_range(addr, addr + PAGE_SIZE-1);
820
821 for (i = 0; i < PTRS_PER_PMD; i++) {
822 if (!pmd_none(pmd_sv[i])) {
823 pte = (pte_t *)pmd_page_vaddr(pmd_sv[i]);
824 free_page((unsigned long)pte);
825 }
826 }
827
828 free_page((unsigned long)pmd_sv);
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829 free_page((unsigned long)pmd);
830
831 return 1;
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832}
833
834/**
835 * pmd_free_pte_page - Clear pmd entry and free pte page.
836 * @pmd: Pointer to a PMD.
785a19f9 837 * @addr: Virtual address associated with pmd.
b6bdb751 838 *
5e0fb5df 839 * Context: The pmd range has been unmapped and TLB purged.
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TK
840 * Return: 1 if clearing the entry succeeded. 0 otherwise.
841 */
785a19f9 842int pmd_free_pte_page(pmd_t *pmd, unsigned long addr)
b6bdb751 843{
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TK
844 pte_t *pte;
845
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TK
846 pte = (pte_t *)pmd_page_vaddr(*pmd);
847 pmd_clear(pmd);
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TK
848
849 /* INVLPG to clear all paging-structure caches */
850 flush_tlb_kernel_range(addr, addr + PAGE_SIZE-1);
851
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TK
852 free_page((unsigned long)pte);
853
854 return 1;
b6bdb751 855}
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856
857#else /* !CONFIG_X86_64 */
858
785a19f9 859int pud_free_pmd_page(pud_t *pud, unsigned long addr)
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860{
861 return pud_none(*pud);
862}
863
864/*
865 * Disable free page handling on x86-PAE. This assures that ioremap()
866 * does not update sync'd pmd entries. See vmalloc_sync_one().
867 */
785a19f9 868int pmd_free_pte_page(pmd_t *pmd, unsigned long addr)
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TK
869{
870 return pmd_none(*pmd);
871}
872
873#endif /* CONFIG_X86_64 */
6b637835 874#endif /* CONFIG_HAVE_ARCH_HUGE_VMAP */