Commit | Line | Data |
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2e5d9c85 | 1 | /* |
2 | * Handle caching attributes in page tables (PAT) | |
3 | * | |
4 | * Authors: Venkatesh Pallipadi <venkatesh.pallipadi@intel.com> | |
5 | * Suresh B Siddha <suresh.b.siddha@intel.com> | |
6 | * | |
7 | * Loosely based on earlier PAT patchset from Eric Biederman and Andi Kleen. | |
8 | */ | |
9 | ||
ad2cde16 IM |
10 | #include <linux/seq_file.h> |
11 | #include <linux/bootmem.h> | |
12 | #include <linux/debugfs.h> | |
2e5d9c85 | 13 | #include <linux/kernel.h> |
92b9af9e | 14 | #include <linux/module.h> |
5a0e3ad6 | 15 | #include <linux/slab.h> |
ad2cde16 | 16 | #include <linux/mm.h> |
2e5d9c85 | 17 | #include <linux/fs.h> |
335ef896 | 18 | #include <linux/rbtree.h> |
2e5d9c85 | 19 | |
ad2cde16 | 20 | #include <asm/cacheflush.h> |
2e5d9c85 | 21 | #include <asm/processor.h> |
ad2cde16 | 22 | #include <asm/tlbflush.h> |
fd12a0d6 | 23 | #include <asm/x86_init.h> |
2e5d9c85 | 24 | #include <asm/pgtable.h> |
2e5d9c85 | 25 | #include <asm/fcntl.h> |
ad2cde16 | 26 | #include <asm/e820.h> |
2e5d9c85 | 27 | #include <asm/mtrr.h> |
ad2cde16 IM |
28 | #include <asm/page.h> |
29 | #include <asm/msr.h> | |
30 | #include <asm/pat.h> | |
e7f260a2 | 31 | #include <asm/io.h> |
2e5d9c85 | 32 | |
be5a0c12 | 33 | #include "pat_internal.h" |
bd809af1 | 34 | #include "mm_internal.h" |
be5a0c12 | 35 | |
9e76561f LR |
36 | #undef pr_fmt |
37 | #define pr_fmt(fmt) "" fmt | |
38 | ||
cb32edf6 | 39 | static int __read_mostly __pat_enabled = IS_ENABLED(CONFIG_X86_PAT); |
2e5d9c85 | 40 | |
1ee4bd92 | 41 | static inline void pat_disable(const char *reason) |
2e5d9c85 | 42 | { |
cb32edf6 | 43 | __pat_enabled = 0; |
9e76561f | 44 | pr_info("x86/PAT: %s\n", reason); |
2e5d9c85 | 45 | } |
2e5d9c85 | 46 | |
be524fb9 | 47 | static int __init nopat(char *str) |
2e5d9c85 | 48 | { |
8d4a4300 | 49 | pat_disable("PAT support disabled."); |
2e5d9c85 | 50 | return 0; |
51 | } | |
8d4a4300 | 52 | early_param("nopat", nopat); |
cb32edf6 LR |
53 | |
54 | bool pat_enabled(void) | |
75a04811 | 55 | { |
cb32edf6 | 56 | return !!__pat_enabled; |
75a04811 | 57 | } |
77b52b4c | 58 | |
be5a0c12 | 59 | int pat_debug_enable; |
ad2cde16 | 60 | |
77b52b4c VP |
61 | static int __init pat_debug_setup(char *str) |
62 | { | |
be5a0c12 | 63 | pat_debug_enable = 1; |
77b52b4c VP |
64 | return 0; |
65 | } | |
66 | __setup("debugpat", pat_debug_setup); | |
67 | ||
8d4a4300 | 68 | static u64 __read_mostly boot_pat_state; |
2e5d9c85 | 69 | |
0dbcae88 TG |
70 | #ifdef CONFIG_X86_PAT |
71 | /* | |
72 | * X86 PAT uses page flags WC and Uncached together to keep track of | |
73 | * memory type of pages that have backing page struct. X86 PAT supports 3 | |
74 | * different memory types, _PAGE_CACHE_MODE_WB, _PAGE_CACHE_MODE_WC and | |
75 | * _PAGE_CACHE_MODE_UC_MINUS and fourth state where page's memory type has not | |
76 | * been changed from its default (value of -1 used to denote this). | |
77 | * Note we do not support _PAGE_CACHE_MODE_UC here. | |
78 | */ | |
79 | ||
80 | #define _PGMT_DEFAULT 0 | |
81 | #define _PGMT_WC (1UL << PG_arch_1) | |
82 | #define _PGMT_UC_MINUS (1UL << PG_uncached) | |
83 | #define _PGMT_WB (1UL << PG_uncached | 1UL << PG_arch_1) | |
84 | #define _PGMT_MASK (1UL << PG_uncached | 1UL << PG_arch_1) | |
85 | #define _PGMT_CLEAR_MASK (~_PGMT_MASK) | |
86 | ||
87 | static inline enum page_cache_mode get_page_memtype(struct page *pg) | |
88 | { | |
89 | unsigned long pg_flags = pg->flags & _PGMT_MASK; | |
90 | ||
91 | if (pg_flags == _PGMT_DEFAULT) | |
92 | return -1; | |
93 | else if (pg_flags == _PGMT_WC) | |
94 | return _PAGE_CACHE_MODE_WC; | |
95 | else if (pg_flags == _PGMT_UC_MINUS) | |
96 | return _PAGE_CACHE_MODE_UC_MINUS; | |
97 | else | |
98 | return _PAGE_CACHE_MODE_WB; | |
99 | } | |
100 | ||
101 | static inline void set_page_memtype(struct page *pg, | |
102 | enum page_cache_mode memtype) | |
103 | { | |
104 | unsigned long memtype_flags; | |
105 | unsigned long old_flags; | |
106 | unsigned long new_flags; | |
107 | ||
108 | switch (memtype) { | |
109 | case _PAGE_CACHE_MODE_WC: | |
110 | memtype_flags = _PGMT_WC; | |
111 | break; | |
112 | case _PAGE_CACHE_MODE_UC_MINUS: | |
113 | memtype_flags = _PGMT_UC_MINUS; | |
114 | break; | |
115 | case _PAGE_CACHE_MODE_WB: | |
116 | memtype_flags = _PGMT_WB; | |
117 | break; | |
118 | default: | |
119 | memtype_flags = _PGMT_DEFAULT; | |
120 | break; | |
121 | } | |
122 | ||
123 | do { | |
124 | old_flags = pg->flags; | |
125 | new_flags = (old_flags & _PGMT_CLEAR_MASK) | memtype_flags; | |
126 | } while (cmpxchg(&pg->flags, old_flags, new_flags) != old_flags); | |
127 | } | |
128 | #else | |
129 | static inline enum page_cache_mode get_page_memtype(struct page *pg) | |
130 | { | |
131 | return -1; | |
132 | } | |
133 | static inline void set_page_memtype(struct page *pg, | |
134 | enum page_cache_mode memtype) | |
135 | { | |
136 | } | |
137 | #endif | |
138 | ||
2e5d9c85 | 139 | enum { |
140 | PAT_UC = 0, /* uncached */ | |
141 | PAT_WC = 1, /* Write combining */ | |
142 | PAT_WT = 4, /* Write Through */ | |
143 | PAT_WP = 5, /* Write Protected */ | |
144 | PAT_WB = 6, /* Write Back (default) */ | |
145 | PAT_UC_MINUS = 7, /* UC, but can be overriden by MTRR */ | |
146 | }; | |
147 | ||
bd809af1 JG |
148 | #define CM(c) (_PAGE_CACHE_MODE_ ## c) |
149 | ||
150 | static enum page_cache_mode pat_get_cache_mode(unsigned pat_val, char *msg) | |
151 | { | |
152 | enum page_cache_mode cache; | |
153 | char *cache_mode; | |
154 | ||
155 | switch (pat_val) { | |
156 | case PAT_UC: cache = CM(UC); cache_mode = "UC "; break; | |
157 | case PAT_WC: cache = CM(WC); cache_mode = "WC "; break; | |
158 | case PAT_WT: cache = CM(WT); cache_mode = "WT "; break; | |
159 | case PAT_WP: cache = CM(WP); cache_mode = "WP "; break; | |
160 | case PAT_WB: cache = CM(WB); cache_mode = "WB "; break; | |
161 | case PAT_UC_MINUS: cache = CM(UC_MINUS); cache_mode = "UC- "; break; | |
162 | default: cache = CM(WB); cache_mode = "WB "; break; | |
163 | } | |
164 | ||
165 | memcpy(msg, cache_mode, 4); | |
166 | ||
167 | return cache; | |
168 | } | |
169 | ||
170 | #undef CM | |
171 | ||
172 | /* | |
173 | * Update the cache mode to pgprot translation tables according to PAT | |
174 | * configuration. | |
175 | * Using lower indices is preferred, so we start with highest index. | |
176 | */ | |
177 | void pat_init_cache_modes(void) | |
178 | { | |
179 | int i; | |
180 | enum page_cache_mode cache; | |
181 | char pat_msg[33]; | |
182 | u64 pat; | |
183 | ||
184 | rdmsrl(MSR_IA32_CR_PAT, pat); | |
185 | pat_msg[32] = 0; | |
186 | for (i = 7; i >= 0; i--) { | |
187 | cache = pat_get_cache_mode((pat >> (i * 8)) & 7, | |
188 | pat_msg + 4 * i); | |
189 | update_cache_mode_entry(i, cache); | |
190 | } | |
9e76561f | 191 | pr_info("x86/PAT: Configuration [0-7]: %s\n", pat_msg); |
bd809af1 JG |
192 | } |
193 | ||
cd7a4e93 | 194 | #define PAT(x, y) ((u64)PAT_ ## y << ((x)*8)) |
2e5d9c85 | 195 | |
196 | void pat_init(void) | |
197 | { | |
198 | u64 pat; | |
e23a8b6a | 199 | bool boot_cpu = !boot_pat_state; |
2e5d9c85 | 200 | |
cb32edf6 | 201 | if (!pat_enabled()) |
2e5d9c85 | 202 | return; |
203 | ||
75a04811 PA |
204 | if (!cpu_has_pat) { |
205 | if (!boot_pat_state) { | |
206 | pat_disable("PAT not supported by CPU."); | |
207 | return; | |
208 | } else { | |
209 | /* | |
210 | * If this happens we are on a secondary CPU, but | |
211 | * switched to PAT on the boot CPU. We have no way to | |
212 | * undo PAT. | |
213 | */ | |
9e76561f | 214 | pr_err("x86/PAT: PAT enabled, but not supported by secondary CPU\n"); |
75a04811 PA |
215 | BUG(); |
216 | } | |
8d4a4300 | 217 | } |
2e5d9c85 | 218 | |
219 | /* Set PWT to Write-Combining. All other bits stay the same */ | |
220 | /* | |
221 | * PTE encoding used in Linux: | |
222 | * PAT | |
223 | * |PCD | |
224 | * ||PWT | |
225 | * ||| | |
226 | * 000 WB _PAGE_CACHE_WB | |
227 | * 001 WC _PAGE_CACHE_WC | |
228 | * 010 UC- _PAGE_CACHE_UC_MINUS | |
229 | * 011 UC _PAGE_CACHE_UC | |
230 | * PAT bit unused | |
231 | */ | |
cd7a4e93 AH |
232 | pat = PAT(0, WB) | PAT(1, WC) | PAT(2, UC_MINUS) | PAT(3, UC) | |
233 | PAT(4, WB) | PAT(5, WC) | PAT(6, UC_MINUS) | PAT(7, UC); | |
2e5d9c85 | 234 | |
235 | /* Boot CPU check */ | |
9d34cfdf | 236 | if (!boot_pat_state) { |
2e5d9c85 | 237 | rdmsrl(MSR_IA32_CR_PAT, boot_pat_state); |
9d34cfdf JG |
238 | if (!boot_pat_state) { |
239 | pat_disable("PAT read returns always zero, disabled."); | |
240 | return; | |
241 | } | |
242 | } | |
2e5d9c85 | 243 | |
244 | wrmsrl(MSR_IA32_CR_PAT, pat); | |
e23a8b6a RD |
245 | |
246 | if (boot_cpu) | |
bd809af1 | 247 | pat_init_cache_modes(); |
2e5d9c85 | 248 | } |
249 | ||
250 | #undef PAT | |
251 | ||
9e41a49a | 252 | static DEFINE_SPINLOCK(memtype_lock); /* protects memtype accesses */ |
335ef896 | 253 | |
2e5d9c85 | 254 | /* |
255 | * Does intersection of PAT memory type and MTRR memory type and returns | |
256 | * the resulting memory type as PAT understands it. | |
257 | * (Type in pat and mtrr will not have same value) | |
258 | * The intersection is based on "Effective Memory Type" tables in IA-32 | |
259 | * SDM vol 3a | |
260 | */ | |
e00c8cc9 JG |
261 | static unsigned long pat_x_mtrr_type(u64 start, u64 end, |
262 | enum page_cache_mode req_type) | |
2e5d9c85 | 263 | { |
c26421d0 VP |
264 | /* |
265 | * Look for MTRR hint to get the effective type in case where PAT | |
266 | * request is for WB. | |
267 | */ | |
e00c8cc9 | 268 | if (req_type == _PAGE_CACHE_MODE_WB) { |
b73522e0 | 269 | u8 mtrr_type, uniform; |
dd0c7c49 | 270 | |
b73522e0 | 271 | mtrr_type = mtrr_type_lookup(start, end, &uniform); |
b6ff32d9 | 272 | if (mtrr_type != MTRR_TYPE_WRBACK) |
e00c8cc9 | 273 | return _PAGE_CACHE_MODE_UC_MINUS; |
b6ff32d9 | 274 | |
e00c8cc9 | 275 | return _PAGE_CACHE_MODE_WB; |
dd0c7c49 AH |
276 | } |
277 | ||
278 | return req_type; | |
2e5d9c85 | 279 | } |
280 | ||
fa83523f JD |
281 | struct pagerange_state { |
282 | unsigned long cur_pfn; | |
283 | int ram; | |
284 | int not_ram; | |
285 | }; | |
286 | ||
287 | static int | |
288 | pagerange_is_ram_callback(unsigned long initial_pfn, unsigned long total_nr_pages, void *arg) | |
289 | { | |
290 | struct pagerange_state *state = arg; | |
291 | ||
292 | state->not_ram |= initial_pfn > state->cur_pfn; | |
293 | state->ram |= total_nr_pages > 0; | |
294 | state->cur_pfn = initial_pfn + total_nr_pages; | |
295 | ||
296 | return state->ram && state->not_ram; | |
297 | } | |
298 | ||
3709c857 | 299 | static int pat_pagerange_is_ram(resource_size_t start, resource_size_t end) |
be03d9e8 | 300 | { |
fa83523f JD |
301 | int ret = 0; |
302 | unsigned long start_pfn = start >> PAGE_SHIFT; | |
303 | unsigned long end_pfn = (end + PAGE_SIZE - 1) >> PAGE_SHIFT; | |
304 | struct pagerange_state state = {start_pfn, 0, 0}; | |
305 | ||
306 | /* | |
307 | * For legacy reasons, physical address range in the legacy ISA | |
308 | * region is tracked as non-RAM. This will allow users of | |
309 | * /dev/mem to map portions of legacy ISA region, even when | |
310 | * some of those portions are listed(or not even listed) with | |
311 | * different e820 types(RAM/reserved/..) | |
312 | */ | |
313 | if (start_pfn < ISA_END_ADDRESS >> PAGE_SHIFT) | |
314 | start_pfn = ISA_END_ADDRESS >> PAGE_SHIFT; | |
315 | ||
316 | if (start_pfn < end_pfn) { | |
317 | ret = walk_system_ram_range(start_pfn, end_pfn - start_pfn, | |
318 | &state, pagerange_is_ram_callback); | |
be03d9e8 SS |
319 | } |
320 | ||
fa83523f | 321 | return (ret > 0) ? -1 : (state.ram ? 1 : 0); |
be03d9e8 SS |
322 | } |
323 | ||
9542ada8 | 324 | /* |
f5841740 VP |
325 | * For RAM pages, we use page flags to mark the pages with appropriate type. |
326 | * Here we do two pass: | |
327 | * - Find the memtype of all the pages in the range, look for any conflicts | |
328 | * - In case of no conflicts, set the new memtype for pages in the range | |
9542ada8 | 329 | */ |
e00c8cc9 JG |
330 | static int reserve_ram_pages_type(u64 start, u64 end, |
331 | enum page_cache_mode req_type, | |
332 | enum page_cache_mode *new_type) | |
9542ada8 SS |
333 | { |
334 | struct page *page; | |
f5841740 VP |
335 | u64 pfn; |
336 | ||
e00c8cc9 | 337 | if (req_type == _PAGE_CACHE_MODE_UC) { |
f5841740 VP |
338 | /* We do not support strong UC */ |
339 | WARN_ON_ONCE(1); | |
e00c8cc9 | 340 | req_type = _PAGE_CACHE_MODE_UC_MINUS; |
f5841740 | 341 | } |
9542ada8 SS |
342 | |
343 | for (pfn = (start >> PAGE_SHIFT); pfn < (end >> PAGE_SHIFT); ++pfn) { | |
e00c8cc9 | 344 | enum page_cache_mode type; |
9542ada8 | 345 | |
f5841740 VP |
346 | page = pfn_to_page(pfn); |
347 | type = get_page_memtype(page); | |
348 | if (type != -1) { | |
9e76561f | 349 | pr_info("x86/PAT: reserve_ram_pages_type failed [mem %#010Lx-%#010Lx], track 0x%x, req 0x%x\n", |
365811d6 | 350 | start, end - 1, type, req_type); |
f5841740 VP |
351 | if (new_type) |
352 | *new_type = type; | |
353 | ||
354 | return -EBUSY; | |
355 | } | |
9542ada8 | 356 | } |
9542ada8 | 357 | |
f5841740 VP |
358 | if (new_type) |
359 | *new_type = req_type; | |
360 | ||
361 | for (pfn = (start >> PAGE_SHIFT); pfn < (end >> PAGE_SHIFT); ++pfn) { | |
9542ada8 | 362 | page = pfn_to_page(pfn); |
f5841740 | 363 | set_page_memtype(page, req_type); |
9542ada8 | 364 | } |
f5841740 | 365 | return 0; |
9542ada8 SS |
366 | } |
367 | ||
368 | static int free_ram_pages_type(u64 start, u64 end) | |
369 | { | |
370 | struct page *page; | |
f5841740 | 371 | u64 pfn; |
9542ada8 SS |
372 | |
373 | for (pfn = (start >> PAGE_SHIFT); pfn < (end >> PAGE_SHIFT); ++pfn) { | |
374 | page = pfn_to_page(pfn); | |
f5841740 | 375 | set_page_memtype(page, -1); |
9542ada8 SS |
376 | } |
377 | return 0; | |
9542ada8 SS |
378 | } |
379 | ||
e7f260a2 | 380 | /* |
381 | * req_type typically has one of the: | |
e00c8cc9 JG |
382 | * - _PAGE_CACHE_MODE_WB |
383 | * - _PAGE_CACHE_MODE_WC | |
384 | * - _PAGE_CACHE_MODE_UC_MINUS | |
385 | * - _PAGE_CACHE_MODE_UC | |
e7f260a2 | 386 | * |
ac97991e AH |
387 | * If new_type is NULL, function will return an error if it cannot reserve the |
388 | * region with req_type. If new_type is non-NULL, function will return | |
389 | * available type in new_type in case of no error. In case of any error | |
e7f260a2 | 390 | * it will return a negative return value. |
391 | */ | |
e00c8cc9 JG |
392 | int reserve_memtype(u64 start, u64 end, enum page_cache_mode req_type, |
393 | enum page_cache_mode *new_type) | |
2e5d9c85 | 394 | { |
be5a0c12 | 395 | struct memtype *new; |
e00c8cc9 | 396 | enum page_cache_mode actual_type; |
9542ada8 | 397 | int is_range_ram; |
ad2cde16 | 398 | int err = 0; |
2e5d9c85 | 399 | |
ad2cde16 | 400 | BUG_ON(start >= end); /* end is exclusive */ |
69e26be9 | 401 | |
cb32edf6 | 402 | if (!pat_enabled()) { |
e7f260a2 | 403 | /* This is identical to page table setting without PAT */ |
ac97991e | 404 | if (new_type) { |
e00c8cc9 JG |
405 | if (req_type == _PAGE_CACHE_MODE_WC) |
406 | *new_type = _PAGE_CACHE_MODE_UC_MINUS; | |
ac97991e | 407 | else |
e00c8cc9 | 408 | *new_type = req_type; |
e7f260a2 | 409 | } |
2e5d9c85 | 410 | return 0; |
411 | } | |
412 | ||
413 | /* Low ISA region is always mapped WB in page table. No need to track */ | |
8a271389 | 414 | if (x86_platform.is_untracked_pat_range(start, end)) { |
ac97991e | 415 | if (new_type) |
e00c8cc9 | 416 | *new_type = _PAGE_CACHE_MODE_WB; |
2e5d9c85 | 417 | return 0; |
418 | } | |
419 | ||
b6ff32d9 SS |
420 | /* |
421 | * Call mtrr_lookup to get the type hint. This is an | |
422 | * optimization for /dev/mem mmap'ers into WB memory (BIOS | |
423 | * tools and ACPI tools). Use WB request for WB memory and use | |
424 | * UC_MINUS otherwise. | |
425 | */ | |
e00c8cc9 | 426 | actual_type = pat_x_mtrr_type(start, end, req_type); |
2e5d9c85 | 427 | |
95971342 SS |
428 | if (new_type) |
429 | *new_type = actual_type; | |
430 | ||
be03d9e8 | 431 | is_range_ram = pat_pagerange_is_ram(start, end); |
f5841740 VP |
432 | if (is_range_ram == 1) { |
433 | ||
f5841740 | 434 | err = reserve_ram_pages_type(start, end, req_type, new_type); |
f5841740 VP |
435 | |
436 | return err; | |
437 | } else if (is_range_ram < 0) { | |
9542ada8 | 438 | return -EINVAL; |
f5841740 | 439 | } |
9542ada8 | 440 | |
6a4f3b52 | 441 | new = kzalloc(sizeof(struct memtype), GFP_KERNEL); |
ac97991e | 442 | if (!new) |
2e5d9c85 | 443 | return -ENOMEM; |
444 | ||
ad2cde16 IM |
445 | new->start = start; |
446 | new->end = end; | |
447 | new->type = actual_type; | |
2e5d9c85 | 448 | |
2e5d9c85 | 449 | spin_lock(&memtype_lock); |
450 | ||
9e41a49a | 451 | err = rbt_memtype_check_insert(new, new_type); |
2e5d9c85 | 452 | if (err) { |
9e76561f LR |
453 | pr_info("x86/PAT: reserve_memtype failed [mem %#010Lx-%#010Lx], track %s, req %s\n", |
454 | start, end - 1, | |
455 | cattr_name(new->type), cattr_name(req_type)); | |
ac97991e | 456 | kfree(new); |
2e5d9c85 | 457 | spin_unlock(&memtype_lock); |
ad2cde16 | 458 | |
2e5d9c85 | 459 | return err; |
460 | } | |
461 | ||
2e5d9c85 | 462 | spin_unlock(&memtype_lock); |
3e9c83b3 | 463 | |
365811d6 BH |
464 | dprintk("reserve_memtype added [mem %#010Lx-%#010Lx], track %s, req %s, ret %s\n", |
465 | start, end - 1, cattr_name(new->type), cattr_name(req_type), | |
3e9c83b3 AH |
466 | new_type ? cattr_name(*new_type) : "-"); |
467 | ||
2e5d9c85 | 468 | return err; |
469 | } | |
470 | ||
471 | int free_memtype(u64 start, u64 end) | |
472 | { | |
2e5d9c85 | 473 | int err = -EINVAL; |
9542ada8 | 474 | int is_range_ram; |
20413f27 | 475 | struct memtype *entry; |
2e5d9c85 | 476 | |
cb32edf6 | 477 | if (!pat_enabled()) |
2e5d9c85 | 478 | return 0; |
2e5d9c85 | 479 | |
480 | /* Low ISA region is always mapped WB. No need to track */ | |
8a271389 | 481 | if (x86_platform.is_untracked_pat_range(start, end)) |
2e5d9c85 | 482 | return 0; |
2e5d9c85 | 483 | |
be03d9e8 | 484 | is_range_ram = pat_pagerange_is_ram(start, end); |
f5841740 VP |
485 | if (is_range_ram == 1) { |
486 | ||
f5841740 | 487 | err = free_ram_pages_type(start, end); |
f5841740 VP |
488 | |
489 | return err; | |
490 | } else if (is_range_ram < 0) { | |
9542ada8 | 491 | return -EINVAL; |
f5841740 | 492 | } |
9542ada8 | 493 | |
2e5d9c85 | 494 | spin_lock(&memtype_lock); |
20413f27 | 495 | entry = rbt_memtype_erase(start, end); |
2e5d9c85 | 496 | spin_unlock(&memtype_lock); |
497 | ||
20413f27 | 498 | if (!entry) { |
9e76561f LR |
499 | pr_info("x86/PAT: %s:%d freeing invalid memtype [mem %#010Lx-%#010Lx]\n", |
500 | current->comm, current->pid, start, end - 1); | |
20413f27 | 501 | return -EINVAL; |
2e5d9c85 | 502 | } |
6997ab49 | 503 | |
20413f27 XF |
504 | kfree(entry); |
505 | ||
365811d6 | 506 | dprintk("free_memtype request [mem %#010Lx-%#010Lx]\n", start, end - 1); |
ad2cde16 | 507 | |
20413f27 | 508 | return 0; |
2e5d9c85 | 509 | } |
510 | ||
f0970c13 | 511 | |
637b86e7 VP |
512 | /** |
513 | * lookup_memtype - Looksup the memory type for a physical address | |
514 | * @paddr: physical address of which memory type needs to be looked up | |
515 | * | |
516 | * Only to be called when PAT is enabled | |
517 | * | |
2a374698 JG |
518 | * Returns _PAGE_CACHE_MODE_WB, _PAGE_CACHE_MODE_WC, _PAGE_CACHE_MODE_UC_MINUS |
519 | * or _PAGE_CACHE_MODE_UC | |
637b86e7 | 520 | */ |
2a374698 | 521 | static enum page_cache_mode lookup_memtype(u64 paddr) |
637b86e7 | 522 | { |
2a374698 | 523 | enum page_cache_mode rettype = _PAGE_CACHE_MODE_WB; |
637b86e7 VP |
524 | struct memtype *entry; |
525 | ||
8a271389 | 526 | if (x86_platform.is_untracked_pat_range(paddr, paddr + PAGE_SIZE)) |
637b86e7 VP |
527 | return rettype; |
528 | ||
529 | if (pat_pagerange_is_ram(paddr, paddr + PAGE_SIZE)) { | |
530 | struct page *page; | |
637b86e7 VP |
531 | page = pfn_to_page(paddr >> PAGE_SHIFT); |
532 | rettype = get_page_memtype(page); | |
637b86e7 VP |
533 | /* |
534 | * -1 from get_page_memtype() implies RAM page is in its | |
535 | * default state and not reserved, and hence of type WB | |
536 | */ | |
537 | if (rettype == -1) | |
2a374698 | 538 | rettype = _PAGE_CACHE_MODE_WB; |
637b86e7 VP |
539 | |
540 | return rettype; | |
541 | } | |
542 | ||
543 | spin_lock(&memtype_lock); | |
544 | ||
9e41a49a | 545 | entry = rbt_memtype_lookup(paddr); |
637b86e7 VP |
546 | if (entry != NULL) |
547 | rettype = entry->type; | |
548 | else | |
2a374698 | 549 | rettype = _PAGE_CACHE_MODE_UC_MINUS; |
637b86e7 VP |
550 | |
551 | spin_unlock(&memtype_lock); | |
552 | return rettype; | |
553 | } | |
554 | ||
9fd126bc VP |
555 | /** |
556 | * io_reserve_memtype - Request a memory type mapping for a region of memory | |
557 | * @start: start (physical address) of the region | |
558 | * @end: end (physical address) of the region | |
559 | * @type: A pointer to memtype, with requested type. On success, requested | |
560 | * or any other compatible type that was available for the region is returned | |
561 | * | |
562 | * On success, returns 0 | |
563 | * On failure, returns non-zero | |
564 | */ | |
565 | int io_reserve_memtype(resource_size_t start, resource_size_t end, | |
49a3b3cb | 566 | enum page_cache_mode *type) |
9fd126bc | 567 | { |
b855192c | 568 | resource_size_t size = end - start; |
49a3b3cb JG |
569 | enum page_cache_mode req_type = *type; |
570 | enum page_cache_mode new_type; | |
9fd126bc VP |
571 | int ret; |
572 | ||
b855192c | 573 | WARN_ON_ONCE(iomem_map_sanity_check(start, size)); |
9fd126bc VP |
574 | |
575 | ret = reserve_memtype(start, end, req_type, &new_type); | |
576 | if (ret) | |
577 | goto out_err; | |
578 | ||
b855192c | 579 | if (!is_new_memtype_allowed(start, size, req_type, new_type)) |
9fd126bc VP |
580 | goto out_free; |
581 | ||
b855192c | 582 | if (kernel_map_sync_memtype(start, size, new_type) < 0) |
9fd126bc VP |
583 | goto out_free; |
584 | ||
585 | *type = new_type; | |
586 | return 0; | |
587 | ||
588 | out_free: | |
589 | free_memtype(start, end); | |
590 | ret = -EBUSY; | |
591 | out_err: | |
592 | return ret; | |
593 | } | |
594 | ||
595 | /** | |
596 | * io_free_memtype - Release a memory type mapping for a region of memory | |
597 | * @start: start (physical address) of the region | |
598 | * @end: end (physical address) of the region | |
599 | */ | |
600 | void io_free_memtype(resource_size_t start, resource_size_t end) | |
601 | { | |
602 | free_memtype(start, end); | |
603 | } | |
604 | ||
f0970c13 | 605 | pgprot_t phys_mem_access_prot(struct file *file, unsigned long pfn, |
606 | unsigned long size, pgprot_t vma_prot) | |
607 | { | |
608 | return vma_prot; | |
609 | } | |
610 | ||
d092633b | 611 | #ifdef CONFIG_STRICT_DEVMEM |
1f40a8bf | 612 | /* This check is done in drivers/char/mem.c in case of STRICT_DEVMEM */ |
0124cecf VP |
613 | static inline int range_is_allowed(unsigned long pfn, unsigned long size) |
614 | { | |
615 | return 1; | |
616 | } | |
617 | #else | |
9e41bff2 | 618 | /* This check is needed to avoid cache aliasing when PAT is enabled */ |
0124cecf VP |
619 | static inline int range_is_allowed(unsigned long pfn, unsigned long size) |
620 | { | |
621 | u64 from = ((u64)pfn) << PAGE_SHIFT; | |
622 | u64 to = from + size; | |
623 | u64 cursor = from; | |
624 | ||
cb32edf6 | 625 | if (!pat_enabled()) |
9e41bff2 RT |
626 | return 1; |
627 | ||
0124cecf VP |
628 | while (cursor < to) { |
629 | if (!devmem_is_allowed(pfn)) { | |
9e76561f LR |
630 | pr_info("x86/PAT: Program %s tried to access /dev/mem between [mem %#010Lx-%#010Lx], PAT prevents it\n", |
631 | current->comm, from, to - 1); | |
0124cecf VP |
632 | return 0; |
633 | } | |
634 | cursor += PAGE_SIZE; | |
635 | pfn++; | |
636 | } | |
637 | return 1; | |
638 | } | |
d092633b | 639 | #endif /* CONFIG_STRICT_DEVMEM */ |
0124cecf | 640 | |
f0970c13 | 641 | int phys_mem_access_prot_allowed(struct file *file, unsigned long pfn, |
642 | unsigned long size, pgprot_t *vma_prot) | |
643 | { | |
e00c8cc9 | 644 | enum page_cache_mode pcm = _PAGE_CACHE_MODE_WB; |
f0970c13 | 645 | |
0124cecf VP |
646 | if (!range_is_allowed(pfn, size)) |
647 | return 0; | |
648 | ||
6b2f3d1f | 649 | if (file->f_flags & O_DSYNC) |
e00c8cc9 | 650 | pcm = _PAGE_CACHE_MODE_UC_MINUS; |
f0970c13 | 651 | |
652 | #ifdef CONFIG_X86_32 | |
653 | /* | |
654 | * On the PPro and successors, the MTRRs are used to set | |
655 | * memory types for physical addresses outside main memory, | |
656 | * so blindly setting UC or PWT on those pages is wrong. | |
657 | * For Pentiums and earlier, the surround logic should disable | |
658 | * caching for the high addresses through the KEN pin, but | |
659 | * we maintain the tradition of paranoia in this code. | |
660 | */ | |
cb32edf6 | 661 | if (!pat_enabled() && |
cd7a4e93 AH |
662 | !(boot_cpu_has(X86_FEATURE_MTRR) || |
663 | boot_cpu_has(X86_FEATURE_K6_MTRR) || | |
664 | boot_cpu_has(X86_FEATURE_CYRIX_ARR) || | |
665 | boot_cpu_has(X86_FEATURE_CENTAUR_MCR)) && | |
666 | (pfn << PAGE_SHIFT) >= __pa(high_memory)) { | |
e00c8cc9 | 667 | pcm = _PAGE_CACHE_MODE_UC; |
f0970c13 | 668 | } |
669 | #endif | |
670 | ||
e7f260a2 | 671 | *vma_prot = __pgprot((pgprot_val(*vma_prot) & ~_PAGE_CACHE_MASK) | |
e00c8cc9 | 672 | cachemode2protval(pcm)); |
f0970c13 | 673 | return 1; |
674 | } | |
e7f260a2 | 675 | |
7880f746 VP |
676 | /* |
677 | * Change the memory type for the physial address range in kernel identity | |
678 | * mapping space if that range is a part of identity map. | |
679 | */ | |
b14097bd JG |
680 | int kernel_map_sync_memtype(u64 base, unsigned long size, |
681 | enum page_cache_mode pcm) | |
7880f746 VP |
682 | { |
683 | unsigned long id_sz; | |
684 | ||
a25b9316 | 685 | if (base > __pa(high_memory-1)) |
7880f746 VP |
686 | return 0; |
687 | ||
60f583d5 DH |
688 | /* |
689 | * some areas in the middle of the kernel identity range | |
690 | * are not mapped, like the PCI space. | |
691 | */ | |
692 | if (!page_is_ram(base >> PAGE_SHIFT)) | |
693 | return 0; | |
694 | ||
a25b9316 | 695 | id_sz = (__pa(high_memory-1) <= base + size) ? |
7880f746 VP |
696 | __pa(high_memory) - base : |
697 | size; | |
698 | ||
b14097bd | 699 | if (ioremap_change_attr((unsigned long)__va(base), id_sz, pcm) < 0) { |
9e76561f | 700 | pr_info("x86/PAT: %s:%d ioremap_change_attr failed %s for [mem %#010Lx-%#010Lx]\n", |
7880f746 | 701 | current->comm, current->pid, |
e00c8cc9 | 702 | cattr_name(pcm), |
365811d6 | 703 | base, (unsigned long long)(base + size-1)); |
7880f746 VP |
704 | return -EINVAL; |
705 | } | |
706 | return 0; | |
707 | } | |
708 | ||
5899329b | 709 | /* |
710 | * Internal interface to reserve a range of physical memory with prot. | |
711 | * Reserved non RAM regions only and after successful reserve_memtype, | |
712 | * this func also keeps identity mapping (if any) in sync with this new prot. | |
713 | */ | |
cdecff68 | 714 | static int reserve_pfn_range(u64 paddr, unsigned long size, pgprot_t *vma_prot, |
715 | int strict_prot) | |
5899329b | 716 | { |
717 | int is_ram = 0; | |
7880f746 | 718 | int ret; |
e00c8cc9 JG |
719 | enum page_cache_mode want_pcm = pgprot2cachemode(*vma_prot); |
720 | enum page_cache_mode pcm = want_pcm; | |
5899329b | 721 | |
be03d9e8 | 722 | is_ram = pat_pagerange_is_ram(paddr, paddr + size); |
5899329b | 723 | |
be03d9e8 | 724 | /* |
d886c73c VP |
725 | * reserve_pfn_range() for RAM pages. We do not refcount to keep |
726 | * track of number of mappings of RAM pages. We can assert that | |
727 | * the type requested matches the type of first page in the range. | |
be03d9e8 | 728 | */ |
d886c73c | 729 | if (is_ram) { |
cb32edf6 | 730 | if (!pat_enabled()) |
d886c73c VP |
731 | return 0; |
732 | ||
e00c8cc9 JG |
733 | pcm = lookup_memtype(paddr); |
734 | if (want_pcm != pcm) { | |
9e76561f | 735 | pr_warn("x86/PAT: %s:%d map pfn RAM range req %s for [mem %#010Lx-%#010Lx], got %s\n", |
d886c73c | 736 | current->comm, current->pid, |
e00c8cc9 | 737 | cattr_name(want_pcm), |
d886c73c | 738 | (unsigned long long)paddr, |
365811d6 | 739 | (unsigned long long)(paddr + size - 1), |
e00c8cc9 | 740 | cattr_name(pcm)); |
d886c73c | 741 | *vma_prot = __pgprot((pgprot_val(*vma_prot) & |
e00c8cc9 JG |
742 | (~_PAGE_CACHE_MASK)) | |
743 | cachemode2protval(pcm)); | |
d886c73c | 744 | } |
4bb9c5c0 | 745 | return 0; |
d886c73c | 746 | } |
5899329b | 747 | |
e00c8cc9 | 748 | ret = reserve_memtype(paddr, paddr + size, want_pcm, &pcm); |
5899329b | 749 | if (ret) |
750 | return ret; | |
751 | ||
e00c8cc9 | 752 | if (pcm != want_pcm) { |
1adcaafe | 753 | if (strict_prot || |
e00c8cc9 | 754 | !is_new_memtype_allowed(paddr, size, want_pcm, pcm)) { |
cdecff68 | 755 | free_memtype(paddr, paddr + size); |
9e76561f LR |
756 | pr_err("x86/PAT: %s:%d map pfn expected mapping type %s for [mem %#010Lx-%#010Lx], got %s\n", |
757 | current->comm, current->pid, | |
758 | cattr_name(want_pcm), | |
759 | (unsigned long long)paddr, | |
760 | (unsigned long long)(paddr + size - 1), | |
761 | cattr_name(pcm)); | |
cdecff68 | 762 | return -EINVAL; |
763 | } | |
764 | /* | |
765 | * We allow returning different type than the one requested in | |
766 | * non strict case. | |
767 | */ | |
768 | *vma_prot = __pgprot((pgprot_val(*vma_prot) & | |
769 | (~_PAGE_CACHE_MASK)) | | |
e00c8cc9 | 770 | cachemode2protval(pcm)); |
5899329b | 771 | } |
772 | ||
e00c8cc9 | 773 | if (kernel_map_sync_memtype(paddr, size, pcm) < 0) { |
5899329b | 774 | free_memtype(paddr, paddr + size); |
5899329b | 775 | return -EINVAL; |
776 | } | |
777 | return 0; | |
778 | } | |
779 | ||
780 | /* | |
781 | * Internal interface to free a range of physical memory. | |
782 | * Frees non RAM regions only. | |
783 | */ | |
784 | static void free_pfn_range(u64 paddr, unsigned long size) | |
785 | { | |
786 | int is_ram; | |
787 | ||
be03d9e8 | 788 | is_ram = pat_pagerange_is_ram(paddr, paddr + size); |
5899329b | 789 | if (is_ram == 0) |
790 | free_memtype(paddr, paddr + size); | |
791 | } | |
792 | ||
793 | /* | |
5180da41 | 794 | * track_pfn_copy is called when vma that is covering the pfnmap gets |
5899329b | 795 | * copied through copy_page_range(). |
796 | * | |
797 | * If the vma has a linear pfn mapping for the entire range, we get the prot | |
798 | * from pte and reserve the entire vma range with single reserve_pfn_range call. | |
5899329b | 799 | */ |
5180da41 | 800 | int track_pfn_copy(struct vm_area_struct *vma) |
5899329b | 801 | { |
c1c15b65 | 802 | resource_size_t paddr; |
982d789a | 803 | unsigned long prot; |
4b065046 | 804 | unsigned long vma_size = vma->vm_end - vma->vm_start; |
cdecff68 | 805 | pgprot_t pgprot; |
5899329b | 806 | |
b3b9c293 | 807 | if (vma->vm_flags & VM_PAT) { |
5899329b | 808 | /* |
982d789a | 809 | * reserve the whole chunk covered by vma. We need the |
810 | * starting address and protection from pte. | |
5899329b | 811 | */ |
4b065046 | 812 | if (follow_phys(vma, vma->vm_start, 0, &prot, &paddr)) { |
5899329b | 813 | WARN_ON_ONCE(1); |
982d789a | 814 | return -EINVAL; |
5899329b | 815 | } |
cdecff68 | 816 | pgprot = __pgprot(prot); |
817 | return reserve_pfn_range(paddr, vma_size, &pgprot, 1); | |
5899329b | 818 | } |
819 | ||
5899329b | 820 | return 0; |
5899329b | 821 | } |
822 | ||
823 | /* | |
5899329b | 824 | * prot is passed in as a parameter for the new mapping. If the vma has a |
825 | * linear pfn mapping for the entire range reserve the entire vma range with | |
826 | * single reserve_pfn_range call. | |
5899329b | 827 | */ |
5180da41 | 828 | int track_pfn_remap(struct vm_area_struct *vma, pgprot_t *prot, |
b3b9c293 | 829 | unsigned long pfn, unsigned long addr, unsigned long size) |
5899329b | 830 | { |
b1a86e15 | 831 | resource_size_t paddr = (resource_size_t)pfn << PAGE_SHIFT; |
2a374698 | 832 | enum page_cache_mode pcm; |
5899329b | 833 | |
b1a86e15 | 834 | /* reserve the whole chunk starting from paddr */ |
b3b9c293 KK |
835 | if (addr == vma->vm_start && size == (vma->vm_end - vma->vm_start)) { |
836 | int ret; | |
837 | ||
838 | ret = reserve_pfn_range(paddr, size, prot, 0); | |
839 | if (!ret) | |
840 | vma->vm_flags |= VM_PAT; | |
841 | return ret; | |
842 | } | |
5899329b | 843 | |
cb32edf6 | 844 | if (!pat_enabled()) |
10876376 VP |
845 | return 0; |
846 | ||
5180da41 SS |
847 | /* |
848 | * For anything smaller than the vma size we set prot based on the | |
849 | * lookup. | |
850 | */ | |
2a374698 | 851 | pcm = lookup_memtype(paddr); |
5180da41 SS |
852 | |
853 | /* Check memtype for the remaining pages */ | |
854 | while (size > PAGE_SIZE) { | |
855 | size -= PAGE_SIZE; | |
856 | paddr += PAGE_SIZE; | |
2a374698 | 857 | if (pcm != lookup_memtype(paddr)) |
5180da41 SS |
858 | return -EINVAL; |
859 | } | |
860 | ||
861 | *prot = __pgprot((pgprot_val(vma->vm_page_prot) & (~_PAGE_CACHE_MASK)) | | |
2a374698 | 862 | cachemode2protval(pcm)); |
5180da41 SS |
863 | |
864 | return 0; | |
865 | } | |
866 | ||
867 | int track_pfn_insert(struct vm_area_struct *vma, pgprot_t *prot, | |
868 | unsigned long pfn) | |
869 | { | |
2a374698 | 870 | enum page_cache_mode pcm; |
5180da41 | 871 | |
cb32edf6 | 872 | if (!pat_enabled()) |
5180da41 SS |
873 | return 0; |
874 | ||
875 | /* Set prot based on lookup */ | |
2a374698 | 876 | pcm = lookup_memtype((resource_size_t)pfn << PAGE_SHIFT); |
10876376 | 877 | *prot = __pgprot((pgprot_val(vma->vm_page_prot) & (~_PAGE_CACHE_MASK)) | |
2a374698 | 878 | cachemode2protval(pcm)); |
10876376 | 879 | |
5899329b | 880 | return 0; |
5899329b | 881 | } |
882 | ||
883 | /* | |
5180da41 | 884 | * untrack_pfn is called while unmapping a pfnmap for a region. |
5899329b | 885 | * untrack can be called for a specific region indicated by pfn and size or |
b1a86e15 | 886 | * can be for the entire vma (in which case pfn, size are zero). |
5899329b | 887 | */ |
5180da41 SS |
888 | void untrack_pfn(struct vm_area_struct *vma, unsigned long pfn, |
889 | unsigned long size) | |
5899329b | 890 | { |
c1c15b65 | 891 | resource_size_t paddr; |
b1a86e15 | 892 | unsigned long prot; |
5899329b | 893 | |
b3b9c293 | 894 | if (!(vma->vm_flags & VM_PAT)) |
5899329b | 895 | return; |
b1a86e15 SS |
896 | |
897 | /* free the chunk starting from pfn or the whole chunk */ | |
898 | paddr = (resource_size_t)pfn << PAGE_SHIFT; | |
899 | if (!paddr && !size) { | |
900 | if (follow_phys(vma, vma->vm_start, 0, &prot, &paddr)) { | |
901 | WARN_ON_ONCE(1); | |
902 | return; | |
903 | } | |
904 | ||
905 | size = vma->vm_end - vma->vm_start; | |
5899329b | 906 | } |
b1a86e15 | 907 | free_pfn_range(paddr, size); |
b3b9c293 | 908 | vma->vm_flags &= ~VM_PAT; |
5899329b | 909 | } |
910 | ||
2520bd31 | 911 | pgprot_t pgprot_writecombine(pgprot_t prot) |
912 | { | |
cb32edf6 | 913 | if (pat_enabled()) |
e00c8cc9 JG |
914 | return __pgprot(pgprot_val(prot) | |
915 | cachemode2protval(_PAGE_CACHE_MODE_WC)); | |
2520bd31 | 916 | else |
917 | return pgprot_noncached(prot); | |
918 | } | |
92b9af9e | 919 | EXPORT_SYMBOL_GPL(pgprot_writecombine); |
2520bd31 | 920 | |
012f09e7 | 921 | #if defined(CONFIG_DEBUG_FS) && defined(CONFIG_X86_PAT) |
fec0962e | 922 | |
fec0962e | 923 | static struct memtype *memtype_get_idx(loff_t pos) |
924 | { | |
be5a0c12 | 925 | struct memtype *print_entry; |
926 | int ret; | |
fec0962e | 927 | |
be5a0c12 | 928 | print_entry = kzalloc(sizeof(struct memtype), GFP_KERNEL); |
fec0962e | 929 | if (!print_entry) |
930 | return NULL; | |
931 | ||
932 | spin_lock(&memtype_lock); | |
9e41a49a | 933 | ret = rbt_memtype_copy_nth_element(print_entry, pos); |
fec0962e | 934 | spin_unlock(&memtype_lock); |
ad2cde16 | 935 | |
be5a0c12 | 936 | if (!ret) { |
937 | return print_entry; | |
938 | } else { | |
939 | kfree(print_entry); | |
940 | return NULL; | |
941 | } | |
fec0962e | 942 | } |
943 | ||
944 | static void *memtype_seq_start(struct seq_file *seq, loff_t *pos) | |
945 | { | |
946 | if (*pos == 0) { | |
947 | ++*pos; | |
3736708f | 948 | seq_puts(seq, "PAT memtype list:\n"); |
fec0962e | 949 | } |
950 | ||
951 | return memtype_get_idx(*pos); | |
952 | } | |
953 | ||
954 | static void *memtype_seq_next(struct seq_file *seq, void *v, loff_t *pos) | |
955 | { | |
956 | ++*pos; | |
957 | return memtype_get_idx(*pos); | |
958 | } | |
959 | ||
960 | static void memtype_seq_stop(struct seq_file *seq, void *v) | |
961 | { | |
962 | } | |
963 | ||
964 | static int memtype_seq_show(struct seq_file *seq, void *v) | |
965 | { | |
966 | struct memtype *print_entry = (struct memtype *)v; | |
967 | ||
968 | seq_printf(seq, "%s @ 0x%Lx-0x%Lx\n", cattr_name(print_entry->type), | |
969 | print_entry->start, print_entry->end); | |
970 | kfree(print_entry); | |
ad2cde16 | 971 | |
fec0962e | 972 | return 0; |
973 | } | |
974 | ||
d535e431 | 975 | static const struct seq_operations memtype_seq_ops = { |
fec0962e | 976 | .start = memtype_seq_start, |
977 | .next = memtype_seq_next, | |
978 | .stop = memtype_seq_stop, | |
979 | .show = memtype_seq_show, | |
980 | }; | |
981 | ||
982 | static int memtype_seq_open(struct inode *inode, struct file *file) | |
983 | { | |
984 | return seq_open(file, &memtype_seq_ops); | |
985 | } | |
986 | ||
987 | static const struct file_operations memtype_fops = { | |
988 | .open = memtype_seq_open, | |
989 | .read = seq_read, | |
990 | .llseek = seq_lseek, | |
991 | .release = seq_release, | |
992 | }; | |
993 | ||
994 | static int __init pat_memtype_list_init(void) | |
995 | { | |
cb32edf6 | 996 | if (pat_enabled()) { |
dd4377b0 XF |
997 | debugfs_create_file("pat_memtype_list", S_IRUSR, |
998 | arch_debugfs_dir, NULL, &memtype_fops); | |
999 | } | |
fec0962e | 1000 | return 0; |
1001 | } | |
1002 | ||
1003 | late_initcall(pat_memtype_list_init); | |
1004 | ||
012f09e7 | 1005 | #endif /* CONFIG_DEBUG_FS && CONFIG_X86_PAT */ |