Commit | Line | Data |
---|---|---|
2e5d9c85 | 1 | /* |
2 | * Handle caching attributes in page tables (PAT) | |
3 | * | |
4 | * Authors: Venkatesh Pallipadi <venkatesh.pallipadi@intel.com> | |
5 | * Suresh B Siddha <suresh.b.siddha@intel.com> | |
6 | * | |
7 | * Loosely based on earlier PAT patchset from Eric Biederman and Andi Kleen. | |
8 | */ | |
9 | ||
10 | #include <linux/mm.h> | |
11 | #include <linux/kernel.h> | |
12 | #include <linux/gfp.h> | |
13 | #include <linux/fs.h> | |
e7f260a2 | 14 | #include <linux/bootmem.h> |
2e5d9c85 | 15 | |
16 | #include <asm/msr.h> | |
17 | #include <asm/tlbflush.h> | |
18 | #include <asm/processor.h> | |
0124cecf | 19 | #include <asm/page.h> |
2e5d9c85 | 20 | #include <asm/pgtable.h> |
21 | #include <asm/pat.h> | |
22 | #include <asm/e820.h> | |
23 | #include <asm/cacheflush.h> | |
24 | #include <asm/fcntl.h> | |
25 | #include <asm/mtrr.h> | |
e7f260a2 | 26 | #include <asm/io.h> |
2e5d9c85 | 27 | |
8d4a4300 | 28 | #ifdef CONFIG_X86_PAT |
499f8f84 | 29 | int __read_mostly pat_enabled = 1; |
2e5d9c85 | 30 | |
31f4d870 | 31 | void __cpuinit pat_disable(char *reason) |
2e5d9c85 | 32 | { |
499f8f84 | 33 | pat_enabled = 0; |
8d4a4300 | 34 | printk(KERN_INFO "%s\n", reason); |
2e5d9c85 | 35 | } |
2e5d9c85 | 36 | |
be524fb9 | 37 | static int __init nopat(char *str) |
2e5d9c85 | 38 | { |
8d4a4300 | 39 | pat_disable("PAT support disabled."); |
2e5d9c85 | 40 | return 0; |
41 | } | |
8d4a4300 TG |
42 | early_param("nopat", nopat); |
43 | #endif | |
44 | ||
77b52b4c VP |
45 | |
46 | static int debug_enable; | |
47 | static int __init pat_debug_setup(char *str) | |
48 | { | |
49 | debug_enable = 1; | |
50 | return 0; | |
51 | } | |
52 | __setup("debugpat", pat_debug_setup); | |
53 | ||
54 | #define dprintk(fmt, arg...) \ | |
55 | do { if (debug_enable) printk(KERN_INFO fmt, ##arg); } while (0) | |
56 | ||
57 | ||
8d4a4300 | 58 | static u64 __read_mostly boot_pat_state; |
2e5d9c85 | 59 | |
60 | enum { | |
61 | PAT_UC = 0, /* uncached */ | |
62 | PAT_WC = 1, /* Write combining */ | |
63 | PAT_WT = 4, /* Write Through */ | |
64 | PAT_WP = 5, /* Write Protected */ | |
65 | PAT_WB = 6, /* Write Back (default) */ | |
66 | PAT_UC_MINUS = 7, /* UC, but can be overriden by MTRR */ | |
67 | }; | |
68 | ||
cd7a4e93 | 69 | #define PAT(x, y) ((u64)PAT_ ## y << ((x)*8)) |
2e5d9c85 | 70 | |
71 | void pat_init(void) | |
72 | { | |
73 | u64 pat; | |
74 | ||
499f8f84 | 75 | if (!pat_enabled) |
2e5d9c85 | 76 | return; |
77 | ||
8d4a4300 | 78 | /* Paranoia check. */ |
97cfab6a | 79 | if (!cpu_has_pat && boot_pat_state) { |
8d4a4300 | 80 | /* |
97cfab6a | 81 | * If this happens we are on a secondary CPU, but |
8d4a4300 TG |
82 | * switched to PAT on the boot CPU. We have no way to |
83 | * undo PAT. | |
97cfab6a AH |
84 | */ |
85 | printk(KERN_ERR "PAT enabled, " | |
86 | "but not supported by secondary CPU\n"); | |
87 | BUG(); | |
8d4a4300 | 88 | } |
2e5d9c85 | 89 | |
90 | /* Set PWT to Write-Combining. All other bits stay the same */ | |
91 | /* | |
92 | * PTE encoding used in Linux: | |
93 | * PAT | |
94 | * |PCD | |
95 | * ||PWT | |
96 | * ||| | |
97 | * 000 WB _PAGE_CACHE_WB | |
98 | * 001 WC _PAGE_CACHE_WC | |
99 | * 010 UC- _PAGE_CACHE_UC_MINUS | |
100 | * 011 UC _PAGE_CACHE_UC | |
101 | * PAT bit unused | |
102 | */ | |
cd7a4e93 AH |
103 | pat = PAT(0, WB) | PAT(1, WC) | PAT(2, UC_MINUS) | PAT(3, UC) | |
104 | PAT(4, WB) | PAT(5, WC) | PAT(6, UC_MINUS) | PAT(7, UC); | |
2e5d9c85 | 105 | |
106 | /* Boot CPU check */ | |
8d4a4300 | 107 | if (!boot_pat_state) |
2e5d9c85 | 108 | rdmsrl(MSR_IA32_CR_PAT, boot_pat_state); |
2e5d9c85 | 109 | |
110 | wrmsrl(MSR_IA32_CR_PAT, pat); | |
111 | printk(KERN_INFO "x86 PAT enabled: cpu %d, old 0x%Lx, new 0x%Lx\n", | |
112 | smp_processor_id(), boot_pat_state, pat); | |
113 | } | |
114 | ||
115 | #undef PAT | |
116 | ||
117 | static char *cattr_name(unsigned long flags) | |
118 | { | |
119 | switch (flags & _PAGE_CACHE_MASK) { | |
cd7a4e93 AH |
120 | case _PAGE_CACHE_UC: return "uncached"; |
121 | case _PAGE_CACHE_UC_MINUS: return "uncached-minus"; | |
122 | case _PAGE_CACHE_WB: return "write-back"; | |
123 | case _PAGE_CACHE_WC: return "write-combining"; | |
124 | default: return "broken"; | |
2e5d9c85 | 125 | } |
126 | } | |
127 | ||
128 | /* | |
129 | * The global memtype list keeps track of memory type for specific | |
130 | * physical memory areas. Conflicting memory types in different | |
131 | * mappings can cause CPU cache corruption. To avoid this we keep track. | |
132 | * | |
133 | * The list is sorted based on starting address and can contain multiple | |
134 | * entries for each address (this allows reference counting for overlapping | |
135 | * areas). All the aliases have the same cache attributes of course. | |
136 | * Zero attributes are represented as holes. | |
137 | * | |
138 | * Currently the data structure is a list because the number of mappings | |
139 | * are expected to be relatively small. If this should be a problem | |
140 | * it could be changed to a rbtree or similar. | |
141 | * | |
142 | * memtype_lock protects the whole list. | |
143 | */ | |
144 | ||
145 | struct memtype { | |
146 | u64 start; | |
147 | u64 end; | |
148 | unsigned long type; | |
149 | struct list_head nd; | |
150 | }; | |
151 | ||
152 | static LIST_HEAD(memtype_list); | |
153 | static DEFINE_SPINLOCK(memtype_lock); /* protects memtype list */ | |
154 | ||
155 | /* | |
156 | * Does intersection of PAT memory type and MTRR memory type and returns | |
157 | * the resulting memory type as PAT understands it. | |
158 | * (Type in pat and mtrr will not have same value) | |
159 | * The intersection is based on "Effective Memory Type" tables in IA-32 | |
160 | * SDM vol 3a | |
161 | */ | |
6cf514fc | 162 | static unsigned long pat_x_mtrr_type(u64 start, u64 end, unsigned long req_type) |
2e5d9c85 | 163 | { |
c26421d0 VP |
164 | /* |
165 | * Look for MTRR hint to get the effective type in case where PAT | |
166 | * request is for WB. | |
167 | */ | |
dd0c7c49 AH |
168 | if (req_type == _PAGE_CACHE_WB) { |
169 | u8 mtrr_type; | |
170 | ||
171 | mtrr_type = mtrr_type_lookup(start, end); | |
172 | if (mtrr_type == MTRR_TYPE_UNCACHABLE) | |
173 | return _PAGE_CACHE_UC; | |
174 | if (mtrr_type == MTRR_TYPE_WRCOMB) | |
175 | return _PAGE_CACHE_WC; | |
176 | } | |
177 | ||
178 | return req_type; | |
2e5d9c85 | 179 | } |
180 | ||
e7f260a2 | 181 | /* |
182 | * req_type typically has one of the: | |
183 | * - _PAGE_CACHE_WB | |
184 | * - _PAGE_CACHE_WC | |
185 | * - _PAGE_CACHE_UC_MINUS | |
186 | * - _PAGE_CACHE_UC | |
187 | * | |
188 | * req_type will have a special case value '-1', when requester want to inherit | |
189 | * the memory type from mtrr (if WB), existing PAT, defaulting to UC_MINUS. | |
190 | * | |
ac97991e AH |
191 | * If new_type is NULL, function will return an error if it cannot reserve the |
192 | * region with req_type. If new_type is non-NULL, function will return | |
193 | * available type in new_type in case of no error. In case of any error | |
e7f260a2 | 194 | * it will return a negative return value. |
195 | */ | |
2e5d9c85 | 196 | int reserve_memtype(u64 start, u64 end, unsigned long req_type, |
ac97991e | 197 | unsigned long *new_type) |
2e5d9c85 | 198 | { |
ac97991e | 199 | struct memtype *new, *entry; |
2e5d9c85 | 200 | unsigned long actual_type; |
201 | int err = 0; | |
202 | ||
499f8f84 AH |
203 | /* Only track when pat_enabled */ |
204 | if (!pat_enabled) { | |
e7f260a2 | 205 | /* This is identical to page table setting without PAT */ |
ac97991e AH |
206 | if (new_type) { |
207 | if (req_type == -1) | |
208 | *new_type = _PAGE_CACHE_WB; | |
209 | else | |
210 | *new_type = req_type & _PAGE_CACHE_MASK; | |
e7f260a2 | 211 | } |
2e5d9c85 | 212 | return 0; |
213 | } | |
214 | ||
215 | /* Low ISA region is always mapped WB in page table. No need to track */ | |
bcc643dc | 216 | if (is_ISA_range(start, end - 1)) { |
ac97991e AH |
217 | if (new_type) |
218 | *new_type = _PAGE_CACHE_WB; | |
2e5d9c85 | 219 | return 0; |
220 | } | |
221 | ||
e7f260a2 | 222 | if (req_type == -1) { |
223 | /* | |
c26421d0 VP |
224 | * Call mtrr_lookup to get the type hint. This is an |
225 | * optimization for /dev/mem mmap'ers into WB memory (BIOS | |
226 | * tools and ACPI tools). Use WB request for WB memory and use | |
227 | * UC_MINUS otherwise. | |
e7f260a2 | 228 | */ |
229 | u8 mtrr_type = mtrr_type_lookup(start, end); | |
e7f260a2 | 230 | |
231 | if (mtrr_type == MTRR_TYPE_WRBACK) { | |
232 | req_type = _PAGE_CACHE_WB; | |
233 | actual_type = _PAGE_CACHE_WB; | |
234 | } else { | |
235 | req_type = _PAGE_CACHE_UC_MINUS; | |
236 | actual_type = _PAGE_CACHE_UC_MINUS; | |
237 | } | |
238 | } else { | |
239 | req_type &= _PAGE_CACHE_MASK; | |
6cf514fc | 240 | actual_type = pat_x_mtrr_type(start, end, req_type); |
2e5d9c85 | 241 | } |
242 | ||
ac97991e AH |
243 | new = kmalloc(sizeof(struct memtype), GFP_KERNEL); |
244 | if (!new) | |
2e5d9c85 | 245 | return -ENOMEM; |
246 | ||
ac97991e AH |
247 | new->start = start; |
248 | new->end = end; | |
249 | new->type = actual_type; | |
2e5d9c85 | 250 | |
ac97991e AH |
251 | if (new_type) |
252 | *new_type = actual_type; | |
2e5d9c85 | 253 | |
254 | spin_lock(&memtype_lock); | |
255 | ||
256 | /* Search for existing mapping that overlaps the current range */ | |
ac97991e | 257 | list_for_each_entry(entry, &memtype_list, nd) { |
2e5d9c85 | 258 | struct memtype *saved_ptr; |
259 | ||
ac97991e | 260 | if (entry->start >= end) { |
77b52b4c | 261 | dprintk("New Entry\n"); |
ac97991e AH |
262 | list_add(&new->nd, entry->nd.prev); |
263 | new = NULL; | |
2e5d9c85 | 264 | break; |
265 | } | |
266 | ||
ac97991e AH |
267 | if (start <= entry->start && end >= entry->start) { |
268 | if (actual_type != entry->type && new_type) { | |
269 | actual_type = entry->type; | |
270 | *new_type = actual_type; | |
271 | new->type = actual_type; | |
2e5d9c85 | 272 | } |
273 | ||
ac97991e | 274 | if (actual_type != entry->type) { |
2e5d9c85 | 275 | printk( |
276 | KERN_INFO "%s:%d conflicting memory types %Lx-%Lx %s<->%s\n", | |
277 | current->comm, current->pid, | |
278 | start, end, | |
279 | cattr_name(actual_type), | |
ac97991e | 280 | cattr_name(entry->type)); |
2e5d9c85 | 281 | err = -EBUSY; |
282 | break; | |
283 | } | |
284 | ||
ac97991e | 285 | saved_ptr = entry; |
2e5d9c85 | 286 | /* |
287 | * Check to see whether the request overlaps more | |
288 | * than one entry in the list | |
289 | */ | |
ac97991e AH |
290 | list_for_each_entry_continue(entry, &memtype_list, nd) { |
291 | if (end <= entry->start) { | |
2e5d9c85 | 292 | break; |
293 | } | |
294 | ||
ac97991e | 295 | if (actual_type != entry->type) { |
2e5d9c85 | 296 | printk( |
297 | KERN_INFO "%s:%d conflicting memory types %Lx-%Lx %s<->%s\n", | |
298 | current->comm, current->pid, | |
299 | start, end, | |
300 | cattr_name(actual_type), | |
ac97991e | 301 | cattr_name(entry->type)); |
2e5d9c85 | 302 | err = -EBUSY; |
303 | break; | |
304 | } | |
305 | } | |
306 | ||
307 | if (err) { | |
308 | break; | |
309 | } | |
310 | ||
77b52b4c | 311 | dprintk("Overlap at 0x%Lx-0x%Lx\n", |
6997ab49 | 312 | saved_ptr->start, saved_ptr->end); |
2e5d9c85 | 313 | /* No conflict. Go ahead and add this new entry */ |
ac97991e AH |
314 | list_add(&new->nd, saved_ptr->nd.prev); |
315 | new = NULL; | |
2e5d9c85 | 316 | break; |
317 | } | |
318 | ||
ac97991e AH |
319 | if (start < entry->end) { |
320 | if (actual_type != entry->type && new_type) { | |
321 | actual_type = entry->type; | |
322 | *new_type = actual_type; | |
323 | new->type = actual_type; | |
2e5d9c85 | 324 | } |
325 | ||
ac97991e | 326 | if (actual_type != entry->type) { |
2e5d9c85 | 327 | printk( |
328 | KERN_INFO "%s:%d conflicting memory types %Lx-%Lx %s<->%s\n", | |
329 | current->comm, current->pid, | |
330 | start, end, | |
331 | cattr_name(actual_type), | |
ac97991e | 332 | cattr_name(entry->type)); |
2e5d9c85 | 333 | err = -EBUSY; |
334 | break; | |
335 | } | |
336 | ||
ac97991e | 337 | saved_ptr = entry; |
2e5d9c85 | 338 | /* |
339 | * Check to see whether the request overlaps more | |
340 | * than one entry in the list | |
341 | */ | |
ac97991e AH |
342 | list_for_each_entry_continue(entry, &memtype_list, nd) { |
343 | if (end <= entry->start) { | |
2e5d9c85 | 344 | break; |
345 | } | |
346 | ||
ac97991e | 347 | if (actual_type != entry->type) { |
2e5d9c85 | 348 | printk( |
349 | KERN_INFO "%s:%d conflicting memory types %Lx-%Lx %s<->%s\n", | |
350 | current->comm, current->pid, | |
351 | start, end, | |
352 | cattr_name(actual_type), | |
ac97991e | 353 | cattr_name(entry->type)); |
2e5d9c85 | 354 | err = -EBUSY; |
355 | break; | |
356 | } | |
357 | } | |
358 | ||
359 | if (err) { | |
360 | break; | |
361 | } | |
362 | ||
77b52b4c | 363 | dprintk("Overlap at 0x%Lx-0x%Lx\n", |
86cf02f8 | 364 | saved_ptr->start, saved_ptr->end); |
2e5d9c85 | 365 | /* No conflict. Go ahead and add this new entry */ |
ac97991e AH |
366 | list_add(&new->nd, &saved_ptr->nd); |
367 | new = NULL; | |
2e5d9c85 | 368 | break; |
369 | } | |
370 | } | |
371 | ||
372 | if (err) { | |
28eb559b | 373 | printk(KERN_INFO |
6997ab49 | 374 | "reserve_memtype failed 0x%Lx-0x%Lx, track %s, req %s\n", |
ac97991e | 375 | start, end, cattr_name(new->type), |
6997ab49 | 376 | cattr_name(req_type)); |
ac97991e | 377 | kfree(new); |
2e5d9c85 | 378 | spin_unlock(&memtype_lock); |
379 | return err; | |
380 | } | |
381 | ||
ac97991e | 382 | if (new) { |
2e5d9c85 | 383 | /* No conflict. Not yet added to the list. Add to the tail */ |
ac97991e | 384 | list_add_tail(&new->nd, &memtype_list); |
77b52b4c | 385 | dprintk("New Entry\n"); |
28eb559b | 386 | } |
6997ab49 | 387 | |
ac97991e | 388 | if (new_type) { |
77b52b4c | 389 | dprintk( |
6997ab49 | 390 | "reserve_memtype added 0x%Lx-0x%Lx, track %s, req %s, ret %s\n", |
391 | start, end, cattr_name(actual_type), | |
ac97991e | 392 | cattr_name(req_type), cattr_name(*new_type)); |
6997ab49 | 393 | } else { |
77b52b4c | 394 | dprintk( |
6997ab49 | 395 | "reserve_memtype added 0x%Lx-0x%Lx, track %s, req %s\n", |
396 | start, end, cattr_name(actual_type), | |
397 | cattr_name(req_type)); | |
2e5d9c85 | 398 | } |
399 | ||
400 | spin_unlock(&memtype_lock); | |
401 | return err; | |
402 | } | |
403 | ||
404 | int free_memtype(u64 start, u64 end) | |
405 | { | |
ac97991e | 406 | struct memtype *entry; |
2e5d9c85 | 407 | int err = -EINVAL; |
408 | ||
499f8f84 AH |
409 | /* Only track when pat_enabled */ |
410 | if (!pat_enabled) { | |
2e5d9c85 | 411 | return 0; |
412 | } | |
413 | ||
414 | /* Low ISA region is always mapped WB. No need to track */ | |
bcc643dc | 415 | if (is_ISA_range(start, end - 1)) |
2e5d9c85 | 416 | return 0; |
2e5d9c85 | 417 | |
418 | spin_lock(&memtype_lock); | |
ac97991e AH |
419 | list_for_each_entry(entry, &memtype_list, nd) { |
420 | if (entry->start == start && entry->end == end) { | |
421 | list_del(&entry->nd); | |
422 | kfree(entry); | |
2e5d9c85 | 423 | err = 0; |
424 | break; | |
425 | } | |
426 | } | |
427 | spin_unlock(&memtype_lock); | |
428 | ||
429 | if (err) { | |
28eb559b | 430 | printk(KERN_INFO "%s:%d freeing invalid memtype %Lx-%Lx\n", |
2e5d9c85 | 431 | current->comm, current->pid, start, end); |
432 | } | |
6997ab49 | 433 | |
77b52b4c | 434 | dprintk("free_memtype request 0x%Lx-0x%Lx\n", start, end); |
2e5d9c85 | 435 | return err; |
436 | } | |
437 | ||
f0970c13 | 438 | |
e7f260a2 | 439 | /* |
440 | * /dev/mem mmap interface. The memtype used for mapping varies: | |
441 | * - Use UC for mappings with O_SYNC flag | |
442 | * - Without O_SYNC flag, if there is any conflict in reserve_memtype, | |
443 | * inherit the memtype from existing mapping. | |
444 | * - Else use UC_MINUS memtype (for backward compatibility with existing | |
445 | * X drivers. | |
446 | */ | |
f0970c13 | 447 | pgprot_t phys_mem_access_prot(struct file *file, unsigned long pfn, |
448 | unsigned long size, pgprot_t vma_prot) | |
449 | { | |
450 | return vma_prot; | |
451 | } | |
452 | ||
0124cecf VP |
453 | #ifdef CONFIG_NONPROMISC_DEVMEM |
454 | /* This check is done in drivers/char/mem.c in case of NONPROMISC_DEVMEM*/ | |
455 | static inline int range_is_allowed(unsigned long pfn, unsigned long size) | |
456 | { | |
457 | return 1; | |
458 | } | |
459 | #else | |
460 | static inline int range_is_allowed(unsigned long pfn, unsigned long size) | |
461 | { | |
462 | u64 from = ((u64)pfn) << PAGE_SHIFT; | |
463 | u64 to = from + size; | |
464 | u64 cursor = from; | |
465 | ||
466 | while (cursor < to) { | |
467 | if (!devmem_is_allowed(pfn)) { | |
468 | printk(KERN_INFO | |
469 | "Program %s tried to access /dev/mem between %Lx->%Lx.\n", | |
470 | current->comm, from, to); | |
471 | return 0; | |
472 | } | |
473 | cursor += PAGE_SIZE; | |
474 | pfn++; | |
475 | } | |
476 | return 1; | |
477 | } | |
478 | #endif /* CONFIG_NONPROMISC_DEVMEM */ | |
479 | ||
f0970c13 | 480 | int phys_mem_access_prot_allowed(struct file *file, unsigned long pfn, |
481 | unsigned long size, pgprot_t *vma_prot) | |
482 | { | |
e7f260a2 | 483 | u64 offset = ((u64) pfn) << PAGE_SHIFT; |
484 | unsigned long flags = _PAGE_CACHE_UC_MINUS; | |
e7f260a2 | 485 | int retval; |
f0970c13 | 486 | |
0124cecf VP |
487 | if (!range_is_allowed(pfn, size)) |
488 | return 0; | |
489 | ||
f0970c13 | 490 | if (file->f_flags & O_SYNC) { |
e7f260a2 | 491 | flags = _PAGE_CACHE_UC; |
f0970c13 | 492 | } |
493 | ||
494 | #ifdef CONFIG_X86_32 | |
495 | /* | |
496 | * On the PPro and successors, the MTRRs are used to set | |
497 | * memory types for physical addresses outside main memory, | |
498 | * so blindly setting UC or PWT on those pages is wrong. | |
499 | * For Pentiums and earlier, the surround logic should disable | |
500 | * caching for the high addresses through the KEN pin, but | |
501 | * we maintain the tradition of paranoia in this code. | |
502 | */ | |
499f8f84 | 503 | if (!pat_enabled && |
cd7a4e93 AH |
504 | !(boot_cpu_has(X86_FEATURE_MTRR) || |
505 | boot_cpu_has(X86_FEATURE_K6_MTRR) || | |
506 | boot_cpu_has(X86_FEATURE_CYRIX_ARR) || | |
507 | boot_cpu_has(X86_FEATURE_CENTAUR_MCR)) && | |
508 | (pfn << PAGE_SHIFT) >= __pa(high_memory)) { | |
e7f260a2 | 509 | flags = _PAGE_CACHE_UC; |
f0970c13 | 510 | } |
511 | #endif | |
512 | ||
e7f260a2 | 513 | /* |
514 | * With O_SYNC, we can only take UC mapping. Fail if we cannot. | |
515 | * Without O_SYNC, we want to get | |
516 | * - WB for WB-able memory and no other conflicting mappings | |
517 | * - UC_MINUS for non-WB-able memory with no other conflicting mappings | |
518 | * - Inherit from confliting mappings otherwise | |
519 | */ | |
520 | if (flags != _PAGE_CACHE_UC_MINUS) { | |
521 | retval = reserve_memtype(offset, offset + size, flags, NULL); | |
522 | } else { | |
f022bfd5 | 523 | retval = reserve_memtype(offset, offset + size, -1, &flags); |
e7f260a2 | 524 | } |
525 | ||
526 | if (retval < 0) | |
527 | return 0; | |
528 | ||
e7f260a2 | 529 | if (pfn <= max_pfn_mapped && |
cd7a4e93 | 530 | ioremap_change_attr((unsigned long)__va(offset), size, flags) < 0) { |
e7f260a2 | 531 | free_memtype(offset, offset + size); |
28eb559b | 532 | printk(KERN_INFO |
e7f260a2 | 533 | "%s:%d /dev/mem ioremap_change_attr failed %s for %Lx-%Lx\n", |
534 | current->comm, current->pid, | |
535 | cattr_name(flags), | |
afc85343 | 536 | offset, (unsigned long long)(offset + size)); |
e7f260a2 | 537 | return 0; |
538 | } | |
539 | ||
540 | *vma_prot = __pgprot((pgprot_val(*vma_prot) & ~_PAGE_CACHE_MASK) | | |
541 | flags); | |
f0970c13 | 542 | return 1; |
543 | } | |
e7f260a2 | 544 | |
545 | void map_devmem(unsigned long pfn, unsigned long size, pgprot_t vma_prot) | |
546 | { | |
547 | u64 addr = (u64)pfn << PAGE_SHIFT; | |
548 | unsigned long flags; | |
549 | unsigned long want_flags = (pgprot_val(vma_prot) & _PAGE_CACHE_MASK); | |
550 | ||
551 | reserve_memtype(addr, addr + size, want_flags, &flags); | |
552 | if (flags != want_flags) { | |
28eb559b | 553 | printk(KERN_INFO |
e7f260a2 | 554 | "%s:%d /dev/mem expected mapping type %s for %Lx-%Lx, got %s\n", |
555 | current->comm, current->pid, | |
556 | cattr_name(want_flags), | |
afc85343 | 557 | addr, (unsigned long long)(addr + size), |
e7f260a2 | 558 | cattr_name(flags)); |
559 | } | |
560 | } | |
561 | ||
562 | void unmap_devmem(unsigned long pfn, unsigned long size, pgprot_t vma_prot) | |
563 | { | |
564 | u64 addr = (u64)pfn << PAGE_SHIFT; | |
565 | ||
566 | free_memtype(addr, addr + size); | |
567 | } |