Commit | Line | Data |
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2e5d9c85 | 1 | /* |
2 | * Handle caching attributes in page tables (PAT) | |
3 | * | |
4 | * Authors: Venkatesh Pallipadi <venkatesh.pallipadi@intel.com> | |
5 | * Suresh B Siddha <suresh.b.siddha@intel.com> | |
6 | * | |
7 | * Loosely based on earlier PAT patchset from Eric Biederman and Andi Kleen. | |
8 | */ | |
9 | ||
ad2cde16 IM |
10 | #include <linux/seq_file.h> |
11 | #include <linux/bootmem.h> | |
12 | #include <linux/debugfs.h> | |
2e5d9c85 | 13 | #include <linux/kernel.h> |
92b9af9e | 14 | #include <linux/module.h> |
5a0e3ad6 | 15 | #include <linux/slab.h> |
ad2cde16 | 16 | #include <linux/mm.h> |
2e5d9c85 | 17 | #include <linux/fs.h> |
335ef896 | 18 | #include <linux/rbtree.h> |
2e5d9c85 | 19 | |
ad2cde16 | 20 | #include <asm/cacheflush.h> |
2e5d9c85 | 21 | #include <asm/processor.h> |
ad2cde16 | 22 | #include <asm/tlbflush.h> |
fd12a0d6 | 23 | #include <asm/x86_init.h> |
2e5d9c85 | 24 | #include <asm/pgtable.h> |
2e5d9c85 | 25 | #include <asm/fcntl.h> |
ad2cde16 | 26 | #include <asm/e820.h> |
2e5d9c85 | 27 | #include <asm/mtrr.h> |
ad2cde16 IM |
28 | #include <asm/page.h> |
29 | #include <asm/msr.h> | |
30 | #include <asm/pat.h> | |
e7f260a2 | 31 | #include <asm/io.h> |
2e5d9c85 | 32 | |
be5a0c12 | 33 | #include "pat_internal.h" |
bd809af1 | 34 | #include "mm_internal.h" |
be5a0c12 | 35 | |
8d4a4300 | 36 | #ifdef CONFIG_X86_PAT |
499f8f84 | 37 | int __read_mostly pat_enabled = 1; |
2e5d9c85 | 38 | |
1ee4bd92 | 39 | static inline void pat_disable(const char *reason) |
2e5d9c85 | 40 | { |
499f8f84 | 41 | pat_enabled = 0; |
8d4a4300 | 42 | printk(KERN_INFO "%s\n", reason); |
2e5d9c85 | 43 | } |
2e5d9c85 | 44 | |
be524fb9 | 45 | static int __init nopat(char *str) |
2e5d9c85 | 46 | { |
8d4a4300 | 47 | pat_disable("PAT support disabled."); |
2e5d9c85 | 48 | return 0; |
49 | } | |
8d4a4300 | 50 | early_param("nopat", nopat); |
75a04811 PA |
51 | #else |
52 | static inline void pat_disable(const char *reason) | |
53 | { | |
54 | (void)reason; | |
55 | } | |
8d4a4300 TG |
56 | #endif |
57 | ||
77b52b4c | 58 | |
be5a0c12 | 59 | int pat_debug_enable; |
ad2cde16 | 60 | |
77b52b4c VP |
61 | static int __init pat_debug_setup(char *str) |
62 | { | |
be5a0c12 | 63 | pat_debug_enable = 1; |
77b52b4c VP |
64 | return 0; |
65 | } | |
66 | __setup("debugpat", pat_debug_setup); | |
67 | ||
8d4a4300 | 68 | static u64 __read_mostly boot_pat_state; |
2e5d9c85 | 69 | |
0dbcae88 TG |
70 | #ifdef CONFIG_X86_PAT |
71 | /* | |
72 | * X86 PAT uses page flags WC and Uncached together to keep track of | |
73 | * memory type of pages that have backing page struct. X86 PAT supports 3 | |
74 | * different memory types, _PAGE_CACHE_MODE_WB, _PAGE_CACHE_MODE_WC and | |
75 | * _PAGE_CACHE_MODE_UC_MINUS and fourth state where page's memory type has not | |
76 | * been changed from its default (value of -1 used to denote this). | |
77 | * Note we do not support _PAGE_CACHE_MODE_UC here. | |
78 | */ | |
79 | ||
80 | #define _PGMT_DEFAULT 0 | |
81 | #define _PGMT_WC (1UL << PG_arch_1) | |
82 | #define _PGMT_UC_MINUS (1UL << PG_uncached) | |
83 | #define _PGMT_WB (1UL << PG_uncached | 1UL << PG_arch_1) | |
84 | #define _PGMT_MASK (1UL << PG_uncached | 1UL << PG_arch_1) | |
85 | #define _PGMT_CLEAR_MASK (~_PGMT_MASK) | |
86 | ||
87 | static inline enum page_cache_mode get_page_memtype(struct page *pg) | |
88 | { | |
89 | unsigned long pg_flags = pg->flags & _PGMT_MASK; | |
90 | ||
91 | if (pg_flags == _PGMT_DEFAULT) | |
92 | return -1; | |
93 | else if (pg_flags == _PGMT_WC) | |
94 | return _PAGE_CACHE_MODE_WC; | |
95 | else if (pg_flags == _PGMT_UC_MINUS) | |
96 | return _PAGE_CACHE_MODE_UC_MINUS; | |
97 | else | |
98 | return _PAGE_CACHE_MODE_WB; | |
99 | } | |
100 | ||
101 | static inline void set_page_memtype(struct page *pg, | |
102 | enum page_cache_mode memtype) | |
103 | { | |
104 | unsigned long memtype_flags; | |
105 | unsigned long old_flags; | |
106 | unsigned long new_flags; | |
107 | ||
108 | switch (memtype) { | |
109 | case _PAGE_CACHE_MODE_WC: | |
110 | memtype_flags = _PGMT_WC; | |
111 | break; | |
112 | case _PAGE_CACHE_MODE_UC_MINUS: | |
113 | memtype_flags = _PGMT_UC_MINUS; | |
114 | break; | |
115 | case _PAGE_CACHE_MODE_WB: | |
116 | memtype_flags = _PGMT_WB; | |
117 | break; | |
118 | default: | |
119 | memtype_flags = _PGMT_DEFAULT; | |
120 | break; | |
121 | } | |
122 | ||
123 | do { | |
124 | old_flags = pg->flags; | |
125 | new_flags = (old_flags & _PGMT_CLEAR_MASK) | memtype_flags; | |
126 | } while (cmpxchg(&pg->flags, old_flags, new_flags) != old_flags); | |
127 | } | |
128 | #else | |
129 | static inline enum page_cache_mode get_page_memtype(struct page *pg) | |
130 | { | |
131 | return -1; | |
132 | } | |
133 | static inline void set_page_memtype(struct page *pg, | |
134 | enum page_cache_mode memtype) | |
135 | { | |
136 | } | |
137 | #endif | |
138 | ||
2e5d9c85 | 139 | enum { |
140 | PAT_UC = 0, /* uncached */ | |
141 | PAT_WC = 1, /* Write combining */ | |
142 | PAT_WT = 4, /* Write Through */ | |
143 | PAT_WP = 5, /* Write Protected */ | |
144 | PAT_WB = 6, /* Write Back (default) */ | |
145 | PAT_UC_MINUS = 7, /* UC, but can be overriden by MTRR */ | |
146 | }; | |
147 | ||
bd809af1 JG |
148 | #define CM(c) (_PAGE_CACHE_MODE_ ## c) |
149 | ||
150 | static enum page_cache_mode pat_get_cache_mode(unsigned pat_val, char *msg) | |
151 | { | |
152 | enum page_cache_mode cache; | |
153 | char *cache_mode; | |
154 | ||
155 | switch (pat_val) { | |
156 | case PAT_UC: cache = CM(UC); cache_mode = "UC "; break; | |
157 | case PAT_WC: cache = CM(WC); cache_mode = "WC "; break; | |
158 | case PAT_WT: cache = CM(WT); cache_mode = "WT "; break; | |
159 | case PAT_WP: cache = CM(WP); cache_mode = "WP "; break; | |
160 | case PAT_WB: cache = CM(WB); cache_mode = "WB "; break; | |
161 | case PAT_UC_MINUS: cache = CM(UC_MINUS); cache_mode = "UC- "; break; | |
162 | default: cache = CM(WB); cache_mode = "WB "; break; | |
163 | } | |
164 | ||
165 | memcpy(msg, cache_mode, 4); | |
166 | ||
167 | return cache; | |
168 | } | |
169 | ||
170 | #undef CM | |
171 | ||
172 | /* | |
173 | * Update the cache mode to pgprot translation tables according to PAT | |
174 | * configuration. | |
175 | * Using lower indices is preferred, so we start with highest index. | |
176 | */ | |
177 | void pat_init_cache_modes(void) | |
178 | { | |
179 | int i; | |
180 | enum page_cache_mode cache; | |
181 | char pat_msg[33]; | |
182 | u64 pat; | |
183 | ||
184 | rdmsrl(MSR_IA32_CR_PAT, pat); | |
185 | pat_msg[32] = 0; | |
186 | for (i = 7; i >= 0; i--) { | |
187 | cache = pat_get_cache_mode((pat >> (i * 8)) & 7, | |
188 | pat_msg + 4 * i); | |
189 | update_cache_mode_entry(i, cache); | |
190 | } | |
191 | pr_info("PAT configuration [0-7]: %s\n", pat_msg); | |
192 | } | |
193 | ||
cd7a4e93 | 194 | #define PAT(x, y) ((u64)PAT_ ## y << ((x)*8)) |
2e5d9c85 | 195 | |
196 | void pat_init(void) | |
197 | { | |
198 | u64 pat; | |
e23a8b6a | 199 | bool boot_cpu = !boot_pat_state; |
2e5d9c85 | 200 | |
499f8f84 | 201 | if (!pat_enabled) |
2e5d9c85 | 202 | return; |
203 | ||
75a04811 PA |
204 | if (!cpu_has_pat) { |
205 | if (!boot_pat_state) { | |
206 | pat_disable("PAT not supported by CPU."); | |
207 | return; | |
208 | } else { | |
209 | /* | |
210 | * If this happens we are on a secondary CPU, but | |
211 | * switched to PAT on the boot CPU. We have no way to | |
212 | * undo PAT. | |
213 | */ | |
214 | printk(KERN_ERR "PAT enabled, " | |
215 | "but not supported by secondary CPU\n"); | |
216 | BUG(); | |
217 | } | |
8d4a4300 | 218 | } |
2e5d9c85 | 219 | |
220 | /* Set PWT to Write-Combining. All other bits stay the same */ | |
221 | /* | |
222 | * PTE encoding used in Linux: | |
223 | * PAT | |
224 | * |PCD | |
225 | * ||PWT | |
226 | * ||| | |
227 | * 000 WB _PAGE_CACHE_WB | |
228 | * 001 WC _PAGE_CACHE_WC | |
229 | * 010 UC- _PAGE_CACHE_UC_MINUS | |
230 | * 011 UC _PAGE_CACHE_UC | |
231 | * PAT bit unused | |
232 | */ | |
cd7a4e93 AH |
233 | pat = PAT(0, WB) | PAT(1, WC) | PAT(2, UC_MINUS) | PAT(3, UC) | |
234 | PAT(4, WB) | PAT(5, WC) | PAT(6, UC_MINUS) | PAT(7, UC); | |
2e5d9c85 | 235 | |
236 | /* Boot CPU check */ | |
8d4a4300 | 237 | if (!boot_pat_state) |
2e5d9c85 | 238 | rdmsrl(MSR_IA32_CR_PAT, boot_pat_state); |
2e5d9c85 | 239 | |
240 | wrmsrl(MSR_IA32_CR_PAT, pat); | |
e23a8b6a RD |
241 | |
242 | if (boot_cpu) | |
bd809af1 | 243 | pat_init_cache_modes(); |
2e5d9c85 | 244 | } |
245 | ||
246 | #undef PAT | |
247 | ||
9e41a49a | 248 | static DEFINE_SPINLOCK(memtype_lock); /* protects memtype accesses */ |
335ef896 | 249 | |
2e5d9c85 | 250 | /* |
251 | * Does intersection of PAT memory type and MTRR memory type and returns | |
252 | * the resulting memory type as PAT understands it. | |
253 | * (Type in pat and mtrr will not have same value) | |
254 | * The intersection is based on "Effective Memory Type" tables in IA-32 | |
255 | * SDM vol 3a | |
256 | */ | |
e00c8cc9 JG |
257 | static unsigned long pat_x_mtrr_type(u64 start, u64 end, |
258 | enum page_cache_mode req_type) | |
2e5d9c85 | 259 | { |
c26421d0 VP |
260 | /* |
261 | * Look for MTRR hint to get the effective type in case where PAT | |
262 | * request is for WB. | |
263 | */ | |
e00c8cc9 | 264 | if (req_type == _PAGE_CACHE_MODE_WB) { |
dd0c7c49 AH |
265 | u8 mtrr_type; |
266 | ||
267 | mtrr_type = mtrr_type_lookup(start, end); | |
b6ff32d9 | 268 | if (mtrr_type != MTRR_TYPE_WRBACK) |
e00c8cc9 | 269 | return _PAGE_CACHE_MODE_UC_MINUS; |
b6ff32d9 | 270 | |
e00c8cc9 | 271 | return _PAGE_CACHE_MODE_WB; |
dd0c7c49 AH |
272 | } |
273 | ||
274 | return req_type; | |
2e5d9c85 | 275 | } |
276 | ||
fa83523f JD |
277 | struct pagerange_state { |
278 | unsigned long cur_pfn; | |
279 | int ram; | |
280 | int not_ram; | |
281 | }; | |
282 | ||
283 | static int | |
284 | pagerange_is_ram_callback(unsigned long initial_pfn, unsigned long total_nr_pages, void *arg) | |
285 | { | |
286 | struct pagerange_state *state = arg; | |
287 | ||
288 | state->not_ram |= initial_pfn > state->cur_pfn; | |
289 | state->ram |= total_nr_pages > 0; | |
290 | state->cur_pfn = initial_pfn + total_nr_pages; | |
291 | ||
292 | return state->ram && state->not_ram; | |
293 | } | |
294 | ||
3709c857 | 295 | static int pat_pagerange_is_ram(resource_size_t start, resource_size_t end) |
be03d9e8 | 296 | { |
fa83523f JD |
297 | int ret = 0; |
298 | unsigned long start_pfn = start >> PAGE_SHIFT; | |
299 | unsigned long end_pfn = (end + PAGE_SIZE - 1) >> PAGE_SHIFT; | |
300 | struct pagerange_state state = {start_pfn, 0, 0}; | |
301 | ||
302 | /* | |
303 | * For legacy reasons, physical address range in the legacy ISA | |
304 | * region is tracked as non-RAM. This will allow users of | |
305 | * /dev/mem to map portions of legacy ISA region, even when | |
306 | * some of those portions are listed(or not even listed) with | |
307 | * different e820 types(RAM/reserved/..) | |
308 | */ | |
309 | if (start_pfn < ISA_END_ADDRESS >> PAGE_SHIFT) | |
310 | start_pfn = ISA_END_ADDRESS >> PAGE_SHIFT; | |
311 | ||
312 | if (start_pfn < end_pfn) { | |
313 | ret = walk_system_ram_range(start_pfn, end_pfn - start_pfn, | |
314 | &state, pagerange_is_ram_callback); | |
be03d9e8 SS |
315 | } |
316 | ||
fa83523f | 317 | return (ret > 0) ? -1 : (state.ram ? 1 : 0); |
be03d9e8 SS |
318 | } |
319 | ||
9542ada8 | 320 | /* |
f5841740 VP |
321 | * For RAM pages, we use page flags to mark the pages with appropriate type. |
322 | * Here we do two pass: | |
323 | * - Find the memtype of all the pages in the range, look for any conflicts | |
324 | * - In case of no conflicts, set the new memtype for pages in the range | |
9542ada8 | 325 | */ |
e00c8cc9 JG |
326 | static int reserve_ram_pages_type(u64 start, u64 end, |
327 | enum page_cache_mode req_type, | |
328 | enum page_cache_mode *new_type) | |
9542ada8 SS |
329 | { |
330 | struct page *page; | |
f5841740 VP |
331 | u64 pfn; |
332 | ||
e00c8cc9 | 333 | if (req_type == _PAGE_CACHE_MODE_UC) { |
f5841740 VP |
334 | /* We do not support strong UC */ |
335 | WARN_ON_ONCE(1); | |
e00c8cc9 | 336 | req_type = _PAGE_CACHE_MODE_UC_MINUS; |
f5841740 | 337 | } |
9542ada8 SS |
338 | |
339 | for (pfn = (start >> PAGE_SHIFT); pfn < (end >> PAGE_SHIFT); ++pfn) { | |
e00c8cc9 | 340 | enum page_cache_mode type; |
9542ada8 | 341 | |
f5841740 VP |
342 | page = pfn_to_page(pfn); |
343 | type = get_page_memtype(page); | |
344 | if (type != -1) { | |
e00c8cc9 | 345 | pr_info("reserve_ram_pages_type failed [mem %#010Lx-%#010Lx], track 0x%x, req 0x%x\n", |
365811d6 | 346 | start, end - 1, type, req_type); |
f5841740 VP |
347 | if (new_type) |
348 | *new_type = type; | |
349 | ||
350 | return -EBUSY; | |
351 | } | |
9542ada8 | 352 | } |
9542ada8 | 353 | |
f5841740 VP |
354 | if (new_type) |
355 | *new_type = req_type; | |
356 | ||
357 | for (pfn = (start >> PAGE_SHIFT); pfn < (end >> PAGE_SHIFT); ++pfn) { | |
9542ada8 | 358 | page = pfn_to_page(pfn); |
f5841740 | 359 | set_page_memtype(page, req_type); |
9542ada8 | 360 | } |
f5841740 | 361 | return 0; |
9542ada8 SS |
362 | } |
363 | ||
364 | static int free_ram_pages_type(u64 start, u64 end) | |
365 | { | |
366 | struct page *page; | |
f5841740 | 367 | u64 pfn; |
9542ada8 SS |
368 | |
369 | for (pfn = (start >> PAGE_SHIFT); pfn < (end >> PAGE_SHIFT); ++pfn) { | |
370 | page = pfn_to_page(pfn); | |
f5841740 | 371 | set_page_memtype(page, -1); |
9542ada8 SS |
372 | } |
373 | return 0; | |
9542ada8 SS |
374 | } |
375 | ||
e7f260a2 | 376 | /* |
377 | * req_type typically has one of the: | |
e00c8cc9 JG |
378 | * - _PAGE_CACHE_MODE_WB |
379 | * - _PAGE_CACHE_MODE_WC | |
380 | * - _PAGE_CACHE_MODE_UC_MINUS | |
381 | * - _PAGE_CACHE_MODE_UC | |
e7f260a2 | 382 | * |
ac97991e AH |
383 | * If new_type is NULL, function will return an error if it cannot reserve the |
384 | * region with req_type. If new_type is non-NULL, function will return | |
385 | * available type in new_type in case of no error. In case of any error | |
e7f260a2 | 386 | * it will return a negative return value. |
387 | */ | |
e00c8cc9 JG |
388 | int reserve_memtype(u64 start, u64 end, enum page_cache_mode req_type, |
389 | enum page_cache_mode *new_type) | |
2e5d9c85 | 390 | { |
be5a0c12 | 391 | struct memtype *new; |
e00c8cc9 | 392 | enum page_cache_mode actual_type; |
9542ada8 | 393 | int is_range_ram; |
ad2cde16 | 394 | int err = 0; |
2e5d9c85 | 395 | |
ad2cde16 | 396 | BUG_ON(start >= end); /* end is exclusive */ |
69e26be9 | 397 | |
499f8f84 | 398 | if (!pat_enabled) { |
e7f260a2 | 399 | /* This is identical to page table setting without PAT */ |
ac97991e | 400 | if (new_type) { |
e00c8cc9 JG |
401 | if (req_type == _PAGE_CACHE_MODE_WC) |
402 | *new_type = _PAGE_CACHE_MODE_UC_MINUS; | |
ac97991e | 403 | else |
e00c8cc9 | 404 | *new_type = req_type; |
e7f260a2 | 405 | } |
2e5d9c85 | 406 | return 0; |
407 | } | |
408 | ||
409 | /* Low ISA region is always mapped WB in page table. No need to track */ | |
8a271389 | 410 | if (x86_platform.is_untracked_pat_range(start, end)) { |
ac97991e | 411 | if (new_type) |
e00c8cc9 | 412 | *new_type = _PAGE_CACHE_MODE_WB; |
2e5d9c85 | 413 | return 0; |
414 | } | |
415 | ||
b6ff32d9 SS |
416 | /* |
417 | * Call mtrr_lookup to get the type hint. This is an | |
418 | * optimization for /dev/mem mmap'ers into WB memory (BIOS | |
419 | * tools and ACPI tools). Use WB request for WB memory and use | |
420 | * UC_MINUS otherwise. | |
421 | */ | |
e00c8cc9 | 422 | actual_type = pat_x_mtrr_type(start, end, req_type); |
2e5d9c85 | 423 | |
95971342 SS |
424 | if (new_type) |
425 | *new_type = actual_type; | |
426 | ||
be03d9e8 | 427 | is_range_ram = pat_pagerange_is_ram(start, end); |
f5841740 VP |
428 | if (is_range_ram == 1) { |
429 | ||
f5841740 | 430 | err = reserve_ram_pages_type(start, end, req_type, new_type); |
f5841740 VP |
431 | |
432 | return err; | |
433 | } else if (is_range_ram < 0) { | |
9542ada8 | 434 | return -EINVAL; |
f5841740 | 435 | } |
9542ada8 | 436 | |
6a4f3b52 | 437 | new = kzalloc(sizeof(struct memtype), GFP_KERNEL); |
ac97991e | 438 | if (!new) |
2e5d9c85 | 439 | return -ENOMEM; |
440 | ||
ad2cde16 IM |
441 | new->start = start; |
442 | new->end = end; | |
443 | new->type = actual_type; | |
2e5d9c85 | 444 | |
2e5d9c85 | 445 | spin_lock(&memtype_lock); |
446 | ||
9e41a49a | 447 | err = rbt_memtype_check_insert(new, new_type); |
2e5d9c85 | 448 | if (err) { |
365811d6 BH |
449 | printk(KERN_INFO "reserve_memtype failed [mem %#010Lx-%#010Lx], track %s, req %s\n", |
450 | start, end - 1, | |
451 | cattr_name(new->type), cattr_name(req_type)); | |
ac97991e | 452 | kfree(new); |
2e5d9c85 | 453 | spin_unlock(&memtype_lock); |
ad2cde16 | 454 | |
2e5d9c85 | 455 | return err; |
456 | } | |
457 | ||
2e5d9c85 | 458 | spin_unlock(&memtype_lock); |
3e9c83b3 | 459 | |
365811d6 BH |
460 | dprintk("reserve_memtype added [mem %#010Lx-%#010Lx], track %s, req %s, ret %s\n", |
461 | start, end - 1, cattr_name(new->type), cattr_name(req_type), | |
3e9c83b3 AH |
462 | new_type ? cattr_name(*new_type) : "-"); |
463 | ||
2e5d9c85 | 464 | return err; |
465 | } | |
466 | ||
467 | int free_memtype(u64 start, u64 end) | |
468 | { | |
2e5d9c85 | 469 | int err = -EINVAL; |
9542ada8 | 470 | int is_range_ram; |
20413f27 | 471 | struct memtype *entry; |
2e5d9c85 | 472 | |
69e26be9 | 473 | if (!pat_enabled) |
2e5d9c85 | 474 | return 0; |
2e5d9c85 | 475 | |
476 | /* Low ISA region is always mapped WB. No need to track */ | |
8a271389 | 477 | if (x86_platform.is_untracked_pat_range(start, end)) |
2e5d9c85 | 478 | return 0; |
2e5d9c85 | 479 | |
be03d9e8 | 480 | is_range_ram = pat_pagerange_is_ram(start, end); |
f5841740 VP |
481 | if (is_range_ram == 1) { |
482 | ||
f5841740 | 483 | err = free_ram_pages_type(start, end); |
f5841740 VP |
484 | |
485 | return err; | |
486 | } else if (is_range_ram < 0) { | |
9542ada8 | 487 | return -EINVAL; |
f5841740 | 488 | } |
9542ada8 | 489 | |
2e5d9c85 | 490 | spin_lock(&memtype_lock); |
20413f27 | 491 | entry = rbt_memtype_erase(start, end); |
2e5d9c85 | 492 | spin_unlock(&memtype_lock); |
493 | ||
20413f27 | 494 | if (!entry) { |
365811d6 BH |
495 | printk(KERN_INFO "%s:%d freeing invalid memtype [mem %#010Lx-%#010Lx]\n", |
496 | current->comm, current->pid, start, end - 1); | |
20413f27 | 497 | return -EINVAL; |
2e5d9c85 | 498 | } |
6997ab49 | 499 | |
20413f27 XF |
500 | kfree(entry); |
501 | ||
365811d6 | 502 | dprintk("free_memtype request [mem %#010Lx-%#010Lx]\n", start, end - 1); |
ad2cde16 | 503 | |
20413f27 | 504 | return 0; |
2e5d9c85 | 505 | } |
506 | ||
f0970c13 | 507 | |
637b86e7 VP |
508 | /** |
509 | * lookup_memtype - Looksup the memory type for a physical address | |
510 | * @paddr: physical address of which memory type needs to be looked up | |
511 | * | |
512 | * Only to be called when PAT is enabled | |
513 | * | |
2a374698 JG |
514 | * Returns _PAGE_CACHE_MODE_WB, _PAGE_CACHE_MODE_WC, _PAGE_CACHE_MODE_UC_MINUS |
515 | * or _PAGE_CACHE_MODE_UC | |
637b86e7 | 516 | */ |
2a374698 | 517 | static enum page_cache_mode lookup_memtype(u64 paddr) |
637b86e7 | 518 | { |
2a374698 | 519 | enum page_cache_mode rettype = _PAGE_CACHE_MODE_WB; |
637b86e7 VP |
520 | struct memtype *entry; |
521 | ||
8a271389 | 522 | if (x86_platform.is_untracked_pat_range(paddr, paddr + PAGE_SIZE)) |
637b86e7 VP |
523 | return rettype; |
524 | ||
525 | if (pat_pagerange_is_ram(paddr, paddr + PAGE_SIZE)) { | |
526 | struct page *page; | |
637b86e7 VP |
527 | page = pfn_to_page(paddr >> PAGE_SHIFT); |
528 | rettype = get_page_memtype(page); | |
637b86e7 VP |
529 | /* |
530 | * -1 from get_page_memtype() implies RAM page is in its | |
531 | * default state and not reserved, and hence of type WB | |
532 | */ | |
533 | if (rettype == -1) | |
2a374698 | 534 | rettype = _PAGE_CACHE_MODE_WB; |
637b86e7 VP |
535 | |
536 | return rettype; | |
537 | } | |
538 | ||
539 | spin_lock(&memtype_lock); | |
540 | ||
9e41a49a | 541 | entry = rbt_memtype_lookup(paddr); |
637b86e7 VP |
542 | if (entry != NULL) |
543 | rettype = entry->type; | |
544 | else | |
2a374698 | 545 | rettype = _PAGE_CACHE_MODE_UC_MINUS; |
637b86e7 VP |
546 | |
547 | spin_unlock(&memtype_lock); | |
548 | return rettype; | |
549 | } | |
550 | ||
9fd126bc VP |
551 | /** |
552 | * io_reserve_memtype - Request a memory type mapping for a region of memory | |
553 | * @start: start (physical address) of the region | |
554 | * @end: end (physical address) of the region | |
555 | * @type: A pointer to memtype, with requested type. On success, requested | |
556 | * or any other compatible type that was available for the region is returned | |
557 | * | |
558 | * On success, returns 0 | |
559 | * On failure, returns non-zero | |
560 | */ | |
561 | int io_reserve_memtype(resource_size_t start, resource_size_t end, | |
49a3b3cb | 562 | enum page_cache_mode *type) |
9fd126bc | 563 | { |
b855192c | 564 | resource_size_t size = end - start; |
49a3b3cb JG |
565 | enum page_cache_mode req_type = *type; |
566 | enum page_cache_mode new_type; | |
9fd126bc VP |
567 | int ret; |
568 | ||
b855192c | 569 | WARN_ON_ONCE(iomem_map_sanity_check(start, size)); |
9fd126bc VP |
570 | |
571 | ret = reserve_memtype(start, end, req_type, &new_type); | |
572 | if (ret) | |
573 | goto out_err; | |
574 | ||
b855192c | 575 | if (!is_new_memtype_allowed(start, size, req_type, new_type)) |
9fd126bc VP |
576 | goto out_free; |
577 | ||
b855192c | 578 | if (kernel_map_sync_memtype(start, size, new_type) < 0) |
9fd126bc VP |
579 | goto out_free; |
580 | ||
581 | *type = new_type; | |
582 | return 0; | |
583 | ||
584 | out_free: | |
585 | free_memtype(start, end); | |
586 | ret = -EBUSY; | |
587 | out_err: | |
588 | return ret; | |
589 | } | |
590 | ||
591 | /** | |
592 | * io_free_memtype - Release a memory type mapping for a region of memory | |
593 | * @start: start (physical address) of the region | |
594 | * @end: end (physical address) of the region | |
595 | */ | |
596 | void io_free_memtype(resource_size_t start, resource_size_t end) | |
597 | { | |
598 | free_memtype(start, end); | |
599 | } | |
600 | ||
f0970c13 | 601 | pgprot_t phys_mem_access_prot(struct file *file, unsigned long pfn, |
602 | unsigned long size, pgprot_t vma_prot) | |
603 | { | |
604 | return vma_prot; | |
605 | } | |
606 | ||
d092633b IM |
607 | #ifdef CONFIG_STRICT_DEVMEM |
608 | /* This check is done in drivers/char/mem.c in case of STRICT_DEVMEM*/ | |
0124cecf VP |
609 | static inline int range_is_allowed(unsigned long pfn, unsigned long size) |
610 | { | |
611 | return 1; | |
612 | } | |
613 | #else | |
9e41bff2 | 614 | /* This check is needed to avoid cache aliasing when PAT is enabled */ |
0124cecf VP |
615 | static inline int range_is_allowed(unsigned long pfn, unsigned long size) |
616 | { | |
617 | u64 from = ((u64)pfn) << PAGE_SHIFT; | |
618 | u64 to = from + size; | |
619 | u64 cursor = from; | |
620 | ||
9e41bff2 RT |
621 | if (!pat_enabled) |
622 | return 1; | |
623 | ||
0124cecf VP |
624 | while (cursor < to) { |
625 | if (!devmem_is_allowed(pfn)) { | |
365811d6 BH |
626 | printk(KERN_INFO "Program %s tried to access /dev/mem between [mem %#010Lx-%#010Lx]\n", |
627 | current->comm, from, to - 1); | |
0124cecf VP |
628 | return 0; |
629 | } | |
630 | cursor += PAGE_SIZE; | |
631 | pfn++; | |
632 | } | |
633 | return 1; | |
634 | } | |
d092633b | 635 | #endif /* CONFIG_STRICT_DEVMEM */ |
0124cecf | 636 | |
f0970c13 | 637 | int phys_mem_access_prot_allowed(struct file *file, unsigned long pfn, |
638 | unsigned long size, pgprot_t *vma_prot) | |
639 | { | |
e00c8cc9 | 640 | enum page_cache_mode pcm = _PAGE_CACHE_MODE_WB; |
f0970c13 | 641 | |
0124cecf VP |
642 | if (!range_is_allowed(pfn, size)) |
643 | return 0; | |
644 | ||
6b2f3d1f | 645 | if (file->f_flags & O_DSYNC) |
e00c8cc9 | 646 | pcm = _PAGE_CACHE_MODE_UC_MINUS; |
f0970c13 | 647 | |
648 | #ifdef CONFIG_X86_32 | |
649 | /* | |
650 | * On the PPro and successors, the MTRRs are used to set | |
651 | * memory types for physical addresses outside main memory, | |
652 | * so blindly setting UC or PWT on those pages is wrong. | |
653 | * For Pentiums and earlier, the surround logic should disable | |
654 | * caching for the high addresses through the KEN pin, but | |
655 | * we maintain the tradition of paranoia in this code. | |
656 | */ | |
499f8f84 | 657 | if (!pat_enabled && |
cd7a4e93 AH |
658 | !(boot_cpu_has(X86_FEATURE_MTRR) || |
659 | boot_cpu_has(X86_FEATURE_K6_MTRR) || | |
660 | boot_cpu_has(X86_FEATURE_CYRIX_ARR) || | |
661 | boot_cpu_has(X86_FEATURE_CENTAUR_MCR)) && | |
662 | (pfn << PAGE_SHIFT) >= __pa(high_memory)) { | |
e00c8cc9 | 663 | pcm = _PAGE_CACHE_MODE_UC; |
f0970c13 | 664 | } |
665 | #endif | |
666 | ||
e7f260a2 | 667 | *vma_prot = __pgprot((pgprot_val(*vma_prot) & ~_PAGE_CACHE_MASK) | |
e00c8cc9 | 668 | cachemode2protval(pcm)); |
f0970c13 | 669 | return 1; |
670 | } | |
e7f260a2 | 671 | |
7880f746 VP |
672 | /* |
673 | * Change the memory type for the physial address range in kernel identity | |
674 | * mapping space if that range is a part of identity map. | |
675 | */ | |
b14097bd JG |
676 | int kernel_map_sync_memtype(u64 base, unsigned long size, |
677 | enum page_cache_mode pcm) | |
7880f746 VP |
678 | { |
679 | unsigned long id_sz; | |
680 | ||
a25b9316 | 681 | if (base > __pa(high_memory-1)) |
7880f746 VP |
682 | return 0; |
683 | ||
60f583d5 DH |
684 | /* |
685 | * some areas in the middle of the kernel identity range | |
686 | * are not mapped, like the PCI space. | |
687 | */ | |
688 | if (!page_is_ram(base >> PAGE_SHIFT)) | |
689 | return 0; | |
690 | ||
a25b9316 | 691 | id_sz = (__pa(high_memory-1) <= base + size) ? |
7880f746 VP |
692 | __pa(high_memory) - base : |
693 | size; | |
694 | ||
b14097bd | 695 | if (ioremap_change_attr((unsigned long)__va(base), id_sz, pcm) < 0) { |
365811d6 BH |
696 | printk(KERN_INFO "%s:%d ioremap_change_attr failed %s " |
697 | "for [mem %#010Lx-%#010Lx]\n", | |
7880f746 | 698 | current->comm, current->pid, |
e00c8cc9 | 699 | cattr_name(pcm), |
365811d6 | 700 | base, (unsigned long long)(base + size-1)); |
7880f746 VP |
701 | return -EINVAL; |
702 | } | |
703 | return 0; | |
704 | } | |
705 | ||
5899329b | 706 | /* |
707 | * Internal interface to reserve a range of physical memory with prot. | |
708 | * Reserved non RAM regions only and after successful reserve_memtype, | |
709 | * this func also keeps identity mapping (if any) in sync with this new prot. | |
710 | */ | |
cdecff68 | 711 | static int reserve_pfn_range(u64 paddr, unsigned long size, pgprot_t *vma_prot, |
712 | int strict_prot) | |
5899329b | 713 | { |
714 | int is_ram = 0; | |
7880f746 | 715 | int ret; |
e00c8cc9 JG |
716 | enum page_cache_mode want_pcm = pgprot2cachemode(*vma_prot); |
717 | enum page_cache_mode pcm = want_pcm; | |
5899329b | 718 | |
be03d9e8 | 719 | is_ram = pat_pagerange_is_ram(paddr, paddr + size); |
5899329b | 720 | |
be03d9e8 | 721 | /* |
d886c73c VP |
722 | * reserve_pfn_range() for RAM pages. We do not refcount to keep |
723 | * track of number of mappings of RAM pages. We can assert that | |
724 | * the type requested matches the type of first page in the range. | |
be03d9e8 | 725 | */ |
d886c73c VP |
726 | if (is_ram) { |
727 | if (!pat_enabled) | |
728 | return 0; | |
729 | ||
e00c8cc9 JG |
730 | pcm = lookup_memtype(paddr); |
731 | if (want_pcm != pcm) { | |
365811d6 | 732 | printk(KERN_WARNING "%s:%d map pfn RAM range req %s for [mem %#010Lx-%#010Lx], got %s\n", |
d886c73c | 733 | current->comm, current->pid, |
e00c8cc9 | 734 | cattr_name(want_pcm), |
d886c73c | 735 | (unsigned long long)paddr, |
365811d6 | 736 | (unsigned long long)(paddr + size - 1), |
e00c8cc9 | 737 | cattr_name(pcm)); |
d886c73c | 738 | *vma_prot = __pgprot((pgprot_val(*vma_prot) & |
e00c8cc9 JG |
739 | (~_PAGE_CACHE_MASK)) | |
740 | cachemode2protval(pcm)); | |
d886c73c | 741 | } |
4bb9c5c0 | 742 | return 0; |
d886c73c | 743 | } |
5899329b | 744 | |
e00c8cc9 | 745 | ret = reserve_memtype(paddr, paddr + size, want_pcm, &pcm); |
5899329b | 746 | if (ret) |
747 | return ret; | |
748 | ||
e00c8cc9 | 749 | if (pcm != want_pcm) { |
1adcaafe | 750 | if (strict_prot || |
e00c8cc9 | 751 | !is_new_memtype_allowed(paddr, size, want_pcm, pcm)) { |
cdecff68 | 752 | free_memtype(paddr, paddr + size); |
753 | printk(KERN_ERR "%s:%d map pfn expected mapping type %s" | |
365811d6 | 754 | " for [mem %#010Lx-%#010Lx], got %s\n", |
cdecff68 | 755 | current->comm, current->pid, |
e00c8cc9 | 756 | cattr_name(want_pcm), |
cdecff68 | 757 | (unsigned long long)paddr, |
365811d6 | 758 | (unsigned long long)(paddr + size - 1), |
e00c8cc9 | 759 | cattr_name(pcm)); |
cdecff68 | 760 | return -EINVAL; |
761 | } | |
762 | /* | |
763 | * We allow returning different type than the one requested in | |
764 | * non strict case. | |
765 | */ | |
766 | *vma_prot = __pgprot((pgprot_val(*vma_prot) & | |
767 | (~_PAGE_CACHE_MASK)) | | |
e00c8cc9 | 768 | cachemode2protval(pcm)); |
5899329b | 769 | } |
770 | ||
e00c8cc9 | 771 | if (kernel_map_sync_memtype(paddr, size, pcm) < 0) { |
5899329b | 772 | free_memtype(paddr, paddr + size); |
5899329b | 773 | return -EINVAL; |
774 | } | |
775 | return 0; | |
776 | } | |
777 | ||
778 | /* | |
779 | * Internal interface to free a range of physical memory. | |
780 | * Frees non RAM regions only. | |
781 | */ | |
782 | static void free_pfn_range(u64 paddr, unsigned long size) | |
783 | { | |
784 | int is_ram; | |
785 | ||
be03d9e8 | 786 | is_ram = pat_pagerange_is_ram(paddr, paddr + size); |
5899329b | 787 | if (is_ram == 0) |
788 | free_memtype(paddr, paddr + size); | |
789 | } | |
790 | ||
791 | /* | |
5180da41 | 792 | * track_pfn_copy is called when vma that is covering the pfnmap gets |
5899329b | 793 | * copied through copy_page_range(). |
794 | * | |
795 | * If the vma has a linear pfn mapping for the entire range, we get the prot | |
796 | * from pte and reserve the entire vma range with single reserve_pfn_range call. | |
5899329b | 797 | */ |
5180da41 | 798 | int track_pfn_copy(struct vm_area_struct *vma) |
5899329b | 799 | { |
c1c15b65 | 800 | resource_size_t paddr; |
982d789a | 801 | unsigned long prot; |
4b065046 | 802 | unsigned long vma_size = vma->vm_end - vma->vm_start; |
cdecff68 | 803 | pgprot_t pgprot; |
5899329b | 804 | |
b3b9c293 | 805 | if (vma->vm_flags & VM_PAT) { |
5899329b | 806 | /* |
982d789a | 807 | * reserve the whole chunk covered by vma. We need the |
808 | * starting address and protection from pte. | |
5899329b | 809 | */ |
4b065046 | 810 | if (follow_phys(vma, vma->vm_start, 0, &prot, &paddr)) { |
5899329b | 811 | WARN_ON_ONCE(1); |
982d789a | 812 | return -EINVAL; |
5899329b | 813 | } |
cdecff68 | 814 | pgprot = __pgprot(prot); |
815 | return reserve_pfn_range(paddr, vma_size, &pgprot, 1); | |
5899329b | 816 | } |
817 | ||
5899329b | 818 | return 0; |
5899329b | 819 | } |
820 | ||
821 | /* | |
5899329b | 822 | * prot is passed in as a parameter for the new mapping. If the vma has a |
823 | * linear pfn mapping for the entire range reserve the entire vma range with | |
824 | * single reserve_pfn_range call. | |
5899329b | 825 | */ |
5180da41 | 826 | int track_pfn_remap(struct vm_area_struct *vma, pgprot_t *prot, |
b3b9c293 | 827 | unsigned long pfn, unsigned long addr, unsigned long size) |
5899329b | 828 | { |
b1a86e15 | 829 | resource_size_t paddr = (resource_size_t)pfn << PAGE_SHIFT; |
2a374698 | 830 | enum page_cache_mode pcm; |
5899329b | 831 | |
b1a86e15 | 832 | /* reserve the whole chunk starting from paddr */ |
b3b9c293 KK |
833 | if (addr == vma->vm_start && size == (vma->vm_end - vma->vm_start)) { |
834 | int ret; | |
835 | ||
836 | ret = reserve_pfn_range(paddr, size, prot, 0); | |
837 | if (!ret) | |
838 | vma->vm_flags |= VM_PAT; | |
839 | return ret; | |
840 | } | |
5899329b | 841 | |
10876376 VP |
842 | if (!pat_enabled) |
843 | return 0; | |
844 | ||
5180da41 SS |
845 | /* |
846 | * For anything smaller than the vma size we set prot based on the | |
847 | * lookup. | |
848 | */ | |
2a374698 | 849 | pcm = lookup_memtype(paddr); |
5180da41 SS |
850 | |
851 | /* Check memtype for the remaining pages */ | |
852 | while (size > PAGE_SIZE) { | |
853 | size -= PAGE_SIZE; | |
854 | paddr += PAGE_SIZE; | |
2a374698 | 855 | if (pcm != lookup_memtype(paddr)) |
5180da41 SS |
856 | return -EINVAL; |
857 | } | |
858 | ||
859 | *prot = __pgprot((pgprot_val(vma->vm_page_prot) & (~_PAGE_CACHE_MASK)) | | |
2a374698 | 860 | cachemode2protval(pcm)); |
5180da41 SS |
861 | |
862 | return 0; | |
863 | } | |
864 | ||
865 | int track_pfn_insert(struct vm_area_struct *vma, pgprot_t *prot, | |
866 | unsigned long pfn) | |
867 | { | |
2a374698 | 868 | enum page_cache_mode pcm; |
5180da41 SS |
869 | |
870 | if (!pat_enabled) | |
871 | return 0; | |
872 | ||
873 | /* Set prot based on lookup */ | |
2a374698 | 874 | pcm = lookup_memtype((resource_size_t)pfn << PAGE_SHIFT); |
10876376 | 875 | *prot = __pgprot((pgprot_val(vma->vm_page_prot) & (~_PAGE_CACHE_MASK)) | |
2a374698 | 876 | cachemode2protval(pcm)); |
10876376 | 877 | |
5899329b | 878 | return 0; |
5899329b | 879 | } |
880 | ||
881 | /* | |
5180da41 | 882 | * untrack_pfn is called while unmapping a pfnmap for a region. |
5899329b | 883 | * untrack can be called for a specific region indicated by pfn and size or |
b1a86e15 | 884 | * can be for the entire vma (in which case pfn, size are zero). |
5899329b | 885 | */ |
5180da41 SS |
886 | void untrack_pfn(struct vm_area_struct *vma, unsigned long pfn, |
887 | unsigned long size) | |
5899329b | 888 | { |
c1c15b65 | 889 | resource_size_t paddr; |
b1a86e15 | 890 | unsigned long prot; |
5899329b | 891 | |
b3b9c293 | 892 | if (!(vma->vm_flags & VM_PAT)) |
5899329b | 893 | return; |
b1a86e15 SS |
894 | |
895 | /* free the chunk starting from pfn or the whole chunk */ | |
896 | paddr = (resource_size_t)pfn << PAGE_SHIFT; | |
897 | if (!paddr && !size) { | |
898 | if (follow_phys(vma, vma->vm_start, 0, &prot, &paddr)) { | |
899 | WARN_ON_ONCE(1); | |
900 | return; | |
901 | } | |
902 | ||
903 | size = vma->vm_end - vma->vm_start; | |
5899329b | 904 | } |
b1a86e15 | 905 | free_pfn_range(paddr, size); |
b3b9c293 | 906 | vma->vm_flags &= ~VM_PAT; |
5899329b | 907 | } |
908 | ||
2520bd31 | 909 | pgprot_t pgprot_writecombine(pgprot_t prot) |
910 | { | |
911 | if (pat_enabled) | |
e00c8cc9 JG |
912 | return __pgprot(pgprot_val(prot) | |
913 | cachemode2protval(_PAGE_CACHE_MODE_WC)); | |
2520bd31 | 914 | else |
915 | return pgprot_noncached(prot); | |
916 | } | |
92b9af9e | 917 | EXPORT_SYMBOL_GPL(pgprot_writecombine); |
2520bd31 | 918 | |
012f09e7 | 919 | #if defined(CONFIG_DEBUG_FS) && defined(CONFIG_X86_PAT) |
fec0962e | 920 | |
fec0962e | 921 | static struct memtype *memtype_get_idx(loff_t pos) |
922 | { | |
be5a0c12 | 923 | struct memtype *print_entry; |
924 | int ret; | |
fec0962e | 925 | |
be5a0c12 | 926 | print_entry = kzalloc(sizeof(struct memtype), GFP_KERNEL); |
fec0962e | 927 | if (!print_entry) |
928 | return NULL; | |
929 | ||
930 | spin_lock(&memtype_lock); | |
9e41a49a | 931 | ret = rbt_memtype_copy_nth_element(print_entry, pos); |
fec0962e | 932 | spin_unlock(&memtype_lock); |
ad2cde16 | 933 | |
be5a0c12 | 934 | if (!ret) { |
935 | return print_entry; | |
936 | } else { | |
937 | kfree(print_entry); | |
938 | return NULL; | |
939 | } | |
fec0962e | 940 | } |
941 | ||
942 | static void *memtype_seq_start(struct seq_file *seq, loff_t *pos) | |
943 | { | |
944 | if (*pos == 0) { | |
945 | ++*pos; | |
3736708f | 946 | seq_puts(seq, "PAT memtype list:\n"); |
fec0962e | 947 | } |
948 | ||
949 | return memtype_get_idx(*pos); | |
950 | } | |
951 | ||
952 | static void *memtype_seq_next(struct seq_file *seq, void *v, loff_t *pos) | |
953 | { | |
954 | ++*pos; | |
955 | return memtype_get_idx(*pos); | |
956 | } | |
957 | ||
958 | static void memtype_seq_stop(struct seq_file *seq, void *v) | |
959 | { | |
960 | } | |
961 | ||
962 | static int memtype_seq_show(struct seq_file *seq, void *v) | |
963 | { | |
964 | struct memtype *print_entry = (struct memtype *)v; | |
965 | ||
966 | seq_printf(seq, "%s @ 0x%Lx-0x%Lx\n", cattr_name(print_entry->type), | |
967 | print_entry->start, print_entry->end); | |
968 | kfree(print_entry); | |
ad2cde16 | 969 | |
fec0962e | 970 | return 0; |
971 | } | |
972 | ||
d535e431 | 973 | static const struct seq_operations memtype_seq_ops = { |
fec0962e | 974 | .start = memtype_seq_start, |
975 | .next = memtype_seq_next, | |
976 | .stop = memtype_seq_stop, | |
977 | .show = memtype_seq_show, | |
978 | }; | |
979 | ||
980 | static int memtype_seq_open(struct inode *inode, struct file *file) | |
981 | { | |
982 | return seq_open(file, &memtype_seq_ops); | |
983 | } | |
984 | ||
985 | static const struct file_operations memtype_fops = { | |
986 | .open = memtype_seq_open, | |
987 | .read = seq_read, | |
988 | .llseek = seq_lseek, | |
989 | .release = seq_release, | |
990 | }; | |
991 | ||
992 | static int __init pat_memtype_list_init(void) | |
993 | { | |
dd4377b0 XF |
994 | if (pat_enabled) { |
995 | debugfs_create_file("pat_memtype_list", S_IRUSR, | |
996 | arch_debugfs_dir, NULL, &memtype_fops); | |
997 | } | |
fec0962e | 998 | return 0; |
999 | } | |
1000 | ||
1001 | late_initcall(pat_memtype_list_init); | |
1002 | ||
012f09e7 | 1003 | #endif /* CONFIG_DEBUG_FS && CONFIG_X86_PAT */ |