include cleanup: Update gfp.h and slab.h includes to prepare for breaking implicit...
[linux-2.6-block.git] / arch / x86 / mm / mmio-mod.c
CommitLineData
8b7d89d0
PP
1/*
2 * This program is free software; you can redistribute it and/or modify
3 * it under the terms of the GNU General Public License as published by
4 * the Free Software Foundation; either version 2 of the License, or
5 * (at your option) any later version.
6 *
7 * This program is distributed in the hope that it will be useful,
8 * but WITHOUT ANY WARRANTY; without even the implied warranty of
9 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
10 * GNU General Public License for more details.
11 *
12 * You should have received a copy of the GNU General Public License
13 * along with this program; if not, write to the Free Software
14 * Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA.
15 *
16 * Copyright (C) IBM Corporation, 2005
17 * Jeff Muizelaar, 2006, 2007
18 * Pekka Paalanen, 2008 <pq@iki.fi>
19 *
20 * Derived from the read-mod example from relay-examples by Tom Zanussi.
21 */
3a0340be 22
eba11d6d 23#define pr_fmt(fmt) "mmiotrace: " fmt
3a0340be 24
d61fc448
PP
25#define DEBUG 1
26
8b7d89d0 27#include <linux/module.h>
8b7d89d0 28#include <linux/debugfs.h>
5a0e3ad6 29#include <linux/slab.h>
f984b51e 30#include <linux/uaccess.h>
970e6fa0 31#include <linux/io.h>
8b7d89d0
PP
32#include <linux/version.h>
33#include <linux/kallsyms.h>
34#include <asm/pgtable.h>
35#include <linux/mmiotrace.h>
36#include <asm/e820.h> /* for ISA_START_ADDRESS */
fe1ffafa 37#include <asm/atomic.h>
f5136380 38#include <linux/percpu.h>
7423d111 39#include <linux/cpu.h>
8b7d89d0 40
8b7d89d0
PP
41#include "pf_in.h"
42
8b7d89d0
PP
43struct trap_reason {
44 unsigned long addr;
45 unsigned long ip;
46 enum reason_type type;
47 int active_traces;
48};
49
d61fc448
PP
50struct remap_trace {
51 struct list_head list;
52 struct kmmio_probe probe;
dee310d0 53 resource_size_t phys;
d61fc448
PP
54 unsigned long id;
55};
56
fe1ffafa 57/* Accessed per-cpu. */
f5136380 58static DEFINE_PER_CPU(struct trap_reason, pf_reason);
bd8ac686 59static DEFINE_PER_CPU(struct mmiotrace_rw, cpu_trace);
8b7d89d0 60
d61fc448
PP
61static DEFINE_MUTEX(mmiotrace_mutex);
62static DEFINE_SPINLOCK(trace_lock);
63static atomic_t mmiotrace_enabled;
64static LIST_HEAD(trace_list); /* struct remap_trace */
d61fc448
PP
65
66/*
67 * Locking in this file:
68 * - mmiotrace_mutex enforces enable/disable_mmiotrace() critical sections.
69 * - mmiotrace_enabled may be modified only when holding mmiotrace_mutex
70 * and trace_lock.
71 * - Routines depending on is_enabled() must take trace_lock.
72 * - trace_list users must hold trace_lock.
9e57fb35 73 * - is_enabled() guarantees that mmio_trace_{rw,mapping} are allowed.
d61fc448
PP
74 * - pre/post callbacks assume the effect of is_enabled() being true.
75 */
8b7d89d0
PP
76
77/* module parameters */
d61fc448
PP
78static unsigned long filter_offset;
79static int nommiotrace;
d61fc448 80static int trace_pc;
8b7d89d0 81
8b7d89d0
PP
82module_param(filter_offset, ulong, 0);
83module_param(nommiotrace, bool, 0);
8b7d89d0
PP
84module_param(trace_pc, bool, 0);
85
8b7d89d0
PP
86MODULE_PARM_DESC(filter_offset, "Start address of traced mappings.");
87MODULE_PARM_DESC(nommiotrace, "Disable actual MMIO tracing.");
8b7d89d0 88MODULE_PARM_DESC(trace_pc, "Record address of faulting instructions.");
d61fc448
PP
89
90static bool is_enabled(void)
91{
92 return atomic_read(&mmiotrace_enabled);
93}
8b7d89d0 94
8b7d89d0
PP
95static void print_pte(unsigned long address)
96{
790e2a29 97 unsigned int level;
75bb8835
PP
98 pte_t *pte = lookup_address(address, &level);
99
100 if (!pte) {
3a0340be
JP
101 pr_err("Error in %s: no pte for page 0x%08lx\n",
102 __func__, address);
75bb8835
PP
103 return;
104 }
105
106 if (level == PG_LEVEL_2M) {
3a0340be
JP
107 pr_emerg("4MB pages are not currently supported: 0x%08lx\n",
108 address);
8b7d89d0
PP
109 BUG();
110 }
3a0340be
JP
111 pr_info("pte for 0x%lx: 0x%llx 0x%llx\n",
112 address,
0663bb6c
RD
113 (unsigned long long)pte_val(*pte),
114 (unsigned long long)pte_val(*pte) & _PAGE_PRESENT);
8b7d89d0
PP
115}
116
117/*
118 * For some reason the pre/post pairs have been called in an
119 * unmatched order. Report and die.
120 */
121static void die_kmmio_nesting_error(struct pt_regs *regs, unsigned long addr)
122{
f5136380 123 const struct trap_reason *my_reason = &get_cpu_var(pf_reason);
3a0340be
JP
124 pr_emerg("unexpected fault for address: 0x%08lx, last fault for address: 0x%08lx\n",
125 addr, my_reason->addr);
8b7d89d0 126 print_pte(addr);
d61fc448
PP
127 print_symbol(KERN_EMERG "faulting IP is at %s\n", regs->ip);
128 print_symbol(KERN_EMERG "last faulting IP was at %s\n", my_reason->ip);
8b7d89d0 129#ifdef __i386__
0fd0e3da 130 pr_emerg("eax: %08lx ebx: %08lx ecx: %08lx edx: %08lx\n",
3a0340be 131 regs->ax, regs->bx, regs->cx, regs->dx);
0fd0e3da 132 pr_emerg("esi: %08lx edi: %08lx ebp: %08lx esp: %08lx\n",
3a0340be 133 regs->si, regs->di, regs->bp, regs->sp);
8b7d89d0 134#else
0fd0e3da 135 pr_emerg("rax: %016lx rcx: %016lx rdx: %016lx\n",
3a0340be 136 regs->ax, regs->cx, regs->dx);
0fd0e3da 137 pr_emerg("rsi: %016lx rdi: %016lx rbp: %016lx rsp: %016lx\n",
3a0340be 138 regs->si, regs->di, regs->bp, regs->sp);
8b7d89d0 139#endif
f5136380 140 put_cpu_var(pf_reason);
8b7d89d0
PP
141 BUG();
142}
143
144static void pre(struct kmmio_probe *p, struct pt_regs *regs,
145 unsigned long addr)
146{
f5136380 147 struct trap_reason *my_reason = &get_cpu_var(pf_reason);
bd8ac686 148 struct mmiotrace_rw *my_trace = &get_cpu_var(cpu_trace);
8b7d89d0
PP
149 const unsigned long instptr = instruction_pointer(regs);
150 const enum reason_type type = get_ins_type(instptr);
a50445d7 151 struct remap_trace *trace = p->private;
8b7d89d0
PP
152
153 /* it doesn't make sense to have more than one active trace per cpu */
f5136380 154 if (my_reason->active_traces)
8b7d89d0
PP
155 die_kmmio_nesting_error(regs, addr);
156 else
f5136380 157 my_reason->active_traces++;
8b7d89d0 158
f5136380
PP
159 my_reason->type = type;
160 my_reason->addr = addr;
161 my_reason->ip = instptr;
8b7d89d0 162
bd8ac686
PP
163 my_trace->phys = addr - trace->probe.addr + trace->phys;
164 my_trace->map_id = trace->id;
8b7d89d0
PP
165
166 /*
167 * Only record the program counter when requested.
168 * It may taint clean-room reverse engineering.
169 */
170 if (trace_pc)
bd8ac686 171 my_trace->pc = instptr;
8b7d89d0 172 else
bd8ac686 173 my_trace->pc = 0;
8b7d89d0 174
f984b51e
PP
175 /*
176 * XXX: the timestamp recorded will be *after* the tracing has been
177 * done, not at the time we hit the instruction. SMP implications
178 * on event ordering?
179 */
8b7d89d0
PP
180
181 switch (type) {
182 case REG_READ:
bd8ac686
PP
183 my_trace->opcode = MMIO_READ;
184 my_trace->width = get_ins_mem_width(instptr);
8b7d89d0
PP
185 break;
186 case REG_WRITE:
bd8ac686
PP
187 my_trace->opcode = MMIO_WRITE;
188 my_trace->width = get_ins_mem_width(instptr);
189 my_trace->value = get_ins_reg_val(instptr, regs);
8b7d89d0
PP
190 break;
191 case IMM_WRITE:
bd8ac686
PP
192 my_trace->opcode = MMIO_WRITE;
193 my_trace->width = get_ins_mem_width(instptr);
194 my_trace->value = get_ins_imm_val(instptr);
8b7d89d0
PP
195 break;
196 default:
197 {
198 unsigned char *ip = (unsigned char *)instptr;
bd8ac686
PP
199 my_trace->opcode = MMIO_UNKNOWN_OP;
200 my_trace->width = 0;
201 my_trace->value = (*ip) << 16 | *(ip + 1) << 8 |
f5136380 202 *(ip + 2);
8b7d89d0
PP
203 }
204 }
f5136380
PP
205 put_cpu_var(cpu_trace);
206 put_cpu_var(pf_reason);
8b7d89d0
PP
207}
208
209static void post(struct kmmio_probe *p, unsigned long condition,
210 struct pt_regs *regs)
211{
f5136380 212 struct trap_reason *my_reason = &get_cpu_var(pf_reason);
bd8ac686 213 struct mmiotrace_rw *my_trace = &get_cpu_var(cpu_trace);
8b7d89d0
PP
214
215 /* this should always return the active_trace count to 0 */
f5136380
PP
216 my_reason->active_traces--;
217 if (my_reason->active_traces) {
3a0340be 218 pr_emerg("unexpected post handler");
8b7d89d0
PP
219 BUG();
220 }
221
f5136380 222 switch (my_reason->type) {
8b7d89d0 223 case REG_READ:
bd8ac686 224 my_trace->value = get_ins_reg_val(my_reason->ip, regs);
8b7d89d0
PP
225 break;
226 default:
227 break;
228 }
f984b51e 229
bd8ac686 230 mmio_trace_rw(my_trace);
f5136380
PP
231 put_cpu_var(cpu_trace);
232 put_cpu_var(pf_reason);
8b7d89d0
PP
233}
234
dee310d0 235static void ioremap_trace_core(resource_size_t offset, unsigned long size,
8b7d89d0
PP
236 void __iomem *addr)
237{
d61fc448 238 static atomic_t next_id;
8b7d89d0 239 struct remap_trace *trace = kmalloc(sizeof(*trace), GFP_KERNEL);
87e547fe 240 /* These are page-unaligned. */
bd8ac686
PP
241 struct mmiotrace_map map = {
242 .phys = offset,
243 .virt = (unsigned long)addr,
244 .len = size,
245 .opcode = MMIO_PROBE
8b7d89d0 246 };
8b7d89d0 247
d61fc448 248 if (!trace) {
3a0340be 249 pr_err("kmalloc failed in ioremap\n");
d61fc448
PP
250 return;
251 }
252
8b7d89d0
PP
253 *trace = (struct remap_trace) {
254 .probe = {
255 .addr = (unsigned long)addr,
256 .len = size,
257 .pre_handler = pre,
258 .post_handler = post,
a50445d7 259 .private = trace
d61fc448
PP
260 },
261 .phys = offset,
262 .id = atomic_inc_return(&next_id)
8b7d89d0 263 };
bd8ac686 264 map.map_id = trace->id;
8b7d89d0 265
d61fc448 266 spin_lock_irq(&trace_lock);
bbe5c783
PP
267 if (!is_enabled()) {
268 kfree(trace);
d61fc448 269 goto not_enabled;
bbe5c783 270 }
d61fc448 271
bd8ac686 272 mmio_trace_mapping(&map);
8b7d89d0 273 list_add_tail(&trace->list, &trace_list);
8b7d89d0
PP
274 if (!nommiotrace)
275 register_kmmio_probe(&trace->probe);
d61fc448
PP
276
277not_enabled:
278 spin_unlock_irq(&trace_lock);
8b7d89d0
PP
279}
280
dee310d0
PP
281void mmiotrace_ioremap(resource_size_t offset, unsigned long size,
282 void __iomem *addr)
8b7d89d0 283{
d61fc448 284 if (!is_enabled()) /* recheck and proper locking in *_core() */
8b7d89d0
PP
285 return;
286
3a0340be
JP
287 pr_debug("ioremap_*(0x%llx, 0x%lx) = %p\n",
288 (unsigned long long)offset, size, addr);
d61fc448 289 if ((filter_offset) && (offset != filter_offset))
8b7d89d0 290 return;
d61fc448 291 ioremap_trace_core(offset, size, addr);
8b7d89d0 292}
8b7d89d0 293
d61fc448 294static void iounmap_trace_core(volatile void __iomem *addr)
8b7d89d0 295{
bd8ac686
PP
296 struct mmiotrace_map map = {
297 .phys = 0,
298 .virt = (unsigned long)addr,
299 .len = 0,
300 .opcode = MMIO_UNPROBE
8b7d89d0
PP
301 };
302 struct remap_trace *trace;
303 struct remap_trace *tmp;
d61fc448
PP
304 struct remap_trace *found_trace = NULL;
305
3a0340be 306 pr_debug("Unmapping %p.\n", addr);
8b7d89d0 307
d61fc448
PP
308 spin_lock_irq(&trace_lock);
309 if (!is_enabled())
310 goto not_enabled;
311
8b7d89d0
PP
312 list_for_each_entry_safe(trace, tmp, &trace_list, list) {
313 if ((unsigned long)addr == trace->probe.addr) {
314 if (!nommiotrace)
315 unregister_kmmio_probe(&trace->probe);
316 list_del(&trace->list);
d61fc448 317 found_trace = trace;
8b7d89d0
PP
318 break;
319 }
320 }
bd8ac686
PP
321 map.map_id = (found_trace) ? found_trace->id : -1;
322 mmio_trace_mapping(&map);
d61fc448
PP
323
324not_enabled:
325 spin_unlock_irq(&trace_lock);
326 if (found_trace) {
327 synchronize_rcu(); /* unregister_kmmio_probe() requirement */
328 kfree(found_trace);
329 }
330}
331
332void mmiotrace_iounmap(volatile void __iomem *addr)
333{
334 might_sleep();
335 if (is_enabled()) /* recheck and proper locking in *_core() */
336 iounmap_trace_core(addr);
8b7d89d0 337}
8b7d89d0 338
9e57fb35
PP
339int mmiotrace_printk(const char *fmt, ...)
340{
341 int ret = 0;
342 va_list args;
343 unsigned long flags;
344 va_start(args, fmt);
345
346 spin_lock_irqsave(&trace_lock, flags);
347 if (is_enabled())
348 ret = mmio_trace_printk(fmt, args);
349 spin_unlock_irqrestore(&trace_lock, flags);
350
351 va_end(args);
352 return ret;
353}
354EXPORT_SYMBOL(mmiotrace_printk);
355
8b7d89d0
PP
356static void clear_trace_list(void)
357{
358 struct remap_trace *trace;
359 struct remap_trace *tmp;
360
d61fc448
PP
361 /*
362 * No locking required, because the caller ensures we are in a
363 * critical section via mutex, and is_enabled() is false,
364 * i.e. nothing can traverse or modify this list.
365 * Caller also ensures is_enabled() cannot change.
366 */
367 list_for_each_entry(trace, &trace_list, list) {
3a0340be
JP
368 pr_notice("purging non-iounmapped trace @0x%08lx, size 0x%lx.\n",
369 trace->probe.addr, trace->probe.len);
8b7d89d0
PP
370 if (!nommiotrace)
371 unregister_kmmio_probe(&trace->probe);
d61fc448
PP
372 }
373 synchronize_rcu(); /* unregister_kmmio_probe() requirement */
374
375 list_for_each_entry_safe(trace, tmp, &trace_list, list) {
8b7d89d0
PP
376 list_del(&trace->list);
377 kfree(trace);
d61fc448
PP
378 }
379}
380
7423d111 381#ifdef CONFIG_HOTPLUG_CPU
c38da569 382static cpumask_var_t downed_cpus;
7423d111
PP
383
384static void enter_uniprocessor(void)
385{
386 int cpu;
387 int err;
388
c38da569
RR
389 if (downed_cpus == NULL &&
390 !alloc_cpumask_var(&downed_cpus, GFP_KERNEL)) {
3a0340be 391 pr_notice("Failed to allocate mask\n");
c38da569
RR
392 goto out;
393 }
394
7423d111 395 get_online_cpus();
c38da569
RR
396 cpumask_copy(downed_cpus, cpu_online_mask);
397 cpumask_clear_cpu(cpumask_first(cpu_online_mask), downed_cpus);
7423d111 398 if (num_online_cpus() > 1)
3a0340be 399 pr_notice("Disabling non-boot CPUs...\n");
7423d111
PP
400 put_online_cpus();
401
c38da569 402 for_each_cpu(cpu, downed_cpus) {
7423d111 403 err = cpu_down(cpu);
970e6fa0 404 if (!err)
3a0340be 405 pr_info("CPU%d is down.\n", cpu);
970e6fa0 406 else
3a0340be 407 pr_err("Error taking CPU%d down: %d\n", cpu, err);
7423d111 408 }
c38da569 409out:
7423d111 410 if (num_online_cpus() > 1)
3a0340be 411 pr_warning("multiple CPUs still online, may miss events.\n");
7423d111
PP
412}
413
7701e8c5
MS
414/* __ref because leave_uniprocessor calls cpu_up which is __cpuinit,
415 but this whole function is ifdefed CONFIG_HOTPLUG_CPU */
416static void __ref leave_uniprocessor(void)
7423d111
PP
417{
418 int cpu;
419 int err;
420
c38da569 421 if (downed_cpus == NULL || cpumask_weight(downed_cpus) == 0)
7423d111 422 return;
3a0340be 423 pr_notice("Re-enabling CPUs...\n");
c38da569 424 for_each_cpu(cpu, downed_cpus) {
7423d111
PP
425 err = cpu_up(cpu);
426 if (!err)
3a0340be 427 pr_info("enabled CPU%d.\n", cpu);
7423d111 428 else
3a0340be 429 pr_err("cannot re-enable CPU%d: %d\n", cpu, err);
7423d111
PP
430 }
431}
432
433#else /* !CONFIG_HOTPLUG_CPU */
434static void enter_uniprocessor(void)
435{
436 if (num_online_cpus() > 1)
3a0340be
JP
437 pr_warning("multiple CPUs are online, may miss events. "
438 "Suggest booting with maxcpus=1 kernel argument.\n");
7423d111
PP
439}
440
441static void leave_uniprocessor(void)
442{
443}
444#endif
445
f984b51e 446void enable_mmiotrace(void)
d61fc448
PP
447{
448 mutex_lock(&mmiotrace_mutex);
449 if (is_enabled())
450 goto out;
451
d61fc448 452 if (nommiotrace)
3a0340be 453 pr_info("MMIO tracing disabled.\n");
0f9a623d 454 kmmio_init();
7423d111 455 enter_uniprocessor();
d61fc448
PP
456 spin_lock_irq(&trace_lock);
457 atomic_inc(&mmiotrace_enabled);
458 spin_unlock_irq(&trace_lock);
3a0340be 459 pr_info("enabled.\n");
d61fc448
PP
460out:
461 mutex_unlock(&mmiotrace_mutex);
462}
463
f984b51e 464void disable_mmiotrace(void)
d61fc448
PP
465{
466 mutex_lock(&mmiotrace_mutex);
467 if (!is_enabled())
468 goto out;
469
470 spin_lock_irq(&trace_lock);
471 atomic_dec(&mmiotrace_enabled);
472 BUG_ON(is_enabled());
473 spin_unlock_irq(&trace_lock);
474
475 clear_trace_list(); /* guarantees: no more kmmio callbacks */
7423d111 476 leave_uniprocessor();
0f9a623d 477 kmmio_cleanup();
3a0340be 478 pr_info("disabled.\n");
d61fc448
PP
479out:
480 mutex_unlock(&mmiotrace_mutex);
8b7d89d0 481}