x86/apic: Work around boot failure on HP ProLiant DL980 G7 Server systems
[linux-block.git] / arch / x86 / mm / init_64.c
CommitLineData
1da177e4
LT
1/*
2 * linux/arch/x86_64/mm/init.c
3 *
4 * Copyright (C) 1995 Linus Torvalds
a2531293 5 * Copyright (C) 2000 Pavel Machek <pavel@ucw.cz>
1da177e4
LT
6 * Copyright (C) 2002,2003 Andi Kleen <ak@suse.de>
7 */
8
1da177e4
LT
9#include <linux/signal.h>
10#include <linux/sched.h>
11#include <linux/kernel.h>
12#include <linux/errno.h>
13#include <linux/string.h>
14#include <linux/types.h>
15#include <linux/ptrace.h>
16#include <linux/mman.h>
17#include <linux/mm.h>
18#include <linux/swap.h>
19#include <linux/smp.h>
20#include <linux/init.h>
11034d55 21#include <linux/initrd.h>
1da177e4
LT
22#include <linux/pagemap.h>
23#include <linux/bootmem.h>
a9ce6bc1 24#include <linux/memblock.h>
1da177e4 25#include <linux/proc_fs.h>
59170891 26#include <linux/pci.h>
6fb14755 27#include <linux/pfn.h>
c9cf5528 28#include <linux/poison.h>
17a941d8 29#include <linux/dma-mapping.h>
44df75e6 30#include <linux/module.h>
a63fdc51 31#include <linux/memory.h>
44df75e6 32#include <linux/memory_hotplug.h>
ae32b129 33#include <linux/nmi.h>
5a0e3ad6 34#include <linux/gfp.h>
1da177e4
LT
35
36#include <asm/processor.h>
46eaa670 37#include <asm/bios_ebda.h>
1da177e4
LT
38#include <asm/uaccess.h>
39#include <asm/pgtable.h>
40#include <asm/pgalloc.h>
41#include <asm/dma.h>
42#include <asm/fixmap.h>
43#include <asm/e820.h>
44#include <asm/apic.h>
45#include <asm/tlb.h>
46#include <asm/mmu_context.h>
47#include <asm/proto.h>
48#include <asm/smp.h>
2bc0414e 49#include <asm/sections.h>
718fc13b 50#include <asm/kdebug.h>
aaa64e04 51#include <asm/numa.h>
7bfeab9a 52#include <asm/cacheflush.h>
4fcb2083 53#include <asm/init.h>
1dc41aa6 54#include <asm/uv/uv.h>
e5f15b45 55#include <asm/setup.h>
1da177e4 56
00d1c5e0
IM
57static int __init parse_direct_gbpages_off(char *arg)
58{
59 direct_gbpages = 0;
60 return 0;
61}
62early_param("nogbpages", parse_direct_gbpages_off);
63
64static int __init parse_direct_gbpages_on(char *arg)
65{
66 direct_gbpages = 1;
67 return 0;
68}
69early_param("gbpages", parse_direct_gbpages_on);
70
1da177e4
LT
71/*
72 * NOTE: pagetable_init alloc all the fixmap pagetables contiguous on the
73 * physical space so we can cache the place of the first one and move
74 * around without checking the pgd every time.
75 */
76
be43d728 77pteval_t __supported_pte_mask __read_mostly = ~_PAGE_IOMAP;
bd220a24
YL
78EXPORT_SYMBOL_GPL(__supported_pte_mask);
79
bd220a24
YL
80int force_personality32;
81
deed05b7
IM
82/*
83 * noexec32=on|off
84 * Control non executable heap for 32bit processes.
85 * To control the stack too use noexec=off
86 *
87 * on PROT_READ does not imply PROT_EXEC for 32-bit processes (default)
88 * off PROT_READ implies PROT_EXEC
89 */
bd220a24
YL
90static int __init nonx32_setup(char *str)
91{
92 if (!strcmp(str, "on"))
93 force_personality32 &= ~READ_IMPLIES_EXEC;
94 else if (!strcmp(str, "off"))
95 force_personality32 |= READ_IMPLIES_EXEC;
96 return 1;
97}
98__setup("noexec32=", nonx32_setup);
99
6afb5157
HL
100/*
101 * When memory was added/removed make sure all the processes MM have
102 * suitable PGD entries in the local PGD level page.
103 */
104void sync_global_pgds(unsigned long start, unsigned long end)
105{
44235dcd
JF
106 unsigned long address;
107
108 for (address = start; address <= end; address += PGDIR_SIZE) {
109 const pgd_t *pgd_ref = pgd_offset_k(address);
44235dcd
JF
110 struct page *page;
111
112 if (pgd_none(*pgd_ref))
113 continue;
114
a79e53d8 115 spin_lock(&pgd_lock);
44235dcd 116 list_for_each_entry(page, &pgd_list, lru) {
be354f40 117 pgd_t *pgd;
617d34d9
JF
118 spinlock_t *pgt_lock;
119
44235dcd 120 pgd = (pgd_t *)page_address(page) + pgd_index(address);
a79e53d8 121 /* the pgt_lock only for Xen */
617d34d9
JF
122 pgt_lock = &pgd_page_get_mm(page)->page_table_lock;
123 spin_lock(pgt_lock);
124
44235dcd
JF
125 if (pgd_none(*pgd))
126 set_pgd(pgd, *pgd_ref);
127 else
128 BUG_ON(pgd_page_vaddr(*pgd)
129 != pgd_page_vaddr(*pgd_ref));
617d34d9
JF
130
131 spin_unlock(pgt_lock);
44235dcd 132 }
a79e53d8 133 spin_unlock(&pgd_lock);
44235dcd 134 }
6afb5157
HL
135}
136
8d6ea967
MS
137/*
138 * NOTE: This function is marked __ref because it calls __init function
139 * (alloc_bootmem_pages). It's safe to do it ONLY when after_bootmem == 0.
140 */
141static __ref void *spp_getpage(void)
14a62c34 142{
1da177e4 143 void *ptr;
14a62c34 144
1da177e4 145 if (after_bootmem)
9e730237 146 ptr = (void *) get_zeroed_page(GFP_ATOMIC | __GFP_NOTRACK);
1da177e4
LT
147 else
148 ptr = alloc_bootmem_pages(PAGE_SIZE);
14a62c34
TG
149
150 if (!ptr || ((unsigned long)ptr & ~PAGE_MASK)) {
151 panic("set_pte_phys: cannot allocate page data %s\n",
152 after_bootmem ? "after bootmem" : "");
153 }
1da177e4 154
10f22dde 155 pr_debug("spp_getpage %p\n", ptr);
14a62c34 156
1da177e4 157 return ptr;
14a62c34 158}
1da177e4 159
f254f390 160static pud_t *fill_pud(pgd_t *pgd, unsigned long vaddr)
1da177e4 161{
458a3e64
TH
162 if (pgd_none(*pgd)) {
163 pud_t *pud = (pud_t *)spp_getpage();
164 pgd_populate(&init_mm, pgd, pud);
165 if (pud != pud_offset(pgd, 0))
166 printk(KERN_ERR "PAGETABLE BUG #00! %p <-> %p\n",
167 pud, pud_offset(pgd, 0));
168 }
169 return pud_offset(pgd, vaddr);
170}
1da177e4 171
f254f390 172static pmd_t *fill_pmd(pud_t *pud, unsigned long vaddr)
458a3e64 173{
1da177e4 174 if (pud_none(*pud)) {
458a3e64 175 pmd_t *pmd = (pmd_t *) spp_getpage();
bb23e403 176 pud_populate(&init_mm, pud, pmd);
458a3e64 177 if (pmd != pmd_offset(pud, 0))
10f22dde 178 printk(KERN_ERR "PAGETABLE BUG #01! %p <-> %p\n",
458a3e64 179 pmd, pmd_offset(pud, 0));
1da177e4 180 }
458a3e64
TH
181 return pmd_offset(pud, vaddr);
182}
183
f254f390 184static pte_t *fill_pte(pmd_t *pmd, unsigned long vaddr)
458a3e64 185{
1da177e4 186 if (pmd_none(*pmd)) {
458a3e64 187 pte_t *pte = (pte_t *) spp_getpage();
bb23e403 188 pmd_populate_kernel(&init_mm, pmd, pte);
458a3e64 189 if (pte != pte_offset_kernel(pmd, 0))
10f22dde 190 printk(KERN_ERR "PAGETABLE BUG #02!\n");
1da177e4 191 }
458a3e64
TH
192 return pte_offset_kernel(pmd, vaddr);
193}
194
195void set_pte_vaddr_pud(pud_t *pud_page, unsigned long vaddr, pte_t new_pte)
196{
197 pud_t *pud;
198 pmd_t *pmd;
199 pte_t *pte;
200
201 pud = pud_page + pud_index(vaddr);
202 pmd = fill_pmd(pud, vaddr);
203 pte = fill_pte(pmd, vaddr);
1da177e4 204
1da177e4
LT
205 set_pte(pte, new_pte);
206
207 /*
208 * It's enough to flush this one mapping.
209 * (PGE mappings get flushed as well)
210 */
211 __flush_tlb_one(vaddr);
212}
213
458a3e64 214void set_pte_vaddr(unsigned long vaddr, pte_t pteval)
0814e0ba
EH
215{
216 pgd_t *pgd;
217 pud_t *pud_page;
218
219 pr_debug("set_pte_vaddr %lx to %lx\n", vaddr, native_pte_val(pteval));
220
221 pgd = pgd_offset_k(vaddr);
222 if (pgd_none(*pgd)) {
223 printk(KERN_ERR
224 "PGD FIXMAP MISSING, it should be setup in head.S!\n");
225 return;
226 }
227 pud_page = (pud_t*)pgd_page_vaddr(*pgd);
228 set_pte_vaddr_pud(pud_page, vaddr, pteval);
229}
230
458a3e64 231pmd_t * __init populate_extra_pmd(unsigned long vaddr)
11124411
TH
232{
233 pgd_t *pgd;
234 pud_t *pud;
235
236 pgd = pgd_offset_k(vaddr);
458a3e64
TH
237 pud = fill_pud(pgd, vaddr);
238 return fill_pmd(pud, vaddr);
239}
240
241pte_t * __init populate_extra_pte(unsigned long vaddr)
242{
243 pmd_t *pmd;
11124411 244
458a3e64
TH
245 pmd = populate_extra_pmd(vaddr);
246 return fill_pte(pmd, vaddr);
11124411
TH
247}
248
3a9e189d
JS
249/*
250 * Create large page table mappings for a range of physical addresses.
251 */
252static void __init __init_extra_mapping(unsigned long phys, unsigned long size,
253 pgprot_t prot)
254{
255 pgd_t *pgd;
256 pud_t *pud;
257 pmd_t *pmd;
258
259 BUG_ON((phys & ~PMD_MASK) || (size & ~PMD_MASK));
260 for (; size; phys += PMD_SIZE, size -= PMD_SIZE) {
261 pgd = pgd_offset_k((unsigned long)__va(phys));
262 if (pgd_none(*pgd)) {
263 pud = (pud_t *) spp_getpage();
264 set_pgd(pgd, __pgd(__pa(pud) | _KERNPG_TABLE |
265 _PAGE_USER));
266 }
267 pud = pud_offset(pgd, (unsigned long)__va(phys));
268 if (pud_none(*pud)) {
269 pmd = (pmd_t *) spp_getpage();
270 set_pud(pud, __pud(__pa(pmd) | _KERNPG_TABLE |
271 _PAGE_USER));
272 }
273 pmd = pmd_offset(pud, phys);
274 BUG_ON(!pmd_none(*pmd));
275 set_pmd(pmd, __pmd(phys | pgprot_val(prot)));
276 }
277}
278
279void __init init_extra_mapping_wb(unsigned long phys, unsigned long size)
280{
281 __init_extra_mapping(phys, size, PAGE_KERNEL_LARGE);
282}
283
284void __init init_extra_mapping_uc(unsigned long phys, unsigned long size)
285{
286 __init_extra_mapping(phys, size, PAGE_KERNEL_LARGE_NOCACHE);
287}
288
31eedd82 289/*
88f3aec7
IM
290 * The head.S code sets up the kernel high mapping:
291 *
292 * from __START_KERNEL_map to __START_KERNEL_map + size (== _end-_text)
31eedd82
TG
293 *
294 * phys_addr holds the negative offset to the kernel, which is added
295 * to the compile time generated pmds. This results in invalid pmds up
296 * to the point where we hit the physaddr 0 mapping.
297 *
e5f15b45
YL
298 * We limit the mappings to the region from _text to _brk_end. _brk_end
299 * is rounded up to the 2MB boundary. This catches the invalid pmds as
31eedd82
TG
300 * well, as they are located before _text:
301 */
302void __init cleanup_highmap(void)
303{
304 unsigned long vaddr = __START_KERNEL_map;
e5f15b45
YL
305 unsigned long vaddr_end = __START_KERNEL_map + (max_pfn_mapped << PAGE_SHIFT);
306 unsigned long end = roundup((unsigned long)_brk_end, PMD_SIZE) - 1;
31eedd82 307 pmd_t *pmd = level2_kernel_pgt;
31eedd82 308
e5f15b45 309 for (; vaddr + PMD_SIZE - 1 < vaddr_end; pmd++, vaddr += PMD_SIZE) {
2884f110 310 if (pmd_none(*pmd))
31eedd82
TG
311 continue;
312 if (vaddr < (unsigned long) _text || vaddr > end)
313 set_pmd(pmd, __pmd(0));
314 }
315}
316
9482ac6e 317static __ref void *alloc_low_page(unsigned long *phys)
14a62c34 318{
d1b19426 319 unsigned long pfn = pgt_buf_end++;
1da177e4
LT
320 void *adr;
321
44df75e6 322 if (after_bootmem) {
9e730237 323 adr = (void *)get_zeroed_page(GFP_ATOMIC | __GFP_NOTRACK);
44df75e6 324 *phys = __pa(adr);
14a62c34 325
44df75e6
MT
326 return adr;
327 }
328
d1b19426 329 if (pfn >= pgt_buf_top)
14a62c34 330 panic("alloc_low_page: ran out of memory");
dafe41ee 331
14941779 332 adr = early_memremap(pfn * PAGE_SIZE, PAGE_SIZE);
234bb549 333 clear_page(adr);
dafe41ee
VG
334 *phys = pfn * PAGE_SIZE;
335 return adr;
336}
1da177e4 337
4b239f45
YL
338static __ref void *map_low_page(void *virt)
339{
340 void *adr;
341 unsigned long phys, left;
342
343 if (after_bootmem)
344 return virt;
345
346 phys = __pa(virt);
347 left = phys & (PAGE_SIZE - 1);
348 adr = early_memremap(phys & PAGE_MASK, PAGE_SIZE);
349 adr = (void *)(((unsigned long)adr) | left);
350
351 return adr;
352}
353
9482ac6e 354static __ref void unmap_low_page(void *adr)
14a62c34 355{
44df75e6
MT
356 if (after_bootmem)
357 return;
358
4b239f45 359 early_iounmap((void *)((unsigned long)adr & PAGE_MASK), PAGE_SIZE);
14a62c34 360}
1da177e4 361
7b16eb89 362static unsigned long __meminit
b27a43c1
SS
363phys_pte_init(pte_t *pte_page, unsigned long addr, unsigned long end,
364 pgprot_t prot)
4f9c11dd
JF
365{
366 unsigned pages = 0;
7b16eb89 367 unsigned long last_map_addr = end;
4f9c11dd 368 int i;
7b16eb89 369
4f9c11dd
JF
370 pte_t *pte = pte_page + pte_index(addr);
371
372 for(i = pte_index(addr); i < PTRS_PER_PTE; i++, addr += PAGE_SIZE, pte++) {
373
374 if (addr >= end) {
375 if (!after_bootmem) {
376 for(; i < PTRS_PER_PTE; i++, pte++)
377 set_pte(pte, __pte(0));
378 }
379 break;
380 }
381
b27a43c1
SS
382 /*
383 * We will re-use the existing mapping.
384 * Xen for example has some special requirements, like mapping
385 * pagetable pages as RO. So assume someone who pre-setup
386 * these mappings are more intelligent.
387 */
3afa3949 388 if (pte_val(*pte)) {
876ee61a
JB
389 if (!after_bootmem)
390 pages++;
4f9c11dd 391 continue;
3afa3949 392 }
4f9c11dd
JF
393
394 if (0)
395 printk(" pte=%p addr=%lx pte=%016lx\n",
396 pte, addr, pfn_pte(addr >> PAGE_SHIFT, PAGE_KERNEL).pte);
4f9c11dd 397 pages++;
b27a43c1 398 set_pte(pte, pfn_pte(addr >> PAGE_SHIFT, prot));
7b16eb89 399 last_map_addr = (addr & PAGE_MASK) + PAGE_SIZE;
4f9c11dd 400 }
a2699e47 401
4f9c11dd 402 update_page_count(PG_LEVEL_4K, pages);
7b16eb89
YL
403
404 return last_map_addr;
4f9c11dd
JF
405}
406
cc615032 407static unsigned long __meminit
b50efd2a 408phys_pmd_init(pmd_t *pmd_page, unsigned long address, unsigned long end,
b27a43c1 409 unsigned long page_size_mask, pgprot_t prot)
44df75e6 410{
20167d34 411 unsigned long pages = 0, next;
7b16eb89 412 unsigned long last_map_addr = end;
ce0c0e50 413
6ad91658 414 int i = pmd_index(address);
44df75e6 415
20167d34 416 for (; i < PTRS_PER_PMD; i++, address = next) {
4f9c11dd 417 unsigned long pte_phys;
6ad91658 418 pmd_t *pmd = pmd_page + pmd_index(address);
4f9c11dd 419 pte_t *pte;
b27a43c1 420 pgprot_t new_prot = prot;
44df75e6 421
5f51e139 422 if (address >= end) {
14a62c34 423 if (!after_bootmem) {
5f51e139
JB
424 for (; i < PTRS_PER_PMD; i++, pmd++)
425 set_pmd(pmd, __pmd(0));
14a62c34 426 }
44df75e6
MT
427 break;
428 }
6ad91658 429
20167d34
JB
430 next = (address & PMD_MASK) + PMD_SIZE;
431
4f9c11dd 432 if (pmd_val(*pmd)) {
8ae3a5a8
JB
433 if (!pmd_large(*pmd)) {
434 spin_lock(&init_mm.page_table_lock);
4b239f45
YL
435 pte = map_low_page((pte_t *)pmd_page_vaddr(*pmd));
436 last_map_addr = phys_pte_init(pte, address,
b27a43c1 437 end, prot);
4b239f45 438 unmap_low_page(pte);
8ae3a5a8 439 spin_unlock(&init_mm.page_table_lock);
a2699e47 440 continue;
8ae3a5a8 441 }
b27a43c1
SS
442 /*
443 * If we are ok with PG_LEVEL_2M mapping, then we will
444 * use the existing mapping,
445 *
446 * Otherwise, we will split the large page mapping but
447 * use the same existing protection bits except for
448 * large page, so that we don't violate Intel's TLB
449 * Application note (317080) which says, while changing
450 * the page sizes, new and old translations should
451 * not differ with respect to page frame and
452 * attributes.
453 */
3afa3949 454 if (page_size_mask & (1 << PG_LEVEL_2M)) {
876ee61a
JB
455 if (!after_bootmem)
456 pages++;
20167d34 457 last_map_addr = next;
b27a43c1 458 continue;
3afa3949 459 }
b27a43c1 460 new_prot = pte_pgprot(pte_clrhuge(*(pte_t *)pmd));
4f9c11dd
JF
461 }
462
b50efd2a 463 if (page_size_mask & (1<<PG_LEVEL_2M)) {
4f9c11dd 464 pages++;
8ae3a5a8 465 spin_lock(&init_mm.page_table_lock);
4f9c11dd 466 set_pte((pte_t *)pmd,
b27a43c1
SS
467 pfn_pte(address >> PAGE_SHIFT,
468 __pgprot(pgprot_val(prot) | _PAGE_PSE)));
8ae3a5a8 469 spin_unlock(&init_mm.page_table_lock);
20167d34 470 last_map_addr = next;
6ad91658 471 continue;
4f9c11dd 472 }
6ad91658 473
4f9c11dd 474 pte = alloc_low_page(&pte_phys);
b27a43c1 475 last_map_addr = phys_pte_init(pte, address, end, new_prot);
4f9c11dd
JF
476 unmap_low_page(pte);
477
8ae3a5a8 478 spin_lock(&init_mm.page_table_lock);
4f9c11dd 479 pmd_populate_kernel(&init_mm, pmd, __va(pte_phys));
8ae3a5a8 480 spin_unlock(&init_mm.page_table_lock);
44df75e6 481 }
ce0c0e50 482 update_page_count(PG_LEVEL_2M, pages);
7b16eb89 483 return last_map_addr;
44df75e6
MT
484}
485
cc615032 486static unsigned long __meminit
b50efd2a
YL
487phys_pud_init(pud_t *pud_page, unsigned long addr, unsigned long end,
488 unsigned long page_size_mask)
14a62c34 489{
20167d34 490 unsigned long pages = 0, next;
cc615032 491 unsigned long last_map_addr = end;
6ad91658 492 int i = pud_index(addr);
44df75e6 493
20167d34 494 for (; i < PTRS_PER_PUD; i++, addr = next) {
6ad91658
KM
495 unsigned long pmd_phys;
496 pud_t *pud = pud_page + pud_index(addr);
1da177e4 497 pmd_t *pmd;
b27a43c1 498 pgprot_t prot = PAGE_KERNEL;
1da177e4 499
6ad91658 500 if (addr >= end)
1da177e4 501 break;
1da177e4 502
20167d34
JB
503 next = (addr & PUD_MASK) + PUD_SIZE;
504
505 if (!after_bootmem && !e820_any_mapped(addr, next, 0)) {
14a62c34 506 set_pud(pud, __pud(0));
1da177e4 507 continue;
14a62c34 508 }
1da177e4 509
6ad91658 510 if (pud_val(*pud)) {
a2699e47 511 if (!pud_large(*pud)) {
4b239f45
YL
512 pmd = map_low_page(pmd_offset(pud, 0));
513 last_map_addr = phys_pmd_init(pmd, addr, end,
b27a43c1 514 page_size_mask, prot);
4b239f45
YL
515 unmap_low_page(pmd);
516 __flush_tlb_all();
a2699e47
SS
517 continue;
518 }
b27a43c1
SS
519 /*
520 * If we are ok with PG_LEVEL_1G mapping, then we will
521 * use the existing mapping.
522 *
523 * Otherwise, we will split the gbpage mapping but use
524 * the same existing protection bits except for large
525 * page, so that we don't violate Intel's TLB
526 * Application note (317080) which says, while changing
527 * the page sizes, new and old translations should
528 * not differ with respect to page frame and
529 * attributes.
530 */
3afa3949 531 if (page_size_mask & (1 << PG_LEVEL_1G)) {
876ee61a
JB
532 if (!after_bootmem)
533 pages++;
20167d34 534 last_map_addr = next;
b27a43c1 535 continue;
3afa3949 536 }
b27a43c1 537 prot = pte_pgprot(pte_clrhuge(*(pte_t *)pud));
ef925766
AK
538 }
539
b50efd2a 540 if (page_size_mask & (1<<PG_LEVEL_1G)) {
ce0c0e50 541 pages++;
8ae3a5a8 542 spin_lock(&init_mm.page_table_lock);
ef925766
AK
543 set_pte((pte_t *)pud,
544 pfn_pte(addr >> PAGE_SHIFT, PAGE_KERNEL_LARGE));
8ae3a5a8 545 spin_unlock(&init_mm.page_table_lock);
20167d34 546 last_map_addr = next;
6ad91658
KM
547 continue;
548 }
549
dafe41ee 550 pmd = alloc_low_page(&pmd_phys);
b27a43c1
SS
551 last_map_addr = phys_pmd_init(pmd, addr, end, page_size_mask,
552 prot);
4f9c11dd 553 unmap_low_page(pmd);
8ae3a5a8
JB
554
555 spin_lock(&init_mm.page_table_lock);
4f9c11dd 556 pud_populate(&init_mm, pud, __va(pmd_phys));
44df75e6 557 spin_unlock(&init_mm.page_table_lock);
1da177e4 558 }
1a2b4412 559 __flush_tlb_all();
a2699e47 560
ce0c0e50 561 update_page_count(PG_LEVEL_1G, pages);
cc615032 562
1a0db38e 563 return last_map_addr;
14a62c34 564}
1da177e4 565
41d840e2 566unsigned long __meminit
f765090a
PE
567kernel_physical_mapping_init(unsigned long start,
568 unsigned long end,
569 unsigned long page_size_mask)
14a62c34 570{
9b861528 571 bool pgd_changed = false;
b50efd2a 572 unsigned long next, last_map_addr = end;
9b861528 573 unsigned long addr;
1da177e4
LT
574
575 start = (unsigned long)__va(start);
576 end = (unsigned long)__va(end);
1c5f50ee 577 addr = start;
1da177e4
LT
578
579 for (; start < end; start = next) {
44df75e6 580 pgd_t *pgd = pgd_offset_k(start);
14a62c34 581 unsigned long pud_phys;
44df75e6
MT
582 pud_t *pud;
583
e22146e6 584 next = (start + PGDIR_SIZE) & PGDIR_MASK;
4f9c11dd
JF
585 if (next > end)
586 next = end;
587
588 if (pgd_val(*pgd)) {
4b239f45
YL
589 pud = map_low_page((pud_t *)pgd_page_vaddr(*pgd));
590 last_map_addr = phys_pud_init(pud, __pa(start),
b50efd2a 591 __pa(end), page_size_mask);
4b239f45 592 unmap_low_page(pud);
4f9c11dd
JF
593 continue;
594 }
595
8ae3a5a8 596 pud = alloc_low_page(&pud_phys);
b50efd2a
YL
597 last_map_addr = phys_pud_init(pud, __pa(start), __pa(next),
598 page_size_mask);
4f9c11dd 599 unmap_low_page(pud);
8ae3a5a8
JB
600
601 spin_lock(&init_mm.page_table_lock);
602 pgd_populate(&init_mm, pgd, __va(pud_phys));
603 spin_unlock(&init_mm.page_table_lock);
9b861528 604 pgd_changed = true;
14a62c34 605 }
9b861528
HL
606
607 if (pgd_changed)
608 sync_global_pgds(addr, end);
609
a2699e47 610 __flush_tlb_all();
1da177e4 611
b50efd2a
YL
612 return last_map_addr;
613}
7b16eb89 614
2b97690f 615#ifndef CONFIG_NUMA
d8fc3afc 616void __init initmem_init(void)
1f75d7e3 617{
0608f70c 618 memblock_set_node(0, (phys_addr_t)ULLONG_MAX, 0);
1f75d7e3 619}
3551f88f 620#endif
1f75d7e3 621
1da177e4
LT
622void __init paging_init(void)
623{
3551f88f 624 sparse_memory_present_with_active_regions(MAX_NUMNODES);
44df75e6 625 sparse_init();
44b57280
YL
626
627 /*
628 * clear the default setting with node 0
629 * note: don't use nodes_clear here, that is really clearing when
630 * numa support is not compiled in, and later node_set_state
631 * will not set it back.
632 */
4b0ef1fe
LJ
633 node_clear_state(0, N_MEMORY);
634 if (N_MEMORY != N_NORMAL_MEMORY)
635 node_clear_state(0, N_NORMAL_MEMORY);
44b57280 636
4c0b2e5f 637 zone_sizes_init();
1da177e4 638}
1da177e4 639
44df75e6
MT
640/*
641 * Memory hotplug specific functions
44df75e6 642 */
bc02af93 643#ifdef CONFIG_MEMORY_HOTPLUG
ea085417
SZ
644/*
645 * After memory hotplug the variables max_pfn, max_low_pfn and high_memory need
646 * updating.
647 */
648static void update_end_of_memory_vars(u64 start, u64 size)
649{
650 unsigned long end_pfn = PFN_UP(start + size);
651
652 if (end_pfn > max_pfn) {
653 max_pfn = end_pfn;
654 max_low_pfn = end_pfn;
655 high_memory = (void *)__va(max_pfn * PAGE_SIZE - 1) + 1;
656 }
657}
658
9d99aaa3
AK
659/*
660 * Memory is added always to NORMAL zone. This means you will never get
661 * additional DMA/DMA32 memory.
662 */
bc02af93 663int arch_add_memory(int nid, u64 start, u64 size)
44df75e6 664{
bc02af93 665 struct pglist_data *pgdat = NODE_DATA(nid);
776ed98b 666 struct zone *zone = pgdat->node_zones + ZONE_NORMAL;
cc615032 667 unsigned long last_mapped_pfn, start_pfn = start >> PAGE_SHIFT;
44df75e6
MT
668 unsigned long nr_pages = size >> PAGE_SHIFT;
669 int ret;
670
60817c9b 671 last_mapped_pfn = init_memory_mapping(start, start + size);
cc615032
AK
672 if (last_mapped_pfn > max_pfn_mapped)
673 max_pfn_mapped = last_mapped_pfn;
45e0b78b 674
c04fc586 675 ret = __add_pages(nid, zone, start_pfn, nr_pages);
fe8b868e 676 WARN_ON_ONCE(ret);
44df75e6 677
ea085417
SZ
678 /* update max_pfn, max_low_pfn and high_memory */
679 update_end_of_memory_vars(start, size);
680
44df75e6 681 return ret;
44df75e6 682}
bc02af93 683EXPORT_SYMBOL_GPL(arch_add_memory);
44df75e6 684
45e0b78b
KM
685#endif /* CONFIG_MEMORY_HOTPLUG */
686
81ac3ad9 687static struct kcore_list kcore_vsyscall;
1da177e4
LT
688
689void __init mem_init(void)
690{
0a43e4bf 691 long codesize, reservedpages, datasize, initsize;
11a6b0c9 692 unsigned long absent_pages;
1da177e4 693
0dc243ae 694 pci_iommu_alloc();
1da177e4 695
48ddb154 696 /* clear_bss() already clear the empty_zero_page */
1da177e4
LT
697
698 reservedpages = 0;
699
700 /* this will put all low memory onto the freelists */
2b97690f 701#ifdef CONFIG_NUMA
0a43e4bf 702 totalram_pages = numa_free_all_bootmem();
1da177e4 703#else
0a43e4bf 704 totalram_pages = free_all_bootmem();
1da177e4 705#endif
11a6b0c9
YL
706
707 absent_pages = absent_pages_in_range(0, max_pfn);
708 reservedpages = max_pfn - totalram_pages - absent_pages;
1da177e4
LT
709 after_bootmem = 1;
710
711 codesize = (unsigned long) &_etext - (unsigned long) &_text;
712 datasize = (unsigned long) &_edata - (unsigned long) &_etext;
713 initsize = (unsigned long) &__init_end - (unsigned long) &__init_begin;
714
715 /* Register memory areas for /proc/kcore */
14a62c34 716 kclist_add(&kcore_vsyscall, (void *)VSYSCALL_START,
c30bb2a2 717 VSYSCALL_END - VSYSCALL_START, KCORE_OTHER);
1da177e4 718
10f22dde 719 printk(KERN_INFO "Memory: %luk/%luk available (%ldk kernel code, "
11a6b0c9 720 "%ldk absent, %ldk reserved, %ldk data, %ldk init)\n",
cc013a88 721 nr_free_pages() << (PAGE_SHIFT-10),
c987d12f 722 max_pfn << (PAGE_SHIFT-10),
1da177e4 723 codesize >> 10,
11a6b0c9 724 absent_pages << (PAGE_SHIFT-10),
1da177e4
LT
725 reservedpages << (PAGE_SHIFT-10),
726 datasize >> 10,
727 initsize >> 10);
1da177e4
LT
728}
729
67df197b 730#ifdef CONFIG_DEBUG_RODATA
edeed305
AV
731const int rodata_test_data = 0xC3;
732EXPORT_SYMBOL_GPL(rodata_test_data);
67df197b 733
502f6604 734int kernel_set_to_readonly;
16239630
SR
735
736void set_kernel_text_rw(void)
737{
b9af7c0d 738 unsigned long start = PFN_ALIGN(_text);
e7d23dde 739 unsigned long end = PFN_ALIGN(__stop___ex_table);
16239630
SR
740
741 if (!kernel_set_to_readonly)
742 return;
743
744 pr_debug("Set kernel text: %lx - %lx for read write\n",
745 start, end);
746
e7d23dde
SS
747 /*
748 * Make the kernel identity mapping for text RW. Kernel text
749 * mapping will always be RO. Refer to the comment in
750 * static_protections() in pageattr.c
751 */
16239630
SR
752 set_memory_rw(start, (end - start) >> PAGE_SHIFT);
753}
754
755void set_kernel_text_ro(void)
756{
b9af7c0d 757 unsigned long start = PFN_ALIGN(_text);
e7d23dde 758 unsigned long end = PFN_ALIGN(__stop___ex_table);
16239630
SR
759
760 if (!kernel_set_to_readonly)
761 return;
762
763 pr_debug("Set kernel text: %lx - %lx for read only\n",
764 start, end);
765
e7d23dde
SS
766 /*
767 * Set the kernel identity mapping for text RO.
768 */
16239630
SR
769 set_memory_ro(start, (end - start) >> PAGE_SHIFT);
770}
771
67df197b
AV
772void mark_rodata_ro(void)
773{
74e08179 774 unsigned long start = PFN_ALIGN(_text);
8f0f996e
SR
775 unsigned long rodata_start =
776 ((unsigned long)__start_rodata + PAGE_SIZE - 1) & PAGE_MASK;
74e08179
SS
777 unsigned long end = (unsigned long) &__end_rodata_hpage_align;
778 unsigned long text_end = PAGE_ALIGN((unsigned long) &__stop___ex_table);
779 unsigned long rodata_end = PAGE_ALIGN((unsigned long) &__end_rodata);
780 unsigned long data_start = (unsigned long) &_sdata;
8f0f996e 781
6fb14755 782 printk(KERN_INFO "Write protecting the kernel read-only data: %luk\n",
e3ebadd9 783 (end - start) >> 10);
984bb80d
AV
784 set_memory_ro(start, (end - start) >> PAGE_SHIFT);
785
16239630
SR
786 kernel_set_to_readonly = 1;
787
984bb80d
AV
788 /*
789 * The rodata section (but not the kernel text!) should also be
790 * not-executable.
791 */
72b59d67 792 set_memory_nx(rodata_start, (end - rodata_start) >> PAGE_SHIFT);
67df197b 793
1a487252
AV
794 rodata_test();
795
0c42f392 796#ifdef CONFIG_CPA_DEBUG
10f22dde 797 printk(KERN_INFO "Testing CPA: undo %lx-%lx\n", start, end);
6d238cc4 798 set_memory_rw(start, (end-start) >> PAGE_SHIFT);
0c42f392 799
10f22dde 800 printk(KERN_INFO "Testing CPA: again\n");
6d238cc4 801 set_memory_ro(start, (end-start) >> PAGE_SHIFT);
0c42f392 802#endif
74e08179
SS
803
804 free_init_pages("unused kernel memory",
805 (unsigned long) page_address(virt_to_page(text_end)),
806 (unsigned long)
807 page_address(virt_to_page(rodata_start)));
808 free_init_pages("unused kernel memory",
809 (unsigned long) page_address(virt_to_page(rodata_end)),
810 (unsigned long) page_address(virt_to_page(data_start)));
67df197b 811}
4e4eee0e 812
67df197b
AV
813#endif
814
14a62c34
TG
815int kern_addr_valid(unsigned long addr)
816{
1da177e4 817 unsigned long above = ((long)addr) >> __VIRTUAL_MASK_SHIFT;
14a62c34
TG
818 pgd_t *pgd;
819 pud_t *pud;
820 pmd_t *pmd;
821 pte_t *pte;
1da177e4
LT
822
823 if (above != 0 && above != -1UL)
14a62c34
TG
824 return 0;
825
1da177e4
LT
826 pgd = pgd_offset_k(addr);
827 if (pgd_none(*pgd))
828 return 0;
829
830 pud = pud_offset(pgd, addr);
831 if (pud_none(*pud))
14a62c34 832 return 0;
1da177e4
LT
833
834 pmd = pmd_offset(pud, addr);
835 if (pmd_none(*pmd))
836 return 0;
14a62c34 837
1da177e4
LT
838 if (pmd_large(*pmd))
839 return pfn_valid(pmd_pfn(*pmd));
840
841 pte = pte_offset_kernel(pmd, addr);
842 if (pte_none(*pte))
843 return 0;
14a62c34 844
1da177e4
LT
845 return pfn_valid(pte_pfn(*pte));
846}
847
14a62c34
TG
848/*
849 * A pseudo VMA to allow ptrace access for the vsyscall page. This only
850 * covers the 64bit vsyscall page now. 32bit has a real VMA now and does
851 * not need special handling anymore:
852 */
1da177e4 853static struct vm_area_struct gate_vma = {
14a62c34
TG
854 .vm_start = VSYSCALL_START,
855 .vm_end = VSYSCALL_START + (VSYSCALL_MAPPED_PAGES * PAGE_SIZE),
856 .vm_page_prot = PAGE_READONLY_EXEC,
857 .vm_flags = VM_READ | VM_EXEC
1da177e4
LT
858};
859
31db58b3 860struct vm_area_struct *get_gate_vma(struct mm_struct *mm)
1da177e4
LT
861{
862#ifdef CONFIG_IA32_EMULATION
31db58b3 863 if (!mm || mm->context.ia32_compat)
1e014410 864 return NULL;
1da177e4
LT
865#endif
866 return &gate_vma;
867}
868
83b964bb 869int in_gate_area(struct mm_struct *mm, unsigned long addr)
1da177e4 870{
83b964bb 871 struct vm_area_struct *vma = get_gate_vma(mm);
14a62c34 872
1e014410
AK
873 if (!vma)
874 return 0;
14a62c34 875
1da177e4
LT
876 return (addr >= vma->vm_start) && (addr < vma->vm_end);
877}
878
14a62c34 879/*
cae5d390
SW
880 * Use this when you have no reliable mm, typically from interrupt
881 * context. It is less reliable than using a task's mm and may give
882 * false positives.
1da177e4 883 */
cae5d390 884int in_gate_area_no_mm(unsigned long addr)
1da177e4 885{
1e014410 886 return (addr >= VSYSCALL_START) && (addr < VSYSCALL_END);
1da177e4 887}
2e1c49db 888
2aae950b
AK
889const char *arch_vma_name(struct vm_area_struct *vma)
890{
891 if (vma->vm_mm && vma->vm_start == (long)vma->vm_mm->context.vdso)
892 return "[vdso]";
893 if (vma == &gate_vma)
894 return "[vsyscall]";
895 return NULL;
896}
0889eba5 897
1dc41aa6 898#ifdef CONFIG_X86_UV
1dc41aa6
NF
899unsigned long memory_block_size_bytes(void)
900{
901 if (is_uv_system()) {
902 printk(KERN_INFO "UV: memory block size 2GB\n");
903 return 2UL * 1024 * 1024 * 1024;
904 }
905 return MIN_MEMORY_BLOCK_SIZE;
906}
907#endif
908
0889eba5
CL
909#ifdef CONFIG_SPARSEMEM_VMEMMAP
910/*
911 * Initialise the sparsemem vmemmap using huge-pages at the PMD level.
912 */
c2b91e2e
YL
913static long __meminitdata addr_start, addr_end;
914static void __meminitdata *p_start, *p_end;
915static int __meminitdata node_start;
916
14a62c34
TG
917int __meminit
918vmemmap_populate(struct page *start_page, unsigned long size, int node)
0889eba5
CL
919{
920 unsigned long addr = (unsigned long)start_page;
921 unsigned long end = (unsigned long)(start_page + size);
922 unsigned long next;
923 pgd_t *pgd;
924 pud_t *pud;
925 pmd_t *pmd;
926
927 for (; addr < end; addr = next) {
7c934d39 928 void *p = NULL;
0889eba5
CL
929
930 pgd = vmemmap_pgd_populate(addr, node);
931 if (!pgd)
932 return -ENOMEM;
14a62c34 933
0889eba5
CL
934 pud = vmemmap_pud_populate(pgd, addr, node);
935 if (!pud)
936 return -ENOMEM;
937
7c934d39
JF
938 if (!cpu_has_pse) {
939 next = (addr + PAGE_SIZE) & PAGE_MASK;
940 pmd = vmemmap_pmd_populate(pud, addr, node);
941
942 if (!pmd)
943 return -ENOMEM;
944
945 p = vmemmap_pte_populate(pmd, addr, node);
14a62c34 946
0889eba5
CL
947 if (!p)
948 return -ENOMEM;
949
7c934d39
JF
950 addr_end = addr + PAGE_SIZE;
951 p_end = p + PAGE_SIZE;
14a62c34 952 } else {
7c934d39
JF
953 next = pmd_addr_end(addr, end);
954
955 pmd = pmd_offset(pud, addr);
956 if (pmd_none(*pmd)) {
957 pte_t entry;
958
9bdac914 959 p = vmemmap_alloc_block_buf(PMD_SIZE, node);
7c934d39
JF
960 if (!p)
961 return -ENOMEM;
962
963 entry = pfn_pte(__pa(p) >> PAGE_SHIFT,
964 PAGE_KERNEL_LARGE);
965 set_pmd(pmd, __pmd(pte_val(entry)));
966
7c934d39
JF
967 /* check to see if we have contiguous blocks */
968 if (p_end != p || node_start != node) {
969 if (p_start)
970 printk(KERN_DEBUG " [%lx-%lx] PMD -> [%p-%p] on node %d\n",
971 addr_start, addr_end-1, p_start, p_end-1, node_start);
972 addr_start = addr;
973 node_start = node;
974 p_start = p;
975 }
49c980df
YL
976
977 addr_end = addr + PMD_SIZE;
978 p_end = p + PMD_SIZE;
7c934d39
JF
979 } else
980 vmemmap_verify((pte_t *)pmd, node, addr, next);
14a62c34 981 }
7c934d39 982
0889eba5 983 }
9b861528 984 sync_global_pgds((unsigned long)start_page, end);
0889eba5
CL
985 return 0;
986}
c2b91e2e
YL
987
988void __meminit vmemmap_populate_print_last(void)
989{
990 if (p_start) {
991 printk(KERN_DEBUG " [%lx-%lx] PMD -> [%p-%p] on node %d\n",
992 addr_start, addr_end-1, p_start, p_end-1, node_start);
993 p_start = NULL;
994 p_end = NULL;
995 node_start = 0;
996 }
997}
0889eba5 998#endif