mm: arch: make in_gate_area take an mm_struct instead of a task_struct
[linux-block.git] / arch / x86 / mm / init_64.c
CommitLineData
1da177e4
LT
1/*
2 * linux/arch/x86_64/mm/init.c
3 *
4 * Copyright (C) 1995 Linus Torvalds
a2531293 5 * Copyright (C) 2000 Pavel Machek <pavel@ucw.cz>
1da177e4
LT
6 * Copyright (C) 2002,2003 Andi Kleen <ak@suse.de>
7 */
8
1da177e4
LT
9#include <linux/signal.h>
10#include <linux/sched.h>
11#include <linux/kernel.h>
12#include <linux/errno.h>
13#include <linux/string.h>
14#include <linux/types.h>
15#include <linux/ptrace.h>
16#include <linux/mman.h>
17#include <linux/mm.h>
18#include <linux/swap.h>
19#include <linux/smp.h>
20#include <linux/init.h>
11034d55 21#include <linux/initrd.h>
1da177e4
LT
22#include <linux/pagemap.h>
23#include <linux/bootmem.h>
a9ce6bc1 24#include <linux/memblock.h>
1da177e4 25#include <linux/proc_fs.h>
59170891 26#include <linux/pci.h>
6fb14755 27#include <linux/pfn.h>
c9cf5528 28#include <linux/poison.h>
17a941d8 29#include <linux/dma-mapping.h>
44df75e6
MT
30#include <linux/module.h>
31#include <linux/memory_hotplug.h>
ae32b129 32#include <linux/nmi.h>
5a0e3ad6 33#include <linux/gfp.h>
1da177e4
LT
34
35#include <asm/processor.h>
46eaa670 36#include <asm/bios_ebda.h>
1da177e4
LT
37#include <asm/system.h>
38#include <asm/uaccess.h>
39#include <asm/pgtable.h>
40#include <asm/pgalloc.h>
41#include <asm/dma.h>
42#include <asm/fixmap.h>
43#include <asm/e820.h>
44#include <asm/apic.h>
45#include <asm/tlb.h>
46#include <asm/mmu_context.h>
47#include <asm/proto.h>
48#include <asm/smp.h>
2bc0414e 49#include <asm/sections.h>
718fc13b 50#include <asm/kdebug.h>
aaa64e04 51#include <asm/numa.h>
7bfeab9a 52#include <asm/cacheflush.h>
4fcb2083 53#include <asm/init.h>
1dc41aa6 54#include <asm/uv/uv.h>
1da177e4 55
00d1c5e0
IM
56static int __init parse_direct_gbpages_off(char *arg)
57{
58 direct_gbpages = 0;
59 return 0;
60}
61early_param("nogbpages", parse_direct_gbpages_off);
62
63static int __init parse_direct_gbpages_on(char *arg)
64{
65 direct_gbpages = 1;
66 return 0;
67}
68early_param("gbpages", parse_direct_gbpages_on);
69
1da177e4
LT
70/*
71 * NOTE: pagetable_init alloc all the fixmap pagetables contiguous on the
72 * physical space so we can cache the place of the first one and move
73 * around without checking the pgd every time.
74 */
75
be43d728 76pteval_t __supported_pte_mask __read_mostly = ~_PAGE_IOMAP;
bd220a24
YL
77EXPORT_SYMBOL_GPL(__supported_pte_mask);
78
bd220a24
YL
79int force_personality32;
80
deed05b7
IM
81/*
82 * noexec32=on|off
83 * Control non executable heap for 32bit processes.
84 * To control the stack too use noexec=off
85 *
86 * on PROT_READ does not imply PROT_EXEC for 32-bit processes (default)
87 * off PROT_READ implies PROT_EXEC
88 */
bd220a24
YL
89static int __init nonx32_setup(char *str)
90{
91 if (!strcmp(str, "on"))
92 force_personality32 &= ~READ_IMPLIES_EXEC;
93 else if (!strcmp(str, "off"))
94 force_personality32 |= READ_IMPLIES_EXEC;
95 return 1;
96}
97__setup("noexec32=", nonx32_setup);
98
6afb5157
HL
99/*
100 * When memory was added/removed make sure all the processes MM have
101 * suitable PGD entries in the local PGD level page.
102 */
103void sync_global_pgds(unsigned long start, unsigned long end)
104{
44235dcd
JF
105 unsigned long address;
106
107 for (address = start; address <= end; address += PGDIR_SIZE) {
108 const pgd_t *pgd_ref = pgd_offset_k(address);
44235dcd
JF
109 struct page *page;
110
111 if (pgd_none(*pgd_ref))
112 continue;
113
a79e53d8 114 spin_lock(&pgd_lock);
44235dcd
JF
115 list_for_each_entry(page, &pgd_list, lru) {
116 pgd_t *pgd;
617d34d9
JF
117 spinlock_t *pgt_lock;
118
44235dcd 119 pgd = (pgd_t *)page_address(page) + pgd_index(address);
a79e53d8 120 /* the pgt_lock only for Xen */
617d34d9
JF
121 pgt_lock = &pgd_page_get_mm(page)->page_table_lock;
122 spin_lock(pgt_lock);
123
44235dcd
JF
124 if (pgd_none(*pgd))
125 set_pgd(pgd, *pgd_ref);
126 else
127 BUG_ON(pgd_page_vaddr(*pgd)
128 != pgd_page_vaddr(*pgd_ref));
617d34d9
JF
129
130 spin_unlock(pgt_lock);
44235dcd 131 }
a79e53d8 132 spin_unlock(&pgd_lock);
44235dcd 133 }
6afb5157
HL
134}
135
8d6ea967
MS
136/*
137 * NOTE: This function is marked __ref because it calls __init function
138 * (alloc_bootmem_pages). It's safe to do it ONLY when after_bootmem == 0.
139 */
140static __ref void *spp_getpage(void)
14a62c34 141{
1da177e4 142 void *ptr;
14a62c34 143
1da177e4 144 if (after_bootmem)
9e730237 145 ptr = (void *) get_zeroed_page(GFP_ATOMIC | __GFP_NOTRACK);
1da177e4
LT
146 else
147 ptr = alloc_bootmem_pages(PAGE_SIZE);
14a62c34
TG
148
149 if (!ptr || ((unsigned long)ptr & ~PAGE_MASK)) {
150 panic("set_pte_phys: cannot allocate page data %s\n",
151 after_bootmem ? "after bootmem" : "");
152 }
1da177e4 153
10f22dde 154 pr_debug("spp_getpage %p\n", ptr);
14a62c34 155
1da177e4 156 return ptr;
14a62c34 157}
1da177e4 158
f254f390 159static pud_t *fill_pud(pgd_t *pgd, unsigned long vaddr)
1da177e4 160{
458a3e64
TH
161 if (pgd_none(*pgd)) {
162 pud_t *pud = (pud_t *)spp_getpage();
163 pgd_populate(&init_mm, pgd, pud);
164 if (pud != pud_offset(pgd, 0))
165 printk(KERN_ERR "PAGETABLE BUG #00! %p <-> %p\n",
166 pud, pud_offset(pgd, 0));
167 }
168 return pud_offset(pgd, vaddr);
169}
1da177e4 170
f254f390 171static pmd_t *fill_pmd(pud_t *pud, unsigned long vaddr)
458a3e64 172{
1da177e4 173 if (pud_none(*pud)) {
458a3e64 174 pmd_t *pmd = (pmd_t *) spp_getpage();
bb23e403 175 pud_populate(&init_mm, pud, pmd);
458a3e64 176 if (pmd != pmd_offset(pud, 0))
10f22dde 177 printk(KERN_ERR "PAGETABLE BUG #01! %p <-> %p\n",
458a3e64 178 pmd, pmd_offset(pud, 0));
1da177e4 179 }
458a3e64
TH
180 return pmd_offset(pud, vaddr);
181}
182
f254f390 183static pte_t *fill_pte(pmd_t *pmd, unsigned long vaddr)
458a3e64 184{
1da177e4 185 if (pmd_none(*pmd)) {
458a3e64 186 pte_t *pte = (pte_t *) spp_getpage();
bb23e403 187 pmd_populate_kernel(&init_mm, pmd, pte);
458a3e64 188 if (pte != pte_offset_kernel(pmd, 0))
10f22dde 189 printk(KERN_ERR "PAGETABLE BUG #02!\n");
1da177e4 190 }
458a3e64
TH
191 return pte_offset_kernel(pmd, vaddr);
192}
193
194void set_pte_vaddr_pud(pud_t *pud_page, unsigned long vaddr, pte_t new_pte)
195{
196 pud_t *pud;
197 pmd_t *pmd;
198 pte_t *pte;
199
200 pud = pud_page + pud_index(vaddr);
201 pmd = fill_pmd(pud, vaddr);
202 pte = fill_pte(pmd, vaddr);
1da177e4 203
1da177e4
LT
204 set_pte(pte, new_pte);
205
206 /*
207 * It's enough to flush this one mapping.
208 * (PGE mappings get flushed as well)
209 */
210 __flush_tlb_one(vaddr);
211}
212
458a3e64 213void set_pte_vaddr(unsigned long vaddr, pte_t pteval)
0814e0ba
EH
214{
215 pgd_t *pgd;
216 pud_t *pud_page;
217
218 pr_debug("set_pte_vaddr %lx to %lx\n", vaddr, native_pte_val(pteval));
219
220 pgd = pgd_offset_k(vaddr);
221 if (pgd_none(*pgd)) {
222 printk(KERN_ERR
223 "PGD FIXMAP MISSING, it should be setup in head.S!\n");
224 return;
225 }
226 pud_page = (pud_t*)pgd_page_vaddr(*pgd);
227 set_pte_vaddr_pud(pud_page, vaddr, pteval);
228}
229
458a3e64 230pmd_t * __init populate_extra_pmd(unsigned long vaddr)
11124411
TH
231{
232 pgd_t *pgd;
233 pud_t *pud;
234
235 pgd = pgd_offset_k(vaddr);
458a3e64
TH
236 pud = fill_pud(pgd, vaddr);
237 return fill_pmd(pud, vaddr);
238}
239
240pte_t * __init populate_extra_pte(unsigned long vaddr)
241{
242 pmd_t *pmd;
11124411 243
458a3e64
TH
244 pmd = populate_extra_pmd(vaddr);
245 return fill_pte(pmd, vaddr);
11124411
TH
246}
247
3a9e189d
JS
248/*
249 * Create large page table mappings for a range of physical addresses.
250 */
251static void __init __init_extra_mapping(unsigned long phys, unsigned long size,
252 pgprot_t prot)
253{
254 pgd_t *pgd;
255 pud_t *pud;
256 pmd_t *pmd;
257
258 BUG_ON((phys & ~PMD_MASK) || (size & ~PMD_MASK));
259 for (; size; phys += PMD_SIZE, size -= PMD_SIZE) {
260 pgd = pgd_offset_k((unsigned long)__va(phys));
261 if (pgd_none(*pgd)) {
262 pud = (pud_t *) spp_getpage();
263 set_pgd(pgd, __pgd(__pa(pud) | _KERNPG_TABLE |
264 _PAGE_USER));
265 }
266 pud = pud_offset(pgd, (unsigned long)__va(phys));
267 if (pud_none(*pud)) {
268 pmd = (pmd_t *) spp_getpage();
269 set_pud(pud, __pud(__pa(pmd) | _KERNPG_TABLE |
270 _PAGE_USER));
271 }
272 pmd = pmd_offset(pud, phys);
273 BUG_ON(!pmd_none(*pmd));
274 set_pmd(pmd, __pmd(phys | pgprot_val(prot)));
275 }
276}
277
278void __init init_extra_mapping_wb(unsigned long phys, unsigned long size)
279{
280 __init_extra_mapping(phys, size, PAGE_KERNEL_LARGE);
281}
282
283void __init init_extra_mapping_uc(unsigned long phys, unsigned long size)
284{
285 __init_extra_mapping(phys, size, PAGE_KERNEL_LARGE_NOCACHE);
286}
287
31eedd82 288/*
88f3aec7
IM
289 * The head.S code sets up the kernel high mapping:
290 *
291 * from __START_KERNEL_map to __START_KERNEL_map + size (== _end-_text)
31eedd82
TG
292 *
293 * phys_addr holds the negative offset to the kernel, which is added
294 * to the compile time generated pmds. This results in invalid pmds up
295 * to the point where we hit the physaddr 0 mapping.
296 *
297 * We limit the mappings to the region from _text to _end. _end is
298 * rounded up to the 2MB boundary. This catches the invalid pmds as
299 * well, as they are located before _text:
300 */
301void __init cleanup_highmap(void)
302{
303 unsigned long vaddr = __START_KERNEL_map;
d86bb0da 304 unsigned long end = roundup((unsigned long)_end, PMD_SIZE) - 1;
31eedd82
TG
305 pmd_t *pmd = level2_kernel_pgt;
306 pmd_t *last_pmd = pmd + PTRS_PER_PMD;
307
308 for (; pmd < last_pmd; pmd++, vaddr += PMD_SIZE) {
2884f110 309 if (pmd_none(*pmd))
31eedd82
TG
310 continue;
311 if (vaddr < (unsigned long) _text || vaddr > end)
312 set_pmd(pmd, __pmd(0));
313 }
314}
315
9482ac6e 316static __ref void *alloc_low_page(unsigned long *phys)
14a62c34 317{
d1b19426 318 unsigned long pfn = pgt_buf_end++;
1da177e4
LT
319 void *adr;
320
44df75e6 321 if (after_bootmem) {
9e730237 322 adr = (void *)get_zeroed_page(GFP_ATOMIC | __GFP_NOTRACK);
44df75e6 323 *phys = __pa(adr);
14a62c34 324
44df75e6
MT
325 return adr;
326 }
327
d1b19426 328 if (pfn >= pgt_buf_top)
14a62c34 329 panic("alloc_low_page: ran out of memory");
dafe41ee 330
14941779 331 adr = early_memremap(pfn * PAGE_SIZE, PAGE_SIZE);
234bb549 332 clear_page(adr);
dafe41ee
VG
333 *phys = pfn * PAGE_SIZE;
334 return adr;
335}
1da177e4 336
4b239f45
YL
337static __ref void *map_low_page(void *virt)
338{
339 void *adr;
340 unsigned long phys, left;
341
342 if (after_bootmem)
343 return virt;
344
345 phys = __pa(virt);
346 left = phys & (PAGE_SIZE - 1);
347 adr = early_memremap(phys & PAGE_MASK, PAGE_SIZE);
348 adr = (void *)(((unsigned long)adr) | left);
349
350 return adr;
351}
352
9482ac6e 353static __ref void unmap_low_page(void *adr)
14a62c34 354{
44df75e6
MT
355 if (after_bootmem)
356 return;
357
4b239f45 358 early_iounmap((void *)((unsigned long)adr & PAGE_MASK), PAGE_SIZE);
14a62c34 359}
1da177e4 360
7b16eb89 361static unsigned long __meminit
b27a43c1
SS
362phys_pte_init(pte_t *pte_page, unsigned long addr, unsigned long end,
363 pgprot_t prot)
4f9c11dd
JF
364{
365 unsigned pages = 0;
7b16eb89 366 unsigned long last_map_addr = end;
4f9c11dd 367 int i;
7b16eb89 368
4f9c11dd
JF
369 pte_t *pte = pte_page + pte_index(addr);
370
371 for(i = pte_index(addr); i < PTRS_PER_PTE; i++, addr += PAGE_SIZE, pte++) {
372
373 if (addr >= end) {
374 if (!after_bootmem) {
375 for(; i < PTRS_PER_PTE; i++, pte++)
376 set_pte(pte, __pte(0));
377 }
378 break;
379 }
380
b27a43c1
SS
381 /*
382 * We will re-use the existing mapping.
383 * Xen for example has some special requirements, like mapping
384 * pagetable pages as RO. So assume someone who pre-setup
385 * these mappings are more intelligent.
386 */
3afa3949
YL
387 if (pte_val(*pte)) {
388 pages++;
4f9c11dd 389 continue;
3afa3949 390 }
4f9c11dd
JF
391
392 if (0)
393 printk(" pte=%p addr=%lx pte=%016lx\n",
394 pte, addr, pfn_pte(addr >> PAGE_SHIFT, PAGE_KERNEL).pte);
4f9c11dd 395 pages++;
b27a43c1 396 set_pte(pte, pfn_pte(addr >> PAGE_SHIFT, prot));
7b16eb89 397 last_map_addr = (addr & PAGE_MASK) + PAGE_SIZE;
4f9c11dd 398 }
a2699e47 399
4f9c11dd 400 update_page_count(PG_LEVEL_4K, pages);
7b16eb89
YL
401
402 return last_map_addr;
4f9c11dd
JF
403}
404
cc615032 405static unsigned long __meminit
b50efd2a 406phys_pmd_init(pmd_t *pmd_page, unsigned long address, unsigned long end,
b27a43c1 407 unsigned long page_size_mask, pgprot_t prot)
44df75e6 408{
ce0c0e50 409 unsigned long pages = 0;
7b16eb89 410 unsigned long last_map_addr = end;
ce0c0e50 411
6ad91658 412 int i = pmd_index(address);
44df75e6 413
6ad91658 414 for (; i < PTRS_PER_PMD; i++, address += PMD_SIZE) {
4f9c11dd 415 unsigned long pte_phys;
6ad91658 416 pmd_t *pmd = pmd_page + pmd_index(address);
4f9c11dd 417 pte_t *pte;
b27a43c1 418 pgprot_t new_prot = prot;
44df75e6 419
5f51e139 420 if (address >= end) {
14a62c34 421 if (!after_bootmem) {
5f51e139
JB
422 for (; i < PTRS_PER_PMD; i++, pmd++)
423 set_pmd(pmd, __pmd(0));
14a62c34 424 }
44df75e6
MT
425 break;
426 }
6ad91658 427
4f9c11dd 428 if (pmd_val(*pmd)) {
8ae3a5a8
JB
429 if (!pmd_large(*pmd)) {
430 spin_lock(&init_mm.page_table_lock);
4b239f45
YL
431 pte = map_low_page((pte_t *)pmd_page_vaddr(*pmd));
432 last_map_addr = phys_pte_init(pte, address,
b27a43c1 433 end, prot);
4b239f45 434 unmap_low_page(pte);
8ae3a5a8 435 spin_unlock(&init_mm.page_table_lock);
a2699e47 436 continue;
8ae3a5a8 437 }
b27a43c1
SS
438 /*
439 * If we are ok with PG_LEVEL_2M mapping, then we will
440 * use the existing mapping,
441 *
442 * Otherwise, we will split the large page mapping but
443 * use the same existing protection bits except for
444 * large page, so that we don't violate Intel's TLB
445 * Application note (317080) which says, while changing
446 * the page sizes, new and old translations should
447 * not differ with respect to page frame and
448 * attributes.
449 */
3afa3949
YL
450 if (page_size_mask & (1 << PG_LEVEL_2M)) {
451 pages++;
b27a43c1 452 continue;
3afa3949 453 }
b27a43c1 454 new_prot = pte_pgprot(pte_clrhuge(*(pte_t *)pmd));
4f9c11dd
JF
455 }
456
b50efd2a 457 if (page_size_mask & (1<<PG_LEVEL_2M)) {
4f9c11dd 458 pages++;
8ae3a5a8 459 spin_lock(&init_mm.page_table_lock);
4f9c11dd 460 set_pte((pte_t *)pmd,
b27a43c1
SS
461 pfn_pte(address >> PAGE_SHIFT,
462 __pgprot(pgprot_val(prot) | _PAGE_PSE)));
8ae3a5a8 463 spin_unlock(&init_mm.page_table_lock);
7b16eb89 464 last_map_addr = (address & PMD_MASK) + PMD_SIZE;
6ad91658 465 continue;
4f9c11dd 466 }
6ad91658 467
4f9c11dd 468 pte = alloc_low_page(&pte_phys);
b27a43c1 469 last_map_addr = phys_pte_init(pte, address, end, new_prot);
4f9c11dd
JF
470 unmap_low_page(pte);
471
8ae3a5a8 472 spin_lock(&init_mm.page_table_lock);
4f9c11dd 473 pmd_populate_kernel(&init_mm, pmd, __va(pte_phys));
8ae3a5a8 474 spin_unlock(&init_mm.page_table_lock);
44df75e6 475 }
ce0c0e50 476 update_page_count(PG_LEVEL_2M, pages);
7b16eb89 477 return last_map_addr;
44df75e6
MT
478}
479
cc615032 480static unsigned long __meminit
b50efd2a
YL
481phys_pud_init(pud_t *pud_page, unsigned long addr, unsigned long end,
482 unsigned long page_size_mask)
14a62c34 483{
ce0c0e50 484 unsigned long pages = 0;
cc615032 485 unsigned long last_map_addr = end;
6ad91658 486 int i = pud_index(addr);
44df75e6 487
14a62c34 488 for (; i < PTRS_PER_PUD; i++, addr = (addr & PUD_MASK) + PUD_SIZE) {
6ad91658
KM
489 unsigned long pmd_phys;
490 pud_t *pud = pud_page + pud_index(addr);
1da177e4 491 pmd_t *pmd;
b27a43c1 492 pgprot_t prot = PAGE_KERNEL;
1da177e4 493
6ad91658 494 if (addr >= end)
1da177e4 495 break;
1da177e4 496
14a62c34
TG
497 if (!after_bootmem &&
498 !e820_any_mapped(addr, addr+PUD_SIZE, 0)) {
499 set_pud(pud, __pud(0));
1da177e4 500 continue;
14a62c34 501 }
1da177e4 502
6ad91658 503 if (pud_val(*pud)) {
a2699e47 504 if (!pud_large(*pud)) {
4b239f45
YL
505 pmd = map_low_page(pmd_offset(pud, 0));
506 last_map_addr = phys_pmd_init(pmd, addr, end,
b27a43c1 507 page_size_mask, prot);
4b239f45
YL
508 unmap_low_page(pmd);
509 __flush_tlb_all();
a2699e47
SS
510 continue;
511 }
b27a43c1
SS
512 /*
513 * If we are ok with PG_LEVEL_1G mapping, then we will
514 * use the existing mapping.
515 *
516 * Otherwise, we will split the gbpage mapping but use
517 * the same existing protection bits except for large
518 * page, so that we don't violate Intel's TLB
519 * Application note (317080) which says, while changing
520 * the page sizes, new and old translations should
521 * not differ with respect to page frame and
522 * attributes.
523 */
3afa3949
YL
524 if (page_size_mask & (1 << PG_LEVEL_1G)) {
525 pages++;
b27a43c1 526 continue;
3afa3949 527 }
b27a43c1 528 prot = pte_pgprot(pte_clrhuge(*(pte_t *)pud));
ef925766
AK
529 }
530
b50efd2a 531 if (page_size_mask & (1<<PG_LEVEL_1G)) {
ce0c0e50 532 pages++;
8ae3a5a8 533 spin_lock(&init_mm.page_table_lock);
ef925766
AK
534 set_pte((pte_t *)pud,
535 pfn_pte(addr >> PAGE_SHIFT, PAGE_KERNEL_LARGE));
8ae3a5a8 536 spin_unlock(&init_mm.page_table_lock);
cc615032 537 last_map_addr = (addr & PUD_MASK) + PUD_SIZE;
6ad91658
KM
538 continue;
539 }
540
dafe41ee 541 pmd = alloc_low_page(&pmd_phys);
b27a43c1
SS
542 last_map_addr = phys_pmd_init(pmd, addr, end, page_size_mask,
543 prot);
4f9c11dd 544 unmap_low_page(pmd);
8ae3a5a8
JB
545
546 spin_lock(&init_mm.page_table_lock);
4f9c11dd 547 pud_populate(&init_mm, pud, __va(pmd_phys));
44df75e6 548 spin_unlock(&init_mm.page_table_lock);
1da177e4 549 }
1a2b4412 550 __flush_tlb_all();
a2699e47 551
ce0c0e50 552 update_page_count(PG_LEVEL_1G, pages);
cc615032 553
1a0db38e 554 return last_map_addr;
14a62c34 555}
1da177e4 556
41d840e2 557unsigned long __meminit
f765090a
PE
558kernel_physical_mapping_init(unsigned long start,
559 unsigned long end,
560 unsigned long page_size_mask)
14a62c34 561{
9b861528 562 bool pgd_changed = false;
b50efd2a 563 unsigned long next, last_map_addr = end;
9b861528 564 unsigned long addr;
1da177e4
LT
565
566 start = (unsigned long)__va(start);
567 end = (unsigned long)__va(end);
1c5f50ee 568 addr = start;
1da177e4
LT
569
570 for (; start < end; start = next) {
44df75e6 571 pgd_t *pgd = pgd_offset_k(start);
14a62c34 572 unsigned long pud_phys;
44df75e6
MT
573 pud_t *pud;
574
e22146e6 575 next = (start + PGDIR_SIZE) & PGDIR_MASK;
4f9c11dd
JF
576 if (next > end)
577 next = end;
578
579 if (pgd_val(*pgd)) {
4b239f45
YL
580 pud = map_low_page((pud_t *)pgd_page_vaddr(*pgd));
581 last_map_addr = phys_pud_init(pud, __pa(start),
b50efd2a 582 __pa(end), page_size_mask);
4b239f45 583 unmap_low_page(pud);
4f9c11dd
JF
584 continue;
585 }
586
8ae3a5a8 587 pud = alloc_low_page(&pud_phys);
b50efd2a
YL
588 last_map_addr = phys_pud_init(pud, __pa(start), __pa(next),
589 page_size_mask);
4f9c11dd 590 unmap_low_page(pud);
8ae3a5a8
JB
591
592 spin_lock(&init_mm.page_table_lock);
593 pgd_populate(&init_mm, pgd, __va(pud_phys));
594 spin_unlock(&init_mm.page_table_lock);
9b861528 595 pgd_changed = true;
14a62c34 596 }
9b861528
HL
597
598 if (pgd_changed)
599 sync_global_pgds(addr, end);
600
a2699e47 601 __flush_tlb_all();
1da177e4 602
b50efd2a
YL
603 return last_map_addr;
604}
7b16eb89 605
2b97690f 606#ifndef CONFIG_NUMA
d8fc3afc 607void __init initmem_init(void)
1f75d7e3 608{
86ef4dbf 609 memblock_x86_register_active_regions(0, 0, max_pfn);
1f75d7e3 610}
3551f88f 611#endif
1f75d7e3 612
1da177e4
LT
613void __init paging_init(void)
614{
6391af17 615 unsigned long max_zone_pfns[MAX_NR_ZONES];
14a62c34 616
6391af17
MG
617 memset(max_zone_pfns, 0, sizeof(max_zone_pfns));
618 max_zone_pfns[ZONE_DMA] = MAX_DMA_PFN;
619 max_zone_pfns[ZONE_DMA32] = MAX_DMA32_PFN;
c987d12f 620 max_zone_pfns[ZONE_NORMAL] = max_pfn;
6391af17 621
3551f88f 622 sparse_memory_present_with_active_regions(MAX_NUMNODES);
44df75e6 623 sparse_init();
44b57280
YL
624
625 /*
626 * clear the default setting with node 0
627 * note: don't use nodes_clear here, that is really clearing when
628 * numa support is not compiled in, and later node_set_state
629 * will not set it back.
630 */
631 node_clear_state(0, N_NORMAL_MEMORY);
632
5cb248ab 633 free_area_init_nodes(max_zone_pfns);
1da177e4 634}
1da177e4 635
44df75e6
MT
636/*
637 * Memory hotplug specific functions
44df75e6 638 */
bc02af93 639#ifdef CONFIG_MEMORY_HOTPLUG
ea085417
SZ
640/*
641 * After memory hotplug the variables max_pfn, max_low_pfn and high_memory need
642 * updating.
643 */
644static void update_end_of_memory_vars(u64 start, u64 size)
645{
646 unsigned long end_pfn = PFN_UP(start + size);
647
648 if (end_pfn > max_pfn) {
649 max_pfn = end_pfn;
650 max_low_pfn = end_pfn;
651 high_memory = (void *)__va(max_pfn * PAGE_SIZE - 1) + 1;
652 }
653}
654
9d99aaa3
AK
655/*
656 * Memory is added always to NORMAL zone. This means you will never get
657 * additional DMA/DMA32 memory.
658 */
bc02af93 659int arch_add_memory(int nid, u64 start, u64 size)
44df75e6 660{
bc02af93 661 struct pglist_data *pgdat = NODE_DATA(nid);
776ed98b 662 struct zone *zone = pgdat->node_zones + ZONE_NORMAL;
cc615032 663 unsigned long last_mapped_pfn, start_pfn = start >> PAGE_SHIFT;
44df75e6
MT
664 unsigned long nr_pages = size >> PAGE_SHIFT;
665 int ret;
666
60817c9b 667 last_mapped_pfn = init_memory_mapping(start, start + size);
cc615032
AK
668 if (last_mapped_pfn > max_pfn_mapped)
669 max_pfn_mapped = last_mapped_pfn;
45e0b78b 670
c04fc586 671 ret = __add_pages(nid, zone, start_pfn, nr_pages);
fe8b868e 672 WARN_ON_ONCE(ret);
44df75e6 673
ea085417
SZ
674 /* update max_pfn, max_low_pfn and high_memory */
675 update_end_of_memory_vars(start, size);
676
44df75e6 677 return ret;
44df75e6 678}
bc02af93 679EXPORT_SYMBOL_GPL(arch_add_memory);
44df75e6 680
8243229f 681#if !defined(CONFIG_ACPI_NUMA) && defined(CONFIG_NUMA)
4942e998
KM
682int memory_add_physaddr_to_nid(u64 start)
683{
684 return 0;
685}
8c2676a5 686EXPORT_SYMBOL_GPL(memory_add_physaddr_to_nid);
4942e998
KM
687#endif
688
45e0b78b
KM
689#endif /* CONFIG_MEMORY_HOTPLUG */
690
81ac3ad9 691static struct kcore_list kcore_vsyscall;
1da177e4
LT
692
693void __init mem_init(void)
694{
0a43e4bf 695 long codesize, reservedpages, datasize, initsize;
11a6b0c9 696 unsigned long absent_pages;
1da177e4 697
0dc243ae 698 pci_iommu_alloc();
1da177e4 699
48ddb154 700 /* clear_bss() already clear the empty_zero_page */
1da177e4
LT
701
702 reservedpages = 0;
703
704 /* this will put all low memory onto the freelists */
2b97690f 705#ifdef CONFIG_NUMA
0a43e4bf 706 totalram_pages = numa_free_all_bootmem();
1da177e4 707#else
0a43e4bf 708 totalram_pages = free_all_bootmem();
1da177e4 709#endif
11a6b0c9
YL
710
711 absent_pages = absent_pages_in_range(0, max_pfn);
712 reservedpages = max_pfn - totalram_pages - absent_pages;
1da177e4
LT
713 after_bootmem = 1;
714
715 codesize = (unsigned long) &_etext - (unsigned long) &_text;
716 datasize = (unsigned long) &_edata - (unsigned long) &_etext;
717 initsize = (unsigned long) &__init_end - (unsigned long) &__init_begin;
718
719 /* Register memory areas for /proc/kcore */
14a62c34 720 kclist_add(&kcore_vsyscall, (void *)VSYSCALL_START,
c30bb2a2 721 VSYSCALL_END - VSYSCALL_START, KCORE_OTHER);
1da177e4 722
10f22dde 723 printk(KERN_INFO "Memory: %luk/%luk available (%ldk kernel code, "
11a6b0c9 724 "%ldk absent, %ldk reserved, %ldk data, %ldk init)\n",
cc013a88 725 nr_free_pages() << (PAGE_SHIFT-10),
c987d12f 726 max_pfn << (PAGE_SHIFT-10),
1da177e4 727 codesize >> 10,
11a6b0c9 728 absent_pages << (PAGE_SHIFT-10),
1da177e4
LT
729 reservedpages << (PAGE_SHIFT-10),
730 datasize >> 10,
731 initsize >> 10);
1da177e4
LT
732}
733
67df197b 734#ifdef CONFIG_DEBUG_RODATA
edeed305
AV
735const int rodata_test_data = 0xC3;
736EXPORT_SYMBOL_GPL(rodata_test_data);
67df197b 737
502f6604 738int kernel_set_to_readonly;
16239630
SR
739
740void set_kernel_text_rw(void)
741{
b9af7c0d 742 unsigned long start = PFN_ALIGN(_text);
e7d23dde 743 unsigned long end = PFN_ALIGN(__stop___ex_table);
16239630
SR
744
745 if (!kernel_set_to_readonly)
746 return;
747
748 pr_debug("Set kernel text: %lx - %lx for read write\n",
749 start, end);
750
e7d23dde
SS
751 /*
752 * Make the kernel identity mapping for text RW. Kernel text
753 * mapping will always be RO. Refer to the comment in
754 * static_protections() in pageattr.c
755 */
16239630
SR
756 set_memory_rw(start, (end - start) >> PAGE_SHIFT);
757}
758
759void set_kernel_text_ro(void)
760{
b9af7c0d 761 unsigned long start = PFN_ALIGN(_text);
e7d23dde 762 unsigned long end = PFN_ALIGN(__stop___ex_table);
16239630
SR
763
764 if (!kernel_set_to_readonly)
765 return;
766
767 pr_debug("Set kernel text: %lx - %lx for read only\n",
768 start, end);
769
e7d23dde
SS
770 /*
771 * Set the kernel identity mapping for text RO.
772 */
16239630
SR
773 set_memory_ro(start, (end - start) >> PAGE_SHIFT);
774}
775
67df197b
AV
776void mark_rodata_ro(void)
777{
74e08179 778 unsigned long start = PFN_ALIGN(_text);
8f0f996e
SR
779 unsigned long rodata_start =
780 ((unsigned long)__start_rodata + PAGE_SIZE - 1) & PAGE_MASK;
74e08179
SS
781 unsigned long end = (unsigned long) &__end_rodata_hpage_align;
782 unsigned long text_end = PAGE_ALIGN((unsigned long) &__stop___ex_table);
783 unsigned long rodata_end = PAGE_ALIGN((unsigned long) &__end_rodata);
784 unsigned long data_start = (unsigned long) &_sdata;
8f0f996e 785
6fb14755 786 printk(KERN_INFO "Write protecting the kernel read-only data: %luk\n",
e3ebadd9 787 (end - start) >> 10);
984bb80d
AV
788 set_memory_ro(start, (end - start) >> PAGE_SHIFT);
789
16239630
SR
790 kernel_set_to_readonly = 1;
791
984bb80d
AV
792 /*
793 * The rodata section (but not the kernel text!) should also be
794 * not-executable.
795 */
72b59d67 796 set_memory_nx(rodata_start, (end - rodata_start) >> PAGE_SHIFT);
67df197b 797
1a487252
AV
798 rodata_test();
799
0c42f392 800#ifdef CONFIG_CPA_DEBUG
10f22dde 801 printk(KERN_INFO "Testing CPA: undo %lx-%lx\n", start, end);
6d238cc4 802 set_memory_rw(start, (end-start) >> PAGE_SHIFT);
0c42f392 803
10f22dde 804 printk(KERN_INFO "Testing CPA: again\n");
6d238cc4 805 set_memory_ro(start, (end-start) >> PAGE_SHIFT);
0c42f392 806#endif
74e08179
SS
807
808 free_init_pages("unused kernel memory",
809 (unsigned long) page_address(virt_to_page(text_end)),
810 (unsigned long)
811 page_address(virt_to_page(rodata_start)));
812 free_init_pages("unused kernel memory",
813 (unsigned long) page_address(virt_to_page(rodata_end)),
814 (unsigned long) page_address(virt_to_page(data_start)));
67df197b 815}
4e4eee0e 816
67df197b
AV
817#endif
818
14a62c34
TG
819int kern_addr_valid(unsigned long addr)
820{
1da177e4 821 unsigned long above = ((long)addr) >> __VIRTUAL_MASK_SHIFT;
14a62c34
TG
822 pgd_t *pgd;
823 pud_t *pud;
824 pmd_t *pmd;
825 pte_t *pte;
1da177e4
LT
826
827 if (above != 0 && above != -1UL)
14a62c34
TG
828 return 0;
829
1da177e4
LT
830 pgd = pgd_offset_k(addr);
831 if (pgd_none(*pgd))
832 return 0;
833
834 pud = pud_offset(pgd, addr);
835 if (pud_none(*pud))
14a62c34 836 return 0;
1da177e4
LT
837
838 pmd = pmd_offset(pud, addr);
839 if (pmd_none(*pmd))
840 return 0;
14a62c34 841
1da177e4
LT
842 if (pmd_large(*pmd))
843 return pfn_valid(pmd_pfn(*pmd));
844
845 pte = pte_offset_kernel(pmd, addr);
846 if (pte_none(*pte))
847 return 0;
14a62c34 848
1da177e4
LT
849 return pfn_valid(pte_pfn(*pte));
850}
851
14a62c34
TG
852/*
853 * A pseudo VMA to allow ptrace access for the vsyscall page. This only
854 * covers the 64bit vsyscall page now. 32bit has a real VMA now and does
855 * not need special handling anymore:
856 */
1da177e4 857static struct vm_area_struct gate_vma = {
14a62c34
TG
858 .vm_start = VSYSCALL_START,
859 .vm_end = VSYSCALL_START + (VSYSCALL_MAPPED_PAGES * PAGE_SIZE),
860 .vm_page_prot = PAGE_READONLY_EXEC,
861 .vm_flags = VM_READ | VM_EXEC
1da177e4
LT
862};
863
31db58b3 864struct vm_area_struct *get_gate_vma(struct mm_struct *mm)
1da177e4
LT
865{
866#ifdef CONFIG_IA32_EMULATION
31db58b3 867 if (!mm || mm->context.ia32_compat)
1e014410 868 return NULL;
1da177e4
LT
869#endif
870 return &gate_vma;
871}
872
83b964bb 873int in_gate_area(struct mm_struct *mm, unsigned long addr)
1da177e4 874{
83b964bb 875 struct vm_area_struct *vma = get_gate_vma(mm);
14a62c34 876
1e014410
AK
877 if (!vma)
878 return 0;
14a62c34 879
1da177e4
LT
880 return (addr >= vma->vm_start) && (addr < vma->vm_end);
881}
882
14a62c34
TG
883/*
884 * Use this when you have no reliable task/vma, typically from interrupt
885 * context. It is less reliable than using the task's vma and may give
886 * false positives:
1da177e4
LT
887 */
888int in_gate_area_no_task(unsigned long addr)
889{
1e014410 890 return (addr >= VSYSCALL_START) && (addr < VSYSCALL_END);
1da177e4 891}
2e1c49db 892
2aae950b
AK
893const char *arch_vma_name(struct vm_area_struct *vma)
894{
895 if (vma->vm_mm && vma->vm_start == (long)vma->vm_mm->context.vdso)
896 return "[vdso]";
897 if (vma == &gate_vma)
898 return "[vsyscall]";
899 return NULL;
900}
0889eba5 901
1dc41aa6
NF
902#ifdef CONFIG_X86_UV
903#define MIN_MEMORY_BLOCK_SIZE (1 << SECTION_SIZE_BITS)
904
905unsigned long memory_block_size_bytes(void)
906{
907 if (is_uv_system()) {
908 printk(KERN_INFO "UV: memory block size 2GB\n");
909 return 2UL * 1024 * 1024 * 1024;
910 }
911 return MIN_MEMORY_BLOCK_SIZE;
912}
913#endif
914
0889eba5
CL
915#ifdef CONFIG_SPARSEMEM_VMEMMAP
916/*
917 * Initialise the sparsemem vmemmap using huge-pages at the PMD level.
918 */
c2b91e2e
YL
919static long __meminitdata addr_start, addr_end;
920static void __meminitdata *p_start, *p_end;
921static int __meminitdata node_start;
922
14a62c34
TG
923int __meminit
924vmemmap_populate(struct page *start_page, unsigned long size, int node)
0889eba5
CL
925{
926 unsigned long addr = (unsigned long)start_page;
927 unsigned long end = (unsigned long)(start_page + size);
928 unsigned long next;
929 pgd_t *pgd;
930 pud_t *pud;
931 pmd_t *pmd;
932
933 for (; addr < end; addr = next) {
7c934d39 934 void *p = NULL;
0889eba5
CL
935
936 pgd = vmemmap_pgd_populate(addr, node);
937 if (!pgd)
938 return -ENOMEM;
14a62c34 939
0889eba5
CL
940 pud = vmemmap_pud_populate(pgd, addr, node);
941 if (!pud)
942 return -ENOMEM;
943
7c934d39
JF
944 if (!cpu_has_pse) {
945 next = (addr + PAGE_SIZE) & PAGE_MASK;
946 pmd = vmemmap_pmd_populate(pud, addr, node);
947
948 if (!pmd)
949 return -ENOMEM;
950
951 p = vmemmap_pte_populate(pmd, addr, node);
14a62c34 952
0889eba5
CL
953 if (!p)
954 return -ENOMEM;
955
7c934d39
JF
956 addr_end = addr + PAGE_SIZE;
957 p_end = p + PAGE_SIZE;
14a62c34 958 } else {
7c934d39
JF
959 next = pmd_addr_end(addr, end);
960
961 pmd = pmd_offset(pud, addr);
962 if (pmd_none(*pmd)) {
963 pte_t entry;
964
9bdac914 965 p = vmemmap_alloc_block_buf(PMD_SIZE, node);
7c934d39
JF
966 if (!p)
967 return -ENOMEM;
968
969 entry = pfn_pte(__pa(p) >> PAGE_SHIFT,
970 PAGE_KERNEL_LARGE);
971 set_pmd(pmd, __pmd(pte_val(entry)));
972
7c934d39
JF
973 /* check to see if we have contiguous blocks */
974 if (p_end != p || node_start != node) {
975 if (p_start)
976 printk(KERN_DEBUG " [%lx-%lx] PMD -> [%p-%p] on node %d\n",
977 addr_start, addr_end-1, p_start, p_end-1, node_start);
978 addr_start = addr;
979 node_start = node;
980 p_start = p;
981 }
49c980df
YL
982
983 addr_end = addr + PMD_SIZE;
984 p_end = p + PMD_SIZE;
7c934d39
JF
985 } else
986 vmemmap_verify((pte_t *)pmd, node, addr, next);
14a62c34 987 }
7c934d39 988
0889eba5 989 }
9b861528 990 sync_global_pgds((unsigned long)start_page, end);
0889eba5
CL
991 return 0;
992}
c2b91e2e
YL
993
994void __meminit vmemmap_populate_print_last(void)
995{
996 if (p_start) {
997 printk(KERN_DEBUG " [%lx-%lx] PMD -> [%p-%p] on node %d\n",
998 addr_start, addr_end-1, p_start, p_end-1, node_start);
999 p_start = NULL;
1000 p_end = NULL;
1001 node_start = 0;
1002 }
1003}
0889eba5 1004#endif