Commit | Line | Data |
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b2441318 | 1 | // SPDX-License-Identifier: GPL-2.0 |
1da177e4 | 2 | /* |
1da177e4 | 3 | * Copyright (C) 1995 Linus Torvalds |
2d4a7167 | 4 | * Copyright (C) 2001, 2002 Andi Kleen, SuSE Labs. |
f8eeb2e6 | 5 | * Copyright (C) 2008-2009, Red Hat Inc., Ingo Molnar |
1da177e4 | 6 | */ |
a2bcd473 | 7 | #include <linux/sched.h> /* test_thread_flag(), ... */ |
68db0cf1 | 8 | #include <linux/sched/task_stack.h> /* task_stack_*(), ... */ |
a2bcd473 | 9 | #include <linux/kdebug.h> /* oops_begin/end, ... */ |
4cdf8dbe | 10 | #include <linux/extable.h> /* search_exception_tables */ |
57c8a661 | 11 | #include <linux/memblock.h> /* max_low_pfn */ |
1dc0da6e | 12 | #include <linux/kfence.h> /* kfence_handle_page_fault */ |
9326638c | 13 | #include <linux/kprobes.h> /* NOKPROBE_SYMBOL, ... */ |
a2bcd473 | 14 | #include <linux/mmiotrace.h> /* kmmio_handler, ... */ |
cdd6c482 | 15 | #include <linux/perf_event.h> /* perf_sw_event */ |
f672b49b | 16 | #include <linux/hugetlb.h> /* hstate_index_to_shift */ |
268bb0ce | 17 | #include <linux/prefetch.h> /* prefetchw */ |
56dd9470 | 18 | #include <linux/context_tracking.h> /* exception_enter(), ... */ |
70ffdb93 | 19 | #include <linux/uaccess.h> /* faulthandler_disabled() */ |
c46f5223 | 20 | #include <linux/efi.h> /* efi_crash_gracefully_on_page_fault()*/ |
50a7ca3c | 21 | #include <linux/mm_types.h> |
0bff0aae | 22 | #include <linux/mm.h> /* find_and_lock_vma() */ |
0069455b | 23 | #include <linux/vmalloc.h> |
2d4a7167 | 24 | |
019132ff | 25 | #include <asm/cpufeature.h> /* boot_cpu_has, ... */ |
a2bcd473 | 26 | #include <asm/traps.h> /* dotraplinkage, ... */ |
f40c3300 AL |
27 | #include <asm/fixmap.h> /* VSYSCALL_ADDR */ |
28 | #include <asm/vsyscall.h> /* emulate_vsyscall */ | |
ba3e127e | 29 | #include <asm/vm86.h> /* struct vm86 */ |
019132ff | 30 | #include <asm/mmu_context.h> /* vma_pkey() */ |
c46f5223 | 31 | #include <asm/efi.h> /* efi_crash_gracefully_on_page_fault()*/ |
a1a371c4 | 32 | #include <asm/desc.h> /* store_idt(), ... */ |
d876b673 | 33 | #include <asm/cpu_entry_area.h> /* exception stack */ |
186525bd | 34 | #include <asm/pgtable_areas.h> /* VMALLOC_START, ... */ |
ef68017e | 35 | #include <asm/kvm_para.h> /* kvm_handle_async_pf */ |
334872a0 | 36 | #include <asm/vdso.h> /* fixup_vdso_exception() */ |
44b979fa | 37 | #include <asm/irq_stack.h> |
58c80cc5 | 38 | #include <asm/fred.h> |
e8bbd303 | 39 | #include <asm/sev.h> /* snp_dump_hva_rmpentry() */ |
1da177e4 | 40 | |
d34603b0 SA |
41 | #define CREATE_TRACE_POINTS |
42 | #include <asm/trace/exceptions.h> | |
43 | ||
b814d41f | 44 | /* |
b319eed0 IM |
45 | * Returns 0 if mmiotrace is disabled, or if the fault is not |
46 | * handled by mmiotrace: | |
b814d41f | 47 | */ |
9326638c | 48 | static nokprobe_inline int |
62c9295f | 49 | kmmio_fault(struct pt_regs *regs, unsigned long addr) |
86069782 | 50 | { |
0fd0e3da PP |
51 | if (unlikely(is_kmmio_active())) |
52 | if (kmmio_handler(regs, addr) == 1) | |
53 | return -1; | |
0fd0e3da | 54 | return 0; |
86069782 PP |
55 | } |
56 | ||
1dc85be0 | 57 | /* |
2d4a7167 IM |
58 | * Prefetch quirks: |
59 | * | |
60 | * 32-bit mode: | |
61 | * | |
62 | * Sometimes AMD Athlon/Opteron CPUs report invalid exceptions on prefetch. | |
35f1c89b | 63 | * Check that here and ignore it. This is AMD erratum #91. |
1dc85be0 | 64 | * |
2d4a7167 | 65 | * 64-bit mode: |
1dc85be0 | 66 | * |
2d4a7167 IM |
67 | * Sometimes the CPU reports invalid exceptions on prefetch. |
68 | * Check that here and ignore it. | |
69 | * | |
70 | * Opcode checker based on code by Richard Brunner. | |
1dc85be0 | 71 | */ |
107a0367 IM |
72 | static inline int |
73 | check_prefetch_opcode(struct pt_regs *regs, unsigned char *instr, | |
74 | unsigned char opcode, int *prefetch) | |
75 | { | |
76 | unsigned char instr_hi = opcode & 0xf0; | |
77 | unsigned char instr_lo = opcode & 0x0f; | |
78 | ||
79 | switch (instr_hi) { | |
80 | case 0x20: | |
81 | case 0x30: | |
82 | /* | |
83 | * Values 0x26,0x2E,0x36,0x3E are valid x86 prefixes. | |
84 | * In X86_64 long mode, the CPU will signal invalid | |
85 | * opcode if some of these prefixes are present so | |
86 | * X86_64 will never get here anyway | |
87 | */ | |
88 | return ((instr_lo & 7) == 0x6); | |
89 | #ifdef CONFIG_X86_64 | |
90 | case 0x40: | |
91 | /* | |
35f1c89b | 92 | * In 64-bit mode 0x40..0x4F are valid REX prefixes |
107a0367 | 93 | */ |
318f5a2a | 94 | return (!user_mode(regs) || user_64bit_mode(regs)); |
107a0367 IM |
95 | #endif |
96 | case 0x60: | |
97 | /* 0x64 thru 0x67 are valid prefixes in all modes. */ | |
98 | return (instr_lo & 0xC) == 0x4; | |
99 | case 0xF0: | |
100 | /* 0xF0, 0xF2, 0xF3 are valid prefixes in all modes. */ | |
101 | return !instr_lo || (instr_lo>>1) == 1; | |
102 | case 0x00: | |
103 | /* Prefetch instruction is 0x0F0D or 0x0F18 */ | |
25f12ae4 | 104 | if (get_kernel_nofault(opcode, instr)) |
107a0367 IM |
105 | return 0; |
106 | ||
107 | *prefetch = (instr_lo == 0xF) && | |
108 | (opcode == 0x0D || opcode == 0x18); | |
109 | return 0; | |
110 | default: | |
111 | return 0; | |
112 | } | |
113 | } | |
114 | ||
d24df8ec AL |
115 | static bool is_amd_k8_pre_npt(void) |
116 | { | |
117 | struct cpuinfo_x86 *c = &boot_cpu_data; | |
118 | ||
119 | return unlikely(IS_ENABLED(CONFIG_CPU_SUP_AMD) && | |
120 | c->x86_vendor == X86_VENDOR_AMD && | |
121 | c->x86 == 0xf && c->x86_model < 0x40); | |
122 | } | |
123 | ||
2d4a7167 IM |
124 | static int |
125 | is_prefetch(struct pt_regs *regs, unsigned long error_code, unsigned long addr) | |
33cb5243 | 126 | { |
2d4a7167 | 127 | unsigned char *max_instr; |
ab2bf0c1 | 128 | unsigned char *instr; |
33cb5243 | 129 | int prefetch = 0; |
1da177e4 | 130 | |
d24df8ec AL |
131 | /* Erratum #91 affects AMD K8, pre-NPT CPUs */ |
132 | if (!is_amd_k8_pre_npt()) | |
133 | return 0; | |
134 | ||
3085354d IM |
135 | /* |
136 | * If it was a exec (instruction fetch) fault on NX page, then | |
137 | * do not ignore the fault: | |
138 | */ | |
1067f030 | 139 | if (error_code & X86_PF_INSTR) |
1da177e4 | 140 | return 0; |
1dc85be0 | 141 | |
107a0367 | 142 | instr = (void *)convert_ip_to_linear(current, regs); |
f1290ec9 | 143 | max_instr = instr + 15; |
1da177e4 | 144 | |
35f1c89b AL |
145 | /* |
146 | * This code has historically always bailed out if IP points to a | |
147 | * not-present page (e.g. due to a race). No one has ever | |
148 | * complained about this. | |
149 | */ | |
150 | pagefault_disable(); | |
1da177e4 | 151 | |
107a0367 | 152 | while (instr < max_instr) { |
2d4a7167 | 153 | unsigned char opcode; |
1da177e4 | 154 | |
35f1c89b | 155 | if (user_mode(regs)) { |
944fad45 | 156 | if (get_user(opcode, (unsigned char __user *) instr)) |
35f1c89b AL |
157 | break; |
158 | } else { | |
159 | if (get_kernel_nofault(opcode, instr)) | |
160 | break; | |
161 | } | |
1da177e4 | 162 | |
1da177e4 LT |
163 | instr++; |
164 | ||
107a0367 | 165 | if (!check_prefetch_opcode(regs, instr, opcode, &prefetch)) |
1da177e4 | 166 | break; |
1da177e4 | 167 | } |
35f1c89b AL |
168 | |
169 | pagefault_enable(); | |
1da177e4 LT |
170 | return prefetch; |
171 | } | |
172 | ||
f2f13a85 IM |
173 | DEFINE_SPINLOCK(pgd_lock); |
174 | LIST_HEAD(pgd_list); | |
175 | ||
176 | #ifdef CONFIG_X86_32 | |
177 | static inline pmd_t *vmalloc_sync_one(pgd_t *pgd, unsigned long address) | |
33cb5243 | 178 | { |
f2f13a85 IM |
179 | unsigned index = pgd_index(address); |
180 | pgd_t *pgd_k; | |
e0c4f675 | 181 | p4d_t *p4d, *p4d_k; |
f2f13a85 IM |
182 | pud_t *pud, *pud_k; |
183 | pmd_t *pmd, *pmd_k; | |
2d4a7167 | 184 | |
f2f13a85 IM |
185 | pgd += index; |
186 | pgd_k = init_mm.pgd + index; | |
187 | ||
188 | if (!pgd_present(*pgd_k)) | |
189 | return NULL; | |
190 | ||
191 | /* | |
192 | * set_pgd(pgd, *pgd_k); here would be useless on PAE | |
193 | * and redundant with the set_pmd() on non-PAE. As would | |
e0c4f675 | 194 | * set_p4d/set_pud. |
f2f13a85 | 195 | */ |
e0c4f675 KS |
196 | p4d = p4d_offset(pgd, address); |
197 | p4d_k = p4d_offset(pgd_k, address); | |
198 | if (!p4d_present(*p4d_k)) | |
199 | return NULL; | |
200 | ||
201 | pud = pud_offset(p4d, address); | |
202 | pud_k = pud_offset(p4d_k, address); | |
f2f13a85 IM |
203 | if (!pud_present(*pud_k)) |
204 | return NULL; | |
205 | ||
206 | pmd = pmd_offset(pud, address); | |
207 | pmd_k = pmd_offset(pud_k, address); | |
f2f13a85 | 208 | |
8e998fc2 | 209 | if (pmd_present(*pmd) != pmd_present(*pmd_k)) |
f2f13a85 | 210 | set_pmd(pmd, *pmd_k); |
8e998fc2 JR |
211 | |
212 | if (!pmd_present(*pmd_k)) | |
213 | return NULL; | |
b8bcfe99 | 214 | else |
51b75b5b | 215 | BUG_ON(pmd_pfn(*pmd) != pmd_pfn(*pmd_k)); |
f2f13a85 IM |
216 | |
217 | return pmd_k; | |
218 | } | |
219 | ||
4819e15f JR |
220 | /* |
221 | * Handle a fault on the vmalloc or module mapping area | |
222 | * | |
223 | * This is needed because there is a race condition between the time | |
224 | * when the vmalloc mapping code updates the PMD to the point in time | |
225 | * where it synchronizes this update with the other page-tables in the | |
226 | * system. | |
227 | * | |
228 | * In this race window another thread/CPU can map an area on the same | |
229 | * PMD, finds it already present and does not synchronize it with the | |
230 | * rest of the system yet. As a result v[mz]alloc might return areas | |
231 | * which are not mapped in every page-table in the system, causing an | |
232 | * unhandled page-fault when they are accessed. | |
233 | */ | |
234 | static noinline int vmalloc_fault(unsigned long address) | |
235 | { | |
236 | unsigned long pgd_paddr; | |
237 | pmd_t *pmd_k; | |
238 | pte_t *pte_k; | |
239 | ||
240 | /* Make sure we are in vmalloc area: */ | |
241 | if (!(address >= VMALLOC_START && address < VMALLOC_END)) | |
242 | return -1; | |
243 | ||
244 | /* | |
245 | * Synchronize this task's top level page-table | |
246 | * with the 'reference' page table. | |
247 | * | |
248 | * Do _not_ use "current" here. We might be inside | |
249 | * an interrupt in the middle of a task switch.. | |
250 | */ | |
251 | pgd_paddr = read_cr3_pa(); | |
252 | pmd_k = vmalloc_sync_one(__va(pgd_paddr), address); | |
253 | if (!pmd_k) | |
254 | return -1; | |
255 | ||
2f709f7b | 256 | if (pmd_leaf(*pmd_k)) |
4819e15f JR |
257 | return 0; |
258 | ||
259 | pte_k = pte_offset_kernel(pmd_k, address); | |
260 | if (!pte_present(*pte_k)) | |
261 | return -1; | |
262 | ||
263 | return 0; | |
264 | } | |
265 | NOKPROBE_SYMBOL(vmalloc_fault); | |
266 | ||
1e15d374 | 267 | void arch_sync_kernel_mappings(unsigned long start, unsigned long end) |
f2f13a85 | 268 | { |
86cf69f1 | 269 | unsigned long addr; |
f2f13a85 | 270 | |
86cf69f1 JR |
271 | for (addr = start & PMD_MASK; |
272 | addr >= TASK_SIZE_MAX && addr < VMALLOC_END; | |
273 | addr += PMD_SIZE) { | |
f2f13a85 IM |
274 | struct page *page; |
275 | ||
a79e53d8 | 276 | spin_lock(&pgd_lock); |
f2f13a85 | 277 | list_for_each_entry(page, &pgd_list, lru) { |
617d34d9 | 278 | spinlock_t *pgt_lock; |
617d34d9 | 279 | |
a79e53d8 | 280 | /* the pgt_lock only for Xen */ |
617d34d9 JF |
281 | pgt_lock = &pgd_page_get_mm(page)->page_table_lock; |
282 | ||
283 | spin_lock(pgt_lock); | |
86cf69f1 | 284 | vmalloc_sync_one(page_address(page), addr); |
617d34d9 | 285 | spin_unlock(pgt_lock); |
f2f13a85 | 286 | } |
a79e53d8 | 287 | spin_unlock(&pgd_lock); |
f2f13a85 IM |
288 | } |
289 | } | |
290 | ||
087975b0 | 291 | static bool low_pfn(unsigned long pfn) |
1da177e4 | 292 | { |
087975b0 AM |
293 | return pfn < max_low_pfn; |
294 | } | |
1156e098 | 295 | |
087975b0 AM |
296 | static void dump_pagetable(unsigned long address) |
297 | { | |
6c690ee1 | 298 | pgd_t *base = __va(read_cr3_pa()); |
087975b0 | 299 | pgd_t *pgd = &base[pgd_index(address)]; |
e0c4f675 KS |
300 | p4d_t *p4d; |
301 | pud_t *pud; | |
087975b0 AM |
302 | pmd_t *pmd; |
303 | pte_t *pte; | |
2d4a7167 | 304 | |
1156e098 | 305 | #ifdef CONFIG_X86_PAE |
39e48d9b | 306 | pr_info("*pdpt = %016Lx ", pgd_val(*pgd)); |
087975b0 AM |
307 | if (!low_pfn(pgd_val(*pgd) >> PAGE_SHIFT) || !pgd_present(*pgd)) |
308 | goto out; | |
39e48d9b JB |
309 | #define pr_pde pr_cont |
310 | #else | |
311 | #define pr_pde pr_info | |
1156e098 | 312 | #endif |
e0c4f675 KS |
313 | p4d = p4d_offset(pgd, address); |
314 | pud = pud_offset(p4d, address); | |
315 | pmd = pmd_offset(pud, address); | |
39e48d9b JB |
316 | pr_pde("*pde = %0*Lx ", sizeof(*pmd) * 2, (u64)pmd_val(*pmd)); |
317 | #undef pr_pde | |
1156e098 HH |
318 | |
319 | /* | |
320 | * We must not directly access the pte in the highpte | |
321 | * case if the page table is located in highmem. | |
322 | * And let's rather not kmap-atomic the pte, just in case | |
2d4a7167 | 323 | * it's allocated already: |
1156e098 | 324 | */ |
2f709f7b | 325 | if (!low_pfn(pmd_pfn(*pmd)) || !pmd_present(*pmd) || pmd_leaf(*pmd)) |
087975b0 | 326 | goto out; |
1156e098 | 327 | |
087975b0 | 328 | pte = pte_offset_kernel(pmd, address); |
39e48d9b | 329 | pr_cont("*pte = %0*Lx ", sizeof(*pte) * 2, (u64)pte_val(*pte)); |
087975b0 | 330 | out: |
39e48d9b | 331 | pr_cont("\n"); |
f2f13a85 IM |
332 | } |
333 | ||
334 | #else /* CONFIG_X86_64: */ | |
335 | ||
e05139f2 | 336 | #ifdef CONFIG_CPU_SUP_AMD |
f2f13a85 | 337 | static const char errata93_warning[] = |
ad361c98 JP |
338 | KERN_ERR |
339 | "******* Your BIOS seems to not contain a fix for K8 errata #93\n" | |
340 | "******* Working around it, but it may cause SEGVs or burn power.\n" | |
341 | "******* Please consider a BIOS update.\n" | |
342 | "******* Disabling USB legacy in the BIOS may also help.\n"; | |
e05139f2 | 343 | #endif |
f2f13a85 | 344 | |
f2f13a85 IM |
345 | static int bad_address(void *p) |
346 | { | |
347 | unsigned long dummy; | |
348 | ||
25f12ae4 | 349 | return get_kernel_nofault(dummy, (unsigned long *)p); |
f2f13a85 IM |
350 | } |
351 | ||
352 | static void dump_pagetable(unsigned long address) | |
353 | { | |
6c690ee1 | 354 | pgd_t *base = __va(read_cr3_pa()); |
087975b0 | 355 | pgd_t *pgd = base + pgd_index(address); |
e0c4f675 | 356 | p4d_t *p4d; |
1da177e4 LT |
357 | pud_t *pud; |
358 | pmd_t *pmd; | |
359 | pte_t *pte; | |
360 | ||
2d4a7167 IM |
361 | if (bad_address(pgd)) |
362 | goto bad; | |
363 | ||
39e48d9b | 364 | pr_info("PGD %lx ", pgd_val(*pgd)); |
2d4a7167 IM |
365 | |
366 | if (!pgd_present(*pgd)) | |
367 | goto out; | |
1da177e4 | 368 | |
e0c4f675 KS |
369 | p4d = p4d_offset(pgd, address); |
370 | if (bad_address(p4d)) | |
371 | goto bad; | |
372 | ||
39e48d9b | 373 | pr_cont("P4D %lx ", p4d_val(*p4d)); |
dba8e6f3 | 374 | if (!p4d_present(*p4d) || p4d_leaf(*p4d)) |
e0c4f675 KS |
375 | goto out; |
376 | ||
377 | pud = pud_offset(p4d, address); | |
2d4a7167 IM |
378 | if (bad_address(pud)) |
379 | goto bad; | |
380 | ||
39e48d9b | 381 | pr_cont("PUD %lx ", pud_val(*pud)); |
0a845e0f | 382 | if (!pud_present(*pud) || pud_leaf(*pud)) |
2d4a7167 | 383 | goto out; |
1da177e4 LT |
384 | |
385 | pmd = pmd_offset(pud, address); | |
2d4a7167 IM |
386 | if (bad_address(pmd)) |
387 | goto bad; | |
388 | ||
39e48d9b | 389 | pr_cont("PMD %lx ", pmd_val(*pmd)); |
2f709f7b | 390 | if (!pmd_present(*pmd) || pmd_leaf(*pmd)) |
2d4a7167 | 391 | goto out; |
1da177e4 LT |
392 | |
393 | pte = pte_offset_kernel(pmd, address); | |
2d4a7167 IM |
394 | if (bad_address(pte)) |
395 | goto bad; | |
396 | ||
39e48d9b | 397 | pr_cont("PTE %lx", pte_val(*pte)); |
2d4a7167 | 398 | out: |
39e48d9b | 399 | pr_cont("\n"); |
1da177e4 LT |
400 | return; |
401 | bad: | |
39e48d9b | 402 | pr_info("BAD\n"); |
8c938f9f IM |
403 | } |
404 | ||
f2f13a85 | 405 | #endif /* CONFIG_X86_64 */ |
1da177e4 | 406 | |
2d4a7167 IM |
407 | /* |
408 | * Workaround for K8 erratum #93 & buggy BIOS. | |
409 | * | |
410 | * BIOS SMM functions are required to use a specific workaround | |
411 | * to avoid corruption of the 64bit RIP register on C stepping K8. | |
412 | * | |
413 | * A lot of BIOS that didn't get tested properly miss this. | |
414 | * | |
415 | * The OS sees this as a page fault with the upper 32bits of RIP cleared. | |
416 | * Try to work around it here. | |
417 | * | |
418 | * Note we only handle faults in kernel here. | |
419 | * Does nothing on 32-bit. | |
fdfe8aa8 | 420 | */ |
33cb5243 | 421 | static int is_errata93(struct pt_regs *regs, unsigned long address) |
1da177e4 | 422 | { |
e05139f2 JB |
423 | #if defined(CONFIG_X86_64) && defined(CONFIG_CPU_SUP_AMD) |
424 | if (boot_cpu_data.x86_vendor != X86_VENDOR_AMD | |
425 | || boot_cpu_data.x86 != 0xf) | |
426 | return 0; | |
427 | ||
03c81ea3 AL |
428 | if (user_mode(regs)) |
429 | return 0; | |
430 | ||
65ea5b03 | 431 | if (address != regs->ip) |
1da177e4 | 432 | return 0; |
2d4a7167 | 433 | |
33cb5243 | 434 | if ((address >> 32) != 0) |
1da177e4 | 435 | return 0; |
2d4a7167 | 436 | |
1da177e4 | 437 | address |= 0xffffffffUL << 32; |
33cb5243 HH |
438 | if ((address >= (u64)_stext && address <= (u64)_etext) || |
439 | (address >= MODULES_VADDR && address <= MODULES_END)) { | |
a454ab31 | 440 | printk_once(errata93_warning); |
65ea5b03 | 441 | regs->ip = address; |
1da177e4 LT |
442 | return 1; |
443 | } | |
fdfe8aa8 | 444 | #endif |
1da177e4 | 445 | return 0; |
33cb5243 | 446 | } |
1da177e4 | 447 | |
35f3266f | 448 | /* |
2d4a7167 IM |
449 | * Work around K8 erratum #100 K8 in compat mode occasionally jumps |
450 | * to illegal addresses >4GB. | |
451 | * | |
452 | * We catch this in the page fault handler because these addresses | |
453 | * are not reachable. Just detect this case and return. Any code | |
35f3266f HH |
454 | * segment in LDT is compatibility mode. |
455 | */ | |
456 | static int is_errata100(struct pt_regs *regs, unsigned long address) | |
457 | { | |
458 | #ifdef CONFIG_X86_64 | |
2d4a7167 | 459 | if ((regs->cs == __USER32_CS || (regs->cs & (1<<2))) && (address >> 32)) |
35f3266f HH |
460 | return 1; |
461 | #endif | |
462 | return 0; | |
463 | } | |
464 | ||
3e77abda | 465 | /* Pentium F0 0F C7 C8 bug workaround: */ |
f42a40fd AL |
466 | static int is_f00f_bug(struct pt_regs *regs, unsigned long error_code, |
467 | unsigned long address) | |
29caf2f9 HH |
468 | { |
469 | #ifdef CONFIG_X86_F00F_BUG | |
f42a40fd AL |
470 | if (boot_cpu_has_bug(X86_BUG_F00F) && !(error_code & X86_PF_USER) && |
471 | idt_is_f00f_address(address)) { | |
3e77abda TG |
472 | handle_invalid_op(regs); |
473 | return 1; | |
29caf2f9 HH |
474 | } |
475 | #endif | |
476 | return 0; | |
477 | } | |
478 | ||
a1a371c4 AL |
479 | static void show_ldttss(const struct desc_ptr *gdt, const char *name, u16 index) |
480 | { | |
481 | u32 offset = (index >> 3) * sizeof(struct desc_struct); | |
482 | unsigned long addr; | |
483 | struct ldttss_desc desc; | |
484 | ||
485 | if (index == 0) { | |
486 | pr_alert("%s: NULL\n", name); | |
487 | return; | |
488 | } | |
489 | ||
490 | if (offset + sizeof(struct ldttss_desc) >= gdt->size) { | |
491 | pr_alert("%s: 0x%hx -- out of bounds\n", name, index); | |
492 | return; | |
493 | } | |
494 | ||
fe557319 | 495 | if (copy_from_kernel_nofault(&desc, (void *)(gdt->address + offset), |
a1a371c4 AL |
496 | sizeof(struct ldttss_desc))) { |
497 | pr_alert("%s: 0x%hx -- GDT entry is not readable\n", | |
498 | name, index); | |
499 | return; | |
500 | } | |
501 | ||
5ccd3528 | 502 | addr = desc.base0 | (desc.base1 << 16) | ((unsigned long)desc.base2 << 24); |
a1a371c4 AL |
503 | #ifdef CONFIG_X86_64 |
504 | addr |= ((u64)desc.base3 << 32); | |
505 | #endif | |
506 | pr_alert("%s: 0x%hx -- base=0x%lx limit=0x%x\n", | |
507 | name, index, addr, (desc.limit0 | (desc.limit1 << 16))); | |
508 | } | |
509 | ||
2d4a7167 | 510 | static void |
a2aa52ab | 511 | show_fault_oops(struct pt_regs *regs, unsigned long error_code, unsigned long address) |
b3279c7f | 512 | { |
1156e098 HH |
513 | if (!oops_may_print()) |
514 | return; | |
515 | ||
1067f030 | 516 | if (error_code & X86_PF_INSTR) { |
93809be8 | 517 | unsigned int level; |
d29dc517 | 518 | bool nx, rw; |
426e34cc MF |
519 | pgd_t *pgd; |
520 | pte_t *pte; | |
2d4a7167 | 521 | |
6c690ee1 | 522 | pgd = __va(read_cr3_pa()); |
426e34cc MF |
523 | pgd += pgd_index(address); |
524 | ||
d29dc517 | 525 | pte = lookup_address_in_pgd_attr(pgd, address, &level, &nx, &rw); |
1156e098 | 526 | |
d29dc517 | 527 | if (pte && pte_present(*pte) && (!pte_exec(*pte) || nx)) |
d79d0d8a DV |
528 | pr_crit("kernel tried to execute NX-protected page - exploit attempt? (uid: %d)\n", |
529 | from_kuid(&init_user_ns, current_uid())); | |
d29dc517 | 530 | if (pte && pte_present(*pte) && pte_exec(*pte) && !nx && |
eff50c34 | 531 | (pgd_flags(*pgd) & _PAGE_USER) && |
1e02ce4c | 532 | (__read_cr4() & X86_CR4_SMEP)) |
d79d0d8a DV |
533 | pr_crit("unable to execute userspace code (SMEP?) (uid: %d)\n", |
534 | from_kuid(&init_user_ns, current_uid())); | |
1156e098 | 535 | } |
1156e098 | 536 | |
f28b11a2 | 537 | if (address < PAGE_SIZE && !user_mode(regs)) |
ea2f8d60 | 538 | pr_alert("BUG: kernel NULL pointer dereference, address: %px\n", |
f28b11a2 SC |
539 | (void *)address); |
540 | else | |
ea2f8d60 | 541 | pr_alert("BUG: unable to handle page fault for address: %px\n", |
f28b11a2 | 542 | (void *)address); |
2d4a7167 | 543 | |
ea2f8d60 | 544 | pr_alert("#PF: %s %s in %s mode\n", |
18ea35c5 SC |
545 | (error_code & X86_PF_USER) ? "user" : "supervisor", |
546 | (error_code & X86_PF_INSTR) ? "instruction fetch" : | |
547 | (error_code & X86_PF_WRITE) ? "write access" : | |
548 | "read access", | |
549 | user_mode(regs) ? "user" : "kernel"); | |
550 | pr_alert("#PF: error_code(0x%04lx) - %s\n", error_code, | |
551 | !(error_code & X86_PF_PROT) ? "not-present page" : | |
552 | (error_code & X86_PF_RSVD) ? "reserved bit violation" : | |
553 | (error_code & X86_PF_PK) ? "protection keys violation" : | |
54055344 | 554 | (error_code & X86_PF_RMP) ? "RMP violation" : |
18ea35c5 | 555 | "permissions violation"); |
a2aa52ab | 556 | |
a1a371c4 AL |
557 | if (!(error_code & X86_PF_USER) && user_mode(regs)) { |
558 | struct desc_ptr idt, gdt; | |
559 | u16 ldtr, tr; | |
560 | ||
a1a371c4 AL |
561 | /* |
562 | * This can happen for quite a few reasons. The more obvious | |
563 | * ones are faults accessing the GDT, or LDT. Perhaps | |
564 | * surprisingly, if the CPU tries to deliver a benign or | |
565 | * contributory exception from user code and gets a page fault | |
566 | * during delivery, the page fault can be delivered as though | |
567 | * it originated directly from user code. This could happen | |
568 | * due to wrong permissions on the IDT, GDT, LDT, TSS, or | |
569 | * kernel or IST stack. | |
570 | */ | |
571 | store_idt(&idt); | |
572 | ||
573 | /* Usable even on Xen PV -- it's just slow. */ | |
574 | native_store_gdt(&gdt); | |
575 | ||
576 | pr_alert("IDT: 0x%lx (limit=0x%hx) GDT: 0x%lx (limit=0x%hx)\n", | |
577 | idt.address, idt.size, gdt.address, gdt.size); | |
578 | ||
579 | store_ldt(ldtr); | |
580 | show_ldttss(&gdt, "LDTR", ldtr); | |
581 | ||
582 | store_tr(tr); | |
583 | show_ldttss(&gdt, "TR", tr); | |
584 | } | |
585 | ||
b3279c7f | 586 | dump_pagetable(address); |
e8bbd303 MR |
587 | |
588 | if (error_code & X86_PF_RMP) | |
589 | snp_dump_hva_rmpentry(address); | |
b3279c7f HH |
590 | } |
591 | ||
2d4a7167 IM |
592 | static noinline void |
593 | pgtable_bad(struct pt_regs *regs, unsigned long error_code, | |
594 | unsigned long address) | |
1da177e4 | 595 | { |
2d4a7167 IM |
596 | struct task_struct *tsk; |
597 | unsigned long flags; | |
598 | int sig; | |
599 | ||
600 | flags = oops_begin(); | |
601 | tsk = current; | |
602 | sig = SIGKILL; | |
1209140c | 603 | |
1da177e4 | 604 | printk(KERN_ALERT "%s: Corrupted page table at address %lx\n", |
92181f19 | 605 | tsk->comm, address); |
1da177e4 | 606 | dump_pagetable(address); |
2d4a7167 | 607 | |
22f5991c | 608 | if (__die("Bad pagetable", regs, error_code)) |
874d93d1 | 609 | sig = 0; |
2d4a7167 | 610 | |
874d93d1 | 611 | oops_end(flags, regs, sig); |
1da177e4 LT |
612 | } |
613 | ||
cd072dab SC |
614 | static void sanitize_error_code(unsigned long address, |
615 | unsigned long *error_code) | |
e49d3cbe | 616 | { |
e49d3cbe AL |
617 | /* |
618 | * To avoid leaking information about the kernel page | |
619 | * table layout, pretend that user-mode accesses to | |
620 | * kernel addresses are always protection faults. | |
e0a446ce AL |
621 | * |
622 | * NB: This means that failed vsyscalls with vsyscall=none | |
623 | * will have the PROT bit. This doesn't leak any | |
624 | * information and does not appear to cause any problems. | |
e49d3cbe AL |
625 | */ |
626 | if (address >= TASK_SIZE_MAX) | |
cd072dab SC |
627 | *error_code |= X86_PF_PROT; |
628 | } | |
629 | ||
630 | static void set_signal_archinfo(unsigned long address, | |
631 | unsigned long error_code) | |
632 | { | |
633 | struct task_struct *tsk = current; | |
e49d3cbe AL |
634 | |
635 | tsk->thread.trap_nr = X86_TRAP_PF; | |
636 | tsk->thread.error_code = error_code | X86_PF_USER; | |
637 | tsk->thread.cr2 = address; | |
638 | } | |
639 | ||
2d4a7167 | 640 | static noinline void |
2cc624b0 AL |
641 | page_fault_oops(struct pt_regs *regs, unsigned long error_code, |
642 | unsigned long address) | |
92181f19 | 643 | { |
44b979fa PZ |
644 | #ifdef CONFIG_VMAP_STACK |
645 | struct stack_info info; | |
646 | #endif | |
92181f19 NP |
647 | unsigned long flags; |
648 | int sig; | |
92181f19 | 649 | |
ebb53e25 AL |
650 | if (user_mode(regs)) { |
651 | /* | |
2cc624b0 AL |
652 | * Implicit kernel access from user mode? Skip the stack |
653 | * overflow and EFI special cases. | |
ebb53e25 AL |
654 | */ |
655 | goto oops; | |
656 | } | |
657 | ||
6271cfdf AL |
658 | #ifdef CONFIG_VMAP_STACK |
659 | /* | |
660 | * Stack overflow? During boot, we can fault near the initial | |
661 | * stack in the direct map, but that's not an overflow -- check | |
662 | * that we're in vmalloc space to avoid this. | |
663 | */ | |
664 | if (is_vmalloc_addr((void *)address) && | |
44b979fa | 665 | get_stack_guard_info((void *)address, &info)) { |
6271cfdf AL |
666 | /* |
667 | * We're likely to be running with very little stack space | |
668 | * left. It's plausible that we'd hit this condition but | |
669 | * double-fault even before we get this far, in which case | |
670 | * we're fine: the double-fault handler will deal with it. | |
671 | * | |
672 | * We don't want to make it all the way into the oops code | |
673 | * and then double-fault, though, because we're likely to | |
674 | * break the console driver and lose most of the stack dump. | |
675 | */ | |
44b979fa PZ |
676 | call_on_stack(__this_cpu_ist_top_va(DF) - sizeof(void*), |
677 | handle_stack_overflow, | |
678 | ASM_CALL_ARG3, | |
679 | , [arg1] "r" (regs), [arg2] "r" (address), [arg3] "r" (&info)); | |
680 | ||
6271cfdf AL |
681 | unreachable(); |
682 | } | |
683 | #endif | |
684 | ||
3425d934 | 685 | /* |
c46f5223 AL |
686 | * Buggy firmware could access regions which might page fault. If |
687 | * this happens, EFI has a special OOPS path that will try to | |
688 | * avoid hanging the system. | |
3425d934 SP |
689 | */ |
690 | if (IS_ENABLED(CONFIG_EFI)) | |
c46f5223 | 691 | efi_crash_gracefully_on_page_fault(address); |
3425d934 | 692 | |
1dc0da6e | 693 | /* Only not-present faults should be handled by KFENCE. */ |
bc8fbc5f ME |
694 | if (!(error_code & X86_PF_PROT) && |
695 | kfence_handle_page_fault(address, error_code & X86_PF_WRITE, regs)) | |
1dc0da6e AP |
696 | return; |
697 | ||
ebb53e25 | 698 | oops: |
92181f19 NP |
699 | /* |
700 | * Oops. The kernel tried to access some bad page. We'll have to | |
2d4a7167 | 701 | * terminate things with extreme prejudice: |
92181f19 | 702 | */ |
92181f19 | 703 | flags = oops_begin(); |
92181f19 NP |
704 | |
705 | show_fault_oops(regs, error_code, address); | |
706 | ||
2cc624b0 | 707 | if (task_stack_end_corrupted(current)) |
b0f4c4b3 | 708 | printk(KERN_EMERG "Thread overran stack, or stack corrupted\n"); |
19803078 | 709 | |
92181f19 NP |
710 | sig = SIGKILL; |
711 | if (__die("Oops", regs, error_code)) | |
712 | sig = 0; | |
2d4a7167 | 713 | |
92181f19 | 714 | /* Executive summary in case the body of the oops scrolled away */ |
b0f4c4b3 | 715 | printk(KERN_DEFAULT "CR2: %016lx\n", address); |
2d4a7167 | 716 | |
92181f19 | 717 | oops_end(flags, regs, sig); |
92181f19 NP |
718 | } |
719 | ||
2cc624b0 | 720 | static noinline void |
6456a2a6 | 721 | kernelmode_fixup_or_oops(struct pt_regs *regs, unsigned long error_code, |
d4ffd5df JL |
722 | unsigned long address, int signal, int si_code, |
723 | u32 pkey) | |
2cc624b0 | 724 | { |
6456a2a6 | 725 | WARN_ON_ONCE(user_mode(regs)); |
2cc624b0 AL |
726 | |
727 | /* Are we prepared to handle this kernel fault? */ | |
02b670c1 | 728 | if (fixup_exception(regs, X86_TRAP_PF, error_code, address)) |
2cc624b0 | 729 | return; |
2cc624b0 AL |
730 | |
731 | /* | |
732 | * AMD erratum #91 manifests as a spurious page fault on a PREFETCH | |
733 | * instruction. | |
734 | */ | |
735 | if (is_prefetch(regs, error_code, address)) | |
736 | return; | |
737 | ||
2cc624b0 AL |
738 | page_fault_oops(regs, error_code, address); |
739 | } | |
740 | ||
2d4a7167 IM |
741 | /* |
742 | * Print out info about fatal segfaults, if the show_unhandled_signals | |
743 | * sysctl is set: | |
744 | */ | |
745 | static inline void | |
746 | show_signal_msg(struct pt_regs *regs, unsigned long error_code, | |
747 | unsigned long address, struct task_struct *tsk) | |
748 | { | |
ba54d856 | 749 | const char *loglvl = task_pid_nr(tsk) > 1 ? KERN_INFO : KERN_EMERG; |
c926087e RR |
750 | /* This is a racy snapshot, but it's better than nothing. */ |
751 | int cpu = raw_smp_processor_id(); | |
ba54d856 | 752 | |
2d4a7167 IM |
753 | if (!unhandled_signal(tsk, SIGSEGV)) |
754 | return; | |
755 | ||
756 | if (!printk_ratelimit()) | |
757 | return; | |
758 | ||
10a7e9d8 | 759 | printk("%s%s[%d]: segfault at %lx ip %px sp %px error %lx", |
ba54d856 | 760 | loglvl, tsk->comm, task_pid_nr(tsk), address, |
2d4a7167 IM |
761 | (void *)regs->ip, (void *)regs->sp, error_code); |
762 | ||
763 | print_vma_addr(KERN_CONT " in ", regs->ip); | |
764 | ||
c926087e RR |
765 | /* |
766 | * Dump the likely CPU where the fatal segfault happened. | |
767 | * This can help identify faulty hardware. | |
768 | */ | |
769 | printk(KERN_CONT " likely on CPU %d (core %d, socket %d)", cpu, | |
770 | topology_core_id(cpu), topology_physical_package_id(cpu)); | |
771 | ||
772 | ||
2d4a7167 | 773 | printk(KERN_CONT "\n"); |
ba54d856 | 774 | |
342db04a | 775 | show_opcodes(regs, loglvl); |
2d4a7167 IM |
776 | } |
777 | ||
778 | static void | |
779 | __bad_area_nosemaphore(struct pt_regs *regs, unsigned long error_code, | |
419ceeb1 | 780 | unsigned long address, u32 pkey, int si_code) |
92181f19 NP |
781 | { |
782 | struct task_struct *tsk = current; | |
783 | ||
5042d40a | 784 | if (!user_mode(regs)) { |
d4ffd5df JL |
785 | kernelmode_fixup_or_oops(regs, error_code, address, |
786 | SIGSEGV, si_code, pkey); | |
5042d40a AL |
787 | return; |
788 | } | |
92181f19 | 789 | |
5042d40a AL |
790 | if (!(error_code & X86_PF_USER)) { |
791 | /* Implicit user access to kernel memory -- just oops */ | |
792 | page_fault_oops(regs, error_code, address); | |
793 | return; | |
794 | } | |
92181f19 | 795 | |
5042d40a AL |
796 | /* |
797 | * User mode accesses just cause a SIGSEGV. | |
798 | * It's possible to have interrupts off here: | |
799 | */ | |
800 | local_irq_enable(); | |
92181f19 | 801 | |
5042d40a AL |
802 | /* |
803 | * Valid to do another page fault here because this one came | |
804 | * from user space: | |
805 | */ | |
806 | if (is_prefetch(regs, error_code, address)) | |
807 | return; | |
3ae36655 | 808 | |
5042d40a AL |
809 | if (is_errata100(regs, address)) |
810 | return; | |
334872a0 | 811 | |
5042d40a | 812 | sanitize_error_code(address, &error_code); |
2d4a7167 | 813 | |
5042d40a AL |
814 | if (fixup_vdso_exception(regs, X86_TRAP_PF, error_code, address)) |
815 | return; | |
92181f19 | 816 | |
5042d40a AL |
817 | if (likely(show_unhandled_signals)) |
818 | show_signal_msg(regs, error_code, address, tsk); | |
9db812db | 819 | |
5042d40a | 820 | set_signal_archinfo(address, error_code); |
2d4a7167 | 821 | |
5042d40a AL |
822 | if (si_code == SEGV_PKUERR) |
823 | force_sig_pkuerr((void __user *)address, pkey); | |
5405b42c JL |
824 | else |
825 | force_sig_fault(SIGSEGV, si_code, (void __user *)address); | |
92181f19 | 826 | |
5042d40a | 827 | local_irq_disable(); |
92181f19 NP |
828 | } |
829 | ||
2d4a7167 IM |
830 | static noinline void |
831 | bad_area_nosemaphore(struct pt_regs *regs, unsigned long error_code, | |
768fd9c6 | 832 | unsigned long address) |
92181f19 | 833 | { |
419ceeb1 | 834 | __bad_area_nosemaphore(regs, error_code, address, 0, SEGV_MAPERR); |
92181f19 NP |
835 | } |
836 | ||
2d4a7167 IM |
837 | static void |
838 | __bad_area(struct pt_regs *regs, unsigned long error_code, | |
bc7996c8 KW |
839 | unsigned long address, struct mm_struct *mm, |
840 | struct vm_area_struct *vma, u32 pkey, int si_code) | |
92181f19 | 841 | { |
92181f19 NP |
842 | /* |
843 | * Something tried to access memory that isn't in our memory map.. | |
844 | * Fix it, but check if it's kernel or user first.. | |
845 | */ | |
bc7996c8 KW |
846 | if (mm) |
847 | mmap_read_unlock(mm); | |
848 | else | |
849 | vma_end_read(vma); | |
92181f19 | 850 | |
aba1ecd3 | 851 | __bad_area_nosemaphore(regs, error_code, address, pkey, si_code); |
92181f19 NP |
852 | } |
853 | ||
33a709b2 DH |
854 | static inline bool bad_area_access_from_pkeys(unsigned long error_code, |
855 | struct vm_area_struct *vma) | |
856 | { | |
07f146f5 DH |
857 | /* This code is always called on the current mm */ |
858 | bool foreign = false; | |
859 | ||
8a1dc55a | 860 | if (!cpu_feature_enabled(X86_FEATURE_OSPKE)) |
33a709b2 | 861 | return false; |
1067f030 | 862 | if (error_code & X86_PF_PK) |
33a709b2 | 863 | return true; |
07f146f5 | 864 | /* this checks permission keys on the VMA: */ |
1067f030 RN |
865 | if (!arch_vma_access_permitted(vma, (error_code & X86_PF_WRITE), |
866 | (error_code & X86_PF_INSTR), foreign)) | |
07f146f5 | 867 | return true; |
33a709b2 | 868 | return false; |
92181f19 NP |
869 | } |
870 | ||
2d4a7167 IM |
871 | static noinline void |
872 | bad_area_access_error(struct pt_regs *regs, unsigned long error_code, | |
bc7996c8 KW |
873 | unsigned long address, struct mm_struct *mm, |
874 | struct vm_area_struct *vma) | |
92181f19 | 875 | { |
019132ff DH |
876 | /* |
877 | * This OSPKE check is not strictly necessary at runtime. | |
878 | * But, doing it this way allows compiler optimizations | |
879 | * if pkeys are compiled out. | |
880 | */ | |
aba1ecd3 | 881 | if (bad_area_access_from_pkeys(error_code, vma)) { |
9db812db EB |
882 | /* |
883 | * A protection key fault means that the PKRU value did not allow | |
884 | * access to some PTE. Userspace can figure out what PKRU was | |
885 | * from the XSAVE state. This function captures the pkey from | |
886 | * the vma and passes it to userspace so userspace can discover | |
887 | * which protection key was set on the PTE. | |
888 | * | |
889 | * If we get here, we know that the hardware signaled a X86_PF_PK | |
890 | * fault and that there was a VMA once we got in the fault | |
891 | * handler. It does *not* guarantee that the VMA we find here | |
892 | * was the one that we faulted on. | |
893 | * | |
894 | * 1. T1 : mprotect_key(foo, PAGE_SIZE, pkey=4); | |
895 | * 2. T1 : set PKRU to deny access to pkey=4, touches page | |
896 | * 3. T1 : faults... | |
897 | * 4. T2: mprotect_key(foo, PAGE_SIZE, pkey=5); | |
c1e8d7c6 | 898 | * 5. T1 : enters fault handler, takes mmap_lock, etc... |
9db812db EB |
899 | * 6. T1 : reaches here, sees vma_pkey(vma)=5, when we really |
900 | * faulted on a pte with its pkey=4. | |
901 | */ | |
aba1ecd3 | 902 | u32 pkey = vma_pkey(vma); |
9db812db | 903 | |
bc7996c8 | 904 | __bad_area(regs, error_code, address, mm, vma, pkey, SEGV_PKUERR); |
aba1ecd3 | 905 | } else { |
bc7996c8 | 906 | __bad_area(regs, error_code, address, mm, vma, 0, SEGV_ACCERR); |
aba1ecd3 | 907 | } |
92181f19 NP |
908 | } |
909 | ||
2d4a7167 | 910 | static void |
a6e04aa9 | 911 | do_sigbus(struct pt_regs *regs, unsigned long error_code, unsigned long address, |
3d353901 | 912 | vm_fault_t fault) |
92181f19 | 913 | { |
2d4a7167 | 914 | /* Kernel mode? Handle exceptions or die: */ |
56e62cd2 | 915 | if (!user_mode(regs)) { |
d4ffd5df JL |
916 | kernelmode_fixup_or_oops(regs, error_code, address, |
917 | SIGBUS, BUS_ADRERR, ARCH_DEFAULT_PKEY); | |
96054569 LT |
918 | return; |
919 | } | |
2d4a7167 | 920 | |
cd1b68f0 | 921 | /* User-space => ok to do another page fault: */ |
92181f19 NP |
922 | if (is_prefetch(regs, error_code, address)) |
923 | return; | |
2d4a7167 | 924 | |
cd072dab SC |
925 | sanitize_error_code(address, &error_code); |
926 | ||
334872a0 SC |
927 | if (fixup_vdso_exception(regs, X86_TRAP_PF, error_code, address)) |
928 | return; | |
929 | ||
e49d3cbe | 930 | set_signal_archinfo(address, error_code); |
2d4a7167 | 931 | |
a6e04aa9 | 932 | #ifdef CONFIG_MEMORY_FAILURE |
f672b49b | 933 | if (fault & (VM_FAULT_HWPOISON|VM_FAULT_HWPOISON_LARGE)) { |
318759b4 | 934 | struct task_struct *tsk = current; |
40e55394 EB |
935 | unsigned lsb = 0; |
936 | ||
937 | pr_err( | |
a6e04aa9 AK |
938 | "MCE: Killing %s:%d due to hardware memory corruption fault at %lx\n", |
939 | tsk->comm, tsk->pid, address); | |
40e55394 EB |
940 | if (fault & VM_FAULT_HWPOISON_LARGE) |
941 | lsb = hstate_index_to_shift(VM_FAULT_GET_HINDEX(fault)); | |
942 | if (fault & VM_FAULT_HWPOISON) | |
943 | lsb = PAGE_SHIFT; | |
f8eac901 | 944 | force_sig_mceerr(BUS_MCEERR_AR, (void __user *)address, lsb); |
40e55394 | 945 | return; |
a6e04aa9 AK |
946 | } |
947 | #endif | |
2e1661d2 | 948 | force_sig_fault(SIGBUS, BUS_ADRERR, (void __user *)address); |
92181f19 NP |
949 | } |
950 | ||
8fed6200 | 951 | static int spurious_kernel_fault_check(unsigned long error_code, pte_t *pte) |
d8b57bb7 | 952 | { |
1067f030 | 953 | if ((error_code & X86_PF_WRITE) && !pte_write(*pte)) |
d8b57bb7 | 954 | return 0; |
2d4a7167 | 955 | |
1067f030 | 956 | if ((error_code & X86_PF_INSTR) && !pte_exec(*pte)) |
d8b57bb7 TG |
957 | return 0; |
958 | ||
959 | return 1; | |
960 | } | |
961 | ||
5b727a3b | 962 | /* |
2d4a7167 IM |
963 | * Handle a spurious fault caused by a stale TLB entry. |
964 | * | |
965 | * This allows us to lazily refresh the TLB when increasing the | |
966 | * permissions of a kernel page (RO -> RW or NX -> X). Doing it | |
967 | * eagerly is very expensive since that implies doing a full | |
968 | * cross-processor TLB flush, even if no stale TLB entries exist | |
969 | * on other processors. | |
970 | * | |
31668511 DV |
971 | * Spurious faults may only occur if the TLB contains an entry with |
972 | * fewer permission than the page table entry. Non-present (P = 0) | |
973 | * and reserved bit (R = 1) faults are never spurious. | |
974 | * | |
5b727a3b JF |
975 | * There are no security implications to leaving a stale TLB when |
976 | * increasing the permissions on a page. | |
31668511 DV |
977 | * |
978 | * Returns non-zero if a spurious fault was handled, zero otherwise. | |
979 | * | |
980 | * See Intel Developer's Manual Vol 3 Section 4.10.4.3, bullet 3 | |
981 | * (Optional Invalidation). | |
5b727a3b | 982 | */ |
9326638c | 983 | static noinline int |
8fed6200 | 984 | spurious_kernel_fault(unsigned long error_code, unsigned long address) |
5b727a3b JF |
985 | { |
986 | pgd_t *pgd; | |
e0c4f675 | 987 | p4d_t *p4d; |
5b727a3b JF |
988 | pud_t *pud; |
989 | pmd_t *pmd; | |
990 | pte_t *pte; | |
3c3e5694 | 991 | int ret; |
5b727a3b | 992 | |
31668511 DV |
993 | /* |
994 | * Only writes to RO or instruction fetches from NX may cause | |
995 | * spurious faults. | |
996 | * | |
997 | * These could be from user or supervisor accesses but the TLB | |
998 | * is only lazily flushed after a kernel mapping protection | |
999 | * change, so user accesses are not expected to cause spurious | |
1000 | * faults. | |
1001 | */ | |
1067f030 RN |
1002 | if (error_code != (X86_PF_WRITE | X86_PF_PROT) && |
1003 | error_code != (X86_PF_INSTR | X86_PF_PROT)) | |
5b727a3b JF |
1004 | return 0; |
1005 | ||
1006 | pgd = init_mm.pgd + pgd_index(address); | |
1007 | if (!pgd_present(*pgd)) | |
1008 | return 0; | |
1009 | ||
e0c4f675 KS |
1010 | p4d = p4d_offset(pgd, address); |
1011 | if (!p4d_present(*p4d)) | |
1012 | return 0; | |
1013 | ||
dba8e6f3 | 1014 | if (p4d_leaf(*p4d)) |
8fed6200 | 1015 | return spurious_kernel_fault_check(error_code, (pte_t *) p4d); |
e0c4f675 KS |
1016 | |
1017 | pud = pud_offset(p4d, address); | |
5b727a3b JF |
1018 | if (!pud_present(*pud)) |
1019 | return 0; | |
1020 | ||
0a845e0f | 1021 | if (pud_leaf(*pud)) |
8fed6200 | 1022 | return spurious_kernel_fault_check(error_code, (pte_t *) pud); |
d8b57bb7 | 1023 | |
5b727a3b JF |
1024 | pmd = pmd_offset(pud, address); |
1025 | if (!pmd_present(*pmd)) | |
1026 | return 0; | |
1027 | ||
2f709f7b | 1028 | if (pmd_leaf(*pmd)) |
8fed6200 | 1029 | return spurious_kernel_fault_check(error_code, (pte_t *) pmd); |
d8b57bb7 | 1030 | |
5b727a3b | 1031 | pte = pte_offset_kernel(pmd, address); |
954f8571 | 1032 | if (!pte_present(*pte)) |
5b727a3b JF |
1033 | return 0; |
1034 | ||
8fed6200 | 1035 | ret = spurious_kernel_fault_check(error_code, pte); |
3c3e5694 SR |
1036 | if (!ret) |
1037 | return 0; | |
1038 | ||
1039 | /* | |
2d4a7167 IM |
1040 | * Make sure we have permissions in PMD. |
1041 | * If not, then there's a bug in the page tables: | |
3c3e5694 | 1042 | */ |
8fed6200 | 1043 | ret = spurious_kernel_fault_check(error_code, (pte_t *) pmd); |
3c3e5694 | 1044 | WARN_ONCE(!ret, "PMD has incorrect permission bits\n"); |
2d4a7167 | 1045 | |
3c3e5694 | 1046 | return ret; |
5b727a3b | 1047 | } |
8fed6200 | 1048 | NOKPROBE_SYMBOL(spurious_kernel_fault); |
5b727a3b | 1049 | |
abd4f750 | 1050 | int show_unhandled_signals = 1; |
1da177e4 | 1051 | |
2d4a7167 | 1052 | static inline int |
68da336a | 1053 | access_error(unsigned long error_code, struct vm_area_struct *vma) |
92181f19 | 1054 | { |
07f146f5 DH |
1055 | /* This is only called for the current mm, so: */ |
1056 | bool foreign = false; | |
e8c6226d DH |
1057 | |
1058 | /* | |
1059 | * Read or write was blocked by protection keys. This is | |
1060 | * always an unconditional error and can never result in | |
1061 | * a follow-up action to resolve the fault, like a COW. | |
1062 | */ | |
1067f030 | 1063 | if (error_code & X86_PF_PK) |
e8c6226d DH |
1064 | return 1; |
1065 | ||
74faeee0 SC |
1066 | /* |
1067 | * SGX hardware blocked the access. This usually happens | |
1068 | * when the enclave memory contents have been destroyed, like | |
1069 | * after a suspend/resume cycle. In any case, the kernel can't | |
1070 | * fix the cause of the fault. Handle the fault as an access | |
1071 | * error even in cases where no actual access violation | |
1072 | * occurred. This allows userspace to rebuild the enclave in | |
1073 | * response to the signal. | |
1074 | */ | |
1075 | if (unlikely(error_code & X86_PF_SGX)) | |
1076 | return 1; | |
1077 | ||
07f146f5 DH |
1078 | /* |
1079 | * Make sure to check the VMA so that we do not perform | |
1067f030 | 1080 | * faults just to hit a X86_PF_PK as soon as we fill in a |
07f146f5 DH |
1081 | * page. |
1082 | */ | |
1067f030 RN |
1083 | if (!arch_vma_access_permitted(vma, (error_code & X86_PF_WRITE), |
1084 | (error_code & X86_PF_INSTR), foreign)) | |
07f146f5 | 1085 | return 1; |
33a709b2 | 1086 | |
fd5439e0 RE |
1087 | /* |
1088 | * Shadow stack accesses (PF_SHSTK=1) are only permitted to | |
1089 | * shadow stack VMAs. All other accesses result in an error. | |
1090 | */ | |
1091 | if (error_code & X86_PF_SHSTK) { | |
1092 | if (unlikely(!(vma->vm_flags & VM_SHADOW_STACK))) | |
1093 | return 1; | |
1094 | if (unlikely(!(vma->vm_flags & VM_WRITE))) | |
1095 | return 1; | |
1096 | return 0; | |
1097 | } | |
1098 | ||
1067f030 | 1099 | if (error_code & X86_PF_WRITE) { |
2d4a7167 | 1100 | /* write, present and write, not present: */ |
fd5439e0 RE |
1101 | if (unlikely(vma->vm_flags & VM_SHADOW_STACK)) |
1102 | return 1; | |
92181f19 NP |
1103 | if (unlikely(!(vma->vm_flags & VM_WRITE))) |
1104 | return 1; | |
2d4a7167 | 1105 | return 0; |
92181f19 NP |
1106 | } |
1107 | ||
2d4a7167 | 1108 | /* read, present: */ |
1067f030 | 1109 | if (unlikely(error_code & X86_PF_PROT)) |
2d4a7167 IM |
1110 | return 1; |
1111 | ||
1112 | /* read, not present: */ | |
3122e80e | 1113 | if (unlikely(!vma_is_accessible(vma))) |
2d4a7167 IM |
1114 | return 1; |
1115 | ||
92181f19 NP |
1116 | return 0; |
1117 | } | |
1118 | ||
30063810 | 1119 | bool fault_in_kernel_space(unsigned long address) |
0973a06c | 1120 | { |
3ae0ad92 DH |
1121 | /* |
1122 | * On 64-bit systems, the vsyscall page is at an address above | |
1123 | * TASK_SIZE_MAX, but is not considered part of the kernel | |
1124 | * address space. | |
1125 | */ | |
1126 | if (IS_ENABLED(CONFIG_X86_64) && is_vsyscall_vaddr(address)) | |
1127 | return false; | |
1128 | ||
d9517346 | 1129 | return address >= TASK_SIZE_MAX; |
0973a06c HS |
1130 | } |
1131 | ||
1da177e4 | 1132 | /* |
8fed6200 DH |
1133 | * Called for all faults where 'address' is part of the kernel address |
1134 | * space. Might get called for faults that originate from *code* that | |
1135 | * ran in userspace or the kernel. | |
1da177e4 | 1136 | */ |
8fed6200 DH |
1137 | static void |
1138 | do_kern_addr_fault(struct pt_regs *regs, unsigned long hw_error_code, | |
1139 | unsigned long address) | |
1da177e4 | 1140 | { |
367e3f1d DH |
1141 | /* |
1142 | * Protection keys exceptions only happen on user pages. We | |
1143 | * have no user pages in the kernel portion of the address | |
1144 | * space, so do not expect them here. | |
1145 | */ | |
1146 | WARN_ON_ONCE(hw_error_code & X86_PF_PK); | |
1da177e4 | 1147 | |
4819e15f JR |
1148 | #ifdef CONFIG_X86_32 |
1149 | /* | |
1150 | * We can fault-in kernel-space virtual memory on-demand. The | |
1151 | * 'reference' page table is init_mm.pgd. | |
1152 | * | |
1153 | * NOTE! We MUST NOT take any locks for this case. We may | |
1154 | * be in an interrupt or a critical region, and should | |
1155 | * only copy the information from the master page table, | |
1156 | * nothing more. | |
1157 | * | |
1158 | * Before doing this on-demand faulting, ensure that the | |
1159 | * fault is not any of the following: | |
1160 | * 1. A fault on a PTE with a reserved bit set. | |
1161 | * 2. A fault caused by a user-mode access. (Do not demand- | |
1162 | * fault kernel memory due to user-mode accesses). | |
1163 | * 3. A fault caused by a page-level protection violation. | |
1164 | * (A demand fault would be on a non-present page which | |
1165 | * would have X86_PF_PROT==0). | |
1166 | * | |
1167 | * This is only needed to close a race condition on x86-32 in | |
1168 | * the vmalloc mapping/unmapping code. See the comment above | |
1169 | * vmalloc_fault() for details. On x86-64 the race does not | |
1170 | * exist as the vmalloc mappings don't need to be synchronized | |
1171 | * there. | |
1172 | */ | |
1173 | if (!(hw_error_code & (X86_PF_RSVD | X86_PF_USER | X86_PF_PROT))) { | |
1174 | if (vmalloc_fault(address) >= 0) | |
1175 | return; | |
1176 | } | |
1177 | #endif | |
1178 | ||
f42a40fd AL |
1179 | if (is_f00f_bug(regs, hw_error_code, address)) |
1180 | return; | |
1181 | ||
8fed6200 DH |
1182 | /* Was the fault spurious, caused by lazy TLB invalidation? */ |
1183 | if (spurious_kernel_fault(hw_error_code, address)) | |
1184 | return; | |
2d4a7167 | 1185 | |
8fed6200 | 1186 | /* kprobes don't want to hook the spurious faults: */ |
00afe830 | 1187 | if (WARN_ON_ONCE(kprobe_page_fault(regs, X86_TRAP_PF))) |
92181f19 | 1188 | return; |
8fed6200 DH |
1189 | |
1190 | /* | |
1191 | * Note, despite being a "bad area", there are quite a few | |
1192 | * acceptable reasons to get here, such as erratum fixups | |
1193 | * and handling kernel code that can fault, like get_user(). | |
1194 | * | |
1195 | * Don't take the mm semaphore here. If we fixup a prefetch | |
1196 | * fault we could otherwise deadlock: | |
1197 | */ | |
ba9f6f89 | 1198 | bad_area_nosemaphore(regs, hw_error_code, address); |
8fed6200 DH |
1199 | } |
1200 | NOKPROBE_SYMBOL(do_kern_addr_fault); | |
1201 | ||
56e62cd2 AL |
1202 | /* |
1203 | * Handle faults in the user portion of the address space. Nothing in here | |
1204 | * should check X86_PF_USER without a specific justification: for almost | |
1205 | * all purposes, we should treat a normal kernel access to user memory | |
1206 | * (e.g. get_user(), put_user(), etc.) the same as the WRUSS instruction. | |
1207 | * The one exception is AC flag handling, which is, per the x86 | |
1208 | * architecture, special for WRUSS. | |
1209 | */ | |
aa37c51b DH |
1210 | static inline |
1211 | void do_user_addr_fault(struct pt_regs *regs, | |
ec352711 | 1212 | unsigned long error_code, |
aa37c51b | 1213 | unsigned long address) |
1da177e4 | 1214 | { |
2d4a7167 | 1215 | struct vm_area_struct *vma; |
1da177e4 LT |
1216 | struct task_struct *tsk; |
1217 | struct mm_struct *mm; | |
968614fc | 1218 | vm_fault_t fault; |
dde16072 | 1219 | unsigned int flags = FAULT_FLAG_DEFAULT; |
1da177e4 | 1220 | |
a9ba9a3b AV |
1221 | tsk = current; |
1222 | mm = tsk->mm; | |
f8c2ee22 | 1223 | |
03c81ea3 AL |
1224 | if (unlikely((error_code & (X86_PF_USER | X86_PF_INSTR)) == X86_PF_INSTR)) { |
1225 | /* | |
1226 | * Whoops, this is kernel mode code trying to execute from | |
1227 | * user memory. Unless this is AMD erratum #93, which | |
1228 | * corrupts RIP such that it looks like a user address, | |
1229 | * this is unrecoverable. Don't even try to look up the | |
66fcd988 | 1230 | * VMA or look for extable entries. |
03c81ea3 AL |
1231 | */ |
1232 | if (is_errata93(regs, address)) | |
1233 | return; | |
1234 | ||
66fcd988 | 1235 | page_fault_oops(regs, error_code, address); |
03c81ea3 AL |
1236 | return; |
1237 | } | |
1238 | ||
2d4a7167 | 1239 | /* kprobes don't want to hook the spurious faults: */ |
00afe830 | 1240 | if (WARN_ON_ONCE(kprobe_page_fault(regs, X86_TRAP_PF))) |
9be260a6 | 1241 | return; |
8c914cb7 | 1242 | |
5b0c2cac DH |
1243 | /* |
1244 | * Reserved bits are never expected to be set on | |
1245 | * entries in the user portion of the page tables. | |
1246 | */ | |
ec352711 AL |
1247 | if (unlikely(error_code & X86_PF_RSVD)) |
1248 | pgtable_bad(regs, error_code, address); | |
1da177e4 | 1249 | |
5b0c2cac | 1250 | /* |
e50928d7 AL |
1251 | * If SMAP is on, check for invalid kernel (supervisor) access to user |
1252 | * pages in the user address space. The odd case here is WRUSS, | |
1253 | * which, according to the preliminary documentation, does not respect | |
1254 | * SMAP and will have the USER bit set so, in all cases, SMAP | |
1255 | * enforcement appears to be consistent with the USER bit. | |
5b0c2cac | 1256 | */ |
a15781b5 | 1257 | if (unlikely(cpu_feature_enabled(X86_FEATURE_SMAP) && |
ec352711 | 1258 | !(error_code & X86_PF_USER) && |
ca247283 AL |
1259 | !(regs->flags & X86_EFLAGS_AC))) { |
1260 | /* | |
1261 | * No extable entry here. This was a kernel access to an | |
1262 | * invalid pointer. get_kernel_nofault() will not get here. | |
1263 | */ | |
1264 | page_fault_oops(regs, error_code, address); | |
4640c7ee | 1265 | return; |
40d3cd66 PA |
1266 | } |
1267 | ||
1da177e4 | 1268 | /* |
2d4a7167 | 1269 | * If we're in an interrupt, have no user context or are running |
70ffdb93 | 1270 | * in a region with pagefaults disabled then we must not take the fault |
1da177e4 | 1271 | */ |
70ffdb93 | 1272 | if (unlikely(faulthandler_disabled() || !mm)) { |
ec352711 | 1273 | bad_area_nosemaphore(regs, error_code, address); |
92181f19 NP |
1274 | return; |
1275 | } | |
1da177e4 | 1276 | |
8f588afe LT |
1277 | /* Legacy check - remove this after verifying that it doesn't trigger */ |
1278 | if (WARN_ON_ONCE(!(regs->flags & X86_EFLAGS_IF))) { | |
1279 | bad_area_nosemaphore(regs, error_code, address); | |
1280 | return; | |
e00b12e6 PZ |
1281 | } |
1282 | ||
8f588afe LT |
1283 | local_irq_enable(); |
1284 | ||
e00b12e6 PZ |
1285 | perf_sw_event(PERF_COUNT_SW_PAGE_FAULTS, 1, regs, address); |
1286 | ||
fd5439e0 RE |
1287 | /* |
1288 | * Read-only permissions can not be expressed in shadow stack PTEs. | |
1289 | * Treat all shadow stack accesses as WRITE faults. This ensures | |
1290 | * that the MM will prepare everything (e.g., break COW) such that | |
1291 | * maybe_mkwrite() can create a proper shadow stack PTE. | |
1292 | */ | |
1293 | if (error_code & X86_PF_SHSTK) | |
1294 | flags |= FAULT_FLAG_WRITE; | |
ec352711 | 1295 | if (error_code & X86_PF_WRITE) |
759496ba | 1296 | flags |= FAULT_FLAG_WRITE; |
ec352711 | 1297 | if (error_code & X86_PF_INSTR) |
d61172b4 | 1298 | flags |= FAULT_FLAG_INSTRUCTION; |
759496ba | 1299 | |
8f588afe LT |
1300 | /* |
1301 | * We set FAULT_FLAG_USER based on the register state, not | |
1302 | * based on X86_PF_USER. User space accesses that cause | |
1303 | * system page faults are still user accesses. | |
1304 | */ | |
1305 | if (user_mode(regs)) | |
1306 | flags |= FAULT_FLAG_USER; | |
1307 | ||
3ae0ad92 | 1308 | #ifdef CONFIG_X86_64 |
3a1dfe6e | 1309 | /* |
918ce325 AL |
1310 | * Faults in the vsyscall page might need emulation. The |
1311 | * vsyscall page is at a high address (>PAGE_OFFSET), but is | |
1312 | * considered to be part of the user address space. | |
1da177e4 | 1313 | * |
3ae0ad92 DH |
1314 | * The vsyscall page does not have a "real" VMA, so do this |
1315 | * emulation before we go searching for VMAs. | |
e0a446ce AL |
1316 | * |
1317 | * PKRU never rejects instruction fetches, so we don't need | |
1318 | * to consider the PF_PK bit. | |
3ae0ad92 | 1319 | */ |
918ce325 | 1320 | if (is_vsyscall_vaddr(address)) { |
ec352711 | 1321 | if (emulate_vsyscall(error_code, regs, address)) |
3ae0ad92 DH |
1322 | return; |
1323 | } | |
1324 | #endif | |
1325 | ||
0bff0aae SB |
1326 | if (!(flags & FAULT_FLAG_USER)) |
1327 | goto lock_mmap; | |
1328 | ||
1329 | vma = lock_vma_under_rcu(mm, address); | |
1330 | if (!vma) | |
1331 | goto lock_mmap; | |
1332 | ||
1333 | if (unlikely(access_error(error_code, vma))) { | |
bc7996c8 KW |
1334 | bad_area_access_error(regs, error_code, address, NULL, vma); |
1335 | count_vm_vma_lock_event(VMA_LOCK_SUCCESS); | |
1336 | return; | |
0bff0aae SB |
1337 | } |
1338 | fault = handle_mm_fault(vma, address, flags | FAULT_FLAG_VMA_LOCK, regs); | |
4089eef0 SB |
1339 | if (!(fault & (VM_FAULT_RETRY | VM_FAULT_COMPLETED))) |
1340 | vma_end_read(vma); | |
0bff0aae SB |
1341 | |
1342 | if (!(fault & VM_FAULT_RETRY)) { | |
1343 | count_vm_vma_lock_event(VMA_LOCK_SUCCESS); | |
1344 | goto done; | |
1345 | } | |
1346 | count_vm_vma_lock_event(VMA_LOCK_RETRY); | |
46e714c7 SB |
1347 | if (fault & VM_FAULT_MAJOR) |
1348 | flags |= FAULT_FLAG_TRIED; | |
0bff0aae SB |
1349 | |
1350 | /* Quick path to respond to signals */ | |
1351 | if (fault_signal_pending(fault, regs)) { | |
1352 | if (!user_mode(regs)) | |
1353 | kernelmode_fixup_or_oops(regs, error_code, address, | |
1354 | SIGBUS, BUS_ADRERR, | |
1355 | ARCH_DEFAULT_PKEY); | |
1356 | return; | |
1357 | } | |
1358 | lock_mmap: | |
0bff0aae | 1359 | |
d065bd81 | 1360 | retry: |
c2508ec5 | 1361 | vma = lock_mm_and_find_vma(mm, address, regs); |
92181f19 | 1362 | if (unlikely(!vma)) { |
c2508ec5 | 1363 | bad_area_nosemaphore(regs, error_code, address); |
92181f19 NP |
1364 | return; |
1365 | } | |
1366 | ||
1367 | /* | |
1368 | * Ok, we have a good vm_area for this memory access, so | |
1369 | * we can handle it.. | |
1370 | */ | |
ec352711 | 1371 | if (unlikely(access_error(error_code, vma))) { |
bc7996c8 | 1372 | bad_area_access_error(regs, error_code, address, mm, vma); |
92181f19 | 1373 | return; |
1da177e4 LT |
1374 | } |
1375 | ||
1376 | /* | |
1377 | * If for any reason at all we couldn't handle the fault, | |
1378 | * make sure we exit gracefully rather than endlessly redo | |
9a95f3cf | 1379 | * the fault. Since we never set FAULT_FLAG_RETRY_NOWAIT, if |
c1e8d7c6 | 1380 | * we get VM_FAULT_RETRY back, the mmap_lock has been unlocked. |
cb0631fd | 1381 | * |
c1e8d7c6 | 1382 | * Note that handle_userfault() may also release and reacquire mmap_lock |
cb0631fd VB |
1383 | * (and not return with VM_FAULT_RETRY), when returning to userland to |
1384 | * repeat the page fault later with a VM_FAULT_NOPAGE retval | |
1385 | * (potentially after handling any pending signal during the return to | |
1386 | * userland). The return to userland is identified whenever | |
1387 | * FAULT_FLAG_USER|FAULT_FLAG_KILLABLE are both set in flags. | |
1da177e4 | 1388 | */ |
968614fc | 1389 | fault = handle_mm_fault(vma, address, flags, regs); |
2d4a7167 | 1390 | |
39678191 | 1391 | if (fault_signal_pending(fault, regs)) { |
ef2544fb AL |
1392 | /* |
1393 | * Quick path to respond to signals. The core mm code | |
1394 | * has unlocked the mm for us if we get here. | |
1395 | */ | |
39678191 | 1396 | if (!user_mode(regs)) |
6456a2a6 | 1397 | kernelmode_fixup_or_oops(regs, error_code, address, |
d4ffd5df JL |
1398 | SIGBUS, BUS_ADRERR, |
1399 | ARCH_DEFAULT_PKEY); | |
39678191 PX |
1400 | return; |
1401 | } | |
1402 | ||
d9272525 PX |
1403 | /* The fault is fully completed (including releasing mmap lock) */ |
1404 | if (fault & VM_FAULT_COMPLETED) | |
1405 | return; | |
1406 | ||
3a13c4d7 | 1407 | /* |
c1e8d7c6 | 1408 | * If we need to retry the mmap_lock has already been released, |
26178ec1 LT |
1409 | * and if there is a fatal signal pending there is no guarantee |
1410 | * that we made any progress. Handle this case first. | |
3a13c4d7 | 1411 | */ |
36ef159f | 1412 | if (unlikely(fault & VM_FAULT_RETRY)) { |
39678191 PX |
1413 | flags |= FAULT_FLAG_TRIED; |
1414 | goto retry; | |
26178ec1 | 1415 | } |
3a13c4d7 | 1416 | |
d8ed45c5 | 1417 | mmap_read_unlock(mm); |
0bff0aae | 1418 | done: |
ec352711 AL |
1419 | if (likely(!(fault & VM_FAULT_ERROR))) |
1420 | return; | |
1421 | ||
56e62cd2 | 1422 | if (fatal_signal_pending(current) && !user_mode(regs)) { |
d4ffd5df JL |
1423 | kernelmode_fixup_or_oops(regs, error_code, address, |
1424 | 0, 0, ARCH_DEFAULT_PKEY); | |
3a13c4d7 | 1425 | return; |
37b23e05 KM |
1426 | } |
1427 | ||
ec352711 AL |
1428 | if (fault & VM_FAULT_OOM) { |
1429 | /* Kernel mode? Handle exceptions or die: */ | |
56e62cd2 | 1430 | if (!user_mode(regs)) { |
6456a2a6 | 1431 | kernelmode_fixup_or_oops(regs, error_code, address, |
d4ffd5df JL |
1432 | SIGSEGV, SEGV_MAPERR, |
1433 | ARCH_DEFAULT_PKEY); | |
ec352711 AL |
1434 | return; |
1435 | } | |
1436 | ||
1437 | /* | |
1438 | * We ran out of memory, call the OOM killer, and return the | |
1439 | * userspace (which will retry the fault, or kill us if we got | |
1440 | * oom-killed): | |
1441 | */ | |
1442 | pagefault_out_of_memory(); | |
1443 | } else { | |
1444 | if (fault & (VM_FAULT_SIGBUS|VM_FAULT_HWPOISON| | |
1445 | VM_FAULT_HWPOISON_LARGE)) | |
1446 | do_sigbus(regs, error_code, address, fault); | |
1447 | else if (fault & VM_FAULT_SIGSEGV) | |
1448 | bad_area_nosemaphore(regs, error_code, address); | |
1449 | else | |
1450 | BUG(); | |
1451 | } | |
1da177e4 | 1452 | } |
aa37c51b DH |
1453 | NOKPROBE_SYMBOL(do_user_addr_fault); |
1454 | ||
a0d14b89 PZ |
1455 | static __always_inline void |
1456 | trace_page_fault_entries(struct pt_regs *regs, unsigned long error_code, | |
1457 | unsigned long address) | |
d34603b0 | 1458 | { |
a0d14b89 PZ |
1459 | if (!trace_pagefault_enabled()) |
1460 | return; | |
1461 | ||
d34603b0 | 1462 | if (user_mode(regs)) |
d4078e23 | 1463 | trace_page_fault_user(address, regs, error_code); |
d34603b0 | 1464 | else |
d4078e23 | 1465 | trace_page_fault_kernel(address, regs, error_code); |
d34603b0 SA |
1466 | } |
1467 | ||
91eeafea TG |
1468 | static __always_inline void |
1469 | handle_page_fault(struct pt_regs *regs, unsigned long error_code, | |
1470 | unsigned long address) | |
1471 | { | |
1472 | trace_page_fault_entries(regs, error_code, address); | |
1473 | ||
1474 | if (unlikely(kmmio_fault(regs, address))) | |
1475 | return; | |
1476 | ||
1477 | /* Was the fault on kernel-controlled part of the address space? */ | |
1478 | if (unlikely(fault_in_kernel_space(address))) { | |
1479 | do_kern_addr_fault(regs, error_code, address); | |
1480 | } else { | |
1481 | do_user_addr_fault(regs, error_code, address); | |
1482 | /* | |
1483 | * User address page fault handling might have reenabled | |
1484 | * interrupts. Fixing up all potential exit points of | |
1485 | * do_user_addr_fault() and its leaf functions is just not | |
1486 | * doable w/o creating an unholy mess or turning the code | |
1487 | * upside down. | |
1488 | */ | |
1489 | local_irq_disable(); | |
1490 | } | |
1491 | } | |
1492 | ||
1493 | DEFINE_IDTENTRY_RAW_ERRORCODE(exc_page_fault) | |
25c74b10 | 1494 | { |
a27a0a55 | 1495 | irqentry_state_t state; |
58c80cc5 PAI |
1496 | unsigned long address; |
1497 | ||
1498 | address = cpu_feature_enabled(X86_FEATURE_FRED) ? fred_event_data(regs) : read_cr2(); | |
91eeafea | 1499 | |
da1c55f1 | 1500 | prefetchw(¤t->mm->mmap_lock); |
91eeafea | 1501 | |
ef68017e | 1502 | /* |
66af4f5c VK |
1503 | * KVM uses #PF vector to deliver 'page not present' events to guests |
1504 | * (asynchronous page fault mechanism). The event happens when a | |
1505 | * userspace task is trying to access some valid (from guest's point of | |
1506 | * view) memory which is not currently mapped by the host (e.g. the | |
1507 | * memory is swapped out). Note, the corresponding "page ready" event | |
163b0991 | 1508 | * which is injected when the memory becomes available, is delivered via |
66af4f5c VK |
1509 | * an interrupt mechanism and not a #PF exception |
1510 | * (see arch/x86/kernel/kvm.c: sysvec_kvm_asyncpf_interrupt()). | |
ef68017e AL |
1511 | * |
1512 | * We are relying on the interrupted context being sane (valid RSP, | |
1513 | * relevant locks not held, etc.), which is fine as long as the | |
1514 | * interrupted context had IF=1. We are also relying on the KVM | |
1515 | * async pf type field and CR2 being read consistently instead of | |
1516 | * getting values from real and async page faults mixed up. | |
1517 | * | |
1518 | * Fingers crossed. | |
91eeafea TG |
1519 | * |
1520 | * The async #PF handling code takes care of idtentry handling | |
1521 | * itself. | |
ef68017e AL |
1522 | */ |
1523 | if (kvm_handle_async_pf(regs, (u32)address)) | |
1524 | return; | |
1525 | ||
91eeafea TG |
1526 | /* |
1527 | * Entry handling for valid #PF from kernel mode is slightly | |
6f0e6c15 | 1528 | * different: RCU is already watching and ct_irq_enter() must not |
91eeafea TG |
1529 | * be invoked because a kernel fault on a user space address might |
1530 | * sleep. | |
1531 | * | |
1532 | * In case the fault hit a RCU idle region the conditional entry | |
1533 | * code reenabled RCU to avoid subsequent wreckage which helps | |
d9f6e12f | 1534 | * debuggability. |
91eeafea | 1535 | */ |
a27a0a55 | 1536 | state = irqentry_enter(regs); |
25c74b10 | 1537 | |
91eeafea TG |
1538 | instrumentation_begin(); |
1539 | handle_page_fault(regs, error_code, address); | |
1540 | instrumentation_end(); | |
ee6352b2 | 1541 | |
a27a0a55 | 1542 | irqentry_exit(regs, state); |
25c74b10 | 1543 | } |