Commit | Line | Data |
---|---|---|
1da177e4 | 1 | /* |
1da177e4 | 2 | * Copyright (C) 1995 Linus Torvalds |
2d4a7167 | 3 | * Copyright (C) 2001, 2002 Andi Kleen, SuSE Labs. |
f8eeb2e6 | 4 | * Copyright (C) 2008-2009, Red Hat Inc., Ingo Molnar |
1da177e4 | 5 | */ |
a2bcd473 IM |
6 | #include <linux/magic.h> /* STACK_END_MAGIC */ |
7 | #include <linux/sched.h> /* test_thread_flag(), ... */ | |
8 | #include <linux/kdebug.h> /* oops_begin/end, ... */ | |
9 | #include <linux/module.h> /* search_exception_table */ | |
10 | #include <linux/bootmem.h> /* max_low_pfn */ | |
11 | #include <linux/kprobes.h> /* __kprobes, ... */ | |
12 | #include <linux/mmiotrace.h> /* kmmio_handler, ... */ | |
cdd6c482 | 13 | #include <linux/perf_event.h> /* perf_sw_event */ |
2d4a7167 | 14 | |
a2bcd473 IM |
15 | #include <asm/traps.h> /* dotraplinkage, ... */ |
16 | #include <asm/pgalloc.h> /* pgd_*(), ... */ | |
f8561296 | 17 | #include <asm/kmemcheck.h> /* kmemcheck_*(), ... */ |
1da177e4 | 18 | |
33cb5243 | 19 | /* |
2d4a7167 IM |
20 | * Page fault error code bits: |
21 | * | |
22 | * bit 0 == 0: no page found 1: protection fault | |
23 | * bit 1 == 0: read access 1: write access | |
24 | * bit 2 == 0: kernel-mode access 1: user-mode access | |
25 | * bit 3 == 1: use of reserved bit detected | |
26 | * bit 4 == 1: fault was an instruction fetch | |
33cb5243 | 27 | */ |
2d4a7167 IM |
28 | enum x86_pf_error_code { |
29 | ||
30 | PF_PROT = 1 << 0, | |
31 | PF_WRITE = 1 << 1, | |
32 | PF_USER = 1 << 2, | |
33 | PF_RSVD = 1 << 3, | |
34 | PF_INSTR = 1 << 4, | |
35 | }; | |
66c58156 | 36 | |
b814d41f | 37 | /* |
b319eed0 IM |
38 | * Returns 0 if mmiotrace is disabled, or if the fault is not |
39 | * handled by mmiotrace: | |
b814d41f | 40 | */ |
0fd0e3da | 41 | static inline int kmmio_fault(struct pt_regs *regs, unsigned long addr) |
86069782 | 42 | { |
0fd0e3da PP |
43 | if (unlikely(is_kmmio_active())) |
44 | if (kmmio_handler(regs, addr) == 1) | |
45 | return -1; | |
0fd0e3da | 46 | return 0; |
86069782 PP |
47 | } |
48 | ||
74a0b576 | 49 | static inline int notify_page_fault(struct pt_regs *regs) |
1bd858a5 | 50 | { |
74a0b576 CH |
51 | int ret = 0; |
52 | ||
53 | /* kprobe_running() needs smp_processor_id() */ | |
b1801812 | 54 | if (kprobes_built_in() && !user_mode_vm(regs)) { |
74a0b576 CH |
55 | preempt_disable(); |
56 | if (kprobe_running() && kprobe_fault_handler(regs, 14)) | |
57 | ret = 1; | |
58 | preempt_enable(); | |
59 | } | |
1bd858a5 | 60 | |
74a0b576 | 61 | return ret; |
33cb5243 | 62 | } |
1bd858a5 | 63 | |
1dc85be0 | 64 | /* |
2d4a7167 IM |
65 | * Prefetch quirks: |
66 | * | |
67 | * 32-bit mode: | |
68 | * | |
69 | * Sometimes AMD Athlon/Opteron CPUs report invalid exceptions on prefetch. | |
70 | * Check that here and ignore it. | |
1dc85be0 | 71 | * |
2d4a7167 | 72 | * 64-bit mode: |
1dc85be0 | 73 | * |
2d4a7167 IM |
74 | * Sometimes the CPU reports invalid exceptions on prefetch. |
75 | * Check that here and ignore it. | |
76 | * | |
77 | * Opcode checker based on code by Richard Brunner. | |
1dc85be0 | 78 | */ |
107a0367 IM |
79 | static inline int |
80 | check_prefetch_opcode(struct pt_regs *regs, unsigned char *instr, | |
81 | unsigned char opcode, int *prefetch) | |
82 | { | |
83 | unsigned char instr_hi = opcode & 0xf0; | |
84 | unsigned char instr_lo = opcode & 0x0f; | |
85 | ||
86 | switch (instr_hi) { | |
87 | case 0x20: | |
88 | case 0x30: | |
89 | /* | |
90 | * Values 0x26,0x2E,0x36,0x3E are valid x86 prefixes. | |
91 | * In X86_64 long mode, the CPU will signal invalid | |
92 | * opcode if some of these prefixes are present so | |
93 | * X86_64 will never get here anyway | |
94 | */ | |
95 | return ((instr_lo & 7) == 0x6); | |
96 | #ifdef CONFIG_X86_64 | |
97 | case 0x40: | |
98 | /* | |
99 | * In AMD64 long mode 0x40..0x4F are valid REX prefixes | |
100 | * Need to figure out under what instruction mode the | |
101 | * instruction was issued. Could check the LDT for lm, | |
102 | * but for now it's good enough to assume that long | |
103 | * mode only uses well known segments or kernel. | |
104 | */ | |
105 | return (!user_mode(regs)) || (regs->cs == __USER_CS); | |
106 | #endif | |
107 | case 0x60: | |
108 | /* 0x64 thru 0x67 are valid prefixes in all modes. */ | |
109 | return (instr_lo & 0xC) == 0x4; | |
110 | case 0xF0: | |
111 | /* 0xF0, 0xF2, 0xF3 are valid prefixes in all modes. */ | |
112 | return !instr_lo || (instr_lo>>1) == 1; | |
113 | case 0x00: | |
114 | /* Prefetch instruction is 0x0F0D or 0x0F18 */ | |
115 | if (probe_kernel_address(instr, opcode)) | |
116 | return 0; | |
117 | ||
118 | *prefetch = (instr_lo == 0xF) && | |
119 | (opcode == 0x0D || opcode == 0x18); | |
120 | return 0; | |
121 | default: | |
122 | return 0; | |
123 | } | |
124 | } | |
125 | ||
2d4a7167 IM |
126 | static int |
127 | is_prefetch(struct pt_regs *regs, unsigned long error_code, unsigned long addr) | |
33cb5243 | 128 | { |
2d4a7167 | 129 | unsigned char *max_instr; |
ab2bf0c1 | 130 | unsigned char *instr; |
33cb5243 | 131 | int prefetch = 0; |
1da177e4 | 132 | |
3085354d IM |
133 | /* |
134 | * If it was a exec (instruction fetch) fault on NX page, then | |
135 | * do not ignore the fault: | |
136 | */ | |
66c58156 | 137 | if (error_code & PF_INSTR) |
1da177e4 | 138 | return 0; |
1dc85be0 | 139 | |
107a0367 | 140 | instr = (void *)convert_ip_to_linear(current, regs); |
f1290ec9 | 141 | max_instr = instr + 15; |
1da177e4 | 142 | |
76381fee | 143 | if (user_mode(regs) && instr >= (unsigned char *)TASK_SIZE) |
1da177e4 LT |
144 | return 0; |
145 | ||
107a0367 | 146 | while (instr < max_instr) { |
2d4a7167 | 147 | unsigned char opcode; |
1da177e4 | 148 | |
ab2bf0c1 | 149 | if (probe_kernel_address(instr, opcode)) |
33cb5243 | 150 | break; |
1da177e4 | 151 | |
1da177e4 LT |
152 | instr++; |
153 | ||
107a0367 | 154 | if (!check_prefetch_opcode(regs, instr, opcode, &prefetch)) |
1da177e4 | 155 | break; |
1da177e4 LT |
156 | } |
157 | return prefetch; | |
158 | } | |
159 | ||
2d4a7167 IM |
160 | static void |
161 | force_sig_info_fault(int si_signo, int si_code, unsigned long address, | |
162 | struct task_struct *tsk) | |
c4aba4a8 HH |
163 | { |
164 | siginfo_t info; | |
165 | ||
2d4a7167 IM |
166 | info.si_signo = si_signo; |
167 | info.si_errno = 0; | |
168 | info.si_code = si_code; | |
169 | info.si_addr = (void __user *)address; | |
170 | ||
c4aba4a8 HH |
171 | force_sig_info(si_signo, &info, tsk); |
172 | } | |
173 | ||
f2f13a85 IM |
174 | DEFINE_SPINLOCK(pgd_lock); |
175 | LIST_HEAD(pgd_list); | |
176 | ||
177 | #ifdef CONFIG_X86_32 | |
178 | static inline pmd_t *vmalloc_sync_one(pgd_t *pgd, unsigned long address) | |
33cb5243 | 179 | { |
f2f13a85 IM |
180 | unsigned index = pgd_index(address); |
181 | pgd_t *pgd_k; | |
182 | pud_t *pud, *pud_k; | |
183 | pmd_t *pmd, *pmd_k; | |
2d4a7167 | 184 | |
f2f13a85 IM |
185 | pgd += index; |
186 | pgd_k = init_mm.pgd + index; | |
187 | ||
188 | if (!pgd_present(*pgd_k)) | |
189 | return NULL; | |
190 | ||
191 | /* | |
192 | * set_pgd(pgd, *pgd_k); here would be useless on PAE | |
193 | * and redundant with the set_pmd() on non-PAE. As would | |
194 | * set_pud. | |
195 | */ | |
196 | pud = pud_offset(pgd, address); | |
197 | pud_k = pud_offset(pgd_k, address); | |
198 | if (!pud_present(*pud_k)) | |
199 | return NULL; | |
200 | ||
201 | pmd = pmd_offset(pud, address); | |
202 | pmd_k = pmd_offset(pud_k, address); | |
203 | if (!pmd_present(*pmd_k)) | |
204 | return NULL; | |
205 | ||
b8bcfe99 | 206 | if (!pmd_present(*pmd)) |
f2f13a85 | 207 | set_pmd(pmd, *pmd_k); |
b8bcfe99 | 208 | else |
f2f13a85 | 209 | BUG_ON(pmd_page(*pmd) != pmd_page(*pmd_k)); |
f2f13a85 IM |
210 | |
211 | return pmd_k; | |
212 | } | |
213 | ||
214 | void vmalloc_sync_all(void) | |
215 | { | |
216 | unsigned long address; | |
217 | ||
218 | if (SHARED_KERNEL_PMD) | |
219 | return; | |
220 | ||
221 | for (address = VMALLOC_START & PMD_MASK; | |
222 | address >= TASK_SIZE && address < FIXADDR_TOP; | |
223 | address += PMD_SIZE) { | |
224 | ||
225 | unsigned long flags; | |
226 | struct page *page; | |
227 | ||
228 | spin_lock_irqsave(&pgd_lock, flags); | |
229 | list_for_each_entry(page, &pgd_list, lru) { | |
230 | if (!vmalloc_sync_one(page_address(page), address)) | |
231 | break; | |
232 | } | |
233 | spin_unlock_irqrestore(&pgd_lock, flags); | |
234 | } | |
235 | } | |
236 | ||
237 | /* | |
238 | * 32-bit: | |
239 | * | |
240 | * Handle a fault on the vmalloc or module mapping area | |
241 | */ | |
242 | static noinline int vmalloc_fault(unsigned long address) | |
243 | { | |
244 | unsigned long pgd_paddr; | |
245 | pmd_t *pmd_k; | |
246 | pte_t *pte_k; | |
247 | ||
248 | /* Make sure we are in vmalloc area: */ | |
249 | if (!(address >= VMALLOC_START && address < VMALLOC_END)) | |
250 | return -1; | |
251 | ||
252 | /* | |
253 | * Synchronize this task's top level page-table | |
254 | * with the 'reference' page table. | |
255 | * | |
256 | * Do _not_ use "current" here. We might be inside | |
257 | * an interrupt in the middle of a task switch.. | |
258 | */ | |
259 | pgd_paddr = read_cr3(); | |
260 | pmd_k = vmalloc_sync_one(__va(pgd_paddr), address); | |
261 | if (!pmd_k) | |
262 | return -1; | |
263 | ||
264 | pte_k = pte_offset_kernel(pmd_k, address); | |
265 | if (!pte_present(*pte_k)) | |
266 | return -1; | |
267 | ||
268 | return 0; | |
269 | } | |
270 | ||
271 | /* | |
272 | * Did it hit the DOS screen memory VA from vm86 mode? | |
273 | */ | |
274 | static inline void | |
275 | check_v8086_mode(struct pt_regs *regs, unsigned long address, | |
276 | struct task_struct *tsk) | |
277 | { | |
278 | unsigned long bit; | |
279 | ||
280 | if (!v8086_mode(regs)) | |
281 | return; | |
282 | ||
283 | bit = (address - 0xA0000) >> PAGE_SHIFT; | |
284 | if (bit < 32) | |
285 | tsk->thread.screen_bitmap |= 1 << bit; | |
33cb5243 | 286 | } |
1da177e4 | 287 | |
087975b0 | 288 | static bool low_pfn(unsigned long pfn) |
1da177e4 | 289 | { |
087975b0 AM |
290 | return pfn < max_low_pfn; |
291 | } | |
1156e098 | 292 | |
087975b0 AM |
293 | static void dump_pagetable(unsigned long address) |
294 | { | |
295 | pgd_t *base = __va(read_cr3()); | |
296 | pgd_t *pgd = &base[pgd_index(address)]; | |
297 | pmd_t *pmd; | |
298 | pte_t *pte; | |
2d4a7167 | 299 | |
1156e098 | 300 | #ifdef CONFIG_X86_PAE |
087975b0 AM |
301 | printk("*pdpt = %016Lx ", pgd_val(*pgd)); |
302 | if (!low_pfn(pgd_val(*pgd) >> PAGE_SHIFT) || !pgd_present(*pgd)) | |
303 | goto out; | |
1156e098 | 304 | #endif |
087975b0 AM |
305 | pmd = pmd_offset(pud_offset(pgd, address), address); |
306 | printk(KERN_CONT "*pde = %0*Lx ", sizeof(*pmd) * 2, (u64)pmd_val(*pmd)); | |
1156e098 HH |
307 | |
308 | /* | |
309 | * We must not directly access the pte in the highpte | |
310 | * case if the page table is located in highmem. | |
311 | * And let's rather not kmap-atomic the pte, just in case | |
2d4a7167 | 312 | * it's allocated already: |
1156e098 | 313 | */ |
087975b0 AM |
314 | if (!low_pfn(pmd_pfn(*pmd)) || !pmd_present(*pmd) || pmd_large(*pmd)) |
315 | goto out; | |
1156e098 | 316 | |
087975b0 AM |
317 | pte = pte_offset_kernel(pmd, address); |
318 | printk("*pte = %0*Lx ", sizeof(*pte) * 2, (u64)pte_val(*pte)); | |
319 | out: | |
1156e098 | 320 | printk("\n"); |
f2f13a85 IM |
321 | } |
322 | ||
323 | #else /* CONFIG_X86_64: */ | |
324 | ||
325 | void vmalloc_sync_all(void) | |
326 | { | |
327 | unsigned long address; | |
328 | ||
329 | for (address = VMALLOC_START & PGDIR_MASK; address <= VMALLOC_END; | |
330 | address += PGDIR_SIZE) { | |
331 | ||
332 | const pgd_t *pgd_ref = pgd_offset_k(address); | |
333 | unsigned long flags; | |
334 | struct page *page; | |
335 | ||
336 | if (pgd_none(*pgd_ref)) | |
337 | continue; | |
338 | ||
339 | spin_lock_irqsave(&pgd_lock, flags); | |
340 | list_for_each_entry(page, &pgd_list, lru) { | |
341 | pgd_t *pgd; | |
342 | pgd = (pgd_t *)page_address(page) + pgd_index(address); | |
343 | if (pgd_none(*pgd)) | |
344 | set_pgd(pgd, *pgd_ref); | |
345 | else | |
346 | BUG_ON(pgd_page_vaddr(*pgd) != pgd_page_vaddr(*pgd_ref)); | |
347 | } | |
348 | spin_unlock_irqrestore(&pgd_lock, flags); | |
349 | } | |
350 | } | |
351 | ||
352 | /* | |
353 | * 64-bit: | |
354 | * | |
355 | * Handle a fault on the vmalloc area | |
356 | * | |
357 | * This assumes no large pages in there. | |
358 | */ | |
359 | static noinline int vmalloc_fault(unsigned long address) | |
360 | { | |
361 | pgd_t *pgd, *pgd_ref; | |
362 | pud_t *pud, *pud_ref; | |
363 | pmd_t *pmd, *pmd_ref; | |
364 | pte_t *pte, *pte_ref; | |
365 | ||
366 | /* Make sure we are in vmalloc area: */ | |
367 | if (!(address >= VMALLOC_START && address < VMALLOC_END)) | |
368 | return -1; | |
369 | ||
370 | /* | |
371 | * Copy kernel mappings over when needed. This can also | |
372 | * happen within a race in page table update. In the later | |
373 | * case just flush: | |
374 | */ | |
375 | pgd = pgd_offset(current->active_mm, address); | |
376 | pgd_ref = pgd_offset_k(address); | |
377 | if (pgd_none(*pgd_ref)) | |
378 | return -1; | |
379 | ||
380 | if (pgd_none(*pgd)) | |
381 | set_pgd(pgd, *pgd_ref); | |
382 | else | |
383 | BUG_ON(pgd_page_vaddr(*pgd) != pgd_page_vaddr(*pgd_ref)); | |
384 | ||
385 | /* | |
386 | * Below here mismatches are bugs because these lower tables | |
387 | * are shared: | |
388 | */ | |
389 | ||
390 | pud = pud_offset(pgd, address); | |
391 | pud_ref = pud_offset(pgd_ref, address); | |
392 | if (pud_none(*pud_ref)) | |
393 | return -1; | |
394 | ||
395 | if (pud_none(*pud) || pud_page_vaddr(*pud) != pud_page_vaddr(*pud_ref)) | |
396 | BUG(); | |
397 | ||
398 | pmd = pmd_offset(pud, address); | |
399 | pmd_ref = pmd_offset(pud_ref, address); | |
400 | if (pmd_none(*pmd_ref)) | |
401 | return -1; | |
402 | ||
403 | if (pmd_none(*pmd) || pmd_page(*pmd) != pmd_page(*pmd_ref)) | |
404 | BUG(); | |
405 | ||
406 | pte_ref = pte_offset_kernel(pmd_ref, address); | |
407 | if (!pte_present(*pte_ref)) | |
408 | return -1; | |
409 | ||
410 | pte = pte_offset_kernel(pmd, address); | |
411 | ||
412 | /* | |
413 | * Don't use pte_page here, because the mappings can point | |
414 | * outside mem_map, and the NUMA hash lookup cannot handle | |
415 | * that: | |
416 | */ | |
417 | if (!pte_present(*pte) || pte_pfn(*pte) != pte_pfn(*pte_ref)) | |
418 | BUG(); | |
419 | ||
420 | return 0; | |
421 | } | |
422 | ||
423 | static const char errata93_warning[] = | |
ad361c98 JP |
424 | KERN_ERR |
425 | "******* Your BIOS seems to not contain a fix for K8 errata #93\n" | |
426 | "******* Working around it, but it may cause SEGVs or burn power.\n" | |
427 | "******* Please consider a BIOS update.\n" | |
428 | "******* Disabling USB legacy in the BIOS may also help.\n"; | |
f2f13a85 IM |
429 | |
430 | /* | |
431 | * No vm86 mode in 64-bit mode: | |
432 | */ | |
433 | static inline void | |
434 | check_v8086_mode(struct pt_regs *regs, unsigned long address, | |
435 | struct task_struct *tsk) | |
436 | { | |
437 | } | |
438 | ||
439 | static int bad_address(void *p) | |
440 | { | |
441 | unsigned long dummy; | |
442 | ||
443 | return probe_kernel_address((unsigned long *)p, dummy); | |
444 | } | |
445 | ||
446 | static void dump_pagetable(unsigned long address) | |
447 | { | |
087975b0 AM |
448 | pgd_t *base = __va(read_cr3() & PHYSICAL_PAGE_MASK); |
449 | pgd_t *pgd = base + pgd_index(address); | |
1da177e4 LT |
450 | pud_t *pud; |
451 | pmd_t *pmd; | |
452 | pte_t *pte; | |
453 | ||
2d4a7167 IM |
454 | if (bad_address(pgd)) |
455 | goto bad; | |
456 | ||
d646bce4 | 457 | printk("PGD %lx ", pgd_val(*pgd)); |
2d4a7167 IM |
458 | |
459 | if (!pgd_present(*pgd)) | |
460 | goto out; | |
1da177e4 | 461 | |
d2ae5b5f | 462 | pud = pud_offset(pgd, address); |
2d4a7167 IM |
463 | if (bad_address(pud)) |
464 | goto bad; | |
465 | ||
1da177e4 | 466 | printk("PUD %lx ", pud_val(*pud)); |
b5360222 | 467 | if (!pud_present(*pud) || pud_large(*pud)) |
2d4a7167 | 468 | goto out; |
1da177e4 LT |
469 | |
470 | pmd = pmd_offset(pud, address); | |
2d4a7167 IM |
471 | if (bad_address(pmd)) |
472 | goto bad; | |
473 | ||
1da177e4 | 474 | printk("PMD %lx ", pmd_val(*pmd)); |
2d4a7167 IM |
475 | if (!pmd_present(*pmd) || pmd_large(*pmd)) |
476 | goto out; | |
1da177e4 LT |
477 | |
478 | pte = pte_offset_kernel(pmd, address); | |
2d4a7167 IM |
479 | if (bad_address(pte)) |
480 | goto bad; | |
481 | ||
33cb5243 | 482 | printk("PTE %lx", pte_val(*pte)); |
2d4a7167 | 483 | out: |
1da177e4 LT |
484 | printk("\n"); |
485 | return; | |
486 | bad: | |
487 | printk("BAD\n"); | |
8c938f9f IM |
488 | } |
489 | ||
f2f13a85 | 490 | #endif /* CONFIG_X86_64 */ |
1da177e4 | 491 | |
2d4a7167 IM |
492 | /* |
493 | * Workaround for K8 erratum #93 & buggy BIOS. | |
494 | * | |
495 | * BIOS SMM functions are required to use a specific workaround | |
496 | * to avoid corruption of the 64bit RIP register on C stepping K8. | |
497 | * | |
498 | * A lot of BIOS that didn't get tested properly miss this. | |
499 | * | |
500 | * The OS sees this as a page fault with the upper 32bits of RIP cleared. | |
501 | * Try to work around it here. | |
502 | * | |
503 | * Note we only handle faults in kernel here. | |
504 | * Does nothing on 32-bit. | |
fdfe8aa8 | 505 | */ |
33cb5243 | 506 | static int is_errata93(struct pt_regs *regs, unsigned long address) |
1da177e4 | 507 | { |
fdfe8aa8 | 508 | #ifdef CONFIG_X86_64 |
65ea5b03 | 509 | if (address != regs->ip) |
1da177e4 | 510 | return 0; |
2d4a7167 | 511 | |
33cb5243 | 512 | if ((address >> 32) != 0) |
1da177e4 | 513 | return 0; |
2d4a7167 | 514 | |
1da177e4 | 515 | address |= 0xffffffffUL << 32; |
33cb5243 HH |
516 | if ((address >= (u64)_stext && address <= (u64)_etext) || |
517 | (address >= MODULES_VADDR && address <= MODULES_END)) { | |
a454ab31 | 518 | printk_once(errata93_warning); |
65ea5b03 | 519 | regs->ip = address; |
1da177e4 LT |
520 | return 1; |
521 | } | |
fdfe8aa8 | 522 | #endif |
1da177e4 | 523 | return 0; |
33cb5243 | 524 | } |
1da177e4 | 525 | |
35f3266f | 526 | /* |
2d4a7167 IM |
527 | * Work around K8 erratum #100 K8 in compat mode occasionally jumps |
528 | * to illegal addresses >4GB. | |
529 | * | |
530 | * We catch this in the page fault handler because these addresses | |
531 | * are not reachable. Just detect this case and return. Any code | |
35f3266f HH |
532 | * segment in LDT is compatibility mode. |
533 | */ | |
534 | static int is_errata100(struct pt_regs *regs, unsigned long address) | |
535 | { | |
536 | #ifdef CONFIG_X86_64 | |
2d4a7167 | 537 | if ((regs->cs == __USER32_CS || (regs->cs & (1<<2))) && (address >> 32)) |
35f3266f HH |
538 | return 1; |
539 | #endif | |
540 | return 0; | |
541 | } | |
542 | ||
29caf2f9 HH |
543 | static int is_f00f_bug(struct pt_regs *regs, unsigned long address) |
544 | { | |
545 | #ifdef CONFIG_X86_F00F_BUG | |
546 | unsigned long nr; | |
2d4a7167 | 547 | |
29caf2f9 | 548 | /* |
2d4a7167 | 549 | * Pentium F0 0F C7 C8 bug workaround: |
29caf2f9 HH |
550 | */ |
551 | if (boot_cpu_data.f00f_bug) { | |
552 | nr = (address - idt_descr.address) >> 3; | |
553 | ||
554 | if (nr == 6) { | |
555 | do_invalid_op(regs, 0); | |
556 | return 1; | |
557 | } | |
558 | } | |
559 | #endif | |
560 | return 0; | |
561 | } | |
562 | ||
8f766149 IM |
563 | static const char nx_warning[] = KERN_CRIT |
564 | "kernel tried to execute NX-protected page - exploit attempt? (uid: %d)\n"; | |
565 | ||
2d4a7167 IM |
566 | static void |
567 | show_fault_oops(struct pt_regs *regs, unsigned long error_code, | |
568 | unsigned long address) | |
b3279c7f | 569 | { |
1156e098 HH |
570 | if (!oops_may_print()) |
571 | return; | |
572 | ||
1156e098 | 573 | if (error_code & PF_INSTR) { |
93809be8 | 574 | unsigned int level; |
2d4a7167 | 575 | |
1156e098 HH |
576 | pte_t *pte = lookup_address(address, &level); |
577 | ||
8f766149 IM |
578 | if (pte && pte_present(*pte) && !pte_exec(*pte)) |
579 | printk(nx_warning, current_uid()); | |
1156e098 | 580 | } |
1156e098 | 581 | |
19f0dda9 | 582 | printk(KERN_ALERT "BUG: unable to handle kernel "); |
b3279c7f | 583 | if (address < PAGE_SIZE) |
19f0dda9 | 584 | printk(KERN_CONT "NULL pointer dereference"); |
b3279c7f | 585 | else |
19f0dda9 | 586 | printk(KERN_CONT "paging request"); |
2d4a7167 | 587 | |
f294a8ce | 588 | printk(KERN_CONT " at %p\n", (void *) address); |
19f0dda9 | 589 | printk(KERN_ALERT "IP:"); |
b3279c7f | 590 | printk_address(regs->ip, 1); |
2d4a7167 | 591 | |
b3279c7f HH |
592 | dump_pagetable(address); |
593 | } | |
594 | ||
2d4a7167 IM |
595 | static noinline void |
596 | pgtable_bad(struct pt_regs *regs, unsigned long error_code, | |
597 | unsigned long address) | |
1da177e4 | 598 | { |
2d4a7167 IM |
599 | struct task_struct *tsk; |
600 | unsigned long flags; | |
601 | int sig; | |
602 | ||
603 | flags = oops_begin(); | |
604 | tsk = current; | |
605 | sig = SIGKILL; | |
1209140c | 606 | |
1da177e4 | 607 | printk(KERN_ALERT "%s: Corrupted page table at address %lx\n", |
92181f19 | 608 | tsk->comm, address); |
1da177e4 | 609 | dump_pagetable(address); |
2d4a7167 IM |
610 | |
611 | tsk->thread.cr2 = address; | |
612 | tsk->thread.trap_no = 14; | |
613 | tsk->thread.error_code = error_code; | |
614 | ||
22f5991c | 615 | if (__die("Bad pagetable", regs, error_code)) |
874d93d1 | 616 | sig = 0; |
2d4a7167 | 617 | |
874d93d1 | 618 | oops_end(flags, regs, sig); |
1da177e4 LT |
619 | } |
620 | ||
2d4a7167 IM |
621 | static noinline void |
622 | no_context(struct pt_regs *regs, unsigned long error_code, | |
623 | unsigned long address) | |
92181f19 NP |
624 | { |
625 | struct task_struct *tsk = current; | |
19803078 | 626 | unsigned long *stackend; |
92181f19 NP |
627 | unsigned long flags; |
628 | int sig; | |
92181f19 | 629 | |
2d4a7167 | 630 | /* Are we prepared to handle this kernel fault? */ |
92181f19 NP |
631 | if (fixup_exception(regs)) |
632 | return; | |
633 | ||
634 | /* | |
2d4a7167 IM |
635 | * 32-bit: |
636 | * | |
637 | * Valid to do another page fault here, because if this fault | |
638 | * had been triggered by is_prefetch fixup_exception would have | |
639 | * handled it. | |
640 | * | |
641 | * 64-bit: | |
92181f19 | 642 | * |
2d4a7167 | 643 | * Hall of shame of CPU/BIOS bugs. |
92181f19 NP |
644 | */ |
645 | if (is_prefetch(regs, error_code, address)) | |
646 | return; | |
647 | ||
648 | if (is_errata93(regs, address)) | |
649 | return; | |
650 | ||
651 | /* | |
652 | * Oops. The kernel tried to access some bad page. We'll have to | |
2d4a7167 | 653 | * terminate things with extreme prejudice: |
92181f19 | 654 | */ |
92181f19 | 655 | flags = oops_begin(); |
92181f19 NP |
656 | |
657 | show_fault_oops(regs, error_code, address); | |
658 | ||
2d4a7167 | 659 | stackend = end_of_stack(tsk); |
19803078 IM |
660 | if (*stackend != STACK_END_MAGIC) |
661 | printk(KERN_ALERT "Thread overran stack, or stack corrupted\n"); | |
662 | ||
1cc99544 IM |
663 | tsk->thread.cr2 = address; |
664 | tsk->thread.trap_no = 14; | |
665 | tsk->thread.error_code = error_code; | |
92181f19 | 666 | |
92181f19 NP |
667 | sig = SIGKILL; |
668 | if (__die("Oops", regs, error_code)) | |
669 | sig = 0; | |
2d4a7167 | 670 | |
92181f19 NP |
671 | /* Executive summary in case the body of the oops scrolled away */ |
672 | printk(KERN_EMERG "CR2: %016lx\n", address); | |
2d4a7167 | 673 | |
92181f19 | 674 | oops_end(flags, regs, sig); |
92181f19 NP |
675 | } |
676 | ||
2d4a7167 IM |
677 | /* |
678 | * Print out info about fatal segfaults, if the show_unhandled_signals | |
679 | * sysctl is set: | |
680 | */ | |
681 | static inline void | |
682 | show_signal_msg(struct pt_regs *regs, unsigned long error_code, | |
683 | unsigned long address, struct task_struct *tsk) | |
684 | { | |
685 | if (!unhandled_signal(tsk, SIGSEGV)) | |
686 | return; | |
687 | ||
688 | if (!printk_ratelimit()) | |
689 | return; | |
690 | ||
a1a08d1c | 691 | printk("%s%s[%d]: segfault at %lx ip %p sp %p error %lx", |
2d4a7167 IM |
692 | task_pid_nr(tsk) > 1 ? KERN_INFO : KERN_EMERG, |
693 | tsk->comm, task_pid_nr(tsk), address, | |
694 | (void *)regs->ip, (void *)regs->sp, error_code); | |
695 | ||
696 | print_vma_addr(KERN_CONT " in ", regs->ip); | |
697 | ||
698 | printk(KERN_CONT "\n"); | |
699 | } | |
700 | ||
701 | static void | |
702 | __bad_area_nosemaphore(struct pt_regs *regs, unsigned long error_code, | |
703 | unsigned long address, int si_code) | |
92181f19 NP |
704 | { |
705 | struct task_struct *tsk = current; | |
706 | ||
707 | /* User mode accesses just cause a SIGSEGV */ | |
708 | if (error_code & PF_USER) { | |
709 | /* | |
2d4a7167 | 710 | * It's possible to have interrupts off here: |
92181f19 NP |
711 | */ |
712 | local_irq_enable(); | |
713 | ||
714 | /* | |
715 | * Valid to do another page fault here because this one came | |
2d4a7167 | 716 | * from user space: |
92181f19 NP |
717 | */ |
718 | if (is_prefetch(regs, error_code, address)) | |
719 | return; | |
720 | ||
721 | if (is_errata100(regs, address)) | |
722 | return; | |
723 | ||
2d4a7167 IM |
724 | if (unlikely(show_unhandled_signals)) |
725 | show_signal_msg(regs, error_code, address, tsk); | |
726 | ||
727 | /* Kernel addresses are always protection faults: */ | |
728 | tsk->thread.cr2 = address; | |
729 | tsk->thread.error_code = error_code | (address >= TASK_SIZE); | |
730 | tsk->thread.trap_no = 14; | |
92181f19 | 731 | |
92181f19 | 732 | force_sig_info_fault(SIGSEGV, si_code, address, tsk); |
2d4a7167 | 733 | |
92181f19 NP |
734 | return; |
735 | } | |
736 | ||
737 | if (is_f00f_bug(regs, address)) | |
738 | return; | |
739 | ||
740 | no_context(regs, error_code, address); | |
741 | } | |
742 | ||
2d4a7167 IM |
743 | static noinline void |
744 | bad_area_nosemaphore(struct pt_regs *regs, unsigned long error_code, | |
745 | unsigned long address) | |
92181f19 NP |
746 | { |
747 | __bad_area_nosemaphore(regs, error_code, address, SEGV_MAPERR); | |
748 | } | |
749 | ||
2d4a7167 IM |
750 | static void |
751 | __bad_area(struct pt_regs *regs, unsigned long error_code, | |
752 | unsigned long address, int si_code) | |
92181f19 NP |
753 | { |
754 | struct mm_struct *mm = current->mm; | |
755 | ||
756 | /* | |
757 | * Something tried to access memory that isn't in our memory map.. | |
758 | * Fix it, but check if it's kernel or user first.. | |
759 | */ | |
760 | up_read(&mm->mmap_sem); | |
761 | ||
762 | __bad_area_nosemaphore(regs, error_code, address, si_code); | |
763 | } | |
764 | ||
2d4a7167 IM |
765 | static noinline void |
766 | bad_area(struct pt_regs *regs, unsigned long error_code, unsigned long address) | |
92181f19 NP |
767 | { |
768 | __bad_area(regs, error_code, address, SEGV_MAPERR); | |
769 | } | |
770 | ||
2d4a7167 IM |
771 | static noinline void |
772 | bad_area_access_error(struct pt_regs *regs, unsigned long error_code, | |
773 | unsigned long address) | |
92181f19 NP |
774 | { |
775 | __bad_area(regs, error_code, address, SEGV_ACCERR); | |
776 | } | |
777 | ||
778 | /* TODO: fixup for "mm-invoke-oom-killer-from-page-fault.patch" */ | |
2d4a7167 IM |
779 | static void |
780 | out_of_memory(struct pt_regs *regs, unsigned long error_code, | |
781 | unsigned long address) | |
92181f19 NP |
782 | { |
783 | /* | |
784 | * We ran out of memory, call the OOM killer, and return the userspace | |
2d4a7167 | 785 | * (which will retry the fault, or kill us if we got oom-killed): |
92181f19 NP |
786 | */ |
787 | up_read(¤t->mm->mmap_sem); | |
2d4a7167 | 788 | |
92181f19 NP |
789 | pagefault_out_of_memory(); |
790 | } | |
791 | ||
2d4a7167 IM |
792 | static void |
793 | do_sigbus(struct pt_regs *regs, unsigned long error_code, unsigned long address) | |
92181f19 NP |
794 | { |
795 | struct task_struct *tsk = current; | |
796 | struct mm_struct *mm = tsk->mm; | |
797 | ||
798 | up_read(&mm->mmap_sem); | |
799 | ||
2d4a7167 | 800 | /* Kernel mode? Handle exceptions or die: */ |
92181f19 NP |
801 | if (!(error_code & PF_USER)) |
802 | no_context(regs, error_code, address); | |
2d4a7167 | 803 | |
cd1b68f0 | 804 | /* User-space => ok to do another page fault: */ |
92181f19 NP |
805 | if (is_prefetch(regs, error_code, address)) |
806 | return; | |
2d4a7167 IM |
807 | |
808 | tsk->thread.cr2 = address; | |
809 | tsk->thread.error_code = error_code; | |
810 | tsk->thread.trap_no = 14; | |
811 | ||
92181f19 NP |
812 | force_sig_info_fault(SIGBUS, BUS_ADRERR, address, tsk); |
813 | } | |
814 | ||
2d4a7167 IM |
815 | static noinline void |
816 | mm_fault_error(struct pt_regs *regs, unsigned long error_code, | |
817 | unsigned long address, unsigned int fault) | |
92181f19 | 818 | { |
2d4a7167 | 819 | if (fault & VM_FAULT_OOM) { |
92181f19 | 820 | out_of_memory(regs, error_code, address); |
2d4a7167 IM |
821 | } else { |
822 | if (fault & VM_FAULT_SIGBUS) | |
823 | do_sigbus(regs, error_code, address); | |
824 | else | |
825 | BUG(); | |
826 | } | |
92181f19 NP |
827 | } |
828 | ||
d8b57bb7 TG |
829 | static int spurious_fault_check(unsigned long error_code, pte_t *pte) |
830 | { | |
831 | if ((error_code & PF_WRITE) && !pte_write(*pte)) | |
832 | return 0; | |
2d4a7167 | 833 | |
d8b57bb7 TG |
834 | if ((error_code & PF_INSTR) && !pte_exec(*pte)) |
835 | return 0; | |
836 | ||
837 | return 1; | |
838 | } | |
839 | ||
5b727a3b | 840 | /* |
2d4a7167 IM |
841 | * Handle a spurious fault caused by a stale TLB entry. |
842 | * | |
843 | * This allows us to lazily refresh the TLB when increasing the | |
844 | * permissions of a kernel page (RO -> RW or NX -> X). Doing it | |
845 | * eagerly is very expensive since that implies doing a full | |
846 | * cross-processor TLB flush, even if no stale TLB entries exist | |
847 | * on other processors. | |
848 | * | |
5b727a3b JF |
849 | * There are no security implications to leaving a stale TLB when |
850 | * increasing the permissions on a page. | |
851 | */ | |
2d4a7167 IM |
852 | static noinline int |
853 | spurious_fault(unsigned long error_code, unsigned long address) | |
5b727a3b JF |
854 | { |
855 | pgd_t *pgd; | |
856 | pud_t *pud; | |
857 | pmd_t *pmd; | |
858 | pte_t *pte; | |
3c3e5694 | 859 | int ret; |
5b727a3b JF |
860 | |
861 | /* Reserved-bit violation or user access to kernel space? */ | |
862 | if (error_code & (PF_USER | PF_RSVD)) | |
863 | return 0; | |
864 | ||
865 | pgd = init_mm.pgd + pgd_index(address); | |
866 | if (!pgd_present(*pgd)) | |
867 | return 0; | |
868 | ||
869 | pud = pud_offset(pgd, address); | |
870 | if (!pud_present(*pud)) | |
871 | return 0; | |
872 | ||
d8b57bb7 TG |
873 | if (pud_large(*pud)) |
874 | return spurious_fault_check(error_code, (pte_t *) pud); | |
875 | ||
5b727a3b JF |
876 | pmd = pmd_offset(pud, address); |
877 | if (!pmd_present(*pmd)) | |
878 | return 0; | |
879 | ||
d8b57bb7 TG |
880 | if (pmd_large(*pmd)) |
881 | return spurious_fault_check(error_code, (pte_t *) pmd); | |
882 | ||
5b727a3b JF |
883 | pte = pte_offset_kernel(pmd, address); |
884 | if (!pte_present(*pte)) | |
885 | return 0; | |
886 | ||
3c3e5694 SR |
887 | ret = spurious_fault_check(error_code, pte); |
888 | if (!ret) | |
889 | return 0; | |
890 | ||
891 | /* | |
2d4a7167 IM |
892 | * Make sure we have permissions in PMD. |
893 | * If not, then there's a bug in the page tables: | |
3c3e5694 SR |
894 | */ |
895 | ret = spurious_fault_check(error_code, (pte_t *) pmd); | |
896 | WARN_ONCE(!ret, "PMD has incorrect permission bits\n"); | |
2d4a7167 | 897 | |
3c3e5694 | 898 | return ret; |
5b727a3b JF |
899 | } |
900 | ||
abd4f750 | 901 | int show_unhandled_signals = 1; |
1da177e4 | 902 | |
2d4a7167 IM |
903 | static inline int |
904 | access_error(unsigned long error_code, int write, struct vm_area_struct *vma) | |
92181f19 NP |
905 | { |
906 | if (write) { | |
2d4a7167 | 907 | /* write, present and write, not present: */ |
92181f19 NP |
908 | if (unlikely(!(vma->vm_flags & VM_WRITE))) |
909 | return 1; | |
2d4a7167 | 910 | return 0; |
92181f19 NP |
911 | } |
912 | ||
2d4a7167 IM |
913 | /* read, present: */ |
914 | if (unlikely(error_code & PF_PROT)) | |
915 | return 1; | |
916 | ||
917 | /* read, not present: */ | |
918 | if (unlikely(!(vma->vm_flags & (VM_READ | VM_EXEC | VM_WRITE)))) | |
919 | return 1; | |
920 | ||
92181f19 NP |
921 | return 0; |
922 | } | |
923 | ||
0973a06c HS |
924 | static int fault_in_kernel_space(unsigned long address) |
925 | { | |
d9517346 | 926 | return address >= TASK_SIZE_MAX; |
0973a06c HS |
927 | } |
928 | ||
1da177e4 LT |
929 | /* |
930 | * This routine handles page faults. It determines the address, | |
931 | * and the problem, and then passes it off to one of the appropriate | |
932 | * routines. | |
1da177e4 | 933 | */ |
c3731c68 IM |
934 | dotraplinkage void __kprobes |
935 | do_page_fault(struct pt_regs *regs, unsigned long error_code) | |
1da177e4 | 936 | { |
2d4a7167 | 937 | struct vm_area_struct *vma; |
1da177e4 | 938 | struct task_struct *tsk; |
2d4a7167 | 939 | unsigned long address; |
1da177e4 | 940 | struct mm_struct *mm; |
92181f19 | 941 | int write; |
f8c2ee22 | 942 | int fault; |
1da177e4 | 943 | |
a9ba9a3b AV |
944 | tsk = current; |
945 | mm = tsk->mm; | |
2d4a7167 | 946 | |
2d4a7167 | 947 | /* Get the faulting address: */ |
f51c9452 | 948 | address = read_cr2(); |
1da177e4 | 949 | |
f8561296 VN |
950 | /* |
951 | * Detect and handle instructions that would cause a page fault for | |
952 | * both a tracked kernel page and a userspace page. | |
953 | */ | |
954 | if (kmemcheck_active(regs)) | |
955 | kmemcheck_hide(regs); | |
5dfaf90f | 956 | prefetchw(&mm->mmap_sem); |
f8561296 | 957 | |
0fd0e3da | 958 | if (unlikely(kmmio_fault(regs, address))) |
86069782 | 959 | return; |
1da177e4 LT |
960 | |
961 | /* | |
962 | * We fault-in kernel-space virtual memory on-demand. The | |
963 | * 'reference' page table is init_mm.pgd. | |
964 | * | |
965 | * NOTE! We MUST NOT take any locks for this case. We may | |
966 | * be in an interrupt or a critical region, and should | |
967 | * only copy the information from the master page table, | |
968 | * nothing more. | |
969 | * | |
970 | * This verifies that the fault happens in kernel space | |
971 | * (error_code & 4) == 0, and that the fault was not a | |
8b1bde93 | 972 | * protection error (error_code & 9) == 0. |
1da177e4 | 973 | */ |
0973a06c | 974 | if (unlikely(fault_in_kernel_space(address))) { |
f8561296 VN |
975 | if (!(error_code & (PF_RSVD | PF_USER | PF_PROT))) { |
976 | if (vmalloc_fault(address) >= 0) | |
977 | return; | |
978 | ||
979 | if (kmemcheck_fault(regs, address, error_code)) | |
980 | return; | |
981 | } | |
5b727a3b | 982 | |
2d4a7167 | 983 | /* Can handle a stale RO->RW TLB: */ |
92181f19 | 984 | if (spurious_fault(error_code, address)) |
5b727a3b JF |
985 | return; |
986 | ||
2d4a7167 | 987 | /* kprobes don't want to hook the spurious faults: */ |
9be260a6 MH |
988 | if (notify_page_fault(regs)) |
989 | return; | |
f8c2ee22 HH |
990 | /* |
991 | * Don't take the mm semaphore here. If we fixup a prefetch | |
2d4a7167 | 992 | * fault we could otherwise deadlock: |
f8c2ee22 | 993 | */ |
92181f19 | 994 | bad_area_nosemaphore(regs, error_code, address); |
2d4a7167 | 995 | |
92181f19 | 996 | return; |
f8c2ee22 HH |
997 | } |
998 | ||
2d4a7167 | 999 | /* kprobes don't want to hook the spurious faults: */ |
f8a6b2b9 | 1000 | if (unlikely(notify_page_fault(regs))) |
9be260a6 | 1001 | return; |
f8c2ee22 | 1002 | /* |
891cffbd LT |
1003 | * It's safe to allow irq's after cr2 has been saved and the |
1004 | * vmalloc fault has been handled. | |
1005 | * | |
1006 | * User-mode registers count as a user access even for any | |
2d4a7167 | 1007 | * potential system fault or CPU buglet: |
f8c2ee22 | 1008 | */ |
891cffbd LT |
1009 | if (user_mode_vm(regs)) { |
1010 | local_irq_enable(); | |
1011 | error_code |= PF_USER; | |
2d4a7167 IM |
1012 | } else { |
1013 | if (regs->flags & X86_EFLAGS_IF) | |
1014 | local_irq_enable(); | |
1015 | } | |
8c914cb7 | 1016 | |
66c58156 | 1017 | if (unlikely(error_code & PF_RSVD)) |
92181f19 | 1018 | pgtable_bad(regs, error_code, address); |
1da177e4 | 1019 | |
cdd6c482 | 1020 | perf_sw_event(PERF_COUNT_SW_PAGE_FAULTS, 1, 0, regs, address); |
7dd1fcc2 | 1021 | |
1da177e4 | 1022 | /* |
2d4a7167 IM |
1023 | * If we're in an interrupt, have no user context or are running |
1024 | * in an atomic region then we must not take the fault: | |
1da177e4 | 1025 | */ |
92181f19 NP |
1026 | if (unlikely(in_atomic() || !mm)) { |
1027 | bad_area_nosemaphore(regs, error_code, address); | |
1028 | return; | |
1029 | } | |
1da177e4 | 1030 | |
3a1dfe6e IM |
1031 | /* |
1032 | * When running in the kernel we expect faults to occur only to | |
2d4a7167 IM |
1033 | * addresses in user space. All other faults represent errors in |
1034 | * the kernel and should generate an OOPS. Unfortunately, in the | |
1035 | * case of an erroneous fault occurring in a code path which already | |
1036 | * holds mmap_sem we will deadlock attempting to validate the fault | |
1037 | * against the address space. Luckily the kernel only validly | |
1038 | * references user space from well defined areas of code, which are | |
1039 | * listed in the exceptions table. | |
1da177e4 LT |
1040 | * |
1041 | * As the vast majority of faults will be valid we will only perform | |
2d4a7167 IM |
1042 | * the source reference check when there is a possibility of a |
1043 | * deadlock. Attempt to lock the address space, if we cannot we then | |
1044 | * validate the source. If this is invalid we can skip the address | |
1045 | * space check, thus avoiding the deadlock: | |
1da177e4 | 1046 | */ |
92181f19 | 1047 | if (unlikely(!down_read_trylock(&mm->mmap_sem))) { |
66c58156 | 1048 | if ((error_code & PF_USER) == 0 && |
92181f19 NP |
1049 | !search_exception_tables(regs->ip)) { |
1050 | bad_area_nosemaphore(regs, error_code, address); | |
1051 | return; | |
1052 | } | |
1da177e4 | 1053 | down_read(&mm->mmap_sem); |
01006074 PZ |
1054 | } else { |
1055 | /* | |
2d4a7167 IM |
1056 | * The above down_read_trylock() might have succeeded in |
1057 | * which case we'll have missed the might_sleep() from | |
1058 | * down_read(): | |
01006074 PZ |
1059 | */ |
1060 | might_sleep(); | |
1da177e4 LT |
1061 | } |
1062 | ||
1063 | vma = find_vma(mm, address); | |
92181f19 NP |
1064 | if (unlikely(!vma)) { |
1065 | bad_area(regs, error_code, address); | |
1066 | return; | |
1067 | } | |
1068 | if (likely(vma->vm_start <= address)) | |
1da177e4 | 1069 | goto good_area; |
92181f19 NP |
1070 | if (unlikely(!(vma->vm_flags & VM_GROWSDOWN))) { |
1071 | bad_area(regs, error_code, address); | |
1072 | return; | |
1073 | } | |
33cb5243 | 1074 | if (error_code & PF_USER) { |
6f4d368e HH |
1075 | /* |
1076 | * Accessing the stack below %sp is always a bug. | |
1077 | * The large cushion allows instructions like enter | |
2d4a7167 | 1078 | * and pusha to work. ("enter $65535, $31" pushes |
6f4d368e | 1079 | * 32 pointers and then decrements %sp by 65535.) |
03fdc2c2 | 1080 | */ |
92181f19 NP |
1081 | if (unlikely(address + 65536 + 32 * sizeof(unsigned long) < regs->sp)) { |
1082 | bad_area(regs, error_code, address); | |
1083 | return; | |
1084 | } | |
1da177e4 | 1085 | } |
92181f19 NP |
1086 | if (unlikely(expand_stack(vma, address))) { |
1087 | bad_area(regs, error_code, address); | |
1088 | return; | |
1089 | } | |
1090 | ||
1091 | /* | |
1092 | * Ok, we have a good vm_area for this memory access, so | |
1093 | * we can handle it.. | |
1094 | */ | |
1da177e4 | 1095 | good_area: |
92181f19 | 1096 | write = error_code & PF_WRITE; |
2d4a7167 | 1097 | |
92181f19 NP |
1098 | if (unlikely(access_error(error_code, write, vma))) { |
1099 | bad_area_access_error(regs, error_code, address); | |
1100 | return; | |
1da177e4 LT |
1101 | } |
1102 | ||
1103 | /* | |
1104 | * If for any reason at all we couldn't handle the fault, | |
1105 | * make sure we exit gracefully rather than endlessly redo | |
2d4a7167 | 1106 | * the fault: |
1da177e4 | 1107 | */ |
d06063cc | 1108 | fault = handle_mm_fault(mm, vma, address, write ? FAULT_FLAG_WRITE : 0); |
2d4a7167 | 1109 | |
83c54070 | 1110 | if (unlikely(fault & VM_FAULT_ERROR)) { |
92181f19 NP |
1111 | mm_fault_error(regs, error_code, address, fault); |
1112 | return; | |
1da177e4 | 1113 | } |
2d4a7167 | 1114 | |
ac17dc8e | 1115 | if (fault & VM_FAULT_MAJOR) { |
83c54070 | 1116 | tsk->maj_flt++; |
cdd6c482 | 1117 | perf_sw_event(PERF_COUNT_SW_PAGE_FAULTS_MAJ, 1, 0, |
78f13e95 | 1118 | regs, address); |
ac17dc8e | 1119 | } else { |
83c54070 | 1120 | tsk->min_flt++; |
cdd6c482 | 1121 | perf_sw_event(PERF_COUNT_SW_PAGE_FAULTS_MIN, 1, 0, |
78f13e95 | 1122 | regs, address); |
ac17dc8e | 1123 | } |
d729ab35 | 1124 | |
8c938f9f IM |
1125 | check_v8086_mode(regs, address, tsk); |
1126 | ||
1da177e4 | 1127 | up_read(&mm->mmap_sem); |
1da177e4 | 1128 | } |