[linux-2.6-block.git] / arch / x86 / mm / extable.c

#include <linux/extable.h>
#include <linux/uaccess.h>
#include <linux/sched/debug.h>
#include <xen/xen.h>

#include <asm/fpu/internal.h>
#include <asm/traps.h>
#include <asm/kdebug.h>

typedef bool (*ex_handler_t)(const struct exception_table_entry *,
			    struct pt_regs *, int, unsigned long,
			    unsigned long);

static inline unsigned long
ex_fixup_addr(const struct exception_table_entry *x)
{
	return (unsigned long)&x->fixup + x->fixup;
}
static inline ex_handler_t
ex_fixup_handler(const struct exception_table_entry *x)
{
	return (ex_handler_t)((unsigned long)&x->handler + x->handler);
}

__visible bool ex_handler_default(const struct exception_table_entry *fixup,
				  struct pt_regs *regs, int trapnr,
				  unsigned long error_code,
				  unsigned long fault_addr)
{
	regs->ip = ex_fixup_addr(fixup);
	return true;
}
EXPORT_SYMBOL(ex_handler_default);

__visible bool ex_handler_fault(const struct exception_table_entry *fixup,
				struct pt_regs *regs, int trapnr,
				unsigned long error_code,
				unsigned long fault_addr)
{
	regs->ip = ex_fixup_addr(fixup);
	regs->ax = trapnr;
	return true;
}
EXPORT_SYMBOL_GPL(ex_handler_fault);

/*
 * Handler for UD0 exception following a failed test against the
 * result of a refcount inc/dec/add/sub.
 */
__visible bool ex_handler_refcount(const struct exception_table_entry *fixup,
				   struct pt_regs *regs, int trapnr,
				   unsigned long error_code,
				   unsigned long fault_addr)
{
	/* First unconditionally saturate the refcount. */
	*(int *)regs->cx = INT_MIN / 2;

	/*
	 * Strictly speaking, this reports the fixup destination, not
	 * the fault location, and not the actually overflowing
	 * instruction, which is the instruction before the "js", but
	 * since that instruction could be a variety of lengths, just
	 * report the location after the overflow, which should be close
	 * enough for finding the overflow, as it's at least back in
	 * the function, having returned from .text.unlikely.
	 */
	regs->ip = ex_fixup_addr(fixup);

	/*
	 * This function has been called because either a negative refcount
	 * value was seen by any of the refcount functions, or a zero
	 * refcount value was seen by refcount_dec().
	 *
	 * If we crossed from INT_MAX to INT_MIN, OF (Overflow Flag: result
	 * wrapped around) will be set. Additionally, seeing the refcount
	 * reach 0 will set ZF (Zero Flag: result was zero). In each of
	 * these cases we want a report, since it's a boundary condition.
	 * The SF case is not reported since it indicates post-boundary
	 * manipulations below zero or above INT_MAX. And if none of the
	 * flags are set, something has gone very wrong, so report it.
	 */
	if (regs->flags & (X86_EFLAGS_OF | X86_EFLAGS_ZF)) {
		bool zero = regs->flags & X86_EFLAGS_ZF;

		refcount_error_report(regs, zero ? "hit zero" : "overflow");
	} else if ((regs->flags & X86_EFLAGS_SF) == 0) {
		/* Report if none of OF, ZF, nor SF are set. */
		refcount_error_report(regs, "unexpected saturation");
	}

	return true;
}
EXPORT_SYMBOL(ex_handler_refcount);

/*
 * Handler for when we fail to restore a task's FPU state.  We should never get
 * here because the FPU state of a task using the FPU (task->thread.fpu.state)
 * should always be valid.  However, past bugs have allowed userspace to set
 * reserved bits in the XSAVE area using PTRACE_SETREGSET or sys_rt_sigreturn().
 * These caused XRSTOR to fail when switching to the task, leaking the FPU
 * registers of the task previously executing on the CPU.  Mitigate this class
 * of vulnerability by restoring from the initial state (essentially, zeroing
 * out all the FPU registers) if we can't restore from the task's FPU state.
 */
__visible bool ex_handler_fprestore(const struct exception_table_entry *fixup,
				    struct pt_regs *regs, int trapnr,
				    unsigned long error_code,
				    unsigned long fault_addr)
{
	regs->ip = ex_fixup_addr(fixup);

	WARN_ONCE(1, "Bad FPU state detected at %pB, reinitializing FPU registers.",
		  (void *)instruction_pointer(regs));

	__copy_kernel_to_fpregs(&init_fpstate, -1);
	return true;
}
EXPORT_SYMBOL_GPL(ex_handler_fprestore);

__visible bool ex_handler_uaccess(const struct exception_table_entry *fixup,
				  struct pt_regs *regs, int trapnr,
				  unsigned long error_code,
				  unsigned long fault_addr)
{
	regs->ip = ex_fixup_addr(fixup);
	return true;
}
EXPORT_SYMBOL(ex_handler_uaccess);

__visible bool ex_handler_ext(const struct exception_table_entry *fixup,
			      struct pt_regs *regs, int trapnr,
			      unsigned long error_code,
			      unsigned long fault_addr)
{
	/* Special hack for uaccess_err */
	current->thread.uaccess_err = 1;
	regs->ip = ex_fixup_addr(fixup);
	return true;
}
EXPORT_SYMBOL(ex_handler_ext);

__visible bool ex_handler_rdmsr_unsafe(const struct exception_table_entry *fixup,
				       struct pt_regs *regs, int trapnr,
				       unsigned long error_code,
				       unsigned long fault_addr)
{
	if (pr_warn_once("unchecked MSR access error: RDMSR from 0x%x at rIP: 0x%lx (%pF)\n",
			 (unsigned int)regs->cx, regs->ip, (void *)regs->ip))
		show_stack_regs(regs);

	/* Pretend that the read succeeded and returned 0. */
	regs->ip = ex_fixup_addr(fixup);
	regs->ax = 0;
	regs->dx = 0;
	return true;
}
EXPORT_SYMBOL(ex_handler_rdmsr_unsafe);

__visible bool ex_handler_wrmsr_unsafe(const struct exception_table_entry *fixup,
				       struct pt_regs *regs, int trapnr,
				       unsigned long error_code,
				       unsigned long fault_addr)
{
	if (pr_warn_once("unchecked MSR access error: WRMSR to 0x%x (tried to write 0x%08x%08x) at rIP: 0x%lx (%pF)\n",
			 (unsigned int)regs->cx, (unsigned int)regs->dx,
			 (unsigned int)regs->ax,  regs->ip, (void *)regs->ip))
		show_stack_regs(regs);

	/* Pretend that the write succeeded. */
	regs->ip = ex_fixup_addr(fixup);
	return true;
}
EXPORT_SYMBOL(ex_handler_wrmsr_unsafe);

__visible bool ex_handler_clear_fs(const struct exception_table_entry *fixup,
				   struct pt_regs *regs, int trapnr,
				   unsigned long error_code,
				   unsigned long fault_addr)
{
	if (static_cpu_has(X86_BUG_NULL_SEG))
		asm volatile ("mov %0, %%fs" : : "rm" (__USER_DS));
	asm volatile ("mov %0, %%fs" : : "rm" (0));
	return ex_handler_default(fixup, regs, trapnr, error_code, fault_addr);
}
EXPORT_SYMBOL(ex_handler_clear_fs);

__visible bool ex_has_fault_handler(unsigned long ip)
{
	const struct exception_table_entry *e;
	ex_handler_t handler;

	e = search_exception_tables(ip);
	if (!e)
		return false;
	handler = ex_fixup_handler(e);

	return handler == ex_handler_fault;
}

int fixup_exception(struct pt_regs *regs, int trapnr, unsigned long error_code,
		    unsigned long fault_addr)
{
	const struct exception_table_entry *e;
	ex_handler_t handler;

#ifdef CONFIG_PNPBIOS
	if (unlikely(SEGMENT_IS_PNP_CODE(regs->cs))) {
		extern u32 pnp_bios_fault_eip, pnp_bios_fault_esp;
		extern u32 pnp_bios_is_utter_crap;
		pnp_bios_is_utter_crap = 1;
		printk(KERN_CRIT "PNPBIOS fault.. attempting recovery.\n");
		__asm__ volatile(
			"movl %0, %%esp\n\t"
			"jmp *%1\n\t"
			: : "g" (pnp_bios_fault_esp), "g" (pnp_bios_fault_eip));
		panic("do_trap: can't hit this");
	}
#endif

	e = search_exception_tables(regs->ip);
	if (!e)
		return 0;

	handler = ex_fixup_handler(e);
	return handler(e, regs, trapnr, error_code, fault_addr);
}

extern unsigned int early_recursion_flag;

/* Restricted version used during very early boot */
void __init early_fixup_exception(struct pt_regs *regs, int trapnr)
{
	/* Ignore early NMIs. */
	if (trapnr == X86_TRAP_NMI)
		return;

	if (early_recursion_flag > 2)
		goto halt_loop;

	/*
	 * Old CPUs leave the high bits of CS on the stack
	 * undefined.  I'm not sure which CPUs do this, but at least
	 * the 486 DX works this way.
	 * Xen pv domains are not using the default __KERNEL_CS.
	 */
	if (!xen_pv_domain() && regs->cs != __KERNEL_CS)
		goto fail;

	/*
	 * The full exception fixup machinery is available as soon as
	 * the early IDT is loaded.  This means that it is the
	 * responsibility of extable users to either function correctly
	 * when handlers are invoked early or to simply avoid causing
	 * exceptions before they're ready to handle them.
	 *
	 * This is better than filtering which handlers can be used,
	 * because refusing to call a handler here is guaranteed to
	 * result in a hard-to-debug panic.
	 *
	 * Keep in mind that not all vectors actually get here.  Early
	 * page faults, for example, are special.
	 */
	if (fixup_exception(regs, trapnr, regs->orig_ax, 0))
		return;

	if (fixup_bug(regs, trapnr))
		return;

fail:
	early_printk("PANIC: early exception 0x%02x IP %lx:%lx error %lx cr2 0x%lx\n",
		     (unsigned)trapnr, (unsigned long)regs->cs, regs->ip,
		     regs->orig_ax, read_cr2());

	show_regs(regs);

halt_loop:
	while (true)
		halt();
}
Commit	Line	Data
744c193e	1	#include <linux/extable.h>
7c0f6ba6	2	#include <linux/uaccess.h>
b17b0153	3	#include <linux/sched/debug.h>
42b3a4cb	4	#include <xen/xen.h>
b17b0153	5
d5c8028b	6	#include <asm/fpu/internal.h>
0d0efc07	7	#include <asm/traps.h>
81c2949f	8	#include <asm/kdebug.h>
6d48583b	9
548acf19	10	typedef bool (ex_handler_t)(const struct exception_table_entry ,
81fd9c18 JH	11	struct pt_regs *, int, unsigned long,
81fd9c18 JH	12	unsigned long);
548acf19	13
70627654 PA	14	static inline unsigned long
	15	ex_fixup_addr(const struct exception_table_entry *x)
	16	{
	17	return (unsigned long)&x->fixup + x->fixup;
	18	}
548acf19 TL	19	static inline ex_handler_t
	20	ex_fixup_handler(const struct exception_table_entry *x)
	21	{
	22	return (ex_handler_t)((unsigned long)&x->handler + x->handler);
	23	}
6d48583b	24
80a3e394	25	__visible bool ex_handler_default(const struct exception_table_entry *fixup,
81fd9c18 JH	26	struct pt_regs *regs, int trapnr,
	27	unsigned long error_code,
	28	unsigned long fault_addr)
6d48583b	29	{
548acf19 TL	30	regs->ip = ex_fixup_addr(fixup);
	31	return true;
	32	}
	33	EXPORT_SYMBOL(ex_handler_default);
	34
80a3e394	35	__visible bool ex_handler_fault(const struct exception_table_entry *fixup,
81fd9c18 JH	36	struct pt_regs *regs, int trapnr,
	37	unsigned long error_code,
	38	unsigned long fault_addr)
548acf19 TL	39	{
	40	regs->ip = ex_fixup_addr(fixup);
	41	regs->ax = trapnr;
	42	return true;
	43	}
	44	EXPORT_SYMBOL_GPL(ex_handler_fault);
	45
7a46ec0e KC	46	/*
	47	* Handler for UD0 exception following a failed test against the
	48	* result of a refcount inc/dec/add/sub.
	49	*/
80a3e394	50	__visible bool ex_handler_refcount(const struct exception_table_entry *fixup,
81fd9c18 JH	51	struct pt_regs *regs, int trapnr,
	52	unsigned long error_code,
	53	unsigned long fault_addr)
7a46ec0e KC	54	{
	55	/* First unconditionally saturate the refcount. */
	56	(int )regs->cx = INT_MIN / 2;
	57
	58	/*
	59	* Strictly speaking, this reports the fixup destination, not
	60	* the fault location, and not the actually overflowing
	61	* instruction, which is the instruction before the "js", but
	62	* since that instruction could be a variety of lengths, just
	63	* report the location after the overflow, which should be close
	64	* enough for finding the overflow, as it's at least back in
	65	* the function, having returned from .text.unlikely.
	66	*/
	67	regs->ip = ex_fixup_addr(fixup);
	68
	69	/*
	70	* This function has been called because either a negative refcount
	71	* value was seen by any of the refcount functions, or a zero
	72	* refcount value was seen by refcount_dec().
	73	*
	74	* If we crossed from INT_MAX to INT_MIN, OF (Overflow Flag: result
	75	* wrapped around) will be set. Additionally, seeing the refcount
	76	* reach 0 will set ZF (Zero Flag: result was zero). In each of
	77	* these cases we want a report, since it's a boundary condition.
564c9cc8 KC	78	* The SF case is not reported since it indicates post-boundary
	79	* manipulations below zero or above INT_MAX. And if none of the
	80	* flags are set, something has gone very wrong, so report it.
7a46ec0e KC	81	*/
	82	if (regs->flags & (X86_EFLAGS_OF \| X86_EFLAGS_ZF)) {
	83	bool zero = regs->flags & X86_EFLAGS_ZF;
	84
	85	refcount_error_report(regs, zero ? "hit zero" : "overflow");
564c9cc8 KC	86	} else if ((regs->flags & X86_EFLAGS_SF) == 0) {
	87	/* Report if none of OF, ZF, nor SF are set. */
	88	refcount_error_report(regs, "unexpected saturation");
7a46ec0e KC	89	}
	90
	91	return true;
	92	}
b562c171	93	EXPORT_SYMBOL(ex_handler_refcount);
7a46ec0e	94
d5c8028b EB	95	/*
	96	* Handler for when we fail to restore a task's FPU state. We should never get
	97	* here because the FPU state of a task using the FPU (task->thread.fpu.state)
	98	* should always be valid. However, past bugs have allowed userspace to set
	99	* reserved bits in the XSAVE area using PTRACE_SETREGSET or sys_rt_sigreturn().
	100	* These caused XRSTOR to fail when switching to the task, leaking the FPU
	101	* registers of the task previously executing on the CPU. Mitigate this class
	102	* of vulnerability by restoring from the initial state (essentially, zeroing
	103	* out all the FPU registers) if we can't restore from the task's FPU state.
	104	*/
80a3e394	105	__visible bool ex_handler_fprestore(const struct exception_table_entry *fixup,
81fd9c18 JH	106	struct pt_regs *regs, int trapnr,
	107	unsigned long error_code,
	108	unsigned long fault_addr)
d5c8028b EB	109	{
	110	regs->ip = ex_fixup_addr(fixup);
	111
	112	WARN_ONCE(1, "Bad FPU state detected at %pB, reinitializing FPU registers.",
	113	(void *)instruction_pointer(regs));
	114
	115	__copy_kernel_to_fpregs(&init_fpstate, -1);
	116	return true;
	117	}
	118	EXPORT_SYMBOL_GPL(ex_handler_fprestore);
	119
75045f77	120	__visible bool ex_handler_uaccess(const struct exception_table_entry *fixup,
81fd9c18 JH	121	struct pt_regs *regs, int trapnr,
	122	unsigned long error_code,
	123	unsigned long fault_addr)
75045f77 JH	124	{
	125	regs->ip = ex_fixup_addr(fixup);
	126	return true;
	127	}
	128	EXPORT_SYMBOL(ex_handler_uaccess);
	129
80a3e394	130	__visible bool ex_handler_ext(const struct exception_table_entry *fixup,
81fd9c18 JH	131	struct pt_regs *regs, int trapnr,
	132	unsigned long error_code,
	133	unsigned long fault_addr)
548acf19 TL	134	{
548acf19 TL	135	/* Special hack for uaccess_err */
dfa9a942	136	current->thread.uaccess_err = 1;
548acf19 TL	137	regs->ip = ex_fixup_addr(fixup);
	138	return true;
	139	}
	140	EXPORT_SYMBOL(ex_handler_ext);
	141
80a3e394	142	__visible bool ex_handler_rdmsr_unsafe(const struct exception_table_entry *fixup,
81fd9c18 JH	143	struct pt_regs *regs, int trapnr,
	144	unsigned long error_code,
	145	unsigned long fault_addr)
fbd70437	146	{
81c2949f BP	147	if (pr_warn_once("unchecked MSR access error: RDMSR from 0x%x at rIP: 0x%lx (%pF)\n",
	148	(unsigned int)regs->cx, regs->ip, (void *)regs->ip))
	149	show_stack_regs(regs);
fbd70437 AL	150
	151	/* Pretend that the read succeeded and returned 0. */
	152	regs->ip = ex_fixup_addr(fixup);
	153	regs->ax = 0;
	154	regs->dx = 0;
	155	return true;
	156	}
	157	EXPORT_SYMBOL(ex_handler_rdmsr_unsafe);
	158
80a3e394	159	__visible bool ex_handler_wrmsr_unsafe(const struct exception_table_entry *fixup,
81fd9c18 JH	160	struct pt_regs *regs, int trapnr,
	161	unsigned long error_code,
	162	unsigned long fault_addr)
fbd70437	163	{
81c2949f BP	164	if (pr_warn_once("unchecked MSR access error: WRMSR to 0x%x (tried to write 0x%08x%08x) at rIP: 0x%lx (%pF)\n",
	165	(unsigned int)regs->cx, (unsigned int)regs->dx,
	166	(unsigned int)regs->ax, regs->ip, (void *)regs->ip))
	167	show_stack_regs(regs);
fbd70437 AL	168
	169	/* Pretend that the write succeeded. */
	170	regs->ip = ex_fixup_addr(fixup);
	171	return true;
	172	}
	173	EXPORT_SYMBOL(ex_handler_wrmsr_unsafe);
	174
80a3e394	175	__visible bool ex_handler_clear_fs(const struct exception_table_entry *fixup,
81fd9c18 JH	176	struct pt_regs *regs, int trapnr,
	177	unsigned long error_code,
	178	unsigned long fault_addr)
45e876f7 AL	179	{
	180	if (static_cpu_has(X86_BUG_NULL_SEG))
	181	asm volatile ("mov %0, %%fs" : : "rm" (__USER_DS));
	182	asm volatile ("mov %0, %%fs" : : "rm" (0));
81fd9c18	183	return ex_handler_default(fixup, regs, trapnr, error_code, fault_addr);
45e876f7 AL	184	}
	185	EXPORT_SYMBOL(ex_handler_clear_fs);
	186
80a3e394	187	__visible bool ex_has_fault_handler(unsigned long ip)
548acf19 TL	188	{
	189	const struct exception_table_entry *e;
	190	ex_handler_t handler;
	191
	192	e = search_exception_tables(ip);
	193	if (!e)
	194	return false;
	195	handler = ex_fixup_handler(e);
	196
	197	return handler == ex_handler_fault;
	198	}
	199
81fd9c18 JH	200	int fixup_exception(struct pt_regs *regs, int trapnr, unsigned long error_code,
81fd9c18 JH	201	unsigned long fault_addr)
548acf19 TL	202	{
	203	const struct exception_table_entry *e;
	204	ex_handler_t handler;
6d48583b HH	205
	206	#ifdef CONFIG_PNPBIOS
	207	if (unlikely(SEGMENT_IS_PNP_CODE(regs->cs))) {
	208	extern u32 pnp_bios_fault_eip, pnp_bios_fault_esp;
	209	extern u32 pnp_bios_is_utter_crap;
	210	pnp_bios_is_utter_crap = 1;
	211	printk(KERN_CRIT "PNPBIOS fault.. attempting recovery.\n");
	212	__asm__ volatile(
	213	"movl %0, %%esp\n\t"
	214	"jmp *%1\n\t"
	215	: : "g" (pnp_bios_fault_esp), "g" (pnp_bios_fault_eip));
	216	panic("do_trap: can't hit this");
	217	}
	218	#endif
	219
548acf19 TL	220	e = search_exception_tables(regs->ip);
	221	if (!e)
	222	return 0;
6d48583b	223
548acf19	224	handler = ex_fixup_handler(e);
81fd9c18	225	return handler(e, regs, trapnr, error_code, fault_addr);
6d48583b	226	}
6a1ea279	227
0e861fbb AL	228	extern unsigned int early_recursion_flag;
0e861fbb AL	229
6a1ea279	230	/* Restricted version used during very early boot */
0e861fbb	231	void __init early_fixup_exception(struct pt_regs *regs, int trapnr)
6a1ea279	232	{
0d0efc07 AL	233	/* Ignore early NMIs. */
0d0efc07 AL	234	if (trapnr == X86_TRAP_NMI)
0e861fbb AL	235	return;
	236
	237	if (early_recursion_flag > 2)
	238	goto halt_loop;
	239
fc0e81b2 AL	240	/*
	241	* Old CPUs leave the high bits of CS on the stack
	242	* undefined. I'm not sure which CPUs do this, but at least
	243	* the 486 DX works this way.
42b3a4cb	244	* Xen pv domains are not using the default __KERNEL_CS.
fc0e81b2	245	*/
42b3a4cb	246	if (!xen_pv_domain() && regs->cs != __KERNEL_CS)
0e861fbb	247	goto fail;
0d0efc07	248
60a0e203 AL	249	/*
	250	* The full exception fixup machinery is available as soon as
	251	* the early IDT is loaded. This means that it is the
	252	* responsibility of extable users to either function correctly
	253	* when handlers are invoked early or to simply avoid causing
	254	* exceptions before they're ready to handle them.
	255	*
	256	* This is better than filtering which handlers can be used,
	257	* because refusing to call a handler here is guaranteed to
	258	* result in a hard-to-debug panic.
	259	*
	260	* Keep in mind that not all vectors actually get here. Early
81fd9c18	261	* page faults, for example, are special.
60a0e203	262	*/
81fd9c18	263	if (fixup_exception(regs, trapnr, regs->orig_ax, 0))
ae7ef45e	264	return;
0e861fbb	265
8a524f80 PZ	266	if (fixup_bug(regs, trapnr))
	267	return;
	268
0e861fbb AL	269	fail:
	270	early_printk("PANIC: early exception 0x%02x IP %lx:%lx error %lx cr2 0x%lx\n",
	271	(unsigned)trapnr, (unsigned long)regs->cs, regs->ip,
	272	regs->orig_ax, read_cr2());
	273
	274	show_regs(regs);
	275
	276	halt_loop:
	277	while (true)
	278	halt();
6a1ea279	279	}