Commit | Line | Data |
---|---|---|
b2441318 | 1 | // SPDX-License-Identifier: GPL-2.0 |
3aa88cdf | 2 | /* |
eec1d4fa | 3 | * AMD NUMA support. |
1da177e4 | 4 | * Discover the memory map and associated nodes. |
3aa88cdf | 5 | * |
eec1d4fa | 6 | * This version reads it directly from the AMD northbridge. |
3aa88cdf | 7 | * |
1da177e4 LT |
8 | * Copyright 2002,2003 Andi Kleen, SuSE Labs. |
9 | */ | |
10 | #include <linux/kernel.h> | |
11 | #include <linux/init.h> | |
12 | #include <linux/string.h> | |
1da177e4 | 13 | #include <linux/nodemask.h> |
a9ce6bc1 YL |
14 | #include <linux/memblock.h> |
15 | ||
1da177e4 LT |
16 | #include <asm/io.h> |
17 | #include <linux/pci_ids.h> | |
cbf9bd60 | 18 | #include <linux/acpi.h> |
1da177e4 LT |
19 | #include <asm/types.h> |
20 | #include <asm/mmzone.h> | |
21 | #include <asm/proto.h> | |
66441bd3 | 22 | #include <asm/e820/api.h> |
1da177e4 LT |
23 | #include <asm/pci-direct.h> |
24 | #include <asm/numa.h> | |
cbf9bd60 YL |
25 | #include <asm/mpspec.h> |
26 | #include <asm/apic.h> | |
23ac4ae8 | 27 | #include <asm/amd_nb.h> |
1da177e4 | 28 | |
f51bf307 | 29 | static unsigned char __initdata nodeids[8]; |
8ee2debc | 30 | |
1da177e4 LT |
31 | static __init int find_northbridge(void) |
32 | { | |
3aa88cdf | 33 | int num; |
1da177e4 | 34 | |
3aa88cdf | 35 | for (num = 0; num < 32; num++) { |
1da177e4 | 36 | u32 header; |
3aa88cdf CM |
37 | |
38 | header = read_pci_config(0, num, 0, 0x00); | |
bb4a1d64 JD |
39 | if (header != (PCI_VENDOR_ID_AMD | (0x1100<<16)) && |
40 | header != (PCI_VENDOR_ID_AMD | (0x1200<<16)) && | |
41 | header != (PCI_VENDOR_ID_AMD | (0x1300<<16))) | |
3aa88cdf | 42 | continue; |
1da177e4 | 43 | |
3aa88cdf | 44 | header = read_pci_config(0, num, 1, 0x00); |
bb4a1d64 JD |
45 | if (header != (PCI_VENDOR_ID_AMD | (0x1101<<16)) && |
46 | header != (PCI_VENDOR_ID_AMD | (0x1201<<16)) && | |
47 | header != (PCI_VENDOR_ID_AMD | (0x1301<<16))) | |
3aa88cdf CM |
48 | continue; |
49 | return num; | |
50 | } | |
1da177e4 | 51 | |
940fed2e | 52 | return -ENOENT; |
1da177e4 LT |
53 | } |
54 | ||
940fed2e | 55 | int __init amd_numa_init(void) |
8ee2debc | 56 | { |
2706a0bf TH |
57 | u64 start = PFN_PHYS(0); |
58 | u64 end = PFN_PHYS(max_pfn); | |
8ee2debc | 59 | unsigned numnodes; |
2706a0bf | 60 | u64 prevbase; |
45fe6c78 | 61 | int i, j, nb; |
d34c0895 | 62 | u32 nodeid, reg; |
45fe6c78 | 63 | unsigned int bits, cores, apicid_base; |
1da177e4 | 64 | |
0637a70a | 65 | if (!early_pci_allowed()) |
940fed2e | 66 | return -EINVAL; |
0637a70a | 67 | |
3aa88cdf CM |
68 | nb = find_northbridge(); |
69 | if (nb < 0) | |
1da177e4 LT |
70 | return nb; |
71 | ||
1af5ba51 | 72 | pr_info("Scanning NUMA topology in Northbridge %d\n", nb); |
1da177e4 | 73 | |
3aa88cdf | 74 | reg = read_pci_config(0, nb, 0, 0x60); |
1da177e4 | 75 | numnodes = ((reg >> 4) & 0xF) + 1; |
3bea9c97 | 76 | if (numnodes <= 1) |
940fed2e | 77 | return -ENOENT; |
1da177e4 | 78 | |
8ee2debc | 79 | pr_info("Number of physical nodes %d\n", numnodes); |
1da177e4 | 80 | |
1da177e4 | 81 | prevbase = 0; |
3aa88cdf | 82 | for (i = 0; i < 8; i++) { |
2706a0bf | 83 | u64 base, limit; |
3aa88cdf | 84 | |
1da177e4 LT |
85 | base = read_pci_config(0, nb, 1, 0x40 + i*8); |
86 | limit = read_pci_config(0, nb, 1, 0x44 + i*8); | |
87 | ||
f51bf307 | 88 | nodeids[i] = nodeid = limit & 7; |
3aa88cdf | 89 | if ((base & 3) == 0) { |
1da177e4 | 90 | if (i < numnodes) |
1af5ba51 | 91 | pr_info("Skipping disabled node %d\n", i); |
1da177e4 | 92 | continue; |
3aa88cdf | 93 | } |
1da177e4 | 94 | if (nodeid >= numnodes) { |
2706a0bf | 95 | pr_info("Ignoring excess node %d (%Lx:%Lx)\n", nodeid, |
1af5ba51 | 96 | base, limit); |
1da177e4 | 97 | continue; |
3aa88cdf | 98 | } |
1da177e4 | 99 | |
3aa88cdf | 100 | if (!limit) { |
2706a0bf | 101 | pr_info("Skipping node entry %d (base %Lx)\n", |
1af5ba51 | 102 | i, base); |
1da177e4 LT |
103 | continue; |
104 | } | |
105 | if ((base >> 8) & 3 || (limit >> 8) & 3) { | |
2706a0bf | 106 | pr_err("Node %d using interleaving mode %Lx/%Lx\n", |
1af5ba51 | 107 | nodeid, (base >> 8) & 3, (limit >> 8) & 3); |
940fed2e | 108 | return -EINVAL; |
3aa88cdf | 109 | } |
4697bdcc | 110 | if (node_isset(nodeid, numa_nodes_parsed)) { |
1af5ba51 DR |
111 | pr_info("Node %d already present, skipping\n", |
112 | nodeid); | |
1da177e4 LT |
113 | continue; |
114 | } | |
115 | ||
3aa88cdf | 116 | limit >>= 16; |
ffd10a2b | 117 | limit++; |
7e9a2f0a | 118 | limit <<= 24; |
1da177e4 | 119 | |
8ee2debc DR |
120 | if (limit > end) |
121 | limit = end; | |
1da177e4 | 122 | if (limit <= base) |
3aa88cdf CM |
123 | continue; |
124 | ||
1da177e4 | 125 | base >>= 16; |
3aa88cdf CM |
126 | base <<= 24; |
127 | ||
128 | if (base < start) | |
129 | base = start; | |
130 | if (limit > end) | |
131 | limit = end; | |
132 | if (limit == base) { | |
1af5ba51 | 133 | pr_err("Empty node %d\n", nodeid); |
3aa88cdf | 134 | continue; |
1da177e4 | 135 | } |
3aa88cdf | 136 | if (limit < base) { |
2706a0bf | 137 | pr_err("Node %d bogus settings %Lx-%Lx.\n", |
3aa88cdf | 138 | nodeid, base, limit); |
1da177e4 | 139 | continue; |
3aa88cdf CM |
140 | } |
141 | ||
1da177e4 | 142 | /* Could sort here, but pun for now. Should not happen anyroads. */ |
3aa88cdf | 143 | if (prevbase > base) { |
2706a0bf | 144 | pr_err("Node map not sorted %Lx,%Lx\n", |
3aa88cdf | 145 | prevbase, base); |
940fed2e | 146 | return -EINVAL; |
1da177e4 | 147 | } |
3aa88cdf | 148 | |
2706a0bf | 149 | pr_info("Node %d MemBase %016Lx Limit %016Lx\n", |
1af5ba51 | 150 | nodeid, base, limit); |
3aa88cdf | 151 | |
1da177e4 | 152 | prevbase = base; |
91556237 | 153 | numa_add_memblk(nodeid, base, limit); |
92d4a437 | 154 | node_set(nodeid, numa_nodes_parsed); |
3aa88cdf | 155 | } |
1da177e4 | 156 | |
c2a911d3 | 157 | if (nodes_empty(numa_nodes_parsed)) |
940fed2e | 158 | return -ENOENT; |
45fe6c78 TH |
159 | |
160 | /* | |
161 | * We seem to have valid NUMA configuration. Map apicids to nodes | |
162 | * using the coreid bits from early_identify_cpu. | |
163 | */ | |
164 | bits = boot_cpu_data.x86_coreid_bits; | |
165 | cores = 1 << bits; | |
166 | apicid_base = 0; | |
167 | ||
a91bf718 BH |
168 | /* |
169 | * get boot-time SMP configuration: | |
170 | */ | |
171 | early_get_smp_config(); | |
172 | ||
45fe6c78 TH |
173 | if (boot_cpu_physical_apicid > 0) { |
174 | pr_info("BSP APIC ID: %02x\n", boot_cpu_physical_apicid); | |
175 | apicid_base = boot_cpu_physical_apicid; | |
176 | } | |
177 | ||
92d4a437 | 178 | for_each_node_mask(i, numa_nodes_parsed) |
45fe6c78 TH |
179 | for (j = apicid_base; j < cores + apicid_base; j++) |
180 | set_apicid_to_node((i << bits) + j, i); | |
181 | ||
8ee2debc DR |
182 | return 0; |
183 | } |