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KVM: emulate access to MSR_IA32_MCG_CTL
[linux-2.6-block.git] / arch / x86 / kvm / x86.c
CommitLineData
043405e1
CO		 1/*
2 * Kernel-based Virtual Machine driver for Linux
3 *
4 * derived from drivers/kvm/kvm_main.c
5 *
6 * Copyright (C) 2006 Qumranet, Inc.
7 *
8 * Authors:
9 * Avi Kivity <avi@qumranet.com>
10 * Yaniv Kamay <yaniv@qumranet.com>
11 *
12 * This work is licensed under the terms of the GNU GPL, version 2. See
13 * the COPYING file in the top-level directory.
14 *
15 */
16
edf88417 17#include <linux/kvm_host.h>
5fb76f9b 18#include "segment_descriptor.h"
313a3dc7 19#include "irq.h"
1d737c8a 20#include "mmu.h"
313a3dc7
CO		 21
22#include <linux/kvm.h>
23#include <linux/fs.h>
24#include <linux/vmalloc.h>
5fb76f9b 25#include <linux/module.h>
0de10343 26#include <linux/mman.h>
2bacc55c 27#include <linux/highmem.h>
043405e1
CO		 28
29#include <asm/uaccess.h>
d825ed0a 30#include <asm/msr.h>
043405e1 31
313a3dc7 32#define MAX_IO_MSRS 256
a03490ed
CO		 33#define CR0_RESERVED_BITS \
34 (~(unsigned long)(X86_CR0_PE | X86_CR0_MP | X86_CR0_EM | X86_CR0_TS \
35 | X86_CR0_ET | X86_CR0_NE | X86_CR0_WP | X86_CR0_AM \
36 | X86_CR0_NW | X86_CR0_CD | X86_CR0_PG))
37#define CR4_RESERVED_BITS \
38 (~(unsigned long)(X86_CR4_VME | X86_CR4_PVI | X86_CR4_TSD | X86_CR4_DE\
39 | X86_CR4_PSE | X86_CR4_PAE | X86_CR4_MCE \
40 | X86_CR4_PGE | X86_CR4_PCE | X86_CR4_OSFXSR \
41 | X86_CR4_OSXMMEXCPT | X86_CR4_VMXE))
42
43#define CR8_RESERVED_BITS (~(unsigned long)X86_CR8_TPR)
15c4a640 44#define EFER_RESERVED_BITS 0xfffffffffffff2fe
313a3dc7 45
ba1389b7
AK		 46#define VM_STAT(x) offsetof(struct kvm, stat.x), KVM_STAT_VM
47#define VCPU_STAT(x) offsetof(struct kvm_vcpu, stat.x), KVM_STAT_VCPU
417bc304 48
674eea0f
AK		 49static int kvm_dev_ioctl_get_supported_cpuid(struct kvm_cpuid2 *cpuid,
50 struct kvm_cpuid_entry2 __user *entries);
51
97896d04
ZX		 52struct kvm_x86_ops *kvm_x86_ops;
53
417bc304 54struct kvm_stats_debugfs_item debugfs_entries[] = {
ba1389b7
AK		 55 { "pf_fixed", VCPU_STAT(pf_fixed) },
56 { "pf_guest", VCPU_STAT(pf_guest) },
57 { "tlb_flush", VCPU_STAT(tlb_flush) },
58 { "invlpg", VCPU_STAT(invlpg) },
59 { "exits", VCPU_STAT(exits) },
60 { "io_exits", VCPU_STAT(io_exits) },
61 { "mmio_exits", VCPU_STAT(mmio_exits) },
62 { "signal_exits", VCPU_STAT(signal_exits) },
63 { "irq_window", VCPU_STAT(irq_window_exits) },
64 { "halt_exits", VCPU_STAT(halt_exits) },
65 { "halt_wakeup", VCPU_STAT(halt_wakeup) },
66 { "request_irq", VCPU_STAT(request_irq_exits) },
67 { "irq_exits", VCPU_STAT(irq_exits) },
68 { "host_state_reload", VCPU_STAT(host_state_reload) },
69 { "efer_reload", VCPU_STAT(efer_reload) },
70 { "fpu_reload", VCPU_STAT(fpu_reload) },
71 { "insn_emulation", VCPU_STAT(insn_emulation) },
72 { "insn_emulation_fail", VCPU_STAT(insn_emulation_fail) },
4cee5764
AK		 73 { "mmu_shadow_zapped", VM_STAT(mmu_shadow_zapped) },
74 { "mmu_pte_write", VM_STAT(mmu_pte_write) },
75 { "mmu_pte_updated", VM_STAT(mmu_pte_updated) },
76 { "mmu_pde_zapped", VM_STAT(mmu_pde_zapped) },
77 { "mmu_flooded", VM_STAT(mmu_flooded) },
78 { "mmu_recycled", VM_STAT(mmu_recycled) },
dfc5aa00 79 { "mmu_cache_miss", VM_STAT(mmu_cache_miss) },
0f74a24c 80 { "remote_tlb_flush", VM_STAT(remote_tlb_flush) },
417bc304
HB		 81 { NULL }
82};
83
84
5fb76f9b
CO		 85unsigned long segment_base(u16 selector)
86{
87 struct descriptor_table gdt;
88 struct segment_descriptor *d;
89 unsigned long table_base;
90 unsigned long v;
91
92 if (selector == 0)
93 return 0;
94
95 asm("sgdt %0" : "=m"(gdt));
96 table_base = gdt.base;
97
98 if (selector & 4) { /* from ldt */
99 u16 ldt_selector;
100
101 asm("sldt %0" : "=g"(ldt_selector));
102 table_base = segment_base(ldt_selector);
103 }
104 d = (struct segment_descriptor *)(table_base + (selector & ~7));
105 v = d->base_low | ((unsigned long)d->base_mid << 16) |
106 ((unsigned long)d->base_high << 24);
107#ifdef CONFIG_X86_64
108 if (d->system == 0 && (d->type == 2 || d->type == 9 || d->type == 11))
109 v |= ((unsigned long) \
110 ((struct segment_descriptor_64 *)d)->base_higher) << 32;
111#endif
112 return v;
113}
114EXPORT_SYMBOL_GPL(segment_base);
115
6866b83e
CO		 116u64 kvm_get_apic_base(struct kvm_vcpu *vcpu)
117{
118 if (irqchip_in_kernel(vcpu->kvm))
ad312c7c 119 return vcpu->arch.apic_base;
6866b83e 120 else
ad312c7c 121 return vcpu->arch.apic_base;
6866b83e
CO		 122}
123EXPORT_SYMBOL_GPL(kvm_get_apic_base);
124
125void kvm_set_apic_base(struct kvm_vcpu *vcpu, u64 data)
126{
127 /* TODO: reserve bits check */
128 if (irqchip_in_kernel(vcpu->kvm))
129 kvm_lapic_set_base(vcpu, data);
130 else
ad312c7c 131 vcpu->arch.apic_base = data;
6866b83e
CO		 132}
133EXPORT_SYMBOL_GPL(kvm_set_apic_base);
134
298101da
AK		 135void kvm_queue_exception(struct kvm_vcpu *vcpu, unsigned nr)
136{
ad312c7c
ZX		 137 WARN_ON(vcpu->arch.exception.pending);
138 vcpu->arch.exception.pending = true;
139 vcpu->arch.exception.has_error_code = false;
140 vcpu->arch.exception.nr = nr;
298101da
AK		 141}
142EXPORT_SYMBOL_GPL(kvm_queue_exception);
143
c3c91fee
AK		 144void kvm_inject_page_fault(struct kvm_vcpu *vcpu, unsigned long addr,
145 u32 error_code)
146{
147 ++vcpu->stat.pf_guest;
ad312c7c 148 if (vcpu->arch.exception.pending && vcpu->arch.exception.nr == PF_VECTOR) {
c3c91fee
AK		 149 printk(KERN_DEBUG "kvm: inject_page_fault:"
150 " double fault 0x%lx\n", addr);
ad312c7c
ZX		 151 vcpu->arch.exception.nr = DF_VECTOR;
152 vcpu->arch.exception.error_code = 0;
c3c91fee
AK		 153 return;
154 }
ad312c7c 155 vcpu->arch.cr2 = addr;
c3c91fee
AK		 156 kvm_queue_exception_e(vcpu, PF_VECTOR, error_code);
157}
158
298101da
AK		 159void kvm_queue_exception_e(struct kvm_vcpu *vcpu, unsigned nr, u32 error_code)
160{
ad312c7c
ZX		 161 WARN_ON(vcpu->arch.exception.pending);
162 vcpu->arch.exception.pending = true;
163 vcpu->arch.exception.has_error_code = true;
164 vcpu->arch.exception.nr = nr;
165 vcpu->arch.exception.error_code = error_code;
298101da
AK		 166}
167EXPORT_SYMBOL_GPL(kvm_queue_exception_e);
168
169static void __queue_exception(struct kvm_vcpu *vcpu)
170{
ad312c7c
ZX		 171 kvm_x86_ops->queue_exception(vcpu, vcpu->arch.exception.nr,
172 vcpu->arch.exception.has_error_code,
173 vcpu->arch.exception.error_code);
298101da
AK		 174}
175
a03490ed
CO		 176/*
177 * Load the pae pdptrs. Return true is they are all valid.
178 */
179int load_pdptrs(struct kvm_vcpu *vcpu, unsigned long cr3)
180{
181 gfn_t pdpt_gfn = cr3 >> PAGE_SHIFT;
182 unsigned offset = ((cr3 & (PAGE_SIZE-1)) >> 5) << 2;
183 int i;
184 int ret;
ad312c7c 185 u64 pdpte[ARRAY_SIZE(vcpu->arch.pdptrs)];
a03490ed 186
10589a46 187 down_read(&current->mm->mmap_sem);
a03490ed
CO		 188 ret = kvm_read_guest_page(vcpu->kvm, pdpt_gfn, pdpte,
189 offset * sizeof(u64), sizeof(pdpte));
190 if (ret < 0) {
191 ret = 0;
192 goto out;
193 }
194 for (i = 0; i < ARRAY_SIZE(pdpte); ++i) {
195 if ((pdpte[i] & 1) && (pdpte[i] & 0xfffffff0000001e6ull)) {
196 ret = 0;
197 goto out;
198 }
199 }
200 ret = 1;
201
ad312c7c 202 memcpy(vcpu->arch.pdptrs, pdpte, sizeof(vcpu->arch.pdptrs));
a03490ed 203out:
10589a46 204 up_read(&current->mm->mmap_sem);
a03490ed
CO		 205
206 return ret;
207}
208
d835dfec
AK		 209static bool pdptrs_changed(struct kvm_vcpu *vcpu)
210{
ad312c7c 211 u64 pdpte[ARRAY_SIZE(vcpu->arch.pdptrs)];
d835dfec
AK		 212 bool changed = true;
213 int r;
214
215 if (is_long_mode(vcpu) || !is_pae(vcpu))
216 return false;
217
10589a46 218 down_read(&current->mm->mmap_sem);
ad312c7c 219 r = kvm_read_guest(vcpu->kvm, vcpu->arch.cr3 & ~31u, pdpte, sizeof(pdpte));
d835dfec
AK		 220 if (r < 0)
221 goto out;
ad312c7c 222 changed = memcmp(pdpte, vcpu->arch.pdptrs, sizeof(pdpte)) != 0;
d835dfec 223out:
10589a46 224 up_read(&current->mm->mmap_sem);
d835dfec
AK		 225
226 return changed;
227}
228
a03490ed
CO		 229void set_cr0(struct kvm_vcpu *vcpu, unsigned long cr0)
230{
231 if (cr0 & CR0_RESERVED_BITS) {
232 printk(KERN_DEBUG "set_cr0: 0x%lx #GP, reserved bits 0x%lx\n",
ad312c7c 233 cr0, vcpu->arch.cr0);
c1a5d4f9 234 kvm_inject_gp(vcpu, 0);
a03490ed
CO		 235 return;
236 }
237
238 if ((cr0 & X86_CR0_NW) && !(cr0 & X86_CR0_CD)) {
239 printk(KERN_DEBUG "set_cr0: #GP, CD == 0 && NW == 1\n");
c1a5d4f9 240 kvm_inject_gp(vcpu, 0);
a03490ed
CO		 241 return;
242 }
243
244 if ((cr0 & X86_CR0_PG) && !(cr0 & X86_CR0_PE)) {
245 printk(KERN_DEBUG "set_cr0: #GP, set PG flag "
246 "and a clear PE flag\n");
c1a5d4f9 247 kvm_inject_gp(vcpu, 0);
a03490ed
CO		 248 return;
249 }
250
251 if (!is_paging(vcpu) && (cr0 & X86_CR0_PG)) {
252#ifdef CONFIG_X86_64
ad312c7c 253 if ((vcpu->arch.shadow_efer & EFER_LME)) {
a03490ed
CO		 254 int cs_db, cs_l;
255
256 if (!is_pae(vcpu)) {
257 printk(KERN_DEBUG "set_cr0: #GP, start paging "
258 "in long mode while PAE is disabled\n");
c1a5d4f9 259 kvm_inject_gp(vcpu, 0);
a03490ed
CO		 260 return;
261 }
262 kvm_x86_ops->get_cs_db_l_bits(vcpu, &cs_db, &cs_l);
263 if (cs_l) {
264 printk(KERN_DEBUG "set_cr0: #GP, start paging "
265 "in long mode while CS.L == 1\n");
c1a5d4f9 266 kvm_inject_gp(vcpu, 0);
a03490ed
CO		 267 return;
268
269 }
270 } else
271#endif
ad312c7c 272 if (is_pae(vcpu) && !load_pdptrs(vcpu, vcpu->arch.cr3)) {
a03490ed
CO		 273 printk(KERN_DEBUG "set_cr0: #GP, pdptrs "
274 "reserved bits\n");
c1a5d4f9 275 kvm_inject_gp(vcpu, 0);
a03490ed
CO		 276 return;
277 }
278
279 }
280
281 kvm_x86_ops->set_cr0(vcpu, cr0);
ad312c7c 282 vcpu->arch.cr0 = cr0;
a03490ed 283
a03490ed 284 kvm_mmu_reset_context(vcpu);
a03490ed
CO		 285 return;
286}
287EXPORT_SYMBOL_GPL(set_cr0);
288
289void lmsw(struct kvm_vcpu *vcpu, unsigned long msw)
290{
ad312c7c 291 set_cr0(vcpu, (vcpu->arch.cr0 & ~0x0ful) | (msw & 0x0f));
a03490ed
CO		 292}
293EXPORT_SYMBOL_GPL(lmsw);
294
295void set_cr4(struct kvm_vcpu *vcpu, unsigned long cr4)
296{
297 if (cr4 & CR4_RESERVED_BITS) {
298 printk(KERN_DEBUG "set_cr4: #GP, reserved bits\n");
c1a5d4f9 299 kvm_inject_gp(vcpu, 0);
a03490ed
CO		 300 return;
301 }
302
303 if (is_long_mode(vcpu)) {
304 if (!(cr4 & X86_CR4_PAE)) {
305 printk(KERN_DEBUG "set_cr4: #GP, clearing PAE while "
306 "in long mode\n");
c1a5d4f9 307 kvm_inject_gp(vcpu, 0);
a03490ed
CO		 308 return;
309 }
310 } else if (is_paging(vcpu) && !is_pae(vcpu) && (cr4 & X86_CR4_PAE)
ad312c7c 311 && !load_pdptrs(vcpu, vcpu->arch.cr3)) {
a03490ed 312 printk(KERN_DEBUG "set_cr4: #GP, pdptrs reserved bits\n");
c1a5d4f9 313 kvm_inject_gp(vcpu, 0);
a03490ed
CO		 314 return;
315 }
316
317 if (cr4 & X86_CR4_VMXE) {
318 printk(KERN_DEBUG "set_cr4: #GP, setting VMXE\n");
c1a5d4f9 319 kvm_inject_gp(vcpu, 0);
a03490ed
CO		 320 return;
321 }
322 kvm_x86_ops->set_cr4(vcpu, cr4);
ad312c7c 323 vcpu->arch.cr4 = cr4;
a03490ed 324 kvm_mmu_reset_context(vcpu);
a03490ed
CO		 325}
326EXPORT_SYMBOL_GPL(set_cr4);
327
328void set_cr3(struct kvm_vcpu *vcpu, unsigned long cr3)
329{
ad312c7c 330 if (cr3 == vcpu->arch.cr3 && !pdptrs_changed(vcpu)) {
d835dfec
AK		 331 kvm_mmu_flush_tlb(vcpu);
332 return;
333 }
334
a03490ed
CO		 335 if (is_long_mode(vcpu)) {
336 if (cr3 & CR3_L_MODE_RESERVED_BITS) {
337 printk(KERN_DEBUG "set_cr3: #GP, reserved bits\n");
c1a5d4f9 338 kvm_inject_gp(vcpu, 0);
a03490ed
CO		 339 return;
340 }
341 } else {
342 if (is_pae(vcpu)) {
343 if (cr3 & CR3_PAE_RESERVED_BITS) {
344 printk(KERN_DEBUG
345 "set_cr3: #GP, reserved bits\n");
c1a5d4f9 346 kvm_inject_gp(vcpu, 0);
a03490ed
CO		 347 return;
348 }
349 if (is_paging(vcpu) && !load_pdptrs(vcpu, cr3)) {
350 printk(KERN_DEBUG "set_cr3: #GP, pdptrs "
351 "reserved bits\n");
c1a5d4f9 352 kvm_inject_gp(vcpu, 0);
a03490ed
CO		 353 return;
354 }
355 }
356 /*
357 * We don't check reserved bits in nonpae mode, because
358 * this isn't enforced, and VMware depends on this.
359 */
360 }
361
10589a46 362 down_read(&current->mm->mmap_sem);
a03490ed
CO		 363 /*
364 * Does the new cr3 value map to physical memory? (Note, we
365 * catch an invalid cr3 even in real-mode, because it would
366 * cause trouble later on when we turn on paging anyway.)
367 *
368 * A real CPU would silently accept an invalid cr3 and would
369 * attempt to use it - with largely undefined (and often hard
370 * to debug) behavior on the guest side.
371 */
372 if (unlikely(!gfn_to_memslot(vcpu->kvm, cr3 >> PAGE_SHIFT)))
c1a5d4f9 373 kvm_inject_gp(vcpu, 0);
a03490ed 374 else {
ad312c7c
ZX		 375 vcpu->arch.cr3 = cr3;
376 vcpu->arch.mmu.new_cr3(vcpu);
a03490ed 377 }
10589a46 378 up_read(&current->mm->mmap_sem);
a03490ed
CO		 379}
380EXPORT_SYMBOL_GPL(set_cr3);
381
382void set_cr8(struct kvm_vcpu *vcpu, unsigned long cr8)
383{
384 if (cr8 & CR8_RESERVED_BITS) {
385 printk(KERN_DEBUG "set_cr8: #GP, reserved bits 0x%lx\n", cr8);
c1a5d4f9 386 kvm_inject_gp(vcpu, 0);
a03490ed
CO		 387 return;
388 }
389 if (irqchip_in_kernel(vcpu->kvm))
390 kvm_lapic_set_tpr(vcpu, cr8);
391 else
ad312c7c 392 vcpu->arch.cr8 = cr8;
a03490ed
CO		 393}
394EXPORT_SYMBOL_GPL(set_cr8);
395
396unsigned long get_cr8(struct kvm_vcpu *vcpu)
397{
398 if (irqchip_in_kernel(vcpu->kvm))
399 return kvm_lapic_get_cr8(vcpu);
400 else
ad312c7c 401 return vcpu->arch.cr8;
a03490ed
CO		 402}
403EXPORT_SYMBOL_GPL(get_cr8);
404
043405e1
CO		 405/*
406 * List of msr numbers which we expose to userspace through KVM_GET_MSRS
407 * and KVM_SET_MSRS, and KVM_GET_MSR_INDEX_LIST.
408 *
409 * This list is modified at module load time to reflect the
410 * capabilities of the host cpu.
411 */
412static u32 msrs_to_save[] = {
413 MSR_IA32_SYSENTER_CS, MSR_IA32_SYSENTER_ESP, MSR_IA32_SYSENTER_EIP,
414 MSR_K6_STAR,
415#ifdef CONFIG_X86_64
416 MSR_CSTAR, MSR_KERNEL_GS_BASE, MSR_SYSCALL_MASK, MSR_LSTAR,
417#endif
418 MSR_IA32_TIME_STAMP_COUNTER,
419};
420
421static unsigned num_msrs_to_save;
422
423static u32 emulated_msrs[] = {
424 MSR_IA32_MISC_ENABLE,
425};
426
15c4a640
CO		 427#ifdef CONFIG_X86_64
428
429static void set_efer(struct kvm_vcpu *vcpu, u64 efer)
430{
431 if (efer & EFER_RESERVED_BITS) {
432 printk(KERN_DEBUG "set_efer: 0x%llx #GP, reserved bits\n",
433 efer);
c1a5d4f9 434 kvm_inject_gp(vcpu, 0);
15c4a640
CO		 435 return;
436 }
437
438 if (is_paging(vcpu)
ad312c7c 439 && (vcpu->arch.shadow_efer & EFER_LME) != (efer & EFER_LME)) {
15c4a640 440 printk(KERN_DEBUG "set_efer: #GP, change LME while paging\n");
c1a5d4f9 441 kvm_inject_gp(vcpu, 0);
15c4a640
CO		 442 return;
443 }
444
445 kvm_x86_ops->set_efer(vcpu, efer);
446
447 efer &= ~EFER_LMA;
ad312c7c 448 efer |= vcpu->arch.shadow_efer & EFER_LMA;
15c4a640 449
ad312c7c 450 vcpu->arch.shadow_efer = efer;
15c4a640
CO		 451}
452
453#endif
454
455/*
456 * Writes msr value into into the appropriate "register".
457 * Returns 0 on success, non-0 otherwise.
458 * Assumes vcpu_load() was already called.
459 */
460int kvm_set_msr(struct kvm_vcpu *vcpu, u32 msr_index, u64 data)
461{
462 return kvm_x86_ops->set_msr(vcpu, msr_index, data);
463}
464
313a3dc7
CO		 465/*
466 * Adapt set_msr() to msr_io()'s calling convention
467 */
468static int do_set_msr(struct kvm_vcpu *vcpu, unsigned index, u64 *data)
469{
470 return kvm_set_msr(vcpu, index, *data);
471}
472
15c4a640
CO		 473
474int kvm_set_msr_common(struct kvm_vcpu *vcpu, u32 msr, u64 data)
475{
476 switch (msr) {
477#ifdef CONFIG_X86_64
478 case MSR_EFER:
479 set_efer(vcpu, data);
480 break;
481#endif
482 case MSR_IA32_MC0_STATUS:
483 pr_unimpl(vcpu, "%s: MSR_IA32_MC0_STATUS 0x%llx, nop\n",
484 __FUNCTION__, data);
485 break;
486 case MSR_IA32_MCG_STATUS:
487 pr_unimpl(vcpu, "%s: MSR_IA32_MCG_STATUS 0x%llx, nop\n",
488 __FUNCTION__, data);
489 break;
c7ac679c
JR		 490 case MSR_IA32_MCG_CTL:
491 pr_unimpl(vcpu, "%s: MSR_IA32_MCG_CTL 0x%llx, nop\n",
492 __FUNCTION__, data);
493 break;
15c4a640
CO		 494 case MSR_IA32_UCODE_REV:
495 case MSR_IA32_UCODE_WRITE:
496 case 0x200 ... 0x2ff: /* MTRRs */
497 break;
498 case MSR_IA32_APICBASE:
499 kvm_set_apic_base(vcpu, data);
500 break;
501 case MSR_IA32_MISC_ENABLE:
ad312c7c 502 vcpu->arch.ia32_misc_enable_msr = data;
15c4a640
CO		 503 break;
504 default:
565f1fbd 505 pr_unimpl(vcpu, "unhandled wrmsr: 0x%x data %llx\n", msr, data);
15c4a640
CO		 506 return 1;
507 }
508 return 0;
509}
510EXPORT_SYMBOL_GPL(kvm_set_msr_common);
511
512
513/*
514 * Reads an msr value (of 'msr_index') into 'pdata'.
515 * Returns 0 on success, non-0 otherwise.
516 * Assumes vcpu_load() was already called.
517 */
518int kvm_get_msr(struct kvm_vcpu *vcpu, u32 msr_index, u64 *pdata)
519{
520 return kvm_x86_ops->get_msr(vcpu, msr_index, pdata);
521}
522
523int kvm_get_msr_common(struct kvm_vcpu *vcpu, u32 msr, u64 *pdata)
524{
525 u64 data;
526
527 switch (msr) {
528 case 0xc0010010: /* SYSCFG */
529 case 0xc0010015: /* HWCR */
530 case MSR_IA32_PLATFORM_ID:
531 case MSR_IA32_P5_MC_ADDR:
532 case MSR_IA32_P5_MC_TYPE:
533 case MSR_IA32_MC0_CTL:
534 case MSR_IA32_MCG_STATUS:
535 case MSR_IA32_MCG_CAP:
c7ac679c 536 case MSR_IA32_MCG_CTL:
15c4a640
CO		 537 case MSR_IA32_MC0_MISC:
538 case MSR_IA32_MC0_MISC+4:
539 case MSR_IA32_MC0_MISC+8:
540 case MSR_IA32_MC0_MISC+12:
541 case MSR_IA32_MC0_MISC+16:
542 case MSR_IA32_UCODE_REV:
543 case MSR_IA32_PERF_STATUS:
544 case MSR_IA32_EBL_CR_POWERON:
545 /* MTRR registers */
546 case 0xfe:
547 case 0x200 ... 0x2ff:
548 data = 0;
549 break;
550 case 0xcd: /* fsb frequency */
551 data = 3;
552 break;
553 case MSR_IA32_APICBASE:
554 data = kvm_get_apic_base(vcpu);
555 break;
556 case MSR_IA32_MISC_ENABLE:
ad312c7c 557 data = vcpu->arch.ia32_misc_enable_msr;
15c4a640
CO		 558 break;
559#ifdef CONFIG_X86_64
560 case MSR_EFER:
ad312c7c 561 data = vcpu->arch.shadow_efer;
15c4a640
CO		 562 break;
563#endif
564 default:
565 pr_unimpl(vcpu, "unhandled rdmsr: 0x%x\n", msr);
566 return 1;
567 }
568 *pdata = data;
569 return 0;
570}
571EXPORT_SYMBOL_GPL(kvm_get_msr_common);
572
313a3dc7
CO		 573/*
574 * Read or write a bunch of msrs. All parameters are kernel addresses.
575 *
576 * @return number of msrs set successfully.
577 */
578static int __msr_io(struct kvm_vcpu *vcpu, struct kvm_msrs *msrs,
579 struct kvm_msr_entry *entries,
580 int (*do_msr)(struct kvm_vcpu *vcpu,
581 unsigned index, u64 *data))
582{
583 int i;
584
585 vcpu_load(vcpu);
586
587 for (i = 0; i < msrs->nmsrs; ++i)
588 if (do_msr(vcpu, entries[i].index, &entries[i].data))
589 break;
590
591 vcpu_put(vcpu);
592
593 return i;
594}
595
596/*
597 * Read or write a bunch of msrs. Parameters are user addresses.
598 *
599 * @return number of msrs set successfully.
600 */
601static int msr_io(struct kvm_vcpu *vcpu, struct kvm_msrs __user *user_msrs,
602 int (*do_msr)(struct kvm_vcpu *vcpu,
603 unsigned index, u64 *data),
604 int writeback)
605{
606 struct kvm_msrs msrs;
607 struct kvm_msr_entry *entries;
608 int r, n;
609 unsigned size;
610
611 r = -EFAULT;
612 if (copy_from_user(&msrs, user_msrs, sizeof msrs))
613 goto out;
614
615 r = -E2BIG;
616 if (msrs.nmsrs >= MAX_IO_MSRS)
617 goto out;
618
619 r = -ENOMEM;
620 size = sizeof(struct kvm_msr_entry) * msrs.nmsrs;
621 entries = vmalloc(size);
622 if (!entries)
623 goto out;
624
625 r = -EFAULT;
626 if (copy_from_user(entries, user_msrs->entries, size))
627 goto out_free;
628
629 r = n = __msr_io(vcpu, &msrs, entries, do_msr);
630 if (r < 0)
631 goto out_free;
632
633 r = -EFAULT;
634 if (writeback && copy_to_user(user_msrs->entries, entries, size))
635 goto out_free;
636
637 r = n;
638
639out_free:
640 vfree(entries);
641out:
642 return r;
643}
644
e9b11c17
ZX		 645/*
646 * Make sure that a cpu that is being hot-unplugged does not have any vcpus
647 * cached on it.
648 */
649void decache_vcpus_on_cpu(int cpu)
650{
651 struct kvm *vm;
652 struct kvm_vcpu *vcpu;
653 int i;
654
655 spin_lock(&kvm_lock);
656 list_for_each_entry(vm, &vm_list, vm_list)
657 for (i = 0; i < KVM_MAX_VCPUS; ++i) {
658 vcpu = vm->vcpus[i];
659 if (!vcpu)
660 continue;
661 /*
662 * If the vcpu is locked, then it is running on some
663 * other cpu and therefore it is not cached on the
664 * cpu in question.
665 *
666 * If it's not locked, check the last cpu it executed
667 * on.
668 */
669 if (mutex_trylock(&vcpu->mutex)) {
670 if (vcpu->cpu == cpu) {
671 kvm_x86_ops->vcpu_decache(vcpu);
672 vcpu->cpu = -1;
673 }
674 mutex_unlock(&vcpu->mutex);
675 }
676 }
677 spin_unlock(&kvm_lock);
678}
679
018d00d2
ZX		 680int kvm_dev_ioctl_check_extension(long ext)
681{
682 int r;
683
684 switch (ext) {
685 case KVM_CAP_IRQCHIP:
686 case KVM_CAP_HLT:
687 case KVM_CAP_MMU_SHADOW_CACHE_CONTROL:
688 case KVM_CAP_USER_MEMORY:
689 case KVM_CAP_SET_TSS_ADDR:
07716717 690 case KVM_CAP_EXT_CPUID:
018d00d2
ZX		 691 r = 1;
692 break;
774ead3a
AK		 693 case KVM_CAP_VAPIC:
694 r = !kvm_x86_ops->cpu_has_accelerated_tpr();
695 break;
018d00d2
ZX		 696 default:
697 r = 0;
698 break;
699 }
700 return r;
701
702}
703
043405e1
CO		 704long kvm_arch_dev_ioctl(struct file *filp,
705 unsigned int ioctl, unsigned long arg)
706{
707 void __user *argp = (void __user *)arg;
708 long r;
709
710 switch (ioctl) {
711 case KVM_GET_MSR_INDEX_LIST: {
712 struct kvm_msr_list __user *user_msr_list = argp;
713 struct kvm_msr_list msr_list;
714 unsigned n;
715
716 r = -EFAULT;
717 if (copy_from_user(&msr_list, user_msr_list, sizeof msr_list))
718 goto out;
719 n = msr_list.nmsrs;
720 msr_list.nmsrs = num_msrs_to_save + ARRAY_SIZE(emulated_msrs);
721 if (copy_to_user(user_msr_list, &msr_list, sizeof msr_list))
722 goto out;
723 r = -E2BIG;
724 if (n < num_msrs_to_save)
725 goto out;
726 r = -EFAULT;
727 if (copy_to_user(user_msr_list->indices, &msrs_to_save,
728 num_msrs_to_save * sizeof(u32)))
729 goto out;
730 if (copy_to_user(user_msr_list->indices
731 + num_msrs_to_save * sizeof(u32),
732 &emulated_msrs,
733 ARRAY_SIZE(emulated_msrs) * sizeof(u32)))
734 goto out;
735 r = 0;
736 break;
737 }
674eea0f
AK		 738 case KVM_GET_SUPPORTED_CPUID: {
739 struct kvm_cpuid2 __user *cpuid_arg = argp;
740 struct kvm_cpuid2 cpuid;
741
742 r = -EFAULT;
743 if (copy_from_user(&cpuid, cpuid_arg, sizeof cpuid))
744 goto out;
745 r = kvm_dev_ioctl_get_supported_cpuid(&cpuid,
746 cpuid_arg->entries);
747 if (r)
748 goto out;
749
750 r = -EFAULT;
751 if (copy_to_user(cpuid_arg, &cpuid, sizeof cpuid))
752 goto out;
753 r = 0;
754 break;
755 }
043405e1
CO		 756 default:
757 r = -EINVAL;
758 }
759out:
760 return r;
761}
762
313a3dc7
CO		 763void kvm_arch_vcpu_load(struct kvm_vcpu *vcpu, int cpu)
764{
765 kvm_x86_ops->vcpu_load(vcpu, cpu);
766}
767
768void kvm_arch_vcpu_put(struct kvm_vcpu *vcpu)
769{
770 kvm_x86_ops->vcpu_put(vcpu);
9327fd11 771 kvm_put_guest_fpu(vcpu);
313a3dc7
CO		 772}
773
07716717 774static int is_efer_nx(void)
313a3dc7
CO		 775{
776 u64 efer;
313a3dc7
CO		 777
778 rdmsrl(MSR_EFER, efer);
07716717
DK		 779 return efer & EFER_NX;
780}
781
782static void cpuid_fix_nx_cap(struct kvm_vcpu *vcpu)
783{
784 int i;
785 struct kvm_cpuid_entry2 *e, *entry;
786
313a3dc7 787 entry = NULL;
ad312c7c
ZX		 788 for (i = 0; i < vcpu->arch.cpuid_nent; ++i) {
789 e = &vcpu->arch.cpuid_entries[i];
313a3dc7
CO		 790 if (e->function == 0x80000001) {
791 entry = e;
792 break;
793 }
794 }
07716717 795 if (entry && (entry->edx & (1 << 20)) && !is_efer_nx()) {
313a3dc7
CO		 796 entry->edx &= ~(1 << 20);
797 printk(KERN_INFO "kvm: guest NX capability removed\n");
798 }
799}
800
07716717 801/* when an old userspace process fills a new kernel module */
313a3dc7
CO		 802static int kvm_vcpu_ioctl_set_cpuid(struct kvm_vcpu *vcpu,
803 struct kvm_cpuid *cpuid,
804 struct kvm_cpuid_entry __user *entries)
07716717
DK		 805{
806 int r, i;
807 struct kvm_cpuid_entry *cpuid_entries;
808
809 r = -E2BIG;
810 if (cpuid->nent > KVM_MAX_CPUID_ENTRIES)
811 goto out;
812 r = -ENOMEM;
813 cpuid_entries = vmalloc(sizeof(struct kvm_cpuid_entry) * cpuid->nent);
814 if (!cpuid_entries)
815 goto out;
816 r = -EFAULT;
817 if (copy_from_user(cpuid_entries, entries,
818 cpuid->nent * sizeof(struct kvm_cpuid_entry)))
819 goto out_free;
820 for (i = 0; i < cpuid->nent; i++) {
ad312c7c
ZX		 821 vcpu->arch.cpuid_entries[i].function = cpuid_entries[i].function;
822 vcpu->arch.cpuid_entries[i].eax = cpuid_entries[i].eax;
823 vcpu->arch.cpuid_entries[i].ebx = cpuid_entries[i].ebx;
824 vcpu->arch.cpuid_entries[i].ecx = cpuid_entries[i].ecx;
825 vcpu->arch.cpuid_entries[i].edx = cpuid_entries[i].edx;
826 vcpu->arch.cpuid_entries[i].index = 0;
827 vcpu->arch.cpuid_entries[i].flags = 0;
828 vcpu->arch.cpuid_entries[i].padding[0] = 0;
829 vcpu->arch.cpuid_entries[i].padding[1] = 0;
830 vcpu->arch.cpuid_entries[i].padding[2] = 0;
831 }
832 vcpu->arch.cpuid_nent = cpuid->nent;
07716717
DK		 833 cpuid_fix_nx_cap(vcpu);
834 r = 0;
835
836out_free:
837 vfree(cpuid_entries);
838out:
839 return r;
840}
841
842static int kvm_vcpu_ioctl_set_cpuid2(struct kvm_vcpu *vcpu,
843 struct kvm_cpuid2 *cpuid,
844 struct kvm_cpuid_entry2 __user *entries)
313a3dc7
CO		 845{
846 int r;
847
848 r = -E2BIG;
849 if (cpuid->nent > KVM_MAX_CPUID_ENTRIES)
850 goto out;
851 r = -EFAULT;
ad312c7c 852 if (copy_from_user(&vcpu->arch.cpuid_entries, entries,
07716717 853 cpuid->nent * sizeof(struct kvm_cpuid_entry2)))
313a3dc7 854 goto out;
ad312c7c 855 vcpu->arch.cpuid_nent = cpuid->nent;
313a3dc7
CO		 856 return 0;
857
858out:
859 return r;
860}
861
07716717
DK		 862static int kvm_vcpu_ioctl_get_cpuid2(struct kvm_vcpu *vcpu,
863 struct kvm_cpuid2 *cpuid,
864 struct kvm_cpuid_entry2 __user *entries)
865{
866 int r;
867
868 r = -E2BIG;
ad312c7c 869 if (cpuid->nent < vcpu->arch.cpuid_nent)
07716717
DK		 870 goto out;
871 r = -EFAULT;
ad312c7c
ZX		 872 if (copy_to_user(entries, &vcpu->arch.cpuid_entries,
873 vcpu->arch.cpuid_nent * sizeof(struct kvm_cpuid_entry2)))
07716717
DK		 874 goto out;
875 return 0;
876
877out:
ad312c7c 878 cpuid->nent = vcpu->arch.cpuid_nent;
07716717
DK		 879 return r;
880}
881
882static inline u32 bit(int bitno)
883{
884 return 1 << (bitno & 31);
885}
886
887static void do_cpuid_1_ent(struct kvm_cpuid_entry2 *entry, u32 function,
888 u32 index)
889{
890 entry->function = function;
891 entry->index = index;
892 cpuid_count(entry->function, entry->index,
893 &entry->eax, &entry->ebx, &entry->ecx, &entry->edx);
894 entry->flags = 0;
895}
896
897static void do_cpuid_ent(struct kvm_cpuid_entry2 *entry, u32 function,
898 u32 index, int *nent, int maxnent)
899{
900 const u32 kvm_supported_word0_x86_features = bit(X86_FEATURE_FPU) |
901 bit(X86_FEATURE_VME) | bit(X86_FEATURE_DE) |
902 bit(X86_FEATURE_PSE) | bit(X86_FEATURE_TSC) |
903 bit(X86_FEATURE_MSR) | bit(X86_FEATURE_PAE) |
904 bit(X86_FEATURE_CX8) | bit(X86_FEATURE_APIC) |
905 bit(X86_FEATURE_SEP) | bit(X86_FEATURE_PGE) |
906 bit(X86_FEATURE_CMOV) | bit(X86_FEATURE_PSE36) |
907 bit(X86_FEATURE_CLFLSH) | bit(X86_FEATURE_MMX) |
908 bit(X86_FEATURE_FXSR) | bit(X86_FEATURE_XMM) |
909 bit(X86_FEATURE_XMM2) | bit(X86_FEATURE_SELFSNOOP);
910 const u32 kvm_supported_word1_x86_features = bit(X86_FEATURE_FPU) |
911 bit(X86_FEATURE_VME) | bit(X86_FEATURE_DE) |
912 bit(X86_FEATURE_PSE) | bit(X86_FEATURE_TSC) |
913 bit(X86_FEATURE_MSR) | bit(X86_FEATURE_PAE) |
914 bit(X86_FEATURE_CX8) | bit(X86_FEATURE_APIC) |
915 bit(X86_FEATURE_PGE) |
916 bit(X86_FEATURE_CMOV) | bit(X86_FEATURE_PSE36) |
917 bit(X86_FEATURE_MMX) | bit(X86_FEATURE_FXSR) |
918 bit(X86_FEATURE_SYSCALL) |
919 (bit(X86_FEATURE_NX) && is_efer_nx()) |
920#ifdef CONFIG_X86_64
921 bit(X86_FEATURE_LM) |
922#endif
923 bit(X86_FEATURE_MMXEXT) |
924 bit(X86_FEATURE_3DNOWEXT) |
925 bit(X86_FEATURE_3DNOW);
926 const u32 kvm_supported_word3_x86_features =
927 bit(X86_FEATURE_XMM3) | bit(X86_FEATURE_CX16);
928 const u32 kvm_supported_word6_x86_features =
929 bit(X86_FEATURE_LAHF_LM) | bit(X86_FEATURE_CMP_LEGACY);
930
931 /* all func 2 cpuid_count() should be called on the same cpu */
932 get_cpu();
933 do_cpuid_1_ent(entry, function, index);
934 ++*nent;
935
936 switch (function) {
937 case 0:
938 entry->eax = min(entry->eax, (u32)0xb);
939 break;
940 case 1:
941 entry->edx &= kvm_supported_word0_x86_features;
942 entry->ecx &= kvm_supported_word3_x86_features;
943 break;
944 /* function 2 entries are STATEFUL. That is, repeated cpuid commands
945 * may return different values. This forces us to get_cpu() before
946 * issuing the first command, and also to emulate this annoying behavior
947 * in kvm_emulate_cpuid() using KVM_CPUID_FLAG_STATE_READ_NEXT */
948 case 2: {
949 int t, times = entry->eax & 0xff;
950
951 entry->flags |= KVM_CPUID_FLAG_STATEFUL_FUNC;
952 for (t = 1; t < times && *nent < maxnent; ++t) {
953 do_cpuid_1_ent(&entry[t], function, 0);
954 entry[t].flags |= KVM_CPUID_FLAG_STATEFUL_FUNC;
955 ++*nent;
956 }
957 break;
958 }
959 /* function 4 and 0xb have additional index. */
960 case 4: {
961 int index, cache_type;
962
963 entry->flags |= KVM_CPUID_FLAG_SIGNIFCANT_INDEX;
964 /* read more entries until cache_type is zero */
965 for (index = 1; *nent < maxnent; ++index) {
966 cache_type = entry[index - 1].eax & 0x1f;
967 if (!cache_type)
968 break;
969 do_cpuid_1_ent(&entry[index], function, index);
970 entry[index].flags |=
971 KVM_CPUID_FLAG_SIGNIFCANT_INDEX;
972 ++*nent;
973 }
974 break;
975 }
976 case 0xb: {
977 int index, level_type;
978
979 entry->flags |= KVM_CPUID_FLAG_SIGNIFCANT_INDEX;
980 /* read more entries until level_type is zero */
981 for (index = 1; *nent < maxnent; ++index) {
982 level_type = entry[index - 1].ecx & 0xff;
983 if (!level_type)
984 break;
985 do_cpuid_1_ent(&entry[index], function, index);
986 entry[index].flags |=
987 KVM_CPUID_FLAG_SIGNIFCANT_INDEX;
988 ++*nent;
989 }
990 break;
991 }
992 case 0x80000000:
993 entry->eax = min(entry->eax, 0x8000001a);
994 break;
995 case 0x80000001:
996 entry->edx &= kvm_supported_word1_x86_features;
997 entry->ecx &= kvm_supported_word6_x86_features;
998 break;
999 }
1000 put_cpu();
1001}
1002
674eea0f 1003static int kvm_dev_ioctl_get_supported_cpuid(struct kvm_cpuid2 *cpuid,
07716717
DK		 1004 struct kvm_cpuid_entry2 __user *entries)
1005{
1006 struct kvm_cpuid_entry2 *cpuid_entries;
1007 int limit, nent = 0, r = -E2BIG;
1008 u32 func;
1009
1010 if (cpuid->nent < 1)
1011 goto out;
1012 r = -ENOMEM;
1013 cpuid_entries = vmalloc(sizeof(struct kvm_cpuid_entry2) * cpuid->nent);
1014 if (!cpuid_entries)
1015 goto out;
1016
1017 do_cpuid_ent(&cpuid_entries[0], 0, 0, &nent, cpuid->nent);
1018 limit = cpuid_entries[0].eax;
1019 for (func = 1; func <= limit && nent < cpuid->nent; ++func)
1020 do_cpuid_ent(&cpuid_entries[nent], func, 0,
1021 &nent, cpuid->nent);
1022 r = -E2BIG;
1023 if (nent >= cpuid->nent)
1024 goto out_free;
1025
1026 do_cpuid_ent(&cpuid_entries[nent], 0x80000000, 0, &nent, cpuid->nent);
1027 limit = cpuid_entries[nent - 1].eax;
1028 for (func = 0x80000001; func <= limit && nent < cpuid->nent; ++func)
1029 do_cpuid_ent(&cpuid_entries[nent], func, 0,
1030 &nent, cpuid->nent);
1031 r = -EFAULT;
1032 if (copy_to_user(entries, cpuid_entries,
1033 nent * sizeof(struct kvm_cpuid_entry2)))
1034 goto out_free;
1035 cpuid->nent = nent;
1036 r = 0;
1037
1038out_free:
1039 vfree(cpuid_entries);
1040out:
1041 return r;
1042}
1043
313a3dc7
CO		 1044static int kvm_vcpu_ioctl_get_lapic(struct kvm_vcpu *vcpu,
1045 struct kvm_lapic_state *s)
1046{
1047 vcpu_load(vcpu);
ad312c7c 1048 memcpy(s->regs, vcpu->arch.apic->regs, sizeof *s);
313a3dc7
CO		 1049 vcpu_put(vcpu);
1050
1051 return 0;
1052}
1053
1054static int kvm_vcpu_ioctl_set_lapic(struct kvm_vcpu *vcpu,
1055 struct kvm_lapic_state *s)
1056{
1057 vcpu_load(vcpu);
ad312c7c 1058 memcpy(vcpu->arch.apic->regs, s->regs, sizeof *s);
313a3dc7
CO		 1059 kvm_apic_post_state_restore(vcpu);
1060 vcpu_put(vcpu);
1061
1062 return 0;
1063}
1064
f77bc6a4
ZX		 1065static int kvm_vcpu_ioctl_interrupt(struct kvm_vcpu *vcpu,
1066 struct kvm_interrupt *irq)
1067{
1068 if (irq->irq < 0 || irq->irq >= 256)
1069 return -EINVAL;
1070 if (irqchip_in_kernel(vcpu->kvm))
1071 return -ENXIO;
1072 vcpu_load(vcpu);
1073
ad312c7c
ZX		 1074 set_bit(irq->irq, vcpu->arch.irq_pending);
1075 set_bit(irq->irq / BITS_PER_LONG, &vcpu->arch.irq_summary);
f77bc6a4
ZX		 1076
1077 vcpu_put(vcpu);
1078
1079 return 0;
1080}
1081
b209749f
AK		 1082static int vcpu_ioctl_tpr_access_reporting(struct kvm_vcpu *vcpu,
1083 struct kvm_tpr_access_ctl *tac)
1084{
1085 if (tac->flags)
1086 return -EINVAL;
1087 vcpu->arch.tpr_access_reporting = !!tac->enabled;
1088 return 0;
1089}
1090
313a3dc7
CO		 1091long kvm_arch_vcpu_ioctl(struct file *filp,
1092 unsigned int ioctl, unsigned long arg)
1093{
1094 struct kvm_vcpu *vcpu = filp->private_data;
1095 void __user *argp = (void __user *)arg;
1096 int r;
1097
1098 switch (ioctl) {
1099 case KVM_GET_LAPIC: {
1100 struct kvm_lapic_state lapic;
1101
1102 memset(&lapic, 0, sizeof lapic);
1103 r = kvm_vcpu_ioctl_get_lapic(vcpu, &lapic);
1104 if (r)
1105 goto out;
1106 r = -EFAULT;
1107 if (copy_to_user(argp, &lapic, sizeof lapic))
1108 goto out;
1109 r = 0;
1110 break;
1111 }
1112 case KVM_SET_LAPIC: {
1113 struct kvm_lapic_state lapic;
1114
1115 r = -EFAULT;
1116 if (copy_from_user(&lapic, argp, sizeof lapic))
1117 goto out;
1118 r = kvm_vcpu_ioctl_set_lapic(vcpu, &lapic);;
1119 if (r)
1120 goto out;
1121 r = 0;
1122 break;
1123 }
f77bc6a4
ZX		 1124 case KVM_INTERRUPT: {
1125 struct kvm_interrupt irq;
1126
1127 r = -EFAULT;
1128 if (copy_from_user(&irq, argp, sizeof irq))
1129 goto out;
1130 r = kvm_vcpu_ioctl_interrupt(vcpu, &irq);
1131 if (r)
1132 goto out;
1133 r = 0;
1134 break;
1135 }
313a3dc7
CO		 1136 case KVM_SET_CPUID: {
1137 struct kvm_cpuid __user *cpuid_arg = argp;
1138 struct kvm_cpuid cpuid;
1139
1140 r = -EFAULT;
1141 if (copy_from_user(&cpuid, cpuid_arg, sizeof cpuid))
1142 goto out;
1143 r = kvm_vcpu_ioctl_set_cpuid(vcpu, &cpuid, cpuid_arg->entries);
1144 if (r)
1145 goto out;
1146 break;
1147 }
07716717
DK		 1148 case KVM_SET_CPUID2: {
1149 struct kvm_cpuid2 __user *cpuid_arg = argp;
1150 struct kvm_cpuid2 cpuid;
1151
1152 r = -EFAULT;
1153 if (copy_from_user(&cpuid, cpuid_arg, sizeof cpuid))
1154 goto out;
1155 r = kvm_vcpu_ioctl_set_cpuid2(vcpu, &cpuid,
1156 cpuid_arg->entries);
1157 if (r)
1158 goto out;
1159 break;
1160 }
1161 case KVM_GET_CPUID2: {
1162 struct kvm_cpuid2 __user *cpuid_arg = argp;
1163 struct kvm_cpuid2 cpuid;
1164
1165 r = -EFAULT;
1166 if (copy_from_user(&cpuid, cpuid_arg, sizeof cpuid))
1167 goto out;
1168 r = kvm_vcpu_ioctl_get_cpuid2(vcpu, &cpuid,
1169 cpuid_arg->entries);
1170 if (r)
1171 goto out;
1172 r = -EFAULT;
1173 if (copy_to_user(cpuid_arg, &cpuid, sizeof cpuid))
1174 goto out;
1175 r = 0;
1176 break;
1177 }
313a3dc7
CO		 1178 case KVM_GET_MSRS:
1179 r = msr_io(vcpu, argp, kvm_get_msr, 1);
1180 break;
1181 case KVM_SET_MSRS:
1182 r = msr_io(vcpu, argp, do_set_msr, 0);
1183 break;
b209749f
AK		 1184 case KVM_TPR_ACCESS_REPORTING: {
1185 struct kvm_tpr_access_ctl tac;
1186
1187 r = -EFAULT;
1188 if (copy_from_user(&tac, argp, sizeof tac))
1189 goto out;
1190 r = vcpu_ioctl_tpr_access_reporting(vcpu, &tac);
1191 if (r)
1192 goto out;
1193 r = -EFAULT;
1194 if (copy_to_user(argp, &tac, sizeof tac))
1195 goto out;
1196 r = 0;
1197 break;
1198 };
b93463aa
AK		 1199 case KVM_SET_VAPIC_ADDR: {
1200 struct kvm_vapic_addr va;
1201
1202 r = -EINVAL;
1203 if (!irqchip_in_kernel(vcpu->kvm))
1204 goto out;
1205 r = -EFAULT;
1206 if (copy_from_user(&va, argp, sizeof va))
1207 goto out;
1208 r = 0;
1209 kvm_lapic_set_vapic_addr(vcpu, va.vapic_addr);
1210 break;
1211 }
313a3dc7
CO		 1212 default:
1213 r = -EINVAL;
1214 }
1215out:
1216 return r;
1217}
1218
1fe779f8
CO		 1219static int kvm_vm_ioctl_set_tss_addr(struct kvm *kvm, unsigned long addr)
1220{
1221 int ret;
1222
1223 if (addr > (unsigned int)(-3 * PAGE_SIZE))
1224 return -1;
1225 ret = kvm_x86_ops->set_tss_addr(kvm, addr);
1226 return ret;
1227}
1228
1229static int kvm_vm_ioctl_set_nr_mmu_pages(struct kvm *kvm,
1230 u32 kvm_nr_mmu_pages)
1231{
1232 if (kvm_nr_mmu_pages < KVM_MIN_ALLOC_MMU_PAGES)
1233 return -EINVAL;
1234
10589a46 1235 down_write(&current->mm->mmap_sem);
1fe779f8
CO		 1236
1237 kvm_mmu_change_mmu_pages(kvm, kvm_nr_mmu_pages);
f05e70ac 1238 kvm->arch.n_requested_mmu_pages = kvm_nr_mmu_pages;
1fe779f8 1239
10589a46 1240 up_write(&current->mm->mmap_sem);
1fe779f8
CO		 1241 return 0;
1242}
1243
1244static int kvm_vm_ioctl_get_nr_mmu_pages(struct kvm *kvm)
1245{
f05e70ac 1246 return kvm->arch.n_alloc_mmu_pages;
1fe779f8
CO		 1247}
1248
e9f85cde
ZX		 1249gfn_t unalias_gfn(struct kvm *kvm, gfn_t gfn)
1250{
1251 int i;
1252 struct kvm_mem_alias *alias;
1253
d69fb81f
ZX		 1254 for (i = 0; i < kvm->arch.naliases; ++i) {
1255 alias = &kvm->arch.aliases[i];
e9f85cde
ZX		 1256 if (gfn >= alias->base_gfn
1257 && gfn < alias->base_gfn + alias->npages)
1258 return alias->target_gfn + gfn - alias->base_gfn;
1259 }
1260 return gfn;
1261}
1262
1fe779f8
CO		 1263/*
1264 * Set a new alias region. Aliases map a portion of physical memory into
1265 * another portion. This is useful for memory windows, for example the PC
1266 * VGA region.
1267 */
1268static int kvm_vm_ioctl_set_memory_alias(struct kvm *kvm,
1269 struct kvm_memory_alias *alias)
1270{
1271 int r, n;
1272 struct kvm_mem_alias *p;
1273
1274 r = -EINVAL;
1275 /* General sanity checks */
1276 if (alias->memory_size & (PAGE_SIZE - 1))
1277 goto out;
1278 if (alias->guest_phys_addr & (PAGE_SIZE - 1))
1279 goto out;
1280 if (alias->slot >= KVM_ALIAS_SLOTS)
1281 goto out;
1282 if (alias->guest_phys_addr + alias->memory_size
1283 < alias->guest_phys_addr)
1284 goto out;
1285 if (alias->target_phys_addr + alias->memory_size
1286 < alias->target_phys_addr)
1287 goto out;
1288
10589a46 1289 down_write(&current->mm->mmap_sem);
1fe779f8 1290
d69fb81f 1291 p = &kvm->arch.aliases[alias->slot];
1fe779f8
CO		 1292 p->base_gfn = alias->guest_phys_addr >> PAGE_SHIFT;
1293 p->npages = alias->memory_size >> PAGE_SHIFT;
1294 p->target_gfn = alias->target_phys_addr >> PAGE_SHIFT;
1295
1296 for (n = KVM_ALIAS_SLOTS; n > 0; --n)
d69fb81f 1297 if (kvm->arch.aliases[n - 1].npages)
1fe779f8 1298 break;
d69fb81f 1299 kvm->arch.naliases = n;
1fe779f8
CO		 1300
1301 kvm_mmu_zap_all(kvm);
1302
10589a46 1303 up_write(&current->mm->mmap_sem);
1fe779f8
CO		 1304
1305 return 0;
1306
1307out:
1308 return r;
1309}
1310
1311static int kvm_vm_ioctl_get_irqchip(struct kvm *kvm, struct kvm_irqchip *chip)
1312{
1313 int r;
1314
1315 r = 0;
1316 switch (chip->chip_id) {
1317 case KVM_IRQCHIP_PIC_MASTER:
1318 memcpy(&chip->chip.pic,
1319 &pic_irqchip(kvm)->pics[0],
1320 sizeof(struct kvm_pic_state));
1321 break;
1322 case KVM_IRQCHIP_PIC_SLAVE:
1323 memcpy(&chip->chip.pic,
1324 &pic_irqchip(kvm)->pics[1],
1325 sizeof(struct kvm_pic_state));
1326 break;
1327 case KVM_IRQCHIP_IOAPIC:
1328 memcpy(&chip->chip.ioapic,
1329 ioapic_irqchip(kvm),
1330 sizeof(struct kvm_ioapic_state));
1331 break;
1332 default:
1333 r = -EINVAL;
1334 break;
1335 }
1336 return r;
1337}
1338
1339static int kvm_vm_ioctl_set_irqchip(struct kvm *kvm, struct kvm_irqchip *chip)
1340{
1341 int r;
1342
1343 r = 0;
1344 switch (chip->chip_id) {
1345 case KVM_IRQCHIP_PIC_MASTER:
1346 memcpy(&pic_irqchip(kvm)->pics[0],
1347 &chip->chip.pic,
1348 sizeof(struct kvm_pic_state));
1349 break;
1350 case KVM_IRQCHIP_PIC_SLAVE:
1351 memcpy(&pic_irqchip(kvm)->pics[1],
1352 &chip->chip.pic,
1353 sizeof(struct kvm_pic_state));
1354 break;
1355 case KVM_IRQCHIP_IOAPIC:
1356 memcpy(ioapic_irqchip(kvm),
1357 &chip->chip.ioapic,
1358 sizeof(struct kvm_ioapic_state));
1359 break;
1360 default:
1361 r = -EINVAL;
1362 break;
1363 }
1364 kvm_pic_update_irq(pic_irqchip(kvm));
1365 return r;
1366}
1367
5bb064dc
ZX		 1368/*
1369 * Get (and clear) the dirty memory log for a memory slot.
1370 */
1371int kvm_vm_ioctl_get_dirty_log(struct kvm *kvm,
1372 struct kvm_dirty_log *log)
1373{
1374 int r;
1375 int n;
1376 struct kvm_memory_slot *memslot;
1377 int is_dirty = 0;
1378
10589a46 1379 down_write(&current->mm->mmap_sem);
5bb064dc
ZX		 1380
1381 r = kvm_get_dirty_log(kvm, log, &is_dirty);
1382 if (r)
1383 goto out;
1384
1385 /* If nothing is dirty, don't bother messing with page tables. */
1386 if (is_dirty) {
1387 kvm_mmu_slot_remove_write_access(kvm, log->slot);
1388 kvm_flush_remote_tlbs(kvm);
1389 memslot = &kvm->memslots[log->slot];
1390 n = ALIGN(memslot->npages, BITS_PER_LONG) / 8;
1391 memset(memslot->dirty_bitmap, 0, n);
1392 }
1393 r = 0;
1394out:
10589a46 1395 up_write(&current->mm->mmap_sem);
5bb064dc
ZX		 1396 return r;
1397}
1398
1fe779f8
CO		 1399long kvm_arch_vm_ioctl(struct file *filp,
1400 unsigned int ioctl, unsigned long arg)
1401{
1402 struct kvm *kvm = filp->private_data;
1403 void __user *argp = (void __user *)arg;
1404 int r = -EINVAL;
1405
1406 switch (ioctl) {
1407 case KVM_SET_TSS_ADDR:
1408 r = kvm_vm_ioctl_set_tss_addr(kvm, arg);
1409 if (r < 0)
1410 goto out;
1411 break;
1412 case KVM_SET_MEMORY_REGION: {
1413 struct kvm_memory_region kvm_mem;
1414 struct kvm_userspace_memory_region kvm_userspace_mem;
1415
1416 r = -EFAULT;
1417 if (copy_from_user(&kvm_mem, argp, sizeof kvm_mem))
1418 goto out;
1419 kvm_userspace_mem.slot = kvm_mem.slot;
1420 kvm_userspace_mem.flags = kvm_mem.flags;
1421 kvm_userspace_mem.guest_phys_addr = kvm_mem.guest_phys_addr;
1422 kvm_userspace_mem.memory_size = kvm_mem.memory_size;
1423 r = kvm_vm_ioctl_set_memory_region(kvm, &kvm_userspace_mem, 0);
1424 if (r)
1425 goto out;
1426 break;
1427 }
1428 case KVM_SET_NR_MMU_PAGES:
1429 r = kvm_vm_ioctl_set_nr_mmu_pages(kvm, arg);
1430 if (r)
1431 goto out;
1432 break;
1433 case KVM_GET_NR_MMU_PAGES:
1434 r = kvm_vm_ioctl_get_nr_mmu_pages(kvm);
1435 break;
1436 case KVM_SET_MEMORY_ALIAS: {
1437 struct kvm_memory_alias alias;
1438
1439 r = -EFAULT;
1440 if (copy_from_user(&alias, argp, sizeof alias))
1441 goto out;
1442 r = kvm_vm_ioctl_set_memory_alias(kvm, &alias);
1443 if (r)
1444 goto out;
1445 break;
1446 }
1447 case KVM_CREATE_IRQCHIP:
1448 r = -ENOMEM;
d7deeeb0
ZX		 1449 kvm->arch.vpic = kvm_create_pic(kvm);
1450 if (kvm->arch.vpic) {
1fe779f8
CO		 1451 r = kvm_ioapic_init(kvm);
1452 if (r) {
d7deeeb0
ZX		 1453 kfree(kvm->arch.vpic);
1454 kvm->arch.vpic = NULL;
1fe779f8
CO		 1455 goto out;
1456 }
1457 } else
1458 goto out;
1459 break;
1460 case KVM_IRQ_LINE: {
1461 struct kvm_irq_level irq_event;
1462
1463 r = -EFAULT;
1464 if (copy_from_user(&irq_event, argp, sizeof irq_event))
1465 goto out;
1466 if (irqchip_in_kernel(kvm)) {
1467 mutex_lock(&kvm->lock);
1468 if (irq_event.irq < 16)
1469 kvm_pic_set_irq(pic_irqchip(kvm),
1470 irq_event.irq,
1471 irq_event.level);
d7deeeb0 1472 kvm_ioapic_set_irq(kvm->arch.vioapic,
1fe779f8
CO		 1473 irq_event.irq,
1474 irq_event.level);
1475 mutex_unlock(&kvm->lock);
1476 r = 0;
1477 }
1478 break;
1479 }
1480 case KVM_GET_IRQCHIP: {
1481 /* 0: PIC master, 1: PIC slave, 2: IOAPIC */
1482 struct kvm_irqchip chip;
1483
1484 r = -EFAULT;
1485 if (copy_from_user(&chip, argp, sizeof chip))
1486 goto out;
1487 r = -ENXIO;
1488 if (!irqchip_in_kernel(kvm))
1489 goto out;
1490 r = kvm_vm_ioctl_get_irqchip(kvm, &chip);
1491 if (r)
1492 goto out;
1493 r = -EFAULT;
1494 if (copy_to_user(argp, &chip, sizeof chip))
1495 goto out;
1496 r = 0;
1497 break;
1498 }
1499 case KVM_SET_IRQCHIP: {
1500 /* 0: PIC master, 1: PIC slave, 2: IOAPIC */
1501 struct kvm_irqchip chip;
1502
1503 r = -EFAULT;
1504 if (copy_from_user(&chip, argp, sizeof chip))
1505 goto out;
1506 r = -ENXIO;
1507 if (!irqchip_in_kernel(kvm))
1508 goto out;
1509 r = kvm_vm_ioctl_set_irqchip(kvm, &chip);
1510 if (r)
1511 goto out;
1512 r = 0;
1513 break;
1514 }
1515 default:
1516 ;
1517 }
1518out:
1519 return r;
1520}
1521
a16b043c 1522static void kvm_init_msr_list(void)
043405e1
CO		 1523{
1524 u32 dummy[2];
1525 unsigned i, j;
1526
1527 for (i = j = 0; i < ARRAY_SIZE(msrs_to_save); i++) {
1528 if (rdmsr_safe(msrs_to_save[i], &dummy[0], &dummy[1]) < 0)
1529 continue;
1530 if (j < i)
1531 msrs_to_save[j] = msrs_to_save[i];
1532 j++;
1533 }
1534 num_msrs_to_save = j;
1535}
1536
bbd9b64e
CO		 1537/*
1538 * Only apic need an MMIO device hook, so shortcut now..
1539 */
1540static struct kvm_io_device *vcpu_find_pervcpu_dev(struct kvm_vcpu *vcpu,
1541 gpa_t addr)
1542{
1543 struct kvm_io_device *dev;
1544
ad312c7c
ZX		 1545 if (vcpu->arch.apic) {
1546 dev = &vcpu->arch.apic->dev;
bbd9b64e
CO		 1547 if (dev->in_range(dev, addr))
1548 return dev;
1549 }
1550 return NULL;
1551}
1552
1553
1554static struct kvm_io_device *vcpu_find_mmio_dev(struct kvm_vcpu *vcpu,
1555 gpa_t addr)
1556{
1557 struct kvm_io_device *dev;
1558
1559 dev = vcpu_find_pervcpu_dev(vcpu, addr);
1560 if (dev == NULL)
1561 dev = kvm_io_bus_find_dev(&vcpu->kvm->mmio_bus, addr);
1562 return dev;
1563}
1564
1565int emulator_read_std(unsigned long addr,
1566 void *val,
1567 unsigned int bytes,
1568 struct kvm_vcpu *vcpu)
1569{
1570 void *data = val;
10589a46 1571 int r = X86EMUL_CONTINUE;
bbd9b64e 1572
10589a46 1573 down_read(&current->mm->mmap_sem);
bbd9b64e 1574 while (bytes) {
ad312c7c 1575 gpa_t gpa = vcpu->arch.mmu.gva_to_gpa(vcpu, addr);
bbd9b64e
CO		 1576 unsigned offset = addr & (PAGE_SIZE-1);
1577 unsigned tocopy = min(bytes, (unsigned)PAGE_SIZE - offset);
1578 int ret;
1579
10589a46
MT		 1580 if (gpa == UNMAPPED_GVA) {
1581 r = X86EMUL_PROPAGATE_FAULT;
1582 goto out;
1583 }
bbd9b64e 1584 ret = kvm_read_guest(vcpu->kvm, gpa, data, tocopy);
10589a46
MT		 1585 if (ret < 0) {
1586 r = X86EMUL_UNHANDLEABLE;
1587 goto out;
1588 }
bbd9b64e
CO		 1589
1590 bytes -= tocopy;
1591 data += tocopy;
1592 addr += tocopy;
1593 }
10589a46
MT		 1594out:
1595 up_read(&current->mm->mmap_sem);
1596 return r;
bbd9b64e
CO		 1597}
1598EXPORT_SYMBOL_GPL(emulator_read_std);
1599
bbd9b64e
CO		 1600static int emulator_read_emulated(unsigned long addr,
1601 void *val,
1602 unsigned int bytes,
1603 struct kvm_vcpu *vcpu)
1604{
1605 struct kvm_io_device *mmio_dev;
1606 gpa_t gpa;
1607
1608 if (vcpu->mmio_read_completed) {
1609 memcpy(val, vcpu->mmio_data, bytes);
1610 vcpu->mmio_read_completed = 0;
1611 return X86EMUL_CONTINUE;
1612 }
1613
10589a46 1614 down_read(&current->mm->mmap_sem);
ad312c7c 1615 gpa = vcpu->arch.mmu.gva_to_gpa(vcpu, addr);
10589a46 1616 up_read(&current->mm->mmap_sem);
bbd9b64e
CO		 1617
1618 /* For APIC access vmexit */
1619 if ((gpa & PAGE_MASK) == APIC_DEFAULT_PHYS_BASE)
1620 goto mmio;
1621
1622 if (emulator_read_std(addr, val, bytes, vcpu)
1623 == X86EMUL_CONTINUE)
1624 return X86EMUL_CONTINUE;
1625 if (gpa == UNMAPPED_GVA)
1626 return X86EMUL_PROPAGATE_FAULT;
1627
1628mmio:
1629 /*
1630 * Is this MMIO handled locally?
1631 */
10589a46 1632 mutex_lock(&vcpu->kvm->lock);
bbd9b64e
CO		 1633 mmio_dev = vcpu_find_mmio_dev(vcpu, gpa);
1634 if (mmio_dev) {
1635 kvm_iodevice_read(mmio_dev, gpa, bytes, val);
10589a46 1636 mutex_unlock(&vcpu->kvm->lock);
bbd9b64e
CO		 1637 return X86EMUL_CONTINUE;
1638 }
10589a46 1639 mutex_unlock(&vcpu->kvm->lock);
bbd9b64e
CO		 1640
1641 vcpu->mmio_needed = 1;
1642 vcpu->mmio_phys_addr = gpa;
1643 vcpu->mmio_size = bytes;
1644 vcpu->mmio_is_write = 0;
1645
1646 return X86EMUL_UNHANDLEABLE;
1647}
1648
1649static int emulator_write_phys(struct kvm_vcpu *vcpu, gpa_t gpa,
1650 const void *val, int bytes)
1651{
1652 int ret;
1653
10589a46 1654 down_read(&current->mm->mmap_sem);
bbd9b64e 1655 ret = kvm_write_guest(vcpu->kvm, gpa, val, bytes);
10589a46
MT		 1656 if (ret < 0) {
1657 up_read(&current->mm->mmap_sem);
bbd9b64e 1658 return 0;
10589a46 1659 }
bbd9b64e 1660 kvm_mmu_pte_write(vcpu, gpa, val, bytes);
10589a46 1661 up_read(&current->mm->mmap_sem);
bbd9b64e
CO		 1662 return 1;
1663}
1664
1665static int emulator_write_emulated_onepage(unsigned long addr,
1666 const void *val,
1667 unsigned int bytes,
1668 struct kvm_vcpu *vcpu)
1669{
1670 struct kvm_io_device *mmio_dev;
10589a46
MT		 1671 gpa_t gpa;
1672
1673 down_read(&current->mm->mmap_sem);
1674 gpa = vcpu->arch.mmu.gva_to_gpa(vcpu, addr);
1675 up_read(&current->mm->mmap_sem);
bbd9b64e
CO		 1676
1677 if (gpa == UNMAPPED_GVA) {
c3c91fee 1678 kvm_inject_page_fault(vcpu, addr, 2);
bbd9b64e
CO		 1679 return X86EMUL_PROPAGATE_FAULT;
1680 }
1681
1682 /* For APIC access vmexit */
1683 if ((gpa & PAGE_MASK) == APIC_DEFAULT_PHYS_BASE)
1684 goto mmio;
1685
1686 if (emulator_write_phys(vcpu, gpa, val, bytes))
1687 return X86EMUL_CONTINUE;
1688
1689mmio:
1690 /*
1691 * Is this MMIO handled locally?
1692 */
10589a46 1693 mutex_lock(&vcpu->kvm->lock);
bbd9b64e
CO		 1694 mmio_dev = vcpu_find_mmio_dev(vcpu, gpa);
1695 if (mmio_dev) {
1696 kvm_iodevice_write(mmio_dev, gpa, bytes, val);
10589a46 1697 mutex_unlock(&vcpu->kvm->lock);
bbd9b64e
CO		 1698 return X86EMUL_CONTINUE;
1699 }
10589a46 1700 mutex_unlock(&vcpu->kvm->lock);
bbd9b64e
CO		 1701
1702 vcpu->mmio_needed = 1;
1703 vcpu->mmio_phys_addr = gpa;
1704 vcpu->mmio_size = bytes;
1705 vcpu->mmio_is_write = 1;
1706 memcpy(vcpu->mmio_data, val, bytes);
1707
1708 return X86EMUL_CONTINUE;
1709}
1710
1711int emulator_write_emulated(unsigned long addr,
1712 const void *val,
1713 unsigned int bytes,
1714 struct kvm_vcpu *vcpu)
1715{
1716 /* Crossing a page boundary? */
1717 if (((addr + bytes - 1) ^ addr) & PAGE_MASK) {
1718 int rc, now;
1719
1720 now = -addr & ~PAGE_MASK;
1721 rc = emulator_write_emulated_onepage(addr, val, now, vcpu);
1722 if (rc != X86EMUL_CONTINUE)
1723 return rc;
1724 addr += now;
1725 val += now;
1726 bytes -= now;
1727 }
1728 return emulator_write_emulated_onepage(addr, val, bytes, vcpu);
1729}
1730EXPORT_SYMBOL_GPL(emulator_write_emulated);
1731
1732static int emulator_cmpxchg_emulated(unsigned long addr,
1733 const void *old,
1734 const void *new,
1735 unsigned int bytes,
1736 struct kvm_vcpu *vcpu)
1737{
1738 static int reported;
1739
1740 if (!reported) {
1741 reported = 1;
1742 printk(KERN_WARNING "kvm: emulating exchange as write\n");
1743 }
2bacc55c
MT		 1744#ifndef CONFIG_X86_64
1745 /* guests cmpxchg8b have to be emulated atomically */
1746 if (bytes == 8) {
10589a46 1747 gpa_t gpa;
2bacc55c 1748 struct page *page;
c0b49b0d 1749 char *kaddr;
2bacc55c
MT		 1750 u64 val;
1751
10589a46
MT		 1752 down_read(&current->mm->mmap_sem);
1753 gpa = vcpu->arch.mmu.gva_to_gpa(vcpu, addr);
1754
2bacc55c
MT		 1755 if (gpa == UNMAPPED_GVA ||
1756 (gpa & PAGE_MASK) == APIC_DEFAULT_PHYS_BASE)
1757 goto emul_write;
1758
1759 if (((gpa + bytes - 1) & PAGE_MASK) != (gpa & PAGE_MASK))
1760 goto emul_write;
1761
1762 val = *(u64 *)new;
1763 page = gfn_to_page(vcpu->kvm, gpa >> PAGE_SHIFT);
c0b49b0d
AM		 1764 kaddr = kmap_atomic(page, KM_USER0);
1765 set_64bit((u64 *)(kaddr + offset_in_page(gpa)), val);
1766 kunmap_atomic(kaddr, KM_USER0);
2bacc55c 1767 kvm_release_page_dirty(page);
10589a46
MT		 1768 emul_write:
1769 up_read(&current->mm->mmap_sem);
2bacc55c 1770 }
2bacc55c
MT		 1771#endif
1772
bbd9b64e
CO		 1773 return emulator_write_emulated(addr, new, bytes, vcpu);
1774}
1775
1776static unsigned long get_segment_base(struct kvm_vcpu *vcpu, int seg)
1777{
1778 return kvm_x86_ops->get_segment_base(vcpu, seg);
1779}
1780
1781int emulate_invlpg(struct kvm_vcpu *vcpu, gva_t address)
1782{
1783 return X86EMUL_CONTINUE;
1784}
1785
1786int emulate_clts(struct kvm_vcpu *vcpu)
1787{
ad312c7c 1788 kvm_x86_ops->set_cr0(vcpu, vcpu->arch.cr0 & ~X86_CR0_TS);
bbd9b64e
CO		 1789 return X86EMUL_CONTINUE;
1790}
1791
1792int emulator_get_dr(struct x86_emulate_ctxt *ctxt, int dr, unsigned long *dest)
1793{
1794 struct kvm_vcpu *vcpu = ctxt->vcpu;
1795
1796 switch (dr) {
1797 case 0 ... 3:
1798 *dest = kvm_x86_ops->get_dr(vcpu, dr);
1799 return X86EMUL_CONTINUE;
1800 default:
1801 pr_unimpl(vcpu, "%s: unexpected dr %u\n", __FUNCTION__, dr);
1802 return X86EMUL_UNHANDLEABLE;
1803 }
1804}
1805
1806int emulator_set_dr(struct x86_emulate_ctxt *ctxt, int dr, unsigned long value)
1807{
1808 unsigned long mask = (ctxt->mode == X86EMUL_MODE_PROT64) ? ~0ULL : ~0U;
1809 int exception;
1810
1811 kvm_x86_ops->set_dr(ctxt->vcpu, dr, value & mask, &exception);
1812 if (exception) {
1813 /* FIXME: better handling */
1814 return X86EMUL_UNHANDLEABLE;
1815 }
1816 return X86EMUL_CONTINUE;
1817}
1818
1819void kvm_report_emulation_failure(struct kvm_vcpu *vcpu, const char *context)
1820{
1821 static int reported;
1822 u8 opcodes[4];
ad312c7c 1823 unsigned long rip = vcpu->arch.rip;
bbd9b64e
CO		 1824 unsigned long rip_linear;
1825
1826 rip_linear = rip + get_segment_base(vcpu, VCPU_SREG_CS);
1827
1828 if (reported)
1829 return;
1830
1831 emulator_read_std(rip_linear, (void *)opcodes, 4, vcpu);
1832
1833 printk(KERN_ERR "emulation failed (%s) rip %lx %02x %02x %02x %02x\n",
1834 context, rip, opcodes[0], opcodes[1], opcodes[2], opcodes[3]);
1835 reported = 1;
1836}
1837EXPORT_SYMBOL_GPL(kvm_report_emulation_failure);
1838
1839struct x86_emulate_ops emulate_ops = {
1840 .read_std = emulator_read_std,
bbd9b64e
CO		 1841 .read_emulated = emulator_read_emulated,
1842 .write_emulated = emulator_write_emulated,
1843 .cmpxchg_emulated = emulator_cmpxchg_emulated,
1844};
1845
1846int emulate_instruction(struct kvm_vcpu *vcpu,
1847 struct kvm_run *run,
1848 unsigned long cr2,
1849 u16 error_code,
571008da 1850 int emulation_type)
bbd9b64e
CO		 1851{
1852 int r;
571008da 1853 struct decode_cache *c;
bbd9b64e 1854
ad312c7c 1855 vcpu->arch.mmio_fault_cr2 = cr2;
bbd9b64e
CO		 1856 kvm_x86_ops->cache_regs(vcpu);
1857
1858 vcpu->mmio_is_write = 0;
ad312c7c 1859 vcpu->arch.pio.string = 0;
bbd9b64e 1860
571008da 1861 if (!(emulation_type & EMULTYPE_NO_DECODE)) {
bbd9b64e
CO		 1862 int cs_db, cs_l;
1863 kvm_x86_ops->get_cs_db_l_bits(vcpu, &cs_db, &cs_l);
1864
ad312c7c
ZX		 1865 vcpu->arch.emulate_ctxt.vcpu = vcpu;
1866 vcpu->arch.emulate_ctxt.eflags = kvm_x86_ops->get_rflags(vcpu);
1867 vcpu->arch.emulate_ctxt.mode =
1868 (vcpu->arch.emulate_ctxt.eflags & X86_EFLAGS_VM)
bbd9b64e
CO		 1869 ? X86EMUL_MODE_REAL : cs_l
1870 ? X86EMUL_MODE_PROT64 : cs_db
1871 ? X86EMUL_MODE_PROT32 : X86EMUL_MODE_PROT16;
1872
ad312c7c
ZX		 1873 if (vcpu->arch.emulate_ctxt.mode == X86EMUL_MODE_PROT64) {
1874 vcpu->arch.emulate_ctxt.cs_base = 0;
1875 vcpu->arch.emulate_ctxt.ds_base = 0;
1876 vcpu->arch.emulate_ctxt.es_base = 0;
1877 vcpu->arch.emulate_ctxt.ss_base = 0;
bbd9b64e 1878 } else {
ad312c7c 1879 vcpu->arch.emulate_ctxt.cs_base =
bbd9b64e 1880 get_segment_base(vcpu, VCPU_SREG_CS);
ad312c7c 1881 vcpu->arch.emulate_ctxt.ds_base =
bbd9b64e 1882 get_segment_base(vcpu, VCPU_SREG_DS);
ad312c7c 1883 vcpu->arch.emulate_ctxt.es_base =
bbd9b64e 1884 get_segment_base(vcpu, VCPU_SREG_ES);
ad312c7c 1885 vcpu->arch.emulate_ctxt.ss_base =
bbd9b64e
CO		 1886 get_segment_base(vcpu, VCPU_SREG_SS);
1887 }
1888
ad312c7c 1889 vcpu->arch.emulate_ctxt.gs_base =
bbd9b64e 1890 get_segment_base(vcpu, VCPU_SREG_GS);
ad312c7c 1891 vcpu->arch.emulate_ctxt.fs_base =
bbd9b64e
CO		 1892 get_segment_base(vcpu, VCPU_SREG_FS);
1893
ad312c7c 1894 r = x86_decode_insn(&vcpu->arch.emulate_ctxt, &emulate_ops);
571008da
SY		 1895
1896 /* Reject the instructions other than VMCALL/VMMCALL when
1897 * try to emulate invalid opcode */
1898 c = &vcpu->arch.emulate_ctxt.decode;
1899 if ((emulation_type & EMULTYPE_TRAP_UD) &&
1900 (!(c->twobyte && c->b == 0x01 &&
1901 (c->modrm_reg == 0 || c->modrm_reg == 3) &&
1902 c->modrm_mod == 3 && c->modrm_rm == 1)))
1903 return EMULATE_FAIL;
1904
f2b5756b 1905 ++vcpu->stat.insn_emulation;
bbd9b64e 1906 if (r) {
f2b5756b 1907 ++vcpu->stat.insn_emulation_fail;
bbd9b64e
CO		 1908 if (kvm_mmu_unprotect_page_virt(vcpu, cr2))
1909 return EMULATE_DONE;
1910 return EMULATE_FAIL;
1911 }
1912 }
1913
ad312c7c 1914 r = x86_emulate_insn(&vcpu->arch.emulate_ctxt, &emulate_ops);
bbd9b64e 1915
ad312c7c 1916 if (vcpu->arch.pio.string)
bbd9b64e
CO		 1917 return EMULATE_DO_MMIO;
1918
1919 if ((r || vcpu->mmio_is_write) && run) {
1920 run->exit_reason = KVM_EXIT_MMIO;
1921 run->mmio.phys_addr = vcpu->mmio_phys_addr;
1922 memcpy(run->mmio.data, vcpu->mmio_data, 8);
1923 run->mmio.len = vcpu->mmio_size;
1924 run->mmio.is_write = vcpu->mmio_is_write;
1925 }
1926
1927 if (r) {
1928 if (kvm_mmu_unprotect_page_virt(vcpu, cr2))
1929 return EMULATE_DONE;
1930 if (!vcpu->mmio_needed) {
1931 kvm_report_emulation_failure(vcpu, "mmio");
1932 return EMULATE_FAIL;
1933 }
1934 return EMULATE_DO_MMIO;
1935 }
1936
1937 kvm_x86_ops->decache_regs(vcpu);
ad312c7c 1938 kvm_x86_ops->set_rflags(vcpu, vcpu->arch.emulate_ctxt.eflags);
bbd9b64e
CO		 1939
1940 if (vcpu->mmio_is_write) {
1941 vcpu->mmio_needed = 0;
1942 return EMULATE_DO_MMIO;
1943 }
1944
1945 return EMULATE_DONE;
1946}
1947EXPORT_SYMBOL_GPL(emulate_instruction);
1948
de7d789a
CO		 1949static void free_pio_guest_pages(struct kvm_vcpu *vcpu)
1950{
1951 int i;
1952
ad312c7c
ZX		 1953 for (i = 0; i < ARRAY_SIZE(vcpu->arch.pio.guest_pages); ++i)
1954 if (vcpu->arch.pio.guest_pages[i]) {
1955 kvm_release_page_dirty(vcpu->arch.pio.guest_pages[i]);
1956 vcpu->arch.pio.guest_pages[i] = NULL;
de7d789a
CO		 1957 }
1958}
1959
1960static int pio_copy_data(struct kvm_vcpu *vcpu)
1961{
ad312c7c 1962 void *p = vcpu->arch.pio_data;
de7d789a
CO		 1963 void *q;
1964 unsigned bytes;
ad312c7c 1965 int nr_pages = vcpu->arch.pio.guest_pages[1] ? 2 : 1;
de7d789a 1966
ad312c7c 1967 q = vmap(vcpu->arch.pio.guest_pages, nr_pages, VM_READ|VM_WRITE,
de7d789a
CO		 1968 PAGE_KERNEL);
1969 if (!q) {
1970 free_pio_guest_pages(vcpu);
1971 return -ENOMEM;
1972 }
ad312c7c
ZX		 1973 q += vcpu->arch.pio.guest_page_offset;
1974 bytes = vcpu->arch.pio.size * vcpu->arch.pio.cur_count;
1975 if (vcpu->arch.pio.in)
de7d789a
CO		 1976 memcpy(q, p, bytes);
1977 else
1978 memcpy(p, q, bytes);
ad312c7c 1979 q -= vcpu->arch.pio.guest_page_offset;
de7d789a
CO		 1980 vunmap(q);
1981 free_pio_guest_pages(vcpu);
1982 return 0;
1983}
1984
1985int complete_pio(struct kvm_vcpu *vcpu)
1986{
ad312c7c 1987 struct kvm_pio_request *io = &vcpu->arch.pio;
de7d789a
CO		 1988 long delta;
1989 int r;
1990
1991 kvm_x86_ops->cache_regs(vcpu);
1992
1993 if (!io->string) {
1994 if (io->in)
ad312c7c 1995 memcpy(&vcpu->arch.regs[VCPU_REGS_RAX], vcpu->arch.pio_data,
de7d789a
CO		 1996 io->size);
1997 } else {
1998 if (io->in) {
1999 r = pio_copy_data(vcpu);
2000 if (r) {
2001 kvm_x86_ops->cache_regs(vcpu);
2002 return r;
2003 }
2004 }
2005
2006 delta = 1;
2007 if (io->rep) {
2008 delta *= io->cur_count;
2009 /*
2010 * The size of the register should really depend on
2011 * current address size.
2012 */
ad312c7c 2013 vcpu->arch.regs[VCPU_REGS_RCX] -= delta;
de7d789a
CO		 2014 }
2015 if (io->down)
2016 delta = -delta;
2017 delta *= io->size;
2018 if (io->in)
ad312c7c 2019 vcpu->arch.regs[VCPU_REGS_RDI] += delta;
de7d789a 2020 else
ad312c7c 2021 vcpu->arch.regs[VCPU_REGS_RSI] += delta;
de7d789a
CO		 2022 }
2023
2024 kvm_x86_ops->decache_regs(vcpu);
2025
2026 io->count -= io->cur_count;
2027 io->cur_count = 0;
2028
2029 return 0;
2030}
2031
2032static void kernel_pio(struct kvm_io_device *pio_dev,
2033 struct kvm_vcpu *vcpu,
2034 void *pd)
2035{
2036 /* TODO: String I/O for in kernel device */
2037
2038 mutex_lock(&vcpu->kvm->lock);
ad312c7c
ZX		 2039 if (vcpu->arch.pio.in)
2040 kvm_iodevice_read(pio_dev, vcpu->arch.pio.port,
2041 vcpu->arch.pio.size,
de7d789a
CO		 2042 pd);
2043 else
ad312c7c
ZX		 2044 kvm_iodevice_write(pio_dev, vcpu->arch.pio.port,
2045 vcpu->arch.pio.size,
de7d789a
CO		 2046 pd);
2047 mutex_unlock(&vcpu->kvm->lock);
2048}
2049
2050static void pio_string_write(struct kvm_io_device *pio_dev,
2051 struct kvm_vcpu *vcpu)
2052{
ad312c7c
ZX		 2053 struct kvm_pio_request *io = &vcpu->arch.pio;
2054 void *pd = vcpu->arch.pio_data;
de7d789a
CO		 2055 int i;
2056
2057 mutex_lock(&vcpu->kvm->lock);
2058 for (i = 0; i < io->cur_count; i++) {
2059 kvm_iodevice_write(pio_dev, io->port,
2060 io->size,
2061 pd);
2062 pd += io->size;
2063 }
2064 mutex_unlock(&vcpu->kvm->lock);
2065}
2066
2067static struct kvm_io_device *vcpu_find_pio_dev(struct kvm_vcpu *vcpu,
2068 gpa_t addr)
2069{
2070 return kvm_io_bus_find_dev(&vcpu->kvm->pio_bus, addr);
2071}
2072
2073int kvm_emulate_pio(struct kvm_vcpu *vcpu, struct kvm_run *run, int in,
2074 int size, unsigned port)
2075{
2076 struct kvm_io_device *pio_dev;
2077
2078 vcpu->run->exit_reason = KVM_EXIT_IO;
2079 vcpu->run->io.direction = in ? KVM_EXIT_IO_IN : KVM_EXIT_IO_OUT;
ad312c7c 2080 vcpu->run->io.size = vcpu->arch.pio.size = size;
de7d789a 2081 vcpu->run->io.data_offset = KVM_PIO_PAGE_OFFSET * PAGE_SIZE;
ad312c7c
ZX		 2082 vcpu->run->io.count = vcpu->arch.pio.count = vcpu->arch.pio.cur_count = 1;
2083 vcpu->run->io.port = vcpu->arch.pio.port = port;
2084 vcpu->arch.pio.in = in;
2085 vcpu->arch.pio.string = 0;
2086 vcpu->arch.pio.down = 0;
2087 vcpu->arch.pio.guest_page_offset = 0;
2088 vcpu->arch.pio.rep = 0;
de7d789a
CO		 2089
2090 kvm_x86_ops->cache_regs(vcpu);
ad312c7c 2091 memcpy(vcpu->arch.pio_data, &vcpu->arch.regs[VCPU_REGS_RAX], 4);
de7d789a
CO		 2092 kvm_x86_ops->decache_regs(vcpu);
2093
2094 kvm_x86_ops->skip_emulated_instruction(vcpu);
2095
2096 pio_dev = vcpu_find_pio_dev(vcpu, port);
2097 if (pio_dev) {
ad312c7c 2098 kernel_pio(pio_dev, vcpu, vcpu->arch.pio_data);
de7d789a
CO		 2099 complete_pio(vcpu);
2100 return 1;
2101 }
2102 return 0;
2103}
2104EXPORT_SYMBOL_GPL(kvm_emulate_pio);
2105
2106int kvm_emulate_pio_string(struct kvm_vcpu *vcpu, struct kvm_run *run, int in,
2107 int size, unsigned long count, int down,
2108 gva_t address, int rep, unsigned port)
2109{
2110 unsigned now, in_page;
2111 int i, ret = 0;
2112 int nr_pages = 1;
2113 struct page *page;
2114 struct kvm_io_device *pio_dev;
2115
2116 vcpu->run->exit_reason = KVM_EXIT_IO;
2117 vcpu->run->io.direction = in ? KVM_EXIT_IO_IN : KVM_EXIT_IO_OUT;
ad312c7c 2118 vcpu->run->io.size = vcpu->arch.pio.size = size;
de7d789a 2119 vcpu->run->io.data_offset = KVM_PIO_PAGE_OFFSET * PAGE_SIZE;
ad312c7c
ZX		 2120 vcpu->run->io.count = vcpu->arch.pio.count = vcpu->arch.pio.cur_count = count;
2121 vcpu->run->io.port = vcpu->arch.pio.port = port;
2122 vcpu->arch.pio.in = in;
2123 vcpu->arch.pio.string = 1;
2124 vcpu->arch.pio.down = down;
2125 vcpu->arch.pio.guest_page_offset = offset_in_page(address);
2126 vcpu->arch.pio.rep = rep;
de7d789a
CO		 2127
2128 if (!count) {
2129 kvm_x86_ops->skip_emulated_instruction(vcpu);
2130 return 1;
2131 }
2132
2133 if (!down)
2134 in_page = PAGE_SIZE - offset_in_page(address);
2135 else
2136 in_page = offset_in_page(address) + size;
2137 now = min(count, (unsigned long)in_page / size);
2138 if (!now) {
2139 /*
2140 * String I/O straddles page boundary. Pin two guest pages
2141 * so that we satisfy atomicity constraints. Do just one
2142 * transaction to avoid complexity.
2143 */
2144 nr_pages = 2;
2145 now = 1;
2146 }
2147 if (down) {
2148 /*
2149 * String I/O in reverse. Yuck. Kill the guest, fix later.
2150 */
2151 pr_unimpl(vcpu, "guest string pio down\n");
c1a5d4f9 2152 kvm_inject_gp(vcpu, 0);
de7d789a
CO		 2153 return 1;
2154 }
2155 vcpu->run->io.count = now;
ad312c7c 2156 vcpu->arch.pio.cur_count = now;
de7d789a 2157
ad312c7c 2158 if (vcpu->arch.pio.cur_count == vcpu->arch.pio.count)
de7d789a
CO		 2159 kvm_x86_ops->skip_emulated_instruction(vcpu);
2160
2161 for (i = 0; i < nr_pages; ++i) {
10589a46 2162 down_read(&current->mm->mmap_sem);
de7d789a 2163 page = gva_to_page(vcpu, address + i * PAGE_SIZE);
ad312c7c 2164 vcpu->arch.pio.guest_pages[i] = page;
10589a46 2165 up_read(&current->mm->mmap_sem);
de7d789a 2166 if (!page) {
c1a5d4f9 2167 kvm_inject_gp(vcpu, 0);
de7d789a
CO		 2168 free_pio_guest_pages(vcpu);
2169 return 1;
2170 }
2171 }
2172
2173 pio_dev = vcpu_find_pio_dev(vcpu, port);
ad312c7c 2174 if (!vcpu->arch.pio.in) {
de7d789a
CO		 2175 /* string PIO write */
2176 ret = pio_copy_data(vcpu);
2177 if (ret >= 0 && pio_dev) {
2178 pio_string_write(pio_dev, vcpu);
2179 complete_pio(vcpu);
ad312c7c 2180 if (vcpu->arch.pio.count == 0)
de7d789a
CO		 2181 ret = 1;
2182 }
2183 } else if (pio_dev)
2184 pr_unimpl(vcpu, "no string pio read support yet, "
2185 "port %x size %d count %ld\n",
2186 port, size, count);
2187
2188 return ret;
2189}
2190EXPORT_SYMBOL_GPL(kvm_emulate_pio_string);
2191
f8c16bba 2192int kvm_arch_init(void *opaque)
043405e1 2193{
56c6d28a 2194 int r;
f8c16bba
ZX		 2195 struct kvm_x86_ops *ops = (struct kvm_x86_ops *)opaque;
2196
f8c16bba
ZX		 2197 if (kvm_x86_ops) {
2198 printk(KERN_ERR "kvm: already loaded the other module\n");
56c6d28a
ZX		 2199 r = -EEXIST;
2200 goto out;
f8c16bba
ZX		 2201 }
2202
2203 if (!ops->cpu_has_kvm_support()) {
2204 printk(KERN_ERR "kvm: no hardware support\n");
56c6d28a
ZX		 2205 r = -EOPNOTSUPP;
2206 goto out;
f8c16bba
ZX		 2207 }
2208 if (ops->disabled_by_bios()) {
2209 printk(KERN_ERR "kvm: disabled by bios\n");
56c6d28a
ZX		 2210 r = -EOPNOTSUPP;
2211 goto out;
f8c16bba
ZX		 2212 }
2213
97db56ce
AK		 2214 r = kvm_mmu_module_init();
2215 if (r)
2216 goto out;
2217
2218 kvm_init_msr_list();
2219
f8c16bba 2220 kvm_x86_ops = ops;
56c6d28a 2221 kvm_mmu_set_nonpresent_ptes(0ull, 0ull);
f8c16bba 2222 return 0;
56c6d28a
ZX		 2223
2224out:
56c6d28a 2225 return r;
043405e1 2226}
8776e519 2227
f8c16bba
ZX		 2228void kvm_arch_exit(void)
2229{
2230 kvm_x86_ops = NULL;
56c6d28a
ZX		 2231 kvm_mmu_module_exit();
2232}
f8c16bba 2233
8776e519
HB		 2234int kvm_emulate_halt(struct kvm_vcpu *vcpu)
2235{
2236 ++vcpu->stat.halt_exits;
2237 if (irqchip_in_kernel(vcpu->kvm)) {
ad312c7c 2238 vcpu->arch.mp_state = VCPU_MP_STATE_HALTED;
8776e519 2239 kvm_vcpu_block(vcpu);
ad312c7c 2240 if (vcpu->arch.mp_state != VCPU_MP_STATE_RUNNABLE)
8776e519
HB		 2241 return -EINTR;
2242 return 1;
2243 } else {
2244 vcpu->run->exit_reason = KVM_EXIT_HLT;
2245 return 0;
2246 }
2247}
2248EXPORT_SYMBOL_GPL(kvm_emulate_halt);
2249
2250int kvm_emulate_hypercall(struct kvm_vcpu *vcpu)
2251{
2252 unsigned long nr, a0, a1, a2, a3, ret;
2253
2254 kvm_x86_ops->cache_regs(vcpu);
2255
ad312c7c
ZX		 2256 nr = vcpu->arch.regs[VCPU_REGS_RAX];
2257 a0 = vcpu->arch.regs[VCPU_REGS_RBX];
2258 a1 = vcpu->arch.regs[VCPU_REGS_RCX];
2259 a2 = vcpu->arch.regs[VCPU_REGS_RDX];
2260 a3 = vcpu->arch.regs[VCPU_REGS_RSI];
8776e519
HB		 2261
2262 if (!is_long_mode(vcpu)) {
2263 nr &= 0xFFFFFFFF;
2264 a0 &= 0xFFFFFFFF;
2265 a1 &= 0xFFFFFFFF;
2266 a2 &= 0xFFFFFFFF;
2267 a3 &= 0xFFFFFFFF;
2268 }
2269
2270 switch (nr) {
b93463aa
AK		 2271 case KVM_HC_VAPIC_POLL_IRQ:
2272 ret = 0;
2273 break;
8776e519
HB		 2274 default:
2275 ret = -KVM_ENOSYS;
2276 break;
2277 }
ad312c7c 2278 vcpu->arch.regs[VCPU_REGS_RAX] = ret;
8776e519
HB		 2279 kvm_x86_ops->decache_regs(vcpu);
2280 return 0;
2281}
2282EXPORT_SYMBOL_GPL(kvm_emulate_hypercall);
2283
2284int kvm_fix_hypercall(struct kvm_vcpu *vcpu)
2285{
2286 char instruction[3];
2287 int ret = 0;
2288
8776e519
HB		 2289
2290 /*
2291 * Blow out the MMU to ensure that no other VCPU has an active mapping
2292 * to ensure that the updated hypercall appears atomically across all
2293 * VCPUs.
2294 */
2295 kvm_mmu_zap_all(vcpu->kvm);
2296
2297 kvm_x86_ops->cache_regs(vcpu);
2298 kvm_x86_ops->patch_hypercall(vcpu, instruction);
ad312c7c 2299 if (emulator_write_emulated(vcpu->arch.rip, instruction, 3, vcpu)
8776e519
HB		 2300 != X86EMUL_CONTINUE)
2301 ret = -EFAULT;
2302
8776e519
HB		 2303 return ret;
2304}
2305
2306static u64 mk_cr_64(u64 curr_cr, u32 new_val)
2307{
2308 return (curr_cr & ~((1ULL << 32) - 1)) | new_val;
2309}
2310
2311void realmode_lgdt(struct kvm_vcpu *vcpu, u16 limit, unsigned long base)
2312{
2313 struct descriptor_table dt = { limit, base };
2314
2315 kvm_x86_ops->set_gdt(vcpu, &dt);
2316}
2317
2318void realmode_lidt(struct kvm_vcpu *vcpu, u16 limit, unsigned long base)
2319{
2320 struct descriptor_table dt = { limit, base };
2321
2322 kvm_x86_ops->set_idt(vcpu, &dt);
2323}
2324
2325void realmode_lmsw(struct kvm_vcpu *vcpu, unsigned long msw,
2326 unsigned long *rflags)
2327{
2328 lmsw(vcpu, msw);
2329 *rflags = kvm_x86_ops->get_rflags(vcpu);
2330}
2331
2332unsigned long realmode_get_cr(struct kvm_vcpu *vcpu, int cr)
2333{
2334 kvm_x86_ops->decache_cr4_guest_bits(vcpu);
2335 switch (cr) {
2336 case 0:
ad312c7c 2337 return vcpu->arch.cr0;
8776e519 2338 case 2:
ad312c7c 2339 return vcpu->arch.cr2;
8776e519 2340 case 3:
ad312c7c 2341 return vcpu->arch.cr3;
8776e519 2342 case 4:
ad312c7c 2343 return vcpu->arch.cr4;
152ff9be
JR		 2344 case 8:
2345 return get_cr8(vcpu);
8776e519
HB		 2346 default:
2347 vcpu_printf(vcpu, "%s: unexpected cr %u\n", __FUNCTION__, cr);
2348 return 0;
2349 }
2350}
2351
2352void realmode_set_cr(struct kvm_vcpu *vcpu, int cr, unsigned long val,
2353 unsigned long *rflags)
2354{
2355 switch (cr) {
2356 case 0:
ad312c7c 2357 set_cr0(vcpu, mk_cr_64(vcpu->arch.cr0, val));
8776e519
HB		 2358 *rflags = kvm_x86_ops->get_rflags(vcpu);
2359 break;
2360 case 2:
ad312c7c 2361 vcpu->arch.cr2 = val;
8776e519
HB		 2362 break;
2363 case 3:
2364 set_cr3(vcpu, val);
2365 break;
2366 case 4:
ad312c7c 2367 set_cr4(vcpu, mk_cr_64(vcpu->arch.cr4, val));
8776e519 2368 break;
152ff9be
JR		 2369 case 8:
2370 set_cr8(vcpu, val & 0xfUL);
2371 break;
8776e519
HB		 2372 default:
2373 vcpu_printf(vcpu, "%s: unexpected cr %u\n", __FUNCTION__, cr);
2374 }
2375}
2376
07716717
DK		 2377static int move_to_next_stateful_cpuid_entry(struct kvm_vcpu *vcpu, int i)
2378{
ad312c7c
ZX		 2379 struct kvm_cpuid_entry2 *e = &vcpu->arch.cpuid_entries[i];
2380 int j, nent = vcpu->arch.cpuid_nent;
07716717
DK		 2381
2382 e->flags &= ~KVM_CPUID_FLAG_STATE_READ_NEXT;
2383 /* when no next entry is found, the current entry[i] is reselected */
2384 for (j = i + 1; j == i; j = (j + 1) % nent) {
ad312c7c 2385 struct kvm_cpuid_entry2 *ej = &vcpu->arch.cpuid_entries[j];
07716717
DK		 2386 if (ej->function == e->function) {
2387 ej->flags |= KVM_CPUID_FLAG_STATE_READ_NEXT;
2388 return j;
2389 }
2390 }
2391 return 0; /* silence gcc, even though control never reaches here */
2392}
2393
2394/* find an entry with matching function, matching index (if needed), and that
2395 * should be read next (if it's stateful) */
2396static int is_matching_cpuid_entry(struct kvm_cpuid_entry2 *e,
2397 u32 function, u32 index)
2398{
2399 if (e->function != function)
2400 return 0;
2401 if ((e->flags & KVM_CPUID_FLAG_SIGNIFCANT_INDEX) && e->index != index)
2402 return 0;
2403 if ((e->flags & KVM_CPUID_FLAG_STATEFUL_FUNC) &&
2404 !(e->flags & KVM_CPUID_FLAG_STATE_READ_NEXT))
2405 return 0;
2406 return 1;
2407}
2408
8776e519
HB		 2409void kvm_emulate_cpuid(struct kvm_vcpu *vcpu)
2410{
2411 int i;
07716717
DK		 2412 u32 function, index;
2413 struct kvm_cpuid_entry2 *e, *best;
8776e519
HB		 2414
2415 kvm_x86_ops->cache_regs(vcpu);
ad312c7c
ZX		 2416 function = vcpu->arch.regs[VCPU_REGS_RAX];
2417 index = vcpu->arch.regs[VCPU_REGS_RCX];
2418 vcpu->arch.regs[VCPU_REGS_RAX] = 0;
2419 vcpu->arch.regs[VCPU_REGS_RBX] = 0;
2420 vcpu->arch.regs[VCPU_REGS_RCX] = 0;
2421 vcpu->arch.regs[VCPU_REGS_RDX] = 0;
8776e519 2422 best = NULL;
ad312c7c
ZX		 2423 for (i = 0; i < vcpu->arch.cpuid_nent; ++i) {
2424 e = &vcpu->arch.cpuid_entries[i];
07716717
DK		 2425 if (is_matching_cpuid_entry(e, function, index)) {
2426 if (e->flags & KVM_CPUID_FLAG_STATEFUL_FUNC)
2427 move_to_next_stateful_cpuid_entry(vcpu, i);
8776e519
HB		 2428 best = e;
2429 break;
2430 }
2431 /*
2432 * Both basic or both extended?
2433 */
2434 if (((e->function ^ function) & 0x80000000) == 0)
2435 if (!best || e->function > best->function)
2436 best = e;
2437 }
2438 if (best) {
ad312c7c
ZX		 2439 vcpu->arch.regs[VCPU_REGS_RAX] = best->eax;
2440 vcpu->arch.regs[VCPU_REGS_RBX] = best->ebx;
2441 vcpu->arch.regs[VCPU_REGS_RCX] = best->ecx;
2442 vcpu->arch.regs[VCPU_REGS_RDX] = best->edx;
8776e519
HB		 2443 }
2444 kvm_x86_ops->decache_regs(vcpu);
2445 kvm_x86_ops->skip_emulated_instruction(vcpu);
2446}
2447EXPORT_SYMBOL_GPL(kvm_emulate_cpuid);
d0752060 2448
b6c7a5dc
HB		 2449/*
2450 * Check if userspace requested an interrupt window, and that the
2451 * interrupt window is open.
2452 *
2453 * No need to exit to userspace if we already have an interrupt queued.
2454 */
2455static int dm_request_for_irq_injection(struct kvm_vcpu *vcpu,
2456 struct kvm_run *kvm_run)
2457{
ad312c7c 2458 return (!vcpu->arch.irq_summary &&
b6c7a5dc 2459 kvm_run->request_interrupt_window &&
ad312c7c 2460 vcpu->arch.interrupt_window_open &&
b6c7a5dc
HB		 2461 (kvm_x86_ops->get_rflags(vcpu) & X86_EFLAGS_IF));
2462}
2463
2464static void post_kvm_run_save(struct kvm_vcpu *vcpu,
2465 struct kvm_run *kvm_run)
2466{
2467 kvm_run->if_flag = (kvm_x86_ops->get_rflags(vcpu) & X86_EFLAGS_IF) != 0;
2468 kvm_run->cr8 = get_cr8(vcpu);
2469 kvm_run->apic_base = kvm_get_apic_base(vcpu);
2470 if (irqchip_in_kernel(vcpu->kvm))
2471 kvm_run->ready_for_interrupt_injection = 1;
2472 else
2473 kvm_run->ready_for_interrupt_injection =
ad312c7c
ZX		 2474 (vcpu->arch.interrupt_window_open &&
2475 vcpu->arch.irq_summary == 0);
b6c7a5dc
HB		 2476}
2477
b93463aa
AK		 2478static void vapic_enter(struct kvm_vcpu *vcpu)
2479{
2480 struct kvm_lapic *apic = vcpu->arch.apic;
2481 struct page *page;
2482
2483 if (!apic || !apic->vapic_addr)
2484 return;
2485
10589a46 2486 down_read(&current->mm->mmap_sem);
b93463aa
AK		 2487 page = gfn_to_page(vcpu->kvm, apic->vapic_addr >> PAGE_SHIFT);
2488 vcpu->arch.apic->vapic_page = page;
10589a46 2489 up_read(&current->mm->mmap_sem);
b93463aa
AK		 2490}
2491
2492static void vapic_exit(struct kvm_vcpu *vcpu)
2493{
2494 struct kvm_lapic *apic = vcpu->arch.apic;
2495
2496 if (!apic || !apic->vapic_addr)
2497 return;
2498
2499 kvm_release_page_dirty(apic->vapic_page);
2500 mark_page_dirty(vcpu->kvm, apic->vapic_addr >> PAGE_SHIFT);
2501}
2502
b6c7a5dc
HB		 2503static int __vcpu_run(struct kvm_vcpu *vcpu, struct kvm_run *kvm_run)
2504{
2505 int r;
2506
ad312c7c 2507 if (unlikely(vcpu->arch.mp_state == VCPU_MP_STATE_SIPI_RECEIVED)) {
b6c7a5dc 2508 pr_debug("vcpu %d received sipi with vector # %x\n",
ad312c7c 2509 vcpu->vcpu_id, vcpu->arch.sipi_vector);
b6c7a5dc
HB		 2510 kvm_lapic_reset(vcpu);
2511 r = kvm_x86_ops->vcpu_reset(vcpu);
2512 if (r)
2513 return r;
ad312c7c 2514 vcpu->arch.mp_state = VCPU_MP_STATE_RUNNABLE;
b6c7a5dc
HB		 2515 }
2516
b93463aa
AK		 2517 vapic_enter(vcpu);
2518
b6c7a5dc
HB		 2519preempted:
2520 if (vcpu->guest_debug.enabled)
2521 kvm_x86_ops->guest_debug_pre(vcpu);
2522
2523again:
2524 r = kvm_mmu_reload(vcpu);
2525 if (unlikely(r))
2526 goto out;
2527
2f52d58c
AK		 2528 if (vcpu->requests) {
2529 if (test_and_clear_bit(KVM_REQ_MIGRATE_TIMER, &vcpu->requests))
2530 __kvm_migrate_apic_timer(vcpu);
b93463aa
AK		 2531 if (test_and_clear_bit(KVM_REQ_REPORT_TPR_ACCESS,
2532 &vcpu->requests)) {
2533 kvm_run->exit_reason = KVM_EXIT_TPR_ACCESS;
2534 r = 0;
2535 goto out;
2536 }
2f52d58c 2537 }
b93463aa 2538
b6c7a5dc
HB		 2539 kvm_inject_pending_timer_irqs(vcpu);
2540
2541 preempt_disable();
2542
2543 kvm_x86_ops->prepare_guest_switch(vcpu);
2544 kvm_load_guest_fpu(vcpu);
2545
2546 local_irq_disable();
2547
6c142801
AK		 2548 if (need_resched()) {
2549 local_irq_enable();
2550 preempt_enable();
2551 r = 1;
2552 goto out;
2553 }
2554
b6c7a5dc
HB		 2555 if (signal_pending(current)) {
2556 local_irq_enable();
2557 preempt_enable();
2558 r = -EINTR;
2559 kvm_run->exit_reason = KVM_EXIT_INTR;
2560 ++vcpu->stat.signal_exits;
2561 goto out;
2562 }
2563
ad312c7c 2564 if (vcpu->arch.exception.pending)
298101da
AK		 2565 __queue_exception(vcpu);
2566 else if (irqchip_in_kernel(vcpu->kvm))
b6c7a5dc 2567 kvm_x86_ops->inject_pending_irq(vcpu);
eb9774f0 2568 else
b6c7a5dc
HB		 2569 kvm_x86_ops->inject_pending_vectors(vcpu, kvm_run);
2570
b93463aa
AK		 2571 kvm_lapic_sync_to_vapic(vcpu);
2572
b6c7a5dc
HB		 2573 vcpu->guest_mode = 1;
2574 kvm_guest_enter();
2575
2576 if (vcpu->requests)
2577 if (test_and_clear_bit(KVM_REQ_TLB_FLUSH, &vcpu->requests))
2578 kvm_x86_ops->tlb_flush(vcpu);
2579
2580 kvm_x86_ops->run(vcpu, kvm_run);
2581
2582 vcpu->guest_mode = 0;
2583 local_irq_enable();
2584
2585 ++vcpu->stat.exits;
2586
2587 /*
2588 * We must have an instruction between local_irq_enable() and
2589 * kvm_guest_exit(), so the timer interrupt isn't delayed by
2590 * the interrupt shadow. The stat.exits increment will do nicely.
2591 * But we need to prevent reordering, hence this barrier():
2592 */
2593 barrier();
2594
2595 kvm_guest_exit();
2596
2597 preempt_enable();
2598
2599 /*
2600 * Profile KVM exit RIPs:
2601 */
2602 if (unlikely(prof_on == KVM_PROFILING)) {
2603 kvm_x86_ops->cache_regs(vcpu);
ad312c7c 2604 profile_hit(KVM_PROFILING, (void *)vcpu->arch.rip);
b6c7a5dc
HB		 2605 }
2606
ad312c7c
ZX		 2607 if (vcpu->arch.exception.pending && kvm_x86_ops->exception_injected(vcpu))
2608 vcpu->arch.exception.pending = false;
298101da 2609
b93463aa
AK		 2610 kvm_lapic_sync_from_vapic(vcpu);
2611
b6c7a5dc
HB		 2612 r = kvm_x86_ops->handle_exit(kvm_run, vcpu);
2613
2614 if (r > 0) {
2615 if (dm_request_for_irq_injection(vcpu, kvm_run)) {
2616 r = -EINTR;
2617 kvm_run->exit_reason = KVM_EXIT_INTR;
2618 ++vcpu->stat.request_irq_exits;
2619 goto out;
2620 }
e1beb1d3 2621 if (!need_resched())
b6c7a5dc 2622 goto again;
b6c7a5dc
HB		 2623 }
2624
2625out:
2626 if (r > 0) {
2627 kvm_resched(vcpu);
2628 goto preempted;
2629 }
2630
2631 post_kvm_run_save(vcpu, kvm_run);
2632
b93463aa
AK		 2633 vapic_exit(vcpu);
2634
b6c7a5dc
HB		 2635 return r;
2636}
2637
2638int kvm_arch_vcpu_ioctl_run(struct kvm_vcpu *vcpu, struct kvm_run *kvm_run)
2639{
2640 int r;
2641 sigset_t sigsaved;
2642
2643 vcpu_load(vcpu);
2644
ad312c7c 2645 if (unlikely(vcpu->arch.mp_state == VCPU_MP_STATE_UNINITIALIZED)) {
b6c7a5dc
HB		 2646 kvm_vcpu_block(vcpu);
2647 vcpu_put(vcpu);
2648 return -EAGAIN;
2649 }
2650
2651 if (vcpu->sigset_active)
2652 sigprocmask(SIG_SETMASK, &vcpu->sigset, &sigsaved);
2653
2654 /* re-sync apic's tpr */
2655 if (!irqchip_in_kernel(vcpu->kvm))
2656 set_cr8(vcpu, kvm_run->cr8);
2657
ad312c7c 2658 if (vcpu->arch.pio.cur_count) {
b6c7a5dc
HB		 2659 r = complete_pio(vcpu);
2660 if (r)
2661 goto out;
2662 }
2663#if CONFIG_HAS_IOMEM
2664 if (vcpu->mmio_needed) {
2665 memcpy(vcpu->mmio_data, kvm_run->mmio.data, 8);
2666 vcpu->mmio_read_completed = 1;
2667 vcpu->mmio_needed = 0;
2668 r = emulate_instruction(vcpu, kvm_run,
571008da
SY		 2669 vcpu->arch.mmio_fault_cr2, 0,
2670 EMULTYPE_NO_DECODE);
b6c7a5dc
HB		 2671 if (r == EMULATE_DO_MMIO) {
2672 /*
2673 * Read-modify-write. Back to userspace.
2674 */
2675 r = 0;
2676 goto out;
2677 }
2678 }
2679#endif
2680 if (kvm_run->exit_reason == KVM_EXIT_HYPERCALL) {
2681 kvm_x86_ops->cache_regs(vcpu);
ad312c7c 2682 vcpu->arch.regs[VCPU_REGS_RAX] = kvm_run->hypercall.ret;
b6c7a5dc
HB		 2683 kvm_x86_ops->decache_regs(vcpu);
2684 }
2685
2686 r = __vcpu_run(vcpu, kvm_run);
2687
2688out:
2689 if (vcpu->sigset_active)
2690 sigprocmask(SIG_SETMASK, &sigsaved, NULL);
2691
2692 vcpu_put(vcpu);
2693 return r;
2694}
2695
2696int kvm_arch_vcpu_ioctl_get_regs(struct kvm_vcpu *vcpu, struct kvm_regs *regs)
2697{
2698 vcpu_load(vcpu);
2699
2700 kvm_x86_ops->cache_regs(vcpu);
2701
ad312c7c
ZX		 2702 regs->rax = vcpu->arch.regs[VCPU_REGS_RAX];
2703 regs->rbx = vcpu->arch.regs[VCPU_REGS_RBX];
2704 regs->rcx = vcpu->arch.regs[VCPU_REGS_RCX];
2705 regs->rdx = vcpu->arch.regs[VCPU_REGS_RDX];
2706 regs->rsi = vcpu->arch.regs[VCPU_REGS_RSI];
2707 regs->rdi = vcpu->arch.regs[VCPU_REGS_RDI];
2708 regs->rsp = vcpu->arch.regs[VCPU_REGS_RSP];
2709 regs->rbp = vcpu->arch.regs[VCPU_REGS_RBP];
b6c7a5dc 2710#ifdef CONFIG_X86_64
ad312c7c
ZX		 2711 regs->r8 = vcpu->arch.regs[VCPU_REGS_R8];
2712 regs->r9 = vcpu->arch.regs[VCPU_REGS_R9];
2713 regs->r10 = vcpu->arch.regs[VCPU_REGS_R10];
2714 regs->r11 = vcpu->arch.regs[VCPU_REGS_R11];
2715 regs->r12 = vcpu->arch.regs[VCPU_REGS_R12];
2716 regs->r13 = vcpu->arch.regs[VCPU_REGS_R13];
2717 regs->r14 = vcpu->arch.regs[VCPU_REGS_R14];
2718 regs->r15 = vcpu->arch.regs[VCPU_REGS_R15];
b6c7a5dc
HB		 2719#endif
2720
ad312c7c 2721 regs->rip = vcpu->arch.rip;
b6c7a5dc
HB		 2722 regs->rflags = kvm_x86_ops->get_rflags(vcpu);
2723
2724 /*
2725 * Don't leak debug flags in case they were set for guest debugging
2726 */
2727 if (vcpu->guest_debug.enabled && vcpu->guest_debug.singlestep)
2728 regs->rflags &= ~(X86_EFLAGS_TF | X86_EFLAGS_RF);
2729
2730 vcpu_put(vcpu);
2731
2732 return 0;
2733}
2734
2735int kvm_arch_vcpu_ioctl_set_regs(struct kvm_vcpu *vcpu, struct kvm_regs *regs)
2736{
2737 vcpu_load(vcpu);
2738
ad312c7c
ZX		 2739 vcpu->arch.regs[VCPU_REGS_RAX] = regs->rax;
2740 vcpu->arch.regs[VCPU_REGS_RBX] = regs->rbx;
2741 vcpu->arch.regs[VCPU_REGS_RCX] = regs->rcx;
2742 vcpu->arch.regs[VCPU_REGS_RDX] = regs->rdx;
2743 vcpu->arch.regs[VCPU_REGS_RSI] = regs->rsi;
2744 vcpu->arch.regs[VCPU_REGS_RDI] = regs->rdi;
2745 vcpu->arch.regs[VCPU_REGS_RSP] = regs->rsp;
2746 vcpu->arch.regs[VCPU_REGS_RBP] = regs->rbp;
b6c7a5dc 2747#ifdef CONFIG_X86_64
ad312c7c
ZX		 2748 vcpu->arch.regs[VCPU_REGS_R8] = regs->r8;
2749 vcpu->arch.regs[VCPU_REGS_R9] = regs->r9;
2750 vcpu->arch.regs[VCPU_REGS_R10] = regs->r10;
2751 vcpu->arch.regs[VCPU_REGS_R11] = regs->r11;
2752 vcpu->arch.regs[VCPU_REGS_R12] = regs->r12;
2753 vcpu->arch.regs[VCPU_REGS_R13] = regs->r13;
2754 vcpu->arch.regs[VCPU_REGS_R14] = regs->r14;
2755 vcpu->arch.regs[VCPU_REGS_R15] = regs->r15;
b6c7a5dc
HB		 2756#endif
2757
ad312c7c 2758 vcpu->arch.rip = regs->rip;
b6c7a5dc
HB		 2759 kvm_x86_ops->set_rflags(vcpu, regs->rflags);
2760
2761 kvm_x86_ops->decache_regs(vcpu);
2762
2763 vcpu_put(vcpu);
2764
2765 return 0;
2766}
2767
2768static void get_segment(struct kvm_vcpu *vcpu,
2769 struct kvm_segment *var, int seg)
2770{
2771 return kvm_x86_ops->get_segment(vcpu, var, seg);
2772}
2773
2774void kvm_get_cs_db_l_bits(struct kvm_vcpu *vcpu, int *db, int *l)
2775{
2776 struct kvm_segment cs;
2777
2778 get_segment(vcpu, &cs, VCPU_SREG_CS);
2779 *db = cs.db;
2780 *l = cs.l;
2781}
2782EXPORT_SYMBOL_GPL(kvm_get_cs_db_l_bits);
2783
2784int kvm_arch_vcpu_ioctl_get_sregs(struct kvm_vcpu *vcpu,
2785 struct kvm_sregs *sregs)
2786{
2787 struct descriptor_table dt;
2788 int pending_vec;
2789
2790 vcpu_load(vcpu);
2791
2792 get_segment(vcpu, &sregs->cs, VCPU_SREG_CS);
2793 get_segment(vcpu, &sregs->ds, VCPU_SREG_DS);
2794 get_segment(vcpu, &sregs->es, VCPU_SREG_ES);
2795 get_segment(vcpu, &sregs->fs, VCPU_SREG_FS);
2796 get_segment(vcpu, &sregs->gs, VCPU_SREG_GS);
2797 get_segment(vcpu, &sregs->ss, VCPU_SREG_SS);
2798
2799 get_segment(vcpu, &sregs->tr, VCPU_SREG_TR);
2800 get_segment(vcpu, &sregs->ldt, VCPU_SREG_LDTR);
2801
2802 kvm_x86_ops->get_idt(vcpu, &dt);
2803 sregs->idt.limit = dt.limit;
2804 sregs->idt.base = dt.base;
2805 kvm_x86_ops->get_gdt(vcpu, &dt);
2806 sregs->gdt.limit = dt.limit;
2807 sregs->gdt.base = dt.base;
2808
2809 kvm_x86_ops->decache_cr4_guest_bits(vcpu);
ad312c7c
ZX		 2810 sregs->cr0 = vcpu->arch.cr0;
2811 sregs->cr2 = vcpu->arch.cr2;
2812 sregs->cr3 = vcpu->arch.cr3;
2813 sregs->cr4 = vcpu->arch.cr4;
b6c7a5dc 2814 sregs->cr8 = get_cr8(vcpu);
ad312c7c 2815 sregs->efer = vcpu->arch.shadow_efer;
b6c7a5dc
HB		 2816 sregs->apic_base = kvm_get_apic_base(vcpu);
2817
2818 if (irqchip_in_kernel(vcpu->kvm)) {
2819 memset(sregs->interrupt_bitmap, 0,
2820 sizeof sregs->interrupt_bitmap);
2821 pending_vec = kvm_x86_ops->get_irq(vcpu);
2822 if (pending_vec >= 0)
2823 set_bit(pending_vec,
2824 (unsigned long *)sregs->interrupt_bitmap);
2825 } else
ad312c7c 2826 memcpy(sregs->interrupt_bitmap, vcpu->arch.irq_pending,
b6c7a5dc
HB		 2827 sizeof sregs->interrupt_bitmap);
2828
2829 vcpu_put(vcpu);
2830
2831 return 0;
2832}
2833
2834static void set_segment(struct kvm_vcpu *vcpu,
2835 struct kvm_segment *var, int seg)
2836{
2837 return kvm_x86_ops->set_segment(vcpu, var, seg);
2838}
2839
2840int kvm_arch_vcpu_ioctl_set_sregs(struct kvm_vcpu *vcpu,
2841 struct kvm_sregs *sregs)
2842{
2843 int mmu_reset_needed = 0;
2844 int i, pending_vec, max_bits;
2845 struct descriptor_table dt;
2846
2847 vcpu_load(vcpu);
2848
2849 dt.limit = sregs->idt.limit;
2850 dt.base = sregs->idt.base;
2851 kvm_x86_ops->set_idt(vcpu, &dt);
2852 dt.limit = sregs->gdt.limit;
2853 dt.base = sregs->gdt.base;
2854 kvm_x86_ops->set_gdt(vcpu, &dt);
2855
ad312c7c
ZX		 2856 vcpu->arch.cr2 = sregs->cr2;
2857 mmu_reset_needed |= vcpu->arch.cr3 != sregs->cr3;
2858 vcpu->arch.cr3 = sregs->cr3;
b6c7a5dc
HB		 2859
2860 set_cr8(vcpu, sregs->cr8);
2861
ad312c7c 2862 mmu_reset_needed |= vcpu->arch.shadow_efer != sregs->efer;
b6c7a5dc
HB		 2863#ifdef CONFIG_X86_64
2864 kvm_x86_ops->set_efer(vcpu, sregs->efer);
2865#endif
2866 kvm_set_apic_base(vcpu, sregs->apic_base);
2867
2868 kvm_x86_ops->decache_cr4_guest_bits(vcpu);
2869
ad312c7c 2870 mmu_reset_needed |= vcpu->arch.cr0 != sregs->cr0;
b6c7a5dc 2871 kvm_x86_ops->set_cr0(vcpu, sregs->cr0);
d7306163 2872 vcpu->arch.cr0 = sregs->cr0;
b6c7a5dc 2873
ad312c7c 2874 mmu_reset_needed |= vcpu->arch.cr4 != sregs->cr4;
b6c7a5dc
HB		 2875 kvm_x86_ops->set_cr4(vcpu, sregs->cr4);
2876 if (!is_long_mode(vcpu) && is_pae(vcpu))
ad312c7c 2877 load_pdptrs(vcpu, vcpu->arch.cr3);
b6c7a5dc
HB		 2878
2879 if (mmu_reset_needed)
2880 kvm_mmu_reset_context(vcpu);
2881
2882 if (!irqchip_in_kernel(vcpu->kvm)) {
ad312c7c
ZX		 2883 memcpy(vcpu->arch.irq_pending, sregs->interrupt_bitmap,
2884 sizeof vcpu->arch.irq_pending);
2885 vcpu->arch.irq_summary = 0;
2886 for (i = 0; i < ARRAY_SIZE(vcpu->arch.irq_pending); ++i)
2887 if (vcpu->arch.irq_pending[i])
2888 __set_bit(i, &vcpu->arch.irq_summary);
b6c7a5dc
HB		 2889 } else {
2890 max_bits = (sizeof sregs->interrupt_bitmap) << 3;
2891 pending_vec = find_first_bit(
2892 (const unsigned long *)sregs->interrupt_bitmap,
2893 max_bits);
2894 /* Only pending external irq is handled here */
2895 if (pending_vec < max_bits) {
2896 kvm_x86_ops->set_irq(vcpu, pending_vec);
2897 pr_debug("Set back pending irq %d\n",
2898 pending_vec);
2899 }
2900 }
2901
2902 set_segment(vcpu, &sregs->cs, VCPU_SREG_CS);
2903 set_segment(vcpu, &sregs->ds, VCPU_SREG_DS);
2904 set_segment(vcpu, &sregs->es, VCPU_SREG_ES);
2905 set_segment(vcpu, &sregs->fs, VCPU_SREG_FS);
2906 set_segment(vcpu, &sregs->gs, VCPU_SREG_GS);
2907 set_segment(vcpu, &sregs->ss, VCPU_SREG_SS);
2908
2909 set_segment(vcpu, &sregs->tr, VCPU_SREG_TR);
2910 set_segment(vcpu, &sregs->ldt, VCPU_SREG_LDTR);
2911
2912 vcpu_put(vcpu);
2913
2914 return 0;
2915}
2916
2917int kvm_arch_vcpu_ioctl_debug_guest(struct kvm_vcpu *vcpu,
2918 struct kvm_debug_guest *dbg)
2919{
2920 int r;
2921
2922 vcpu_load(vcpu);
2923
2924 r = kvm_x86_ops->set_guest_debug(vcpu, dbg);
2925
2926 vcpu_put(vcpu);
2927
2928 return r;
2929}
2930
d0752060
HB		 2931/*
2932 * fxsave fpu state. Taken from x86_64/processor.h. To be killed when
2933 * we have asm/x86/processor.h
2934 */
2935struct fxsave {
2936 u16 cwd;
2937 u16 swd;
2938 u16 twd;
2939 u16 fop;
2940 u64 rip;
2941 u64 rdp;
2942 u32 mxcsr;
2943 u32 mxcsr_mask;
2944 u32 st_space[32]; /* 8*16 bytes for each FP-reg = 128 bytes */
2945#ifdef CONFIG_X86_64
2946 u32 xmm_space[64]; /* 16*16 bytes for each XMM-reg = 256 bytes */
2947#else
2948 u32 xmm_space[32]; /* 8*16 bytes for each XMM-reg = 128 bytes */
2949#endif
2950};
2951
8b006791
ZX		 2952/*
2953 * Translate a guest virtual address to a guest physical address.
2954 */
2955int kvm_arch_vcpu_ioctl_translate(struct kvm_vcpu *vcpu,
2956 struct kvm_translation *tr)
2957{
2958 unsigned long vaddr = tr->linear_address;
2959 gpa_t gpa;
2960
2961 vcpu_load(vcpu);
10589a46 2962 down_read(&current->mm->mmap_sem);
ad312c7c 2963 gpa = vcpu->arch.mmu.gva_to_gpa(vcpu, vaddr);
10589a46 2964 up_read(&current->mm->mmap_sem);
8b006791
ZX		 2965 tr->physical_address = gpa;
2966 tr->valid = gpa != UNMAPPED_GVA;
2967 tr->writeable = 1;
2968 tr->usermode = 0;
8b006791
ZX		 2969 vcpu_put(vcpu);
2970
2971 return 0;
2972}
2973
d0752060
HB		 2974int kvm_arch_vcpu_ioctl_get_fpu(struct kvm_vcpu *vcpu, struct kvm_fpu *fpu)
2975{
ad312c7c 2976 struct fxsave *fxsave = (struct fxsave *)&vcpu->arch.guest_fx_image;
d0752060
HB		 2977
2978 vcpu_load(vcpu);
2979
2980 memcpy(fpu->fpr, fxsave->st_space, 128);
2981 fpu->fcw = fxsave->cwd;
2982 fpu->fsw = fxsave->swd;
2983 fpu->ftwx = fxsave->twd;
2984 fpu->last_opcode = fxsave->fop;
2985 fpu->last_ip = fxsave->rip;
2986 fpu->last_dp = fxsave->rdp;
2987 memcpy(fpu->xmm, fxsave->xmm_space, sizeof fxsave->xmm_space);
2988
2989 vcpu_put(vcpu);
2990
2991 return 0;
2992}
2993
2994int kvm_arch_vcpu_ioctl_set_fpu(struct kvm_vcpu *vcpu, struct kvm_fpu *fpu)
2995{
ad312c7c 2996 struct fxsave *fxsave = (struct fxsave *)&vcpu->arch.guest_fx_image;
d0752060
HB		 2997
2998 vcpu_load(vcpu);
2999
3000 memcpy(fxsave->st_space, fpu->fpr, 128);
3001 fxsave->cwd = fpu->fcw;
3002 fxsave->swd = fpu->fsw;
3003 fxsave->twd = fpu->ftwx;
3004 fxsave->fop = fpu->last_opcode;
3005 fxsave->rip = fpu->last_ip;
3006 fxsave->rdp = fpu->last_dp;
3007 memcpy(fxsave->xmm_space, fpu->xmm, sizeof fxsave->xmm_space);
3008
3009 vcpu_put(vcpu);
3010
3011 return 0;
3012}
3013
3014void fx_init(struct kvm_vcpu *vcpu)
3015{
3016 unsigned after_mxcsr_mask;
3017
3018 /* Initialize guest FPU by resetting ours and saving into guest's */
3019 preempt_disable();
ad312c7c 3020 fx_save(&vcpu->arch.host_fx_image);
d0752060 3021 fpu_init();
ad312c7c
ZX		 3022 fx_save(&vcpu->arch.guest_fx_image);
3023 fx_restore(&vcpu->arch.host_fx_image);
d0752060
HB		 3024 preempt_enable();
3025
ad312c7c 3026 vcpu->arch.cr0 |= X86_CR0_ET;
d0752060 3027 after_mxcsr_mask = offsetof(struct i387_fxsave_struct, st_space);
ad312c7c
ZX		 3028 vcpu->arch.guest_fx_image.mxcsr = 0x1f80;
3029 memset((void *)&vcpu->arch.guest_fx_image + after_mxcsr_mask,
d0752060
HB		 3030 0, sizeof(struct i387_fxsave_struct) - after_mxcsr_mask);
3031}
3032EXPORT_SYMBOL_GPL(fx_init);
3033
3034void kvm_load_guest_fpu(struct kvm_vcpu *vcpu)
3035{
3036 if (!vcpu->fpu_active || vcpu->guest_fpu_loaded)
3037 return;
3038
3039 vcpu->guest_fpu_loaded = 1;
ad312c7c
ZX		 3040 fx_save(&vcpu->arch.host_fx_image);
3041 fx_restore(&vcpu->arch.guest_fx_image);
d0752060
HB		 3042}
3043EXPORT_SYMBOL_GPL(kvm_load_guest_fpu);
3044
3045void kvm_put_guest_fpu(struct kvm_vcpu *vcpu)
3046{
3047 if (!vcpu->guest_fpu_loaded)
3048 return;
3049
3050 vcpu->guest_fpu_loaded = 0;
ad312c7c
ZX		 3051 fx_save(&vcpu->arch.guest_fx_image);
3052 fx_restore(&vcpu->arch.host_fx_image);
f096ed85 3053 ++vcpu->stat.fpu_reload;
d0752060
HB		 3054}
3055EXPORT_SYMBOL_GPL(kvm_put_guest_fpu);
e9b11c17
ZX		 3056
3057void kvm_arch_vcpu_free(struct kvm_vcpu *vcpu)
3058{
3059 kvm_x86_ops->vcpu_free(vcpu);
3060}
3061
3062struct kvm_vcpu *kvm_arch_vcpu_create(struct kvm *kvm,
3063 unsigned int id)
3064{
26e5215f
AK		 3065 return kvm_x86_ops->vcpu_create(kvm, id);
3066}
e9b11c17 3067
26e5215f
AK		 3068int kvm_arch_vcpu_setup(struct kvm_vcpu *vcpu)
3069{
3070 int r;
e9b11c17
ZX		 3071
3072 /* We do fxsave: this must be aligned. */
ad312c7c 3073 BUG_ON((unsigned long)&vcpu->arch.host_fx_image & 0xF);
e9b11c17
ZX		 3074
3075 vcpu_load(vcpu);
3076 r = kvm_arch_vcpu_reset(vcpu);
3077 if (r == 0)
3078 r = kvm_mmu_setup(vcpu);
3079 vcpu_put(vcpu);
3080 if (r < 0)
3081 goto free_vcpu;
3082
26e5215f 3083 return 0;
e9b11c17
ZX		 3084free_vcpu:
3085 kvm_x86_ops->vcpu_free(vcpu);
26e5215f 3086 return r;
e9b11c17
ZX		 3087}
3088
d40ccc62 3089void kvm_arch_vcpu_destroy(struct kvm_vcpu *vcpu)
e9b11c17
ZX		 3090{
3091 vcpu_load(vcpu);
3092 kvm_mmu_unload(vcpu);
3093 vcpu_put(vcpu);
3094
3095 kvm_x86_ops->vcpu_free(vcpu);
3096}
3097
3098int kvm_arch_vcpu_reset(struct kvm_vcpu *vcpu)
3099{
3100 return kvm_x86_ops->vcpu_reset(vcpu);
3101}
3102
3103void kvm_arch_hardware_enable(void *garbage)
3104{
3105 kvm_x86_ops->hardware_enable(garbage);
3106}
3107
3108void kvm_arch_hardware_disable(void *garbage)
3109{
3110 kvm_x86_ops->hardware_disable(garbage);
3111}
3112
3113int kvm_arch_hardware_setup(void)
3114{
3115 return kvm_x86_ops->hardware_setup();
3116}
3117
3118void kvm_arch_hardware_unsetup(void)
3119{
3120 kvm_x86_ops->hardware_unsetup();
3121}
3122
3123void kvm_arch_check_processor_compat(void *rtn)
3124{
3125 kvm_x86_ops->check_processor_compatibility(rtn);
3126}
3127
3128int kvm_arch_vcpu_init(struct kvm_vcpu *vcpu)
3129{
3130 struct page *page;
3131 struct kvm *kvm;
3132 int r;
3133
3134 BUG_ON(vcpu->kvm == NULL);
3135 kvm = vcpu->kvm;
3136
ad312c7c 3137 vcpu->arch.mmu.root_hpa = INVALID_PAGE;
e9b11c17 3138 if (!irqchip_in_kernel(kvm) || vcpu->vcpu_id == 0)
ad312c7c 3139 vcpu->arch.mp_state = VCPU_MP_STATE_RUNNABLE;
e9b11c17 3140 else
ad312c7c 3141 vcpu->arch.mp_state = VCPU_MP_STATE_UNINITIALIZED;
e9b11c17
ZX		 3142
3143 page = alloc_page(GFP_KERNEL | __GFP_ZERO);
3144 if (!page) {
3145 r = -ENOMEM;
3146 goto fail;
3147 }
ad312c7c 3148 vcpu->arch.pio_data = page_address(page);
e9b11c17
ZX		 3149
3150 r = kvm_mmu_create(vcpu);
3151 if (r < 0)
3152 goto fail_free_pio_data;
3153
3154 if (irqchip_in_kernel(kvm)) {
3155 r = kvm_create_lapic(vcpu);
3156 if (r < 0)
3157 goto fail_mmu_destroy;
3158 }
3159
3160 return 0;
3161
3162fail_mmu_destroy:
3163 kvm_mmu_destroy(vcpu);
3164fail_free_pio_data:
ad312c7c 3165 free_page((unsigned long)vcpu->arch.pio_data);
e9b11c17
ZX		 3166fail:
3167 return r;
3168}
3169
3170void kvm_arch_vcpu_uninit(struct kvm_vcpu *vcpu)
3171{
3172 kvm_free_lapic(vcpu);
3173 kvm_mmu_destroy(vcpu);
ad312c7c 3174 free_page((unsigned long)vcpu->arch.pio_data);
e9b11c17 3175}
d19a9cd2
ZX		 3176
3177struct kvm *kvm_arch_create_vm(void)
3178{
3179 struct kvm *kvm = kzalloc(sizeof(struct kvm), GFP_KERNEL);
3180
3181 if (!kvm)
3182 return ERR_PTR(-ENOMEM);
3183
f05e70ac 3184 INIT_LIST_HEAD(&kvm->arch.active_mmu_pages);
d19a9cd2
ZX		 3185
3186 return kvm;
3187}
3188
3189static void kvm_unload_vcpu_mmu(struct kvm_vcpu *vcpu)
3190{
3191 vcpu_load(vcpu);
3192 kvm_mmu_unload(vcpu);
3193 vcpu_put(vcpu);
3194}
3195
3196static void kvm_free_vcpus(struct kvm *kvm)
3197{
3198 unsigned int i;
3199
3200 /*
3201 * Unpin any mmu pages first.
3202 */
3203 for (i = 0; i < KVM_MAX_VCPUS; ++i)
3204 if (kvm->vcpus[i])
3205 kvm_unload_vcpu_mmu(kvm->vcpus[i]);
3206 for (i = 0; i < KVM_MAX_VCPUS; ++i) {
3207 if (kvm->vcpus[i]) {
3208 kvm_arch_vcpu_free(kvm->vcpus[i]);
3209 kvm->vcpus[i] = NULL;
3210 }
3211 }
3212
3213}
3214
3215void kvm_arch_destroy_vm(struct kvm *kvm)
3216{
d7deeeb0
ZX		 3217 kfree(kvm->arch.vpic);
3218 kfree(kvm->arch.vioapic);
d19a9cd2
ZX		 3219 kvm_free_vcpus(kvm);
3220 kvm_free_physmem(kvm);
3221 kfree(kvm);
3222}
0de10343
ZX		 3223
3224int kvm_arch_set_memory_region(struct kvm *kvm,
3225 struct kvm_userspace_memory_region *mem,
3226 struct kvm_memory_slot old,
3227 int user_alloc)
3228{
3229 int npages = mem->memory_size >> PAGE_SHIFT;
3230 struct kvm_memory_slot *memslot = &kvm->memslots[mem->slot];
3231
3232 /*To keep backward compatibility with older userspace,
3233 *x86 needs to hanlde !user_alloc case.
3234 */
3235 if (!user_alloc) {
3236 if (npages && !old.rmap) {
0de10343
ZX		 3237 memslot->userspace_addr = do_mmap(NULL, 0,
3238 npages * PAGE_SIZE,
3239 PROT_READ | PROT_WRITE,
3240 MAP_SHARED | MAP_ANONYMOUS,
3241 0);
0de10343
ZX		 3242
3243 if (IS_ERR((void *)memslot->userspace_addr))
3244 return PTR_ERR((void *)memslot->userspace_addr);
3245 } else {
3246 if (!old.user_alloc && old.rmap) {
3247 int ret;
3248
0de10343
ZX		 3249 ret = do_munmap(current->mm, old.userspace_addr,
3250 old.npages * PAGE_SIZE);
0de10343
ZX		 3251 if (ret < 0)
3252 printk(KERN_WARNING
3253 "kvm_vm_ioctl_set_memory_region: "
3254 "failed to munmap memory\n");
3255 }
3256 }
3257 }
3258
f05e70ac 3259 if (!kvm->arch.n_requested_mmu_pages) {
0de10343
ZX		 3260 unsigned int nr_mmu_pages = kvm_mmu_calculate_mmu_pages(kvm);
3261 kvm_mmu_change_mmu_pages(kvm, nr_mmu_pages);
3262 }
3263
3264 kvm_mmu_slot_remove_write_access(kvm, mem->slot);
3265 kvm_flush_remote_tlbs(kvm);
3266
3267 return 0;
3268}
1d737c8a
ZX		 3269
3270int kvm_arch_vcpu_runnable(struct kvm_vcpu *vcpu)
3271{
3272 return vcpu->arch.mp_state == VCPU_MP_STATE_RUNNABLE
3273 || vcpu->arch.mp_state == VCPU_MP_STATE_SIPI_RECEIVED;
3274}
5736199a
ZX		 3275
3276static void vcpu_kick_intr(void *info)
3277{
3278#ifdef DEBUG
3279 struct kvm_vcpu *vcpu = (struct kvm_vcpu *)info;
3280 printk(KERN_DEBUG "vcpu_kick_intr %p \n", vcpu);
3281#endif
3282}
3283
3284void kvm_vcpu_kick(struct kvm_vcpu *vcpu)
3285{
3286 int ipi_pcpu = vcpu->cpu;
3287
3288 if (waitqueue_active(&vcpu->wq)) {
3289 wake_up_interruptible(&vcpu->wq);
3290 ++vcpu->stat.halt_wakeup;
3291 }
3292 if (vcpu->guest_mode)
3293 smp_call_function_single(ipi_pcpu, vcpu_kick_intr, vcpu, 0, 0);
3294}
Linux 6.x block layer and io_uring tree(s)