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KVM: SVM: Fix typo
[linux-2.6-block.git] / arch / x86 / kvm / x86.c
CommitLineData
043405e1
CO		 1/*
2 * Kernel-based Virtual Machine driver for Linux
3 *
4 * derived from drivers/kvm/kvm_main.c
5 *
6 * Copyright (C) 2006 Qumranet, Inc.
4d5c5d0f
BAY		 7 * Copyright (C) 2008 Qumranet, Inc.
8 * Copyright IBM Corporation, 2008
043405e1
CO		 9 *
10 * Authors:
11 * Avi Kivity <avi@qumranet.com>
12 * Yaniv Kamay <yaniv@qumranet.com>
4d5c5d0f
BAY		 13 * Amit Shah <amit.shah@qumranet.com>
14 * Ben-Ami Yassour <benami@il.ibm.com>
043405e1
CO		 15 *
16 * This work is licensed under the terms of the GNU GPL, version 2. See
17 * the COPYING file in the top-level directory.
18 *
19 */
20
edf88417 21#include <linux/kvm_host.h>
313a3dc7 22#include "irq.h"
1d737c8a 23#include "mmu.h"
7837699f 24#include "i8254.h"
37817f29 25#include "tss.h"
5fdbf976 26#include "kvm_cache_regs.h"
26eef70c 27#include "x86.h"
313a3dc7 28
18068523 29#include <linux/clocksource.h>
4d5c5d0f 30#include <linux/interrupt.h>
313a3dc7
CO		 31#include <linux/kvm.h>
32#include <linux/fs.h>
4d5c5d0f 33#include <linux/pci.h>
313a3dc7 34#include <linux/vmalloc.h>
5fb76f9b 35#include <linux/module.h>
0de10343 36#include <linux/mman.h>
2bacc55c 37#include <linux/highmem.h>
043405e1
CO		 38
39#include <asm/uaccess.h>
d825ed0a 40#include <asm/msr.h>
a5f61300 41#include <asm/desc.h>
043405e1 42
313a3dc7 43#define MAX_IO_MSRS 256
a03490ed
CO		 44#define CR0_RESERVED_BITS \
45 (~(unsigned long)(X86_CR0_PE | X86_CR0_MP | X86_CR0_EM | X86_CR0_TS \
46 | X86_CR0_ET | X86_CR0_NE | X86_CR0_WP | X86_CR0_AM \
47 | X86_CR0_NW | X86_CR0_CD | X86_CR0_PG))
48#define CR4_RESERVED_BITS \
49 (~(unsigned long)(X86_CR4_VME | X86_CR4_PVI | X86_CR4_TSD | X86_CR4_DE\
50 | X86_CR4_PSE | X86_CR4_PAE | X86_CR4_MCE \
51 | X86_CR4_PGE | X86_CR4_PCE | X86_CR4_OSFXSR \
52 | X86_CR4_OSXMMEXCPT | X86_CR4_VMXE))
53
54#define CR8_RESERVED_BITS (~(unsigned long)X86_CR8_TPR)
50a37eb4
JR		 55/* EFER defaults:
56 * - enable syscall per default because its emulated by KVM
57 * - enable LME and LMA per default on 64 bit KVM
58 */
59#ifdef CONFIG_X86_64
60static u64 __read_mostly efer_reserved_bits = 0xfffffffffffffafeULL;
61#else
62static u64 __read_mostly efer_reserved_bits = 0xfffffffffffffffeULL;
63#endif
313a3dc7 64
ba1389b7
AK		 65#define VM_STAT(x) offsetof(struct kvm, stat.x), KVM_STAT_VM
66#define VCPU_STAT(x) offsetof(struct kvm_vcpu, stat.x), KVM_STAT_VCPU
417bc304 67
674eea0f
AK		 68static int kvm_dev_ioctl_get_supported_cpuid(struct kvm_cpuid2 *cpuid,
69 struct kvm_cpuid_entry2 __user *entries);
70
97896d04 71struct kvm_x86_ops *kvm_x86_ops;
5fdbf976 72EXPORT_SYMBOL_GPL(kvm_x86_ops);
97896d04 73
417bc304 74struct kvm_stats_debugfs_item debugfs_entries[] = {
ba1389b7
AK		 75 { "pf_fixed", VCPU_STAT(pf_fixed) },
76 { "pf_guest", VCPU_STAT(pf_guest) },
77 { "tlb_flush", VCPU_STAT(tlb_flush) },
78 { "invlpg", VCPU_STAT(invlpg) },
79 { "exits", VCPU_STAT(exits) },
80 { "io_exits", VCPU_STAT(io_exits) },
81 { "mmio_exits", VCPU_STAT(mmio_exits) },
82 { "signal_exits", VCPU_STAT(signal_exits) },
83 { "irq_window", VCPU_STAT(irq_window_exits) },
f08864b4 84 { "nmi_window", VCPU_STAT(nmi_window_exits) },
ba1389b7
AK		 85 { "halt_exits", VCPU_STAT(halt_exits) },
86 { "halt_wakeup", VCPU_STAT(halt_wakeup) },
f11c3a8d 87 { "hypercalls", VCPU_STAT(hypercalls) },
ba1389b7
AK		 88 { "request_irq", VCPU_STAT(request_irq_exits) },
89 { "irq_exits", VCPU_STAT(irq_exits) },
90 { "host_state_reload", VCPU_STAT(host_state_reload) },
91 { "efer_reload", VCPU_STAT(efer_reload) },
92 { "fpu_reload", VCPU_STAT(fpu_reload) },
93 { "insn_emulation", VCPU_STAT(insn_emulation) },
94 { "insn_emulation_fail", VCPU_STAT(insn_emulation_fail) },
4cee5764
AK		 95 { "mmu_shadow_zapped", VM_STAT(mmu_shadow_zapped) },
96 { "mmu_pte_write", VM_STAT(mmu_pte_write) },
97 { "mmu_pte_updated", VM_STAT(mmu_pte_updated) },
98 { "mmu_pde_zapped", VM_STAT(mmu_pde_zapped) },
99 { "mmu_flooded", VM_STAT(mmu_flooded) },
100 { "mmu_recycled", VM_STAT(mmu_recycled) },
dfc5aa00 101 { "mmu_cache_miss", VM_STAT(mmu_cache_miss) },
0f74a24c 102 { "remote_tlb_flush", VM_STAT(remote_tlb_flush) },
05da4558 103 { "largepages", VM_STAT(lpages) },
417bc304
HB		 104 { NULL }
105};
106
4d5c5d0f
BAY		 107struct kvm_assigned_dev_kernel *kvm_find_assigned_dev(struct list_head *head,
108 int assigned_dev_id)
109{
110 struct list_head *ptr;
111 struct kvm_assigned_dev_kernel *match;
112
113 list_for_each(ptr, head) {
114 match = list_entry(ptr, struct kvm_assigned_dev_kernel, list);
115 if (match->assigned_dev_id == assigned_dev_id)
116 return match;
117 }
118 return NULL;
119}
120
121static void kvm_assigned_dev_interrupt_work_handler(struct work_struct *work)
122{
123 struct kvm_assigned_dev_kernel *assigned_dev;
124
125 assigned_dev = container_of(work, struct kvm_assigned_dev_kernel,
126 interrupt_work);
127
128 /* This is taken to safely inject irq inside the guest. When
129 * the interrupt injection (or the ioapic code) uses a
130 * finer-grained lock, update this
131 */
132 mutex_lock(&assigned_dev->kvm->lock);
133 kvm_set_irq(assigned_dev->kvm,
134 assigned_dev->guest_irq, 1);
135 mutex_unlock(&assigned_dev->kvm->lock);
136 kvm_put_kvm(assigned_dev->kvm);
137}
138
139/* FIXME: Implement the OR logic needed to make shared interrupts on
140 * this line behave properly
141 */
142static irqreturn_t kvm_assigned_dev_intr(int irq, void *dev_id)
143{
144 struct kvm_assigned_dev_kernel *assigned_dev =
145 (struct kvm_assigned_dev_kernel *) dev_id;
146
147 kvm_get_kvm(assigned_dev->kvm);
148 schedule_work(&assigned_dev->interrupt_work);
149 disable_irq_nosync(irq);
150 return IRQ_HANDLED;
151}
152
153/* Ack the irq line for an assigned device */
154static void kvm_assigned_dev_ack_irq(struct kvm_irq_ack_notifier *kian)
155{
156 struct kvm_assigned_dev_kernel *dev;
157
158 if (kian->gsi == -1)
159 return;
160
161 dev = container_of(kian, struct kvm_assigned_dev_kernel,
162 ack_notifier);
163 kvm_set_irq(dev->kvm, dev->guest_irq, 0);
164 enable_irq(dev->host_irq);
165}
166
167static int kvm_vm_ioctl_assign_irq(struct kvm *kvm,
168 struct kvm_assigned_irq
169 *assigned_irq)
170{
171 int r = 0;
172 struct kvm_assigned_dev_kernel *match;
173
174 mutex_lock(&kvm->lock);
175
176 match = kvm_find_assigned_dev(&kvm->arch.assigned_dev_head,
177 assigned_irq->assigned_dev_id);
178 if (!match) {
179 mutex_unlock(&kvm->lock);
180 return -EINVAL;
181 }
182
183 if (match->irq_requested) {
184 match->guest_irq = assigned_irq->guest_irq;
185 match->ack_notifier.gsi = assigned_irq->guest_irq;
186 mutex_unlock(&kvm->lock);
187 return 0;
188 }
189
190 INIT_WORK(&match->interrupt_work,
191 kvm_assigned_dev_interrupt_work_handler);
192
193 if (irqchip_in_kernel(kvm)) {
6762b729
AS		 194 if (!capable(CAP_SYS_RAWIO)) {
195 return -EPERM;
196 goto out;
197 }
198
4d5c5d0f
BAY		 199 if (assigned_irq->host_irq)
200 match->host_irq = assigned_irq->host_irq;
201 else
202 match->host_irq = match->dev->irq;
203 match->guest_irq = assigned_irq->guest_irq;
204 match->ack_notifier.gsi = assigned_irq->guest_irq;
205 match->ack_notifier.irq_acked = kvm_assigned_dev_ack_irq;
206 kvm_register_irq_ack_notifier(kvm, &match->ack_notifier);
207
208 /* Even though this is PCI, we don't want to use shared
209 * interrupts. Sharing host devices with guest-assigned devices
210 * on the same interrupt line is not a happy situation: there
211 * are going to be long delays in accepting, acking, etc.
212 */
213 if (request_irq(match->host_irq, kvm_assigned_dev_intr, 0,
214 "kvm_assigned_device", (void *)match)) {
215 printk(KERN_INFO "%s: couldn't allocate irq for pv "
216 "device\n", __func__);
217 r = -EIO;
218 goto out;
219 }
220 }
221
222 match->irq_requested = true;
223out:
224 mutex_unlock(&kvm->lock);
225 return r;
226}
227
228static int kvm_vm_ioctl_assign_device(struct kvm *kvm,
229 struct kvm_assigned_pci_dev *assigned_dev)
230{
231 int r = 0;
232 struct kvm_assigned_dev_kernel *match;
233 struct pci_dev *dev;
234
235 mutex_lock(&kvm->lock);
236
237 match = kvm_find_assigned_dev(&kvm->arch.assigned_dev_head,
238 assigned_dev->assigned_dev_id);
239 if (match) {
240 /* device already assigned */
241 r = -EINVAL;
242 goto out;
243 }
244
245 match = kzalloc(sizeof(struct kvm_assigned_dev_kernel), GFP_KERNEL);
246 if (match == NULL) {
247 printk(KERN_INFO "%s: Couldn't allocate memory\n",
248 __func__);
249 r = -ENOMEM;
250 goto out;
251 }
252 dev = pci_get_bus_and_slot(assigned_dev->busnr,
253 assigned_dev->devfn);
254 if (!dev) {
255 printk(KERN_INFO "%s: host device not found\n", __func__);
256 r = -EINVAL;
257 goto out_free;
258 }
259 if (pci_enable_device(dev)) {
260 printk(KERN_INFO "%s: Could not enable PCI device\n", __func__);
261 r = -EBUSY;
262 goto out_put;
263 }
264 r = pci_request_regions(dev, "kvm_assigned_device");
265 if (r) {
266 printk(KERN_INFO "%s: Could not get access to device regions\n",
267 __func__);
268 goto out_disable;
269 }
270 match->assigned_dev_id = assigned_dev->assigned_dev_id;
271 match->host_busnr = assigned_dev->busnr;
272 match->host_devfn = assigned_dev->devfn;
273 match->dev = dev;
274
275 match->kvm = kvm;
276
277 list_add(&match->list, &kvm->arch.assigned_dev_head);
278
279out:
280 mutex_unlock(&kvm->lock);
281 return r;
282out_disable:
283 pci_disable_device(dev);
284out_put:
285 pci_dev_put(dev);
286out_free:
287 kfree(match);
288 mutex_unlock(&kvm->lock);
289 return r;
290}
291
292static void kvm_free_assigned_devices(struct kvm *kvm)
293{
294 struct list_head *ptr, *ptr2;
295 struct kvm_assigned_dev_kernel *assigned_dev;
296
297 list_for_each_safe(ptr, ptr2, &kvm->arch.assigned_dev_head) {
298 assigned_dev = list_entry(ptr,
299 struct kvm_assigned_dev_kernel,
300 list);
301
302 if (irqchip_in_kernel(kvm) && assigned_dev->irq_requested) {
303 free_irq(assigned_dev->host_irq,
304 (void *)assigned_dev);
305
306 kvm_unregister_irq_ack_notifier(kvm,
307 &assigned_dev->
308 ack_notifier);
309 }
310
311 if (cancel_work_sync(&assigned_dev->interrupt_work))
312 /* We had pending work. That means we will have to take
313 * care of kvm_put_kvm.
314 */
315 kvm_put_kvm(kvm);
316
317 pci_release_regions(assigned_dev->dev);
318 pci_disable_device(assigned_dev->dev);
319 pci_dev_put(assigned_dev->dev);
320
321 list_del(&assigned_dev->list);
322 kfree(assigned_dev);
323 }
324}
417bc304 325
5fb76f9b
CO		 326unsigned long segment_base(u16 selector)
327{
328 struct descriptor_table gdt;
a5f61300 329 struct desc_struct *d;
5fb76f9b
CO		 330 unsigned long table_base;
331 unsigned long v;
332
333 if (selector == 0)
334 return 0;
335
336 asm("sgdt %0" : "=m"(gdt));
337 table_base = gdt.base;
338
339 if (selector & 4) { /* from ldt */
340 u16 ldt_selector;
341
342 asm("sldt %0" : "=g"(ldt_selector));
343 table_base = segment_base(ldt_selector);
344 }
a5f61300
AK		 345 d = (struct desc_struct *)(table_base + (selector & ~7));
346 v = d->base0 | ((unsigned long)d->base1 << 16) |
347 ((unsigned long)d->base2 << 24);
5fb76f9b 348#ifdef CONFIG_X86_64
a5f61300
AK		 349 if (d->s == 0 && (d->type == 2 || d->type == 9 || d->type == 11))
350 v |= ((unsigned long)((struct ldttss_desc64 *)d)->base3) << 32;
5fb76f9b
CO		 351#endif
352 return v;
353}
354EXPORT_SYMBOL_GPL(segment_base);
355
6866b83e
CO		 356u64 kvm_get_apic_base(struct kvm_vcpu *vcpu)
357{
358 if (irqchip_in_kernel(vcpu->kvm))
ad312c7c 359 return vcpu->arch.apic_base;
6866b83e 360 else
ad312c7c 361 return vcpu->arch.apic_base;
6866b83e
CO		 362}
363EXPORT_SYMBOL_GPL(kvm_get_apic_base);
364
365void kvm_set_apic_base(struct kvm_vcpu *vcpu, u64 data)
366{
367 /* TODO: reserve bits check */
368 if (irqchip_in_kernel(vcpu->kvm))
369 kvm_lapic_set_base(vcpu, data);
370 else
ad312c7c 371 vcpu->arch.apic_base = data;
6866b83e
CO		 372}
373EXPORT_SYMBOL_GPL(kvm_set_apic_base);
374
298101da
AK		 375void kvm_queue_exception(struct kvm_vcpu *vcpu, unsigned nr)
376{
ad312c7c
ZX		 377 WARN_ON(vcpu->arch.exception.pending);
378 vcpu->arch.exception.pending = true;
379 vcpu->arch.exception.has_error_code = false;
380 vcpu->arch.exception.nr = nr;
298101da
AK		 381}
382EXPORT_SYMBOL_GPL(kvm_queue_exception);
383
c3c91fee
AK		 384void kvm_inject_page_fault(struct kvm_vcpu *vcpu, unsigned long addr,
385 u32 error_code)
386{
387 ++vcpu->stat.pf_guest;
71c4dfaf
JR		 388 if (vcpu->arch.exception.pending) {
389 if (vcpu->arch.exception.nr == PF_VECTOR) {
390 printk(KERN_DEBUG "kvm: inject_page_fault:"
391 " double fault 0x%lx\n", addr);
392 vcpu->arch.exception.nr = DF_VECTOR;
393 vcpu->arch.exception.error_code = 0;
394 } else if (vcpu->arch.exception.nr == DF_VECTOR) {
395 /* triple fault -> shutdown */
396 set_bit(KVM_REQ_TRIPLE_FAULT, &vcpu->requests);
397 }
c3c91fee
AK		 398 return;
399 }
ad312c7c 400 vcpu->arch.cr2 = addr;
c3c91fee
AK		 401 kvm_queue_exception_e(vcpu, PF_VECTOR, error_code);
402}
403
3419ffc8
SY		 404void kvm_inject_nmi(struct kvm_vcpu *vcpu)
405{
406 vcpu->arch.nmi_pending = 1;
407}
408EXPORT_SYMBOL_GPL(kvm_inject_nmi);
409
298101da
AK		 410void kvm_queue_exception_e(struct kvm_vcpu *vcpu, unsigned nr, u32 error_code)
411{
ad312c7c
ZX		 412 WARN_ON(vcpu->arch.exception.pending);
413 vcpu->arch.exception.pending = true;
414 vcpu->arch.exception.has_error_code = true;
415 vcpu->arch.exception.nr = nr;
416 vcpu->arch.exception.error_code = error_code;
298101da
AK		 417}
418EXPORT_SYMBOL_GPL(kvm_queue_exception_e);
419
420static void __queue_exception(struct kvm_vcpu *vcpu)
421{
ad312c7c
ZX		 422 kvm_x86_ops->queue_exception(vcpu, vcpu->arch.exception.nr,
423 vcpu->arch.exception.has_error_code,
424 vcpu->arch.exception.error_code);
298101da
AK		 425}
426
a03490ed
CO		 427/*
428 * Load the pae pdptrs. Return true is they are all valid.
429 */
430int load_pdptrs(struct kvm_vcpu *vcpu, unsigned long cr3)
431{
432 gfn_t pdpt_gfn = cr3 >> PAGE_SHIFT;
433 unsigned offset = ((cr3 & (PAGE_SIZE-1)) >> 5) << 2;
434 int i;
435 int ret;
ad312c7c 436 u64 pdpte[ARRAY_SIZE(vcpu->arch.pdptrs)];
a03490ed 437
a03490ed
CO		 438 ret = kvm_read_guest_page(vcpu->kvm, pdpt_gfn, pdpte,
439 offset * sizeof(u64), sizeof(pdpte));
440 if (ret < 0) {
441 ret = 0;
442 goto out;
443 }
444 for (i = 0; i < ARRAY_SIZE(pdpte); ++i) {
445 if ((pdpte[i] & 1) && (pdpte[i] & 0xfffffff0000001e6ull)) {
446 ret = 0;
447 goto out;
448 }
449 }
450 ret = 1;
451
ad312c7c 452 memcpy(vcpu->arch.pdptrs, pdpte, sizeof(vcpu->arch.pdptrs));
a03490ed 453out:
a03490ed
CO		 454
455 return ret;
456}
cc4b6871 457EXPORT_SYMBOL_GPL(load_pdptrs);
a03490ed 458
d835dfec
AK		 459static bool pdptrs_changed(struct kvm_vcpu *vcpu)
460{
ad312c7c 461 u64 pdpte[ARRAY_SIZE(vcpu->arch.pdptrs)];
d835dfec
AK		 462 bool changed = true;
463 int r;
464
465 if (is_long_mode(vcpu) || !is_pae(vcpu))
466 return false;
467
ad312c7c 468 r = kvm_read_guest(vcpu->kvm, vcpu->arch.cr3 & ~31u, pdpte, sizeof(pdpte));
d835dfec
AK		 469 if (r < 0)
470 goto out;
ad312c7c 471 changed = memcmp(pdpte, vcpu->arch.pdptrs, sizeof(pdpte)) != 0;
d835dfec 472out:
d835dfec
AK		 473
474 return changed;
475}
476
2d3ad1f4 477void kvm_set_cr0(struct kvm_vcpu *vcpu, unsigned long cr0)
a03490ed
CO		 478{
479 if (cr0 & CR0_RESERVED_BITS) {
480 printk(KERN_DEBUG "set_cr0: 0x%lx #GP, reserved bits 0x%lx\n",
ad312c7c 481 cr0, vcpu->arch.cr0);
c1a5d4f9 482 kvm_inject_gp(vcpu, 0);
a03490ed
CO		 483 return;
484 }
485
486 if ((cr0 & X86_CR0_NW) && !(cr0 & X86_CR0_CD)) {
487 printk(KERN_DEBUG "set_cr0: #GP, CD == 0 && NW == 1\n");
c1a5d4f9 488 kvm_inject_gp(vcpu, 0);
a03490ed
CO		 489 return;
490 }
491
492 if ((cr0 & X86_CR0_PG) && !(cr0 & X86_CR0_PE)) {
493 printk(KERN_DEBUG "set_cr0: #GP, set PG flag "
494 "and a clear PE flag\n");
c1a5d4f9 495 kvm_inject_gp(vcpu, 0);
a03490ed
CO		 496 return;
497 }
498
499 if (!is_paging(vcpu) && (cr0 & X86_CR0_PG)) {
500#ifdef CONFIG_X86_64
ad312c7c 501 if ((vcpu->arch.shadow_efer & EFER_LME)) {
a03490ed
CO		 502 int cs_db, cs_l;
503
504 if (!is_pae(vcpu)) {
505 printk(KERN_DEBUG "set_cr0: #GP, start paging "
506 "in long mode while PAE is disabled\n");
c1a5d4f9 507 kvm_inject_gp(vcpu, 0);
a03490ed
CO		 508 return;
509 }
510 kvm_x86_ops->get_cs_db_l_bits(vcpu, &cs_db, &cs_l);
511 if (cs_l) {
512 printk(KERN_DEBUG "set_cr0: #GP, start paging "
513 "in long mode while CS.L == 1\n");
c1a5d4f9 514 kvm_inject_gp(vcpu, 0);
a03490ed
CO		 515 return;
516
517 }
518 } else
519#endif
ad312c7c 520 if (is_pae(vcpu) && !load_pdptrs(vcpu, vcpu->arch.cr3)) {
a03490ed
CO		 521 printk(KERN_DEBUG "set_cr0: #GP, pdptrs "
522 "reserved bits\n");
c1a5d4f9 523 kvm_inject_gp(vcpu, 0);
a03490ed
CO		 524 return;
525 }
526
527 }
528
529 kvm_x86_ops->set_cr0(vcpu, cr0);
ad312c7c 530 vcpu->arch.cr0 = cr0;
a03490ed 531
a03490ed 532 kvm_mmu_reset_context(vcpu);
a03490ed
CO		 533 return;
534}
2d3ad1f4 535EXPORT_SYMBOL_GPL(kvm_set_cr0);
a03490ed 536
2d3ad1f4 537void kvm_lmsw(struct kvm_vcpu *vcpu, unsigned long msw)
a03490ed 538{
2d3ad1f4 539 kvm_set_cr0(vcpu, (vcpu->arch.cr0 & ~0x0ful) | (msw & 0x0f));
2714d1d3
FEL		 540 KVMTRACE_1D(LMSW, vcpu,
541 (u32)((vcpu->arch.cr0 & ~0x0ful) | (msw & 0x0f)),
542 handler);
a03490ed 543}
2d3ad1f4 544EXPORT_SYMBOL_GPL(kvm_lmsw);
a03490ed 545
2d3ad1f4 546void kvm_set_cr4(struct kvm_vcpu *vcpu, unsigned long cr4)
a03490ed
CO		 547{
548 if (cr4 & CR4_RESERVED_BITS) {
549 printk(KERN_DEBUG "set_cr4: #GP, reserved bits\n");
c1a5d4f9 550 kvm_inject_gp(vcpu, 0);
a03490ed
CO		 551 return;
552 }
553
554 if (is_long_mode(vcpu)) {
555 if (!(cr4 & X86_CR4_PAE)) {
556 printk(KERN_DEBUG "set_cr4: #GP, clearing PAE while "
557 "in long mode\n");
c1a5d4f9 558 kvm_inject_gp(vcpu, 0);
a03490ed
CO		 559 return;
560 }
561 } else if (is_paging(vcpu) && !is_pae(vcpu) && (cr4 & X86_CR4_PAE)
ad312c7c 562 && !load_pdptrs(vcpu, vcpu->arch.cr3)) {
a03490ed 563 printk(KERN_DEBUG "set_cr4: #GP, pdptrs reserved bits\n");
c1a5d4f9 564 kvm_inject_gp(vcpu, 0);
a03490ed
CO		 565 return;
566 }
567
568 if (cr4 & X86_CR4_VMXE) {
569 printk(KERN_DEBUG "set_cr4: #GP, setting VMXE\n");
c1a5d4f9 570 kvm_inject_gp(vcpu, 0);
a03490ed
CO		 571 return;
572 }
573 kvm_x86_ops->set_cr4(vcpu, cr4);
ad312c7c 574 vcpu->arch.cr4 = cr4;
a03490ed 575 kvm_mmu_reset_context(vcpu);
a03490ed 576}
2d3ad1f4 577EXPORT_SYMBOL_GPL(kvm_set_cr4);
a03490ed 578
2d3ad1f4 579void kvm_set_cr3(struct kvm_vcpu *vcpu, unsigned long cr3)
a03490ed 580{
ad312c7c 581 if (cr3 == vcpu->arch.cr3 && !pdptrs_changed(vcpu)) {
d835dfec
AK		 582 kvm_mmu_flush_tlb(vcpu);
583 return;
584 }
585
a03490ed
CO		 586 if (is_long_mode(vcpu)) {
587 if (cr3 & CR3_L_MODE_RESERVED_BITS) {
588 printk(KERN_DEBUG "set_cr3: #GP, reserved bits\n");
c1a5d4f9 589 kvm_inject_gp(vcpu, 0);
a03490ed
CO		 590 return;
591 }
592 } else {
593 if (is_pae(vcpu)) {
594 if (cr3 & CR3_PAE_RESERVED_BITS) {
595 printk(KERN_DEBUG
596 "set_cr3: #GP, reserved bits\n");
c1a5d4f9 597 kvm_inject_gp(vcpu, 0);
a03490ed
CO		 598 return;
599 }
600 if (is_paging(vcpu) && !load_pdptrs(vcpu, cr3)) {
601 printk(KERN_DEBUG "set_cr3: #GP, pdptrs "
602 "reserved bits\n");
c1a5d4f9 603 kvm_inject_gp(vcpu, 0);
a03490ed
CO		 604 return;
605 }
606 }
607 /*
608 * We don't check reserved bits in nonpae mode, because
609 * this isn't enforced, and VMware depends on this.
610 */
611 }
612
a03490ed
CO		 613 /*
614 * Does the new cr3 value map to physical memory? (Note, we
615 * catch an invalid cr3 even in real-mode, because it would
616 * cause trouble later on when we turn on paging anyway.)
617 *
618 * A real CPU would silently accept an invalid cr3 and would
619 * attempt to use it - with largely undefined (and often hard
620 * to debug) behavior on the guest side.
621 */
622 if (unlikely(!gfn_to_memslot(vcpu->kvm, cr3 >> PAGE_SHIFT)))
c1a5d4f9 623 kvm_inject_gp(vcpu, 0);
a03490ed 624 else {
ad312c7c
ZX		 625 vcpu->arch.cr3 = cr3;
626 vcpu->arch.mmu.new_cr3(vcpu);
a03490ed 627 }
a03490ed 628}
2d3ad1f4 629EXPORT_SYMBOL_GPL(kvm_set_cr3);
a03490ed 630
2d3ad1f4 631void kvm_set_cr8(struct kvm_vcpu *vcpu, unsigned long cr8)
a03490ed
CO		 632{
633 if (cr8 & CR8_RESERVED_BITS) {
634 printk(KERN_DEBUG "set_cr8: #GP, reserved bits 0x%lx\n", cr8);
c1a5d4f9 635 kvm_inject_gp(vcpu, 0);
a03490ed
CO		 636 return;
637 }
638 if (irqchip_in_kernel(vcpu->kvm))
639 kvm_lapic_set_tpr(vcpu, cr8);
640 else
ad312c7c 641 vcpu->arch.cr8 = cr8;
a03490ed 642}
2d3ad1f4 643EXPORT_SYMBOL_GPL(kvm_set_cr8);
a03490ed 644
2d3ad1f4 645unsigned long kvm_get_cr8(struct kvm_vcpu *vcpu)
a03490ed
CO		 646{
647 if (irqchip_in_kernel(vcpu->kvm))
648 return kvm_lapic_get_cr8(vcpu);
649 else
ad312c7c 650 return vcpu->arch.cr8;
a03490ed 651}
2d3ad1f4 652EXPORT_SYMBOL_GPL(kvm_get_cr8);
a03490ed 653
043405e1
CO		 654/*
655 * List of msr numbers which we expose to userspace through KVM_GET_MSRS
656 * and KVM_SET_MSRS, and KVM_GET_MSR_INDEX_LIST.
657 *
658 * This list is modified at module load time to reflect the
659 * capabilities of the host cpu.
660 */
661static u32 msrs_to_save[] = {
662 MSR_IA32_SYSENTER_CS, MSR_IA32_SYSENTER_ESP, MSR_IA32_SYSENTER_EIP,
663 MSR_K6_STAR,
664#ifdef CONFIG_X86_64
665 MSR_CSTAR, MSR_KERNEL_GS_BASE, MSR_SYSCALL_MASK, MSR_LSTAR,
666#endif
18068523 667 MSR_IA32_TIME_STAMP_COUNTER, MSR_KVM_SYSTEM_TIME, MSR_KVM_WALL_CLOCK,
847f0ad8 668 MSR_IA32_PERF_STATUS,
043405e1
CO		 669};
670
671static unsigned num_msrs_to_save;
672
673static u32 emulated_msrs[] = {
674 MSR_IA32_MISC_ENABLE,
675};
676
15c4a640
CO		 677static void set_efer(struct kvm_vcpu *vcpu, u64 efer)
678{
f2b4b7dd 679 if (efer & efer_reserved_bits) {
15c4a640
CO		 680 printk(KERN_DEBUG "set_efer: 0x%llx #GP, reserved bits\n",
681 efer);
c1a5d4f9 682 kvm_inject_gp(vcpu, 0);
15c4a640
CO		 683 return;
684 }
685
686 if (is_paging(vcpu)
ad312c7c 687 && (vcpu->arch.shadow_efer & EFER_LME) != (efer & EFER_LME)) {
15c4a640 688 printk(KERN_DEBUG "set_efer: #GP, change LME while paging\n");
c1a5d4f9 689 kvm_inject_gp(vcpu, 0);
15c4a640
CO		 690 return;
691 }
692
693 kvm_x86_ops->set_efer(vcpu, efer);
694
695 efer &= ~EFER_LMA;
ad312c7c 696 efer |= vcpu->arch.shadow_efer & EFER_LMA;
15c4a640 697
ad312c7c 698 vcpu->arch.shadow_efer = efer;
15c4a640
CO		 699}
700
f2b4b7dd
JR		 701void kvm_enable_efer_bits(u64 mask)
702{
703 efer_reserved_bits &= ~mask;
704}
705EXPORT_SYMBOL_GPL(kvm_enable_efer_bits);
706
707
15c4a640
CO		 708/*
709 * Writes msr value into into the appropriate "register".
710 * Returns 0 on success, non-0 otherwise.
711 * Assumes vcpu_load() was already called.
712 */
713int kvm_set_msr(struct kvm_vcpu *vcpu, u32 msr_index, u64 data)
714{
715 return kvm_x86_ops->set_msr(vcpu, msr_index, data);
716}
717
313a3dc7
CO		 718/*
719 * Adapt set_msr() to msr_io()'s calling convention
720 */
721static int do_set_msr(struct kvm_vcpu *vcpu, unsigned index, u64 *data)
722{
723 return kvm_set_msr(vcpu, index, *data);
724}
725
18068523
GOC		 726static void kvm_write_wall_clock(struct kvm *kvm, gpa_t wall_clock)
727{
728 static int version;
50d0a0f9
GH		 729 struct pvclock_wall_clock wc;
730 struct timespec now, sys, boot;
18068523
GOC		 731
732 if (!wall_clock)
733 return;
734
735 version++;
736
18068523
GOC		 737 kvm_write_guest(kvm, wall_clock, &version, sizeof(version));
738
50d0a0f9
GH		 739 /*
740 * The guest calculates current wall clock time by adding
741 * system time (updated by kvm_write_guest_time below) to the
742 * wall clock specified here. guest system time equals host
743 * system time for us, thus we must fill in host boot time here.
744 */
745 now = current_kernel_time();
746 ktime_get_ts(&sys);
747 boot = ns_to_timespec(timespec_to_ns(&now) - timespec_to_ns(&sys));
748
749 wc.sec = boot.tv_sec;
750 wc.nsec = boot.tv_nsec;
751 wc.version = version;
18068523
GOC		 752
753 kvm_write_guest(kvm, wall_clock, &wc, sizeof(wc));
754
755 version++;
756 kvm_write_guest(kvm, wall_clock, &version, sizeof(version));
18068523
GOC		 757}
758
50d0a0f9
GH		 759static uint32_t div_frac(uint32_t dividend, uint32_t divisor)
760{
761 uint32_t quotient, remainder;
762
763 /* Don't try to replace with do_div(), this one calculates
764 * "(dividend << 32) / divisor" */
765 __asm__ ( "divl %4"
766 : "=a" (quotient), "=d" (remainder)
767 : "0" (0), "1" (dividend), "r" (divisor) );
768 return quotient;
769}
770
771static void kvm_set_time_scale(uint32_t tsc_khz, struct pvclock_vcpu_time_info *hv_clock)
772{
773 uint64_t nsecs = 1000000000LL;
774 int32_t shift = 0;
775 uint64_t tps64;
776 uint32_t tps32;
777
778 tps64 = tsc_khz * 1000LL;
779 while (tps64 > nsecs*2) {
780 tps64 >>= 1;
781 shift--;
782 }
783
784 tps32 = (uint32_t)tps64;
785 while (tps32 <= (uint32_t)nsecs) {
786 tps32 <<= 1;
787 shift++;
788 }
789
790 hv_clock->tsc_shift = shift;
791 hv_clock->tsc_to_system_mul = div_frac(nsecs, tps32);
792
793 pr_debug("%s: tsc_khz %u, tsc_shift %d, tsc_mul %u\n",
794 __FUNCTION__, tsc_khz, hv_clock->tsc_shift,
795 hv_clock->tsc_to_system_mul);
796}
797
18068523
GOC		 798static void kvm_write_guest_time(struct kvm_vcpu *v)
799{
800 struct timespec ts;
801 unsigned long flags;
802 struct kvm_vcpu_arch *vcpu = &v->arch;
803 void *shared_kaddr;
804
805 if ((!vcpu->time_page))
806 return;
807
50d0a0f9
GH		 808 if (unlikely(vcpu->hv_clock_tsc_khz != tsc_khz)) {
809 kvm_set_time_scale(tsc_khz, &vcpu->hv_clock);
810 vcpu->hv_clock_tsc_khz = tsc_khz;
811 }
812
18068523
GOC		 813 /* Keep irq disabled to prevent changes to the clock */
814 local_irq_save(flags);
815 kvm_get_msr(v, MSR_IA32_TIME_STAMP_COUNTER,
816 &vcpu->hv_clock.tsc_timestamp);
817 ktime_get_ts(&ts);
818 local_irq_restore(flags);
819
820 /* With all the info we got, fill in the values */
821
822 vcpu->hv_clock.system_time = ts.tv_nsec +
823 (NSEC_PER_SEC * (u64)ts.tv_sec);
824 /*
825 * The interface expects us to write an even number signaling that the
826 * update is finished. Since the guest won't see the intermediate
50d0a0f9 827 * state, we just increase by 2 at the end.
18068523 828 */
50d0a0f9 829 vcpu->hv_clock.version += 2;
18068523
GOC		 830
831 shared_kaddr = kmap_atomic(vcpu->time_page, KM_USER0);
832
833 memcpy(shared_kaddr + vcpu->time_offset, &vcpu->hv_clock,
50d0a0f9 834 sizeof(vcpu->hv_clock));
18068523
GOC		 835
836 kunmap_atomic(shared_kaddr, KM_USER0);
837
838 mark_page_dirty(v->kvm, vcpu->time >> PAGE_SHIFT);
839}
840
9ba075a6
AK		 841static bool msr_mtrr_valid(unsigned msr)
842{
843 switch (msr) {
844 case 0x200 ... 0x200 + 2 * KVM_NR_VAR_MTRR - 1:
845 case MSR_MTRRfix64K_00000:
846 case MSR_MTRRfix16K_80000:
847 case MSR_MTRRfix16K_A0000:
848 case MSR_MTRRfix4K_C0000:
849 case MSR_MTRRfix4K_C8000:
850 case MSR_MTRRfix4K_D0000:
851 case MSR_MTRRfix4K_D8000:
852 case MSR_MTRRfix4K_E0000:
853 case MSR_MTRRfix4K_E8000:
854 case MSR_MTRRfix4K_F0000:
855 case MSR_MTRRfix4K_F8000:
856 case MSR_MTRRdefType:
857 case MSR_IA32_CR_PAT:
858 return true;
859 case 0x2f8:
860 return true;
861 }
862 return false;
863}
864
865static int set_msr_mtrr(struct kvm_vcpu *vcpu, u32 msr, u64 data)
866{
867 if (!msr_mtrr_valid(msr))
868 return 1;
869
870 vcpu->arch.mtrr[msr - 0x200] = data;
871 return 0;
872}
15c4a640
CO		 873
874int kvm_set_msr_common(struct kvm_vcpu *vcpu, u32 msr, u64 data)
875{
876 switch (msr) {
15c4a640
CO		 877 case MSR_EFER:
878 set_efer(vcpu, data);
879 break;
15c4a640
CO		 880 case MSR_IA32_MC0_STATUS:
881 pr_unimpl(vcpu, "%s: MSR_IA32_MC0_STATUS 0x%llx, nop\n",
b8688d51 882 __func__, data);
15c4a640
CO		 883 break;
884 case MSR_IA32_MCG_STATUS:
885 pr_unimpl(vcpu, "%s: MSR_IA32_MCG_STATUS 0x%llx, nop\n",
b8688d51 886 __func__, data);
15c4a640 887 break;
c7ac679c
JR		 888 case MSR_IA32_MCG_CTL:
889 pr_unimpl(vcpu, "%s: MSR_IA32_MCG_CTL 0x%llx, nop\n",
b8688d51 890 __func__, data);
c7ac679c 891 break;
b5e2fec0
AG		 892 case MSR_IA32_DEBUGCTLMSR:
893 if (!data) {
894 /* We support the non-activated case already */
895 break;
896 } else if (data & ~(DEBUGCTLMSR_LBR | DEBUGCTLMSR_BTF)) {
897 /* Values other than LBR and BTF are vendor-specific,
898 thus reserved and should throw a #GP */
899 return 1;
900 }
901 pr_unimpl(vcpu, "%s: MSR_IA32_DEBUGCTLMSR 0x%llx, nop\n",
902 __func__, data);
903 break;
15c4a640
CO		 904 case MSR_IA32_UCODE_REV:
905 case MSR_IA32_UCODE_WRITE:
15c4a640 906 break;
9ba075a6
AK		 907 case 0x200 ... 0x2ff:
908 return set_msr_mtrr(vcpu, msr, data);
15c4a640
CO		 909 case MSR_IA32_APICBASE:
910 kvm_set_apic_base(vcpu, data);
911 break;
912 case MSR_IA32_MISC_ENABLE:
ad312c7c 913 vcpu->arch.ia32_misc_enable_msr = data;
15c4a640 914 break;
18068523
GOC		 915 case MSR_KVM_WALL_CLOCK:
916 vcpu->kvm->arch.wall_clock = data;
917 kvm_write_wall_clock(vcpu->kvm, data);
918 break;
919 case MSR_KVM_SYSTEM_TIME: {
920 if (vcpu->arch.time_page) {
921 kvm_release_page_dirty(vcpu->arch.time_page);
922 vcpu->arch.time_page = NULL;
923 }
924
925 vcpu->arch.time = data;
926
927 /* we verify if the enable bit is set... */
928 if (!(data & 1))
929 break;
930
931 /* ...but clean it before doing the actual write */
932 vcpu->arch.time_offset = data & ~(PAGE_MASK | 1);
933
18068523 934 down_read(&current->mm->mmap_sem);
18068523
GOC		 935 vcpu->arch.time_page =
936 gfn_to_page(vcpu->kvm, data >> PAGE_SHIFT);
18068523
GOC		 937 up_read(&current->mm->mmap_sem);
938
939 if (is_error_page(vcpu->arch.time_page)) {
940 kvm_release_page_clean(vcpu->arch.time_page);
941 vcpu->arch.time_page = NULL;
942 }
943
944 kvm_write_guest_time(vcpu);
945 break;
946 }
15c4a640 947 default:
565f1fbd 948 pr_unimpl(vcpu, "unhandled wrmsr: 0x%x data %llx\n", msr, data);
15c4a640
CO		 949 return 1;
950 }
951 return 0;
952}
953EXPORT_SYMBOL_GPL(kvm_set_msr_common);
954
955
956/*
957 * Reads an msr value (of 'msr_index') into 'pdata'.
958 * Returns 0 on success, non-0 otherwise.
959 * Assumes vcpu_load() was already called.
960 */
961int kvm_get_msr(struct kvm_vcpu *vcpu, u32 msr_index, u64 *pdata)
962{
963 return kvm_x86_ops->get_msr(vcpu, msr_index, pdata);
964}
965
9ba075a6
AK		 966static int get_msr_mtrr(struct kvm_vcpu *vcpu, u32 msr, u64 *pdata)
967{
968 if (!msr_mtrr_valid(msr))
969 return 1;
970
971 *pdata = vcpu->arch.mtrr[msr - 0x200];
972 return 0;
973}
974
15c4a640
CO		 975int kvm_get_msr_common(struct kvm_vcpu *vcpu, u32 msr, u64 *pdata)
976{
977 u64 data;
978
979 switch (msr) {
980 case 0xc0010010: /* SYSCFG */
981 case 0xc0010015: /* HWCR */
982 case MSR_IA32_PLATFORM_ID:
983 case MSR_IA32_P5_MC_ADDR:
984 case MSR_IA32_P5_MC_TYPE:
985 case MSR_IA32_MC0_CTL:
986 case MSR_IA32_MCG_STATUS:
987 case MSR_IA32_MCG_CAP:
c7ac679c 988 case MSR_IA32_MCG_CTL:
15c4a640
CO		 989 case MSR_IA32_MC0_MISC:
990 case MSR_IA32_MC0_MISC+4:
991 case MSR_IA32_MC0_MISC+8:
992 case MSR_IA32_MC0_MISC+12:
993 case MSR_IA32_MC0_MISC+16:
994 case MSR_IA32_UCODE_REV:
15c4a640 995 case MSR_IA32_EBL_CR_POWERON:
b5e2fec0
AG		 996 case MSR_IA32_DEBUGCTLMSR:
997 case MSR_IA32_LASTBRANCHFROMIP:
998 case MSR_IA32_LASTBRANCHTOIP:
999 case MSR_IA32_LASTINTFROMIP:
1000 case MSR_IA32_LASTINTTOIP:
15c4a640
CO		 1001 data = 0;
1002 break;
9ba075a6
AK		 1003 case MSR_MTRRcap:
1004 data = 0x500 | KVM_NR_VAR_MTRR;
1005 break;
1006 case 0x200 ... 0x2ff:
1007 return get_msr_mtrr(vcpu, msr, pdata);
15c4a640
CO		 1008 case 0xcd: /* fsb frequency */
1009 data = 3;
1010 break;
1011 case MSR_IA32_APICBASE:
1012 data = kvm_get_apic_base(vcpu);
1013 break;
1014 case MSR_IA32_MISC_ENABLE:
ad312c7c 1015 data = vcpu->arch.ia32_misc_enable_msr;
15c4a640 1016 break;
847f0ad8
AG		 1017 case MSR_IA32_PERF_STATUS:
1018 /* TSC increment by tick */
1019 data = 1000ULL;
1020 /* CPU multiplier */
1021 data |= (((uint64_t)4ULL) << 40);
1022 break;
15c4a640 1023 case MSR_EFER:
ad312c7c 1024 data = vcpu->arch.shadow_efer;
15c4a640 1025 break;
18068523
GOC		 1026 case MSR_KVM_WALL_CLOCK:
1027 data = vcpu->kvm->arch.wall_clock;
1028 break;
1029 case MSR_KVM_SYSTEM_TIME:
1030 data = vcpu->arch.time;
1031 break;
15c4a640
CO		 1032 default:
1033 pr_unimpl(vcpu, "unhandled rdmsr: 0x%x\n", msr);
1034 return 1;
1035 }
1036 *pdata = data;
1037 return 0;
1038}
1039EXPORT_SYMBOL_GPL(kvm_get_msr_common);
1040
313a3dc7
CO		 1041/*
1042 * Read or write a bunch of msrs. All parameters are kernel addresses.
1043 *
1044 * @return number of msrs set successfully.
1045 */
1046static int __msr_io(struct kvm_vcpu *vcpu, struct kvm_msrs *msrs,
1047 struct kvm_msr_entry *entries,
1048 int (*do_msr)(struct kvm_vcpu *vcpu,
1049 unsigned index, u64 *data))
1050{
1051 int i;
1052
1053 vcpu_load(vcpu);
1054
3200f405 1055 down_read(&vcpu->kvm->slots_lock);
313a3dc7
CO		 1056 for (i = 0; i < msrs->nmsrs; ++i)
1057 if (do_msr(vcpu, entries[i].index, &entries[i].data))
1058 break;
3200f405 1059 up_read(&vcpu->kvm->slots_lock);
313a3dc7
CO		 1060
1061 vcpu_put(vcpu);
1062
1063 return i;
1064}
1065
1066/*
1067 * Read or write a bunch of msrs. Parameters are user addresses.
1068 *
1069 * @return number of msrs set successfully.
1070 */
1071static int msr_io(struct kvm_vcpu *vcpu, struct kvm_msrs __user *user_msrs,
1072 int (*do_msr)(struct kvm_vcpu *vcpu,
1073 unsigned index, u64 *data),
1074 int writeback)
1075{
1076 struct kvm_msrs msrs;
1077 struct kvm_msr_entry *entries;
1078 int r, n;
1079 unsigned size;
1080
1081 r = -EFAULT;
1082 if (copy_from_user(&msrs, user_msrs, sizeof msrs))
1083 goto out;
1084
1085 r = -E2BIG;
1086 if (msrs.nmsrs >= MAX_IO_MSRS)
1087 goto out;
1088
1089 r = -ENOMEM;
1090 size = sizeof(struct kvm_msr_entry) * msrs.nmsrs;
1091 entries = vmalloc(size);
1092 if (!entries)
1093 goto out;
1094
1095 r = -EFAULT;
1096 if (copy_from_user(entries, user_msrs->entries, size))
1097 goto out_free;
1098
1099 r = n = __msr_io(vcpu, &msrs, entries, do_msr);
1100 if (r < 0)
1101 goto out_free;
1102
1103 r = -EFAULT;
1104 if (writeback && copy_to_user(user_msrs->entries, entries, size))
1105 goto out_free;
1106
1107 r = n;
1108
1109out_free:
1110 vfree(entries);
1111out:
1112 return r;
1113}
1114
018d00d2
ZX		 1115int kvm_dev_ioctl_check_extension(long ext)
1116{
1117 int r;
1118
1119 switch (ext) {
1120 case KVM_CAP_IRQCHIP:
1121 case KVM_CAP_HLT:
1122 case KVM_CAP_MMU_SHADOW_CACHE_CONTROL:
1123 case KVM_CAP_USER_MEMORY:
1124 case KVM_CAP_SET_TSS_ADDR:
07716717 1125 case KVM_CAP_EXT_CPUID:
18068523 1126 case KVM_CAP_CLOCKSOURCE:
7837699f 1127 case KVM_CAP_PIT:
a28e4f5a 1128 case KVM_CAP_NOP_IO_DELAY:
62d9f0db 1129 case KVM_CAP_MP_STATE:
ed848624 1130 case KVM_CAP_SYNC_MMU:
018d00d2
ZX		 1131 r = 1;
1132 break;
542472b5
LV		 1133 case KVM_CAP_COALESCED_MMIO:
1134 r = KVM_COALESCED_MMIO_PAGE_OFFSET;
1135 break;
774ead3a
AK		 1136 case KVM_CAP_VAPIC:
1137 r = !kvm_x86_ops->cpu_has_accelerated_tpr();
1138 break;
f725230a
AK		 1139 case KVM_CAP_NR_VCPUS:
1140 r = KVM_MAX_VCPUS;
1141 break;
a988b910
AK		 1142 case KVM_CAP_NR_MEMSLOTS:
1143 r = KVM_MEMORY_SLOTS;
1144 break;
2f333bcb
MT		 1145 case KVM_CAP_PV_MMU:
1146 r = !tdp_enabled;
1147 break;
018d00d2
ZX		 1148 default:
1149 r = 0;
1150 break;
1151 }
1152 return r;
1153
1154}
1155
043405e1
CO		 1156long kvm_arch_dev_ioctl(struct file *filp,
1157 unsigned int ioctl, unsigned long arg)
1158{
1159 void __user *argp = (void __user *)arg;
1160 long r;
1161
1162 switch (ioctl) {
1163 case KVM_GET_MSR_INDEX_LIST: {
1164 struct kvm_msr_list __user *user_msr_list = argp;
1165 struct kvm_msr_list msr_list;
1166 unsigned n;
1167
1168 r = -EFAULT;
1169 if (copy_from_user(&msr_list, user_msr_list, sizeof msr_list))
1170 goto out;
1171 n = msr_list.nmsrs;
1172 msr_list.nmsrs = num_msrs_to_save + ARRAY_SIZE(emulated_msrs);
1173 if (copy_to_user(user_msr_list, &msr_list, sizeof msr_list))
1174 goto out;
1175 r = -E2BIG;
1176 if (n < num_msrs_to_save)
1177 goto out;
1178 r = -EFAULT;
1179 if (copy_to_user(user_msr_list->indices, &msrs_to_save,
1180 num_msrs_to_save * sizeof(u32)))
1181 goto out;
1182 if (copy_to_user(user_msr_list->indices
1183 + num_msrs_to_save * sizeof(u32),
1184 &emulated_msrs,
1185 ARRAY_SIZE(emulated_msrs) * sizeof(u32)))
1186 goto out;
1187 r = 0;
1188 break;
1189 }
674eea0f
AK		 1190 case KVM_GET_SUPPORTED_CPUID: {
1191 struct kvm_cpuid2 __user *cpuid_arg = argp;
1192 struct kvm_cpuid2 cpuid;
1193
1194 r = -EFAULT;
1195 if (copy_from_user(&cpuid, cpuid_arg, sizeof cpuid))
1196 goto out;
1197 r = kvm_dev_ioctl_get_supported_cpuid(&cpuid,
1198 cpuid_arg->entries);
1199 if (r)
1200 goto out;
1201
1202 r = -EFAULT;
1203 if (copy_to_user(cpuid_arg, &cpuid, sizeof cpuid))
1204 goto out;
1205 r = 0;
1206 break;
1207 }
043405e1
CO		 1208 default:
1209 r = -EINVAL;
1210 }
1211out:
1212 return r;
1213}
1214
313a3dc7
CO		 1215void kvm_arch_vcpu_load(struct kvm_vcpu *vcpu, int cpu)
1216{
1217 kvm_x86_ops->vcpu_load(vcpu, cpu);
18068523 1218 kvm_write_guest_time(vcpu);
313a3dc7
CO		 1219}
1220
1221void kvm_arch_vcpu_put(struct kvm_vcpu *vcpu)
1222{
1223 kvm_x86_ops->vcpu_put(vcpu);
9327fd11 1224 kvm_put_guest_fpu(vcpu);
313a3dc7
CO		 1225}
1226
07716717 1227static int is_efer_nx(void)
313a3dc7
CO		 1228{
1229 u64 efer;
313a3dc7
CO		 1230
1231 rdmsrl(MSR_EFER, efer);
07716717
DK		 1232 return efer & EFER_NX;
1233}
1234
1235static void cpuid_fix_nx_cap(struct kvm_vcpu *vcpu)
1236{
1237 int i;
1238 struct kvm_cpuid_entry2 *e, *entry;
1239
313a3dc7 1240 entry = NULL;
ad312c7c
ZX		 1241 for (i = 0; i < vcpu->arch.cpuid_nent; ++i) {
1242 e = &vcpu->arch.cpuid_entries[i];
313a3dc7
CO		 1243 if (e->function == 0x80000001) {
1244 entry = e;
1245 break;
1246 }
1247 }
07716717 1248 if (entry && (entry->edx & (1 << 20)) && !is_efer_nx()) {
313a3dc7
CO		 1249 entry->edx &= ~(1 << 20);
1250 printk(KERN_INFO "kvm: guest NX capability removed\n");
1251 }
1252}
1253
07716717 1254/* when an old userspace process fills a new kernel module */
313a3dc7
CO		 1255static int kvm_vcpu_ioctl_set_cpuid(struct kvm_vcpu *vcpu,
1256 struct kvm_cpuid *cpuid,
1257 struct kvm_cpuid_entry __user *entries)
07716717
DK		 1258{
1259 int r, i;
1260 struct kvm_cpuid_entry *cpuid_entries;
1261
1262 r = -E2BIG;
1263 if (cpuid->nent > KVM_MAX_CPUID_ENTRIES)
1264 goto out;
1265 r = -ENOMEM;
1266 cpuid_entries = vmalloc(sizeof(struct kvm_cpuid_entry) * cpuid->nent);
1267 if (!cpuid_entries)
1268 goto out;
1269 r = -EFAULT;
1270 if (copy_from_user(cpuid_entries, entries,
1271 cpuid->nent * sizeof(struct kvm_cpuid_entry)))
1272 goto out_free;
1273 for (i = 0; i < cpuid->nent; i++) {
ad312c7c
ZX		 1274 vcpu->arch.cpuid_entries[i].function = cpuid_entries[i].function;
1275 vcpu->arch.cpuid_entries[i].eax = cpuid_entries[i].eax;
1276 vcpu->arch.cpuid_entries[i].ebx = cpuid_entries[i].ebx;
1277 vcpu->arch.cpuid_entries[i].ecx = cpuid_entries[i].ecx;
1278 vcpu->arch.cpuid_entries[i].edx = cpuid_entries[i].edx;
1279 vcpu->arch.cpuid_entries[i].index = 0;
1280 vcpu->arch.cpuid_entries[i].flags = 0;
1281 vcpu->arch.cpuid_entries[i].padding[0] = 0;
1282 vcpu->arch.cpuid_entries[i].padding[1] = 0;
1283 vcpu->arch.cpuid_entries[i].padding[2] = 0;
1284 }
1285 vcpu->arch.cpuid_nent = cpuid->nent;
07716717
DK		 1286 cpuid_fix_nx_cap(vcpu);
1287 r = 0;
1288
1289out_free:
1290 vfree(cpuid_entries);
1291out:
1292 return r;
1293}
1294
1295static int kvm_vcpu_ioctl_set_cpuid2(struct kvm_vcpu *vcpu,
1296 struct kvm_cpuid2 *cpuid,
1297 struct kvm_cpuid_entry2 __user *entries)
313a3dc7
CO		 1298{
1299 int r;
1300
1301 r = -E2BIG;
1302 if (cpuid->nent > KVM_MAX_CPUID_ENTRIES)
1303 goto out;
1304 r = -EFAULT;
ad312c7c 1305 if (copy_from_user(&vcpu->arch.cpuid_entries, entries,
07716717 1306 cpuid->nent * sizeof(struct kvm_cpuid_entry2)))
313a3dc7 1307 goto out;
ad312c7c 1308 vcpu->arch.cpuid_nent = cpuid->nent;
313a3dc7
CO		 1309 return 0;
1310
1311out:
1312 return r;
1313}
1314
07716717
DK		 1315static int kvm_vcpu_ioctl_get_cpuid2(struct kvm_vcpu *vcpu,
1316 struct kvm_cpuid2 *cpuid,
1317 struct kvm_cpuid_entry2 __user *entries)
1318{
1319 int r;
1320
1321 r = -E2BIG;
ad312c7c 1322 if (cpuid->nent < vcpu->arch.cpuid_nent)
07716717
DK		 1323 goto out;
1324 r = -EFAULT;
ad312c7c
ZX		 1325 if (copy_to_user(entries, &vcpu->arch.cpuid_entries,
1326 vcpu->arch.cpuid_nent * sizeof(struct kvm_cpuid_entry2)))
07716717
DK		 1327 goto out;
1328 return 0;
1329
1330out:
ad312c7c 1331 cpuid->nent = vcpu->arch.cpuid_nent;
07716717
DK		 1332 return r;
1333}
1334
1335static inline u32 bit(int bitno)
1336{
1337 return 1 << (bitno & 31);
1338}
1339
1340static void do_cpuid_1_ent(struct kvm_cpuid_entry2 *entry, u32 function,
1341 u32 index)
1342{
1343 entry->function = function;
1344 entry->index = index;
1345 cpuid_count(entry->function, entry->index,
1346 &entry->eax, &entry->ebx, &entry->ecx, &entry->edx);
1347 entry->flags = 0;
1348}
1349
1350static void do_cpuid_ent(struct kvm_cpuid_entry2 *entry, u32 function,
1351 u32 index, int *nent, int maxnent)
1352{
1353 const u32 kvm_supported_word0_x86_features = bit(X86_FEATURE_FPU) |
1354 bit(X86_FEATURE_VME) | bit(X86_FEATURE_DE) |
1355 bit(X86_FEATURE_PSE) | bit(X86_FEATURE_TSC) |
1356 bit(X86_FEATURE_MSR) | bit(X86_FEATURE_PAE) |
1357 bit(X86_FEATURE_CX8) | bit(X86_FEATURE_APIC) |
1358 bit(X86_FEATURE_SEP) | bit(X86_FEATURE_PGE) |
1359 bit(X86_FEATURE_CMOV) | bit(X86_FEATURE_PSE36) |
1360 bit(X86_FEATURE_CLFLSH) | bit(X86_FEATURE_MMX) |
1361 bit(X86_FEATURE_FXSR) | bit(X86_FEATURE_XMM) |
1362 bit(X86_FEATURE_XMM2) | bit(X86_FEATURE_SELFSNOOP);
1363 const u32 kvm_supported_word1_x86_features = bit(X86_FEATURE_FPU) |
1364 bit(X86_FEATURE_VME) | bit(X86_FEATURE_DE) |
1365 bit(X86_FEATURE_PSE) | bit(X86_FEATURE_TSC) |
1366 bit(X86_FEATURE_MSR) | bit(X86_FEATURE_PAE) |
1367 bit(X86_FEATURE_CX8) | bit(X86_FEATURE_APIC) |
1368 bit(X86_FEATURE_PGE) |
1369 bit(X86_FEATURE_CMOV) | bit(X86_FEATURE_PSE36) |
1370 bit(X86_FEATURE_MMX) | bit(X86_FEATURE_FXSR) |
1371 bit(X86_FEATURE_SYSCALL) |
1372 (bit(X86_FEATURE_NX) && is_efer_nx()) |
1373#ifdef CONFIG_X86_64
1374 bit(X86_FEATURE_LM) |
1375#endif
1376 bit(X86_FEATURE_MMXEXT) |
1377 bit(X86_FEATURE_3DNOWEXT) |
1378 bit(X86_FEATURE_3DNOW);
1379 const u32 kvm_supported_word3_x86_features =
1380 bit(X86_FEATURE_XMM3) | bit(X86_FEATURE_CX16);
1381 const u32 kvm_supported_word6_x86_features =
1382 bit(X86_FEATURE_LAHF_LM) | bit(X86_FEATURE_CMP_LEGACY);
1383
1384 /* all func 2 cpuid_count() should be called on the same cpu */
1385 get_cpu();
1386 do_cpuid_1_ent(entry, function, index);
1387 ++*nent;
1388
1389 switch (function) {
1390 case 0:
1391 entry->eax = min(entry->eax, (u32)0xb);
1392 break;
1393 case 1:
1394 entry->edx &= kvm_supported_word0_x86_features;
1395 entry->ecx &= kvm_supported_word3_x86_features;
1396 break;
1397 /* function 2 entries are STATEFUL. That is, repeated cpuid commands
1398 * may return different values. This forces us to get_cpu() before
1399 * issuing the first command, and also to emulate this annoying behavior
1400 * in kvm_emulate_cpuid() using KVM_CPUID_FLAG_STATE_READ_NEXT */
1401 case 2: {
1402 int t, times = entry->eax & 0xff;
1403
1404 entry->flags |= KVM_CPUID_FLAG_STATEFUL_FUNC;
1405 for (t = 1; t < times && *nent < maxnent; ++t) {
1406 do_cpuid_1_ent(&entry[t], function, 0);
1407 entry[t].flags |= KVM_CPUID_FLAG_STATEFUL_FUNC;
1408 ++*nent;
1409 }
1410 break;
1411 }
1412 /* function 4 and 0xb have additional index. */
1413 case 4: {
14af3f3c 1414 int i, cache_type;
07716717
DK		 1415
1416 entry->flags |= KVM_CPUID_FLAG_SIGNIFCANT_INDEX;
1417 /* read more entries until cache_type is zero */
14af3f3c
HH		 1418 for (i = 1; *nent < maxnent; ++i) {
1419 cache_type = entry[i - 1].eax & 0x1f;
07716717
DK		 1420 if (!cache_type)
1421 break;
14af3f3c
HH		 1422 do_cpuid_1_ent(&entry[i], function, i);
1423 entry[i].flags |=
07716717
DK		 1424 KVM_CPUID_FLAG_SIGNIFCANT_INDEX;
1425 ++*nent;
1426 }
1427 break;
1428 }
1429 case 0xb: {
14af3f3c 1430 int i, level_type;
07716717
DK		 1431
1432 entry->flags |= KVM_CPUID_FLAG_SIGNIFCANT_INDEX;
1433 /* read more entries until level_type is zero */
14af3f3c
HH		 1434 for (i = 1; *nent < maxnent; ++i) {
1435 level_type = entry[i - 1].ecx & 0xff;
07716717
DK		 1436 if (!level_type)
1437 break;
14af3f3c
HH		 1438 do_cpuid_1_ent(&entry[i], function, i);
1439 entry[i].flags |=
07716717
DK		 1440 KVM_CPUID_FLAG_SIGNIFCANT_INDEX;
1441 ++*nent;
1442 }
1443 break;
1444 }
1445 case 0x80000000:
1446 entry->eax = min(entry->eax, 0x8000001a);
1447 break;
1448 case 0x80000001:
1449 entry->edx &= kvm_supported_word1_x86_features;
1450 entry->ecx &= kvm_supported_word6_x86_features;
1451 break;
1452 }
1453 put_cpu();
1454}
1455
674eea0f 1456static int kvm_dev_ioctl_get_supported_cpuid(struct kvm_cpuid2 *cpuid,
07716717
DK		 1457 struct kvm_cpuid_entry2 __user *entries)
1458{
1459 struct kvm_cpuid_entry2 *cpuid_entries;
1460 int limit, nent = 0, r = -E2BIG;
1461 u32 func;
1462
1463 if (cpuid->nent < 1)
1464 goto out;
1465 r = -ENOMEM;
1466 cpuid_entries = vmalloc(sizeof(struct kvm_cpuid_entry2) * cpuid->nent);
1467 if (!cpuid_entries)
1468 goto out;
1469
1470 do_cpuid_ent(&cpuid_entries[0], 0, 0, &nent, cpuid->nent);
1471 limit = cpuid_entries[0].eax;
1472 for (func = 1; func <= limit && nent < cpuid->nent; ++func)
1473 do_cpuid_ent(&cpuid_entries[nent], func, 0,
1474 &nent, cpuid->nent);
1475 r = -E2BIG;
1476 if (nent >= cpuid->nent)
1477 goto out_free;
1478
1479 do_cpuid_ent(&cpuid_entries[nent], 0x80000000, 0, &nent, cpuid->nent);
1480 limit = cpuid_entries[nent - 1].eax;
1481 for (func = 0x80000001; func <= limit && nent < cpuid->nent; ++func)
1482 do_cpuid_ent(&cpuid_entries[nent], func, 0,
1483 &nent, cpuid->nent);
1484 r = -EFAULT;
1485 if (copy_to_user(entries, cpuid_entries,
1486 nent * sizeof(struct kvm_cpuid_entry2)))
1487 goto out_free;
1488 cpuid->nent = nent;
1489 r = 0;
1490
1491out_free:
1492 vfree(cpuid_entries);
1493out:
1494 return r;
1495}
1496
313a3dc7
CO		 1497static int kvm_vcpu_ioctl_get_lapic(struct kvm_vcpu *vcpu,
1498 struct kvm_lapic_state *s)
1499{
1500 vcpu_load(vcpu);
ad312c7c 1501 memcpy(s->regs, vcpu->arch.apic->regs, sizeof *s);
313a3dc7
CO		 1502 vcpu_put(vcpu);
1503
1504 return 0;
1505}
1506
1507static int kvm_vcpu_ioctl_set_lapic(struct kvm_vcpu *vcpu,
1508 struct kvm_lapic_state *s)
1509{
1510 vcpu_load(vcpu);
ad312c7c 1511 memcpy(vcpu->arch.apic->regs, s->regs, sizeof *s);
313a3dc7
CO		 1512 kvm_apic_post_state_restore(vcpu);
1513 vcpu_put(vcpu);
1514
1515 return 0;
1516}
1517
f77bc6a4
ZX		 1518static int kvm_vcpu_ioctl_interrupt(struct kvm_vcpu *vcpu,
1519 struct kvm_interrupt *irq)
1520{
1521 if (irq->irq < 0 || irq->irq >= 256)
1522 return -EINVAL;
1523 if (irqchip_in_kernel(vcpu->kvm))
1524 return -ENXIO;
1525 vcpu_load(vcpu);
1526
ad312c7c
ZX		 1527 set_bit(irq->irq, vcpu->arch.irq_pending);
1528 set_bit(irq->irq / BITS_PER_LONG, &vcpu->arch.irq_summary);
f77bc6a4
ZX		 1529
1530 vcpu_put(vcpu);
1531
1532 return 0;
1533}
1534
b209749f
AK		 1535static int vcpu_ioctl_tpr_access_reporting(struct kvm_vcpu *vcpu,
1536 struct kvm_tpr_access_ctl *tac)
1537{
1538 if (tac->flags)
1539 return -EINVAL;
1540 vcpu->arch.tpr_access_reporting = !!tac->enabled;
1541 return 0;
1542}
1543
313a3dc7
CO		 1544long kvm_arch_vcpu_ioctl(struct file *filp,
1545 unsigned int ioctl, unsigned long arg)
1546{
1547 struct kvm_vcpu *vcpu = filp->private_data;
1548 void __user *argp = (void __user *)arg;
1549 int r;
b772ff36 1550 struct kvm_lapic_state *lapic = NULL;
313a3dc7
CO		 1551
1552 switch (ioctl) {
1553 case KVM_GET_LAPIC: {
b772ff36 1554 lapic = kzalloc(sizeof(struct kvm_lapic_state), GFP_KERNEL);
313a3dc7 1555
b772ff36
DH		 1556 r = -ENOMEM;
1557 if (!lapic)
1558 goto out;
1559 r = kvm_vcpu_ioctl_get_lapic(vcpu, lapic);
313a3dc7
CO		 1560 if (r)
1561 goto out;
1562 r = -EFAULT;
b772ff36 1563 if (copy_to_user(argp, lapic, sizeof(struct kvm_lapic_state)))
313a3dc7
CO		 1564 goto out;
1565 r = 0;
1566 break;
1567 }
1568 case KVM_SET_LAPIC: {
b772ff36
DH		 1569 lapic = kmalloc(sizeof(struct kvm_lapic_state), GFP_KERNEL);
1570 r = -ENOMEM;
1571 if (!lapic)
1572 goto out;
313a3dc7 1573 r = -EFAULT;
b772ff36 1574 if (copy_from_user(lapic, argp, sizeof(struct kvm_lapic_state)))
313a3dc7 1575 goto out;
b772ff36 1576 r = kvm_vcpu_ioctl_set_lapic(vcpu, lapic);
313a3dc7
CO		 1577 if (r)
1578 goto out;
1579 r = 0;
1580 break;
1581 }
f77bc6a4
ZX		 1582 case KVM_INTERRUPT: {
1583 struct kvm_interrupt irq;
1584
1585 r = -EFAULT;
1586 if (copy_from_user(&irq, argp, sizeof irq))
1587 goto out;
1588 r = kvm_vcpu_ioctl_interrupt(vcpu, &irq);
1589 if (r)
1590 goto out;
1591 r = 0;
1592 break;
1593 }
313a3dc7
CO		 1594 case KVM_SET_CPUID: {
1595 struct kvm_cpuid __user *cpuid_arg = argp;
1596 struct kvm_cpuid cpuid;
1597
1598 r = -EFAULT;
1599 if (copy_from_user(&cpuid, cpuid_arg, sizeof cpuid))
1600 goto out;
1601 r = kvm_vcpu_ioctl_set_cpuid(vcpu, &cpuid, cpuid_arg->entries);
1602 if (r)
1603 goto out;
1604 break;
1605 }
07716717
DK		 1606 case KVM_SET_CPUID2: {
1607 struct kvm_cpuid2 __user *cpuid_arg = argp;
1608 struct kvm_cpuid2 cpuid;
1609
1610 r = -EFAULT;
1611 if (copy_from_user(&cpuid, cpuid_arg, sizeof cpuid))
1612 goto out;
1613 r = kvm_vcpu_ioctl_set_cpuid2(vcpu, &cpuid,
1614 cpuid_arg->entries);
1615 if (r)
1616 goto out;
1617 break;
1618 }
1619 case KVM_GET_CPUID2: {
1620 struct kvm_cpuid2 __user *cpuid_arg = argp;
1621 struct kvm_cpuid2 cpuid;
1622
1623 r = -EFAULT;
1624 if (copy_from_user(&cpuid, cpuid_arg, sizeof cpuid))
1625 goto out;
1626 r = kvm_vcpu_ioctl_get_cpuid2(vcpu, &cpuid,
1627 cpuid_arg->entries);
1628 if (r)
1629 goto out;
1630 r = -EFAULT;
1631 if (copy_to_user(cpuid_arg, &cpuid, sizeof cpuid))
1632 goto out;
1633 r = 0;
1634 break;
1635 }
313a3dc7
CO		 1636 case KVM_GET_MSRS:
1637 r = msr_io(vcpu, argp, kvm_get_msr, 1);
1638 break;
1639 case KVM_SET_MSRS:
1640 r = msr_io(vcpu, argp, do_set_msr, 0);
1641 break;
b209749f
AK		 1642 case KVM_TPR_ACCESS_REPORTING: {
1643 struct kvm_tpr_access_ctl tac;
1644
1645 r = -EFAULT;
1646 if (copy_from_user(&tac, argp, sizeof tac))
1647 goto out;
1648 r = vcpu_ioctl_tpr_access_reporting(vcpu, &tac);
1649 if (r)
1650 goto out;
1651 r = -EFAULT;
1652 if (copy_to_user(argp, &tac, sizeof tac))
1653 goto out;
1654 r = 0;
1655 break;
1656 };
b93463aa
AK		 1657 case KVM_SET_VAPIC_ADDR: {
1658 struct kvm_vapic_addr va;
1659
1660 r = -EINVAL;
1661 if (!irqchip_in_kernel(vcpu->kvm))
1662 goto out;
1663 r = -EFAULT;
1664 if (copy_from_user(&va, argp, sizeof va))
1665 goto out;
1666 r = 0;
1667 kvm_lapic_set_vapic_addr(vcpu, va.vapic_addr);
1668 break;
1669 }
313a3dc7
CO		 1670 default:
1671 r = -EINVAL;
1672 }
1673out:
b772ff36
DH		 1674 if (lapic)
1675 kfree(lapic);
313a3dc7
CO		 1676 return r;
1677}
1678
1fe779f8
CO		 1679static int kvm_vm_ioctl_set_tss_addr(struct kvm *kvm, unsigned long addr)
1680{
1681 int ret;
1682
1683 if (addr > (unsigned int)(-3 * PAGE_SIZE))
1684 return -1;
1685 ret = kvm_x86_ops->set_tss_addr(kvm, addr);
1686 return ret;
1687}
1688
1689static int kvm_vm_ioctl_set_nr_mmu_pages(struct kvm *kvm,
1690 u32 kvm_nr_mmu_pages)
1691{
1692 if (kvm_nr_mmu_pages < KVM_MIN_ALLOC_MMU_PAGES)
1693 return -EINVAL;
1694
72dc67a6 1695 down_write(&kvm->slots_lock);
1fe779f8
CO		 1696
1697 kvm_mmu_change_mmu_pages(kvm, kvm_nr_mmu_pages);
f05e70ac 1698 kvm->arch.n_requested_mmu_pages = kvm_nr_mmu_pages;
1fe779f8 1699
72dc67a6 1700 up_write(&kvm->slots_lock);
1fe779f8
CO		 1701 return 0;
1702}
1703
1704static int kvm_vm_ioctl_get_nr_mmu_pages(struct kvm *kvm)
1705{
f05e70ac 1706 return kvm->arch.n_alloc_mmu_pages;
1fe779f8
CO		 1707}
1708
e9f85cde
ZX		 1709gfn_t unalias_gfn(struct kvm *kvm, gfn_t gfn)
1710{
1711 int i;
1712 struct kvm_mem_alias *alias;
1713
d69fb81f
ZX		 1714 for (i = 0; i < kvm->arch.naliases; ++i) {
1715 alias = &kvm->arch.aliases[i];
e9f85cde
ZX		 1716 if (gfn >= alias->base_gfn
1717 && gfn < alias->base_gfn + alias->npages)
1718 return alias->target_gfn + gfn - alias->base_gfn;
1719 }
1720 return gfn;
1721}
1722
1fe779f8
CO		 1723/*
1724 * Set a new alias region. Aliases map a portion of physical memory into
1725 * another portion. This is useful for memory windows, for example the PC
1726 * VGA region.
1727 */
1728static int kvm_vm_ioctl_set_memory_alias(struct kvm *kvm,
1729 struct kvm_memory_alias *alias)
1730{
1731 int r, n;
1732 struct kvm_mem_alias *p;
1733
1734 r = -EINVAL;
1735 /* General sanity checks */
1736 if (alias->memory_size & (PAGE_SIZE - 1))
1737 goto out;
1738 if (alias->guest_phys_addr & (PAGE_SIZE - 1))
1739 goto out;
1740 if (alias->slot >= KVM_ALIAS_SLOTS)
1741 goto out;
1742 if (alias->guest_phys_addr + alias->memory_size
1743 < alias->guest_phys_addr)
1744 goto out;
1745 if (alias->target_phys_addr + alias->memory_size
1746 < alias->target_phys_addr)
1747 goto out;
1748
72dc67a6 1749 down_write(&kvm->slots_lock);
a1708ce8 1750 spin_lock(&kvm->mmu_lock);
1fe779f8 1751
d69fb81f 1752 p = &kvm->arch.aliases[alias->slot];
1fe779f8
CO		 1753 p->base_gfn = alias->guest_phys_addr >> PAGE_SHIFT;
1754 p->npages = alias->memory_size >> PAGE_SHIFT;
1755 p->target_gfn = alias->target_phys_addr >> PAGE_SHIFT;
1756
1757 for (n = KVM_ALIAS_SLOTS; n > 0; --n)
d69fb81f 1758 if (kvm->arch.aliases[n - 1].npages)
1fe779f8 1759 break;
d69fb81f 1760 kvm->arch.naliases = n;
1fe779f8 1761
a1708ce8 1762 spin_unlock(&kvm->mmu_lock);
1fe779f8
CO		 1763 kvm_mmu_zap_all(kvm);
1764
72dc67a6 1765 up_write(&kvm->slots_lock);
1fe779f8
CO		 1766
1767 return 0;
1768
1769out:
1770 return r;
1771}
1772
1773static int kvm_vm_ioctl_get_irqchip(struct kvm *kvm, struct kvm_irqchip *chip)
1774{
1775 int r;
1776
1777 r = 0;
1778 switch (chip->chip_id) {
1779 case KVM_IRQCHIP_PIC_MASTER:
1780 memcpy(&chip->chip.pic,
1781 &pic_irqchip(kvm)->pics[0],
1782 sizeof(struct kvm_pic_state));
1783 break;
1784 case KVM_IRQCHIP_PIC_SLAVE:
1785 memcpy(&chip->chip.pic,
1786 &pic_irqchip(kvm)->pics[1],
1787 sizeof(struct kvm_pic_state));
1788 break;
1789 case KVM_IRQCHIP_IOAPIC:
1790 memcpy(&chip->chip.ioapic,
1791 ioapic_irqchip(kvm),
1792 sizeof(struct kvm_ioapic_state));
1793 break;
1794 default:
1795 r = -EINVAL;
1796 break;
1797 }
1798 return r;
1799}
1800
1801static int kvm_vm_ioctl_set_irqchip(struct kvm *kvm, struct kvm_irqchip *chip)
1802{
1803 int r;
1804
1805 r = 0;
1806 switch (chip->chip_id) {
1807 case KVM_IRQCHIP_PIC_MASTER:
1808 memcpy(&pic_irqchip(kvm)->pics[0],
1809 &chip->chip.pic,
1810 sizeof(struct kvm_pic_state));
1811 break;
1812 case KVM_IRQCHIP_PIC_SLAVE:
1813 memcpy(&pic_irqchip(kvm)->pics[1],
1814 &chip->chip.pic,
1815 sizeof(struct kvm_pic_state));
1816 break;
1817 case KVM_IRQCHIP_IOAPIC:
1818 memcpy(ioapic_irqchip(kvm),
1819 &chip->chip.ioapic,
1820 sizeof(struct kvm_ioapic_state));
1821 break;
1822 default:
1823 r = -EINVAL;
1824 break;
1825 }
1826 kvm_pic_update_irq(pic_irqchip(kvm));
1827 return r;
1828}
1829
e0f63cb9
SY		 1830static int kvm_vm_ioctl_get_pit(struct kvm *kvm, struct kvm_pit_state *ps)
1831{
1832 int r = 0;
1833
1834 memcpy(ps, &kvm->arch.vpit->pit_state, sizeof(struct kvm_pit_state));
1835 return r;
1836}
1837
1838static int kvm_vm_ioctl_set_pit(struct kvm *kvm, struct kvm_pit_state *ps)
1839{
1840 int r = 0;
1841
1842 memcpy(&kvm->arch.vpit->pit_state, ps, sizeof(struct kvm_pit_state));
1843 kvm_pit_load_count(kvm, 0, ps->channels[0].count);
1844 return r;
1845}
1846
5bb064dc
ZX		 1847/*
1848 * Get (and clear) the dirty memory log for a memory slot.
1849 */
1850int kvm_vm_ioctl_get_dirty_log(struct kvm *kvm,
1851 struct kvm_dirty_log *log)
1852{
1853 int r;
1854 int n;
1855 struct kvm_memory_slot *memslot;
1856 int is_dirty = 0;
1857
72dc67a6 1858 down_write(&kvm->slots_lock);
5bb064dc
ZX		 1859
1860 r = kvm_get_dirty_log(kvm, log, &is_dirty);
1861 if (r)
1862 goto out;
1863
1864 /* If nothing is dirty, don't bother messing with page tables. */
1865 if (is_dirty) {
1866 kvm_mmu_slot_remove_write_access(kvm, log->slot);
1867 kvm_flush_remote_tlbs(kvm);
1868 memslot = &kvm->memslots[log->slot];
1869 n = ALIGN(memslot->npages, BITS_PER_LONG) / 8;
1870 memset(memslot->dirty_bitmap, 0, n);
1871 }
1872 r = 0;
1873out:
72dc67a6 1874 up_write(&kvm->slots_lock);
5bb064dc
ZX		 1875 return r;
1876}
1877
1fe779f8
CO		 1878long kvm_arch_vm_ioctl(struct file *filp,
1879 unsigned int ioctl, unsigned long arg)
1880{
1881 struct kvm *kvm = filp->private_data;
1882 void __user *argp = (void __user *)arg;
1883 int r = -EINVAL;
f0d66275
DH		 1884 /*
1885 * This union makes it completely explicit to gcc-3.x
1886 * that these two variables' stack usage should be
1887 * combined, not added together.
1888 */
1889 union {
1890 struct kvm_pit_state ps;
1891 struct kvm_memory_alias alias;
1892 } u;
1fe779f8
CO		 1893
1894 switch (ioctl) {
1895 case KVM_SET_TSS_ADDR:
1896 r = kvm_vm_ioctl_set_tss_addr(kvm, arg);
1897 if (r < 0)
1898 goto out;
1899 break;
1900 case KVM_SET_MEMORY_REGION: {
1901 struct kvm_memory_region kvm_mem;
1902 struct kvm_userspace_memory_region kvm_userspace_mem;
1903
1904 r = -EFAULT;
1905 if (copy_from_user(&kvm_mem, argp, sizeof kvm_mem))
1906 goto out;
1907 kvm_userspace_mem.slot = kvm_mem.slot;
1908 kvm_userspace_mem.flags = kvm_mem.flags;
1909 kvm_userspace_mem.guest_phys_addr = kvm_mem.guest_phys_addr;
1910 kvm_userspace_mem.memory_size = kvm_mem.memory_size;
1911 r = kvm_vm_ioctl_set_memory_region(kvm, &kvm_userspace_mem, 0);
1912 if (r)
1913 goto out;
1914 break;
1915 }
1916 case KVM_SET_NR_MMU_PAGES:
1917 r = kvm_vm_ioctl_set_nr_mmu_pages(kvm, arg);
1918 if (r)
1919 goto out;
1920 break;
1921 case KVM_GET_NR_MMU_PAGES:
1922 r = kvm_vm_ioctl_get_nr_mmu_pages(kvm);
1923 break;
f0d66275 1924 case KVM_SET_MEMORY_ALIAS:
1fe779f8 1925 r = -EFAULT;
f0d66275 1926 if (copy_from_user(&u.alias, argp, sizeof(struct kvm_memory_alias)))
1fe779f8 1927 goto out;
f0d66275 1928 r = kvm_vm_ioctl_set_memory_alias(kvm, &u.alias);
1fe779f8
CO		 1929 if (r)
1930 goto out;
1931 break;
1fe779f8
CO		 1932 case KVM_CREATE_IRQCHIP:
1933 r = -ENOMEM;
d7deeeb0
ZX		 1934 kvm->arch.vpic = kvm_create_pic(kvm);
1935 if (kvm->arch.vpic) {
1fe779f8
CO		 1936 r = kvm_ioapic_init(kvm);
1937 if (r) {
d7deeeb0
ZX		 1938 kfree(kvm->arch.vpic);
1939 kvm->arch.vpic = NULL;
1fe779f8
CO		 1940 goto out;
1941 }
1942 } else
1943 goto out;
1944 break;
7837699f
SY		 1945 case KVM_CREATE_PIT:
1946 r = -ENOMEM;
1947 kvm->arch.vpit = kvm_create_pit(kvm);
1948 if (kvm->arch.vpit)
1949 r = 0;
1950 break;
1fe779f8
CO		 1951 case KVM_IRQ_LINE: {
1952 struct kvm_irq_level irq_event;
1953
1954 r = -EFAULT;
1955 if (copy_from_user(&irq_event, argp, sizeof irq_event))
1956 goto out;
1957 if (irqchip_in_kernel(kvm)) {
1958 mutex_lock(&kvm->lock);
1959 if (irq_event.irq < 16)
1960 kvm_pic_set_irq(pic_irqchip(kvm),
1961 irq_event.irq,
1962 irq_event.level);
d7deeeb0 1963 kvm_ioapic_set_irq(kvm->arch.vioapic,
1fe779f8
CO		 1964 irq_event.irq,
1965 irq_event.level);
1966 mutex_unlock(&kvm->lock);
1967 r = 0;
1968 }
1969 break;
1970 }
1971 case KVM_GET_IRQCHIP: {
1972 /* 0: PIC master, 1: PIC slave, 2: IOAPIC */
f0d66275 1973 struct kvm_irqchip *chip = kmalloc(sizeof(*chip), GFP_KERNEL);
1fe779f8 1974
f0d66275
DH		 1975 r = -ENOMEM;
1976 if (!chip)
1fe779f8 1977 goto out;
f0d66275
DH		 1978 r = -EFAULT;
1979 if (copy_from_user(chip, argp, sizeof *chip))
1980 goto get_irqchip_out;
1fe779f8
CO		 1981 r = -ENXIO;
1982 if (!irqchip_in_kernel(kvm))
f0d66275
DH		 1983 goto get_irqchip_out;
1984 r = kvm_vm_ioctl_get_irqchip(kvm, chip);
1fe779f8 1985 if (r)
f0d66275 1986 goto get_irqchip_out;
1fe779f8 1987 r = -EFAULT;
f0d66275
DH		 1988 if (copy_to_user(argp, chip, sizeof *chip))
1989 goto get_irqchip_out;
1fe779f8 1990 r = 0;
f0d66275
DH		 1991 get_irqchip_out:
1992 kfree(chip);
1993 if (r)
1994 goto out;
1fe779f8
CO		 1995 break;
1996 }
1997 case KVM_SET_IRQCHIP: {
1998 /* 0: PIC master, 1: PIC slave, 2: IOAPIC */
f0d66275 1999 struct kvm_irqchip *chip = kmalloc(sizeof(*chip), GFP_KERNEL);
1fe779f8 2000
f0d66275
DH		 2001 r = -ENOMEM;
2002 if (!chip)
1fe779f8 2003 goto out;
f0d66275
DH		 2004 r = -EFAULT;
2005 if (copy_from_user(chip, argp, sizeof *chip))
2006 goto set_irqchip_out;
1fe779f8
CO		 2007 r = -ENXIO;
2008 if (!irqchip_in_kernel(kvm))
f0d66275
DH		 2009 goto set_irqchip_out;
2010 r = kvm_vm_ioctl_set_irqchip(kvm, chip);
1fe779f8 2011 if (r)
f0d66275 2012 goto set_irqchip_out;
1fe779f8 2013 r = 0;
f0d66275
DH		 2014 set_irqchip_out:
2015 kfree(chip);
2016 if (r)
2017 goto out;
1fe779f8
CO		 2018 break;
2019 }
4d5c5d0f
BAY		 2020 case KVM_ASSIGN_PCI_DEVICE: {
2021 struct kvm_assigned_pci_dev assigned_dev;
2022
2023 r = -EFAULT;
2024 if (copy_from_user(&assigned_dev, argp, sizeof assigned_dev))
2025 goto out;
2026 r = kvm_vm_ioctl_assign_device(kvm, &assigned_dev);
2027 if (r)
2028 goto out;
2029 break;
2030 }
2031 case KVM_ASSIGN_IRQ: {
2032 struct kvm_assigned_irq assigned_irq;
2033
2034 r = -EFAULT;
2035 if (copy_from_user(&assigned_irq, argp, sizeof assigned_irq))
2036 goto out;
2037 r = kvm_vm_ioctl_assign_irq(kvm, &assigned_irq);
2038 if (r)
2039 goto out;
2040 break;
2041 }
e0f63cb9 2042 case KVM_GET_PIT: {
e0f63cb9 2043 r = -EFAULT;
f0d66275 2044 if (copy_from_user(&u.ps, argp, sizeof(struct kvm_pit_state)))
e0f63cb9
SY		 2045 goto out;
2046 r = -ENXIO;
2047 if (!kvm->arch.vpit)
2048 goto out;
f0d66275 2049 r = kvm_vm_ioctl_get_pit(kvm, &u.ps);
e0f63cb9
SY		 2050 if (r)
2051 goto out;
2052 r = -EFAULT;
f0d66275 2053 if (copy_to_user(argp, &u.ps, sizeof(struct kvm_pit_state)))
e0f63cb9
SY		 2054 goto out;
2055 r = 0;
2056 break;
2057 }
2058 case KVM_SET_PIT: {
e0f63cb9 2059 r = -EFAULT;
f0d66275 2060 if (copy_from_user(&u.ps, argp, sizeof u.ps))
e0f63cb9
SY		 2061 goto out;
2062 r = -ENXIO;
2063 if (!kvm->arch.vpit)
2064 goto out;
f0d66275 2065 r = kvm_vm_ioctl_set_pit(kvm, &u.ps);
e0f63cb9
SY		 2066 if (r)
2067 goto out;
2068 r = 0;
2069 break;
2070 }
1fe779f8
CO		 2071 default:
2072 ;
2073 }
2074out:
2075 return r;
2076}
2077
a16b043c 2078static void kvm_init_msr_list(void)
043405e1
CO		 2079{
2080 u32 dummy[2];
2081 unsigned i, j;
2082
2083 for (i = j = 0; i < ARRAY_SIZE(msrs_to_save); i++) {
2084 if (rdmsr_safe(msrs_to_save[i], &dummy[0], &dummy[1]) < 0)
2085 continue;
2086 if (j < i)
2087 msrs_to_save[j] = msrs_to_save[i];
2088 j++;
2089 }
2090 num_msrs_to_save = j;
2091}
2092
bbd9b64e
CO		 2093/*
2094 * Only apic need an MMIO device hook, so shortcut now..
2095 */
2096static struct kvm_io_device *vcpu_find_pervcpu_dev(struct kvm_vcpu *vcpu,
92760499
LV		 2097 gpa_t addr, int len,
2098 int is_write)
bbd9b64e
CO		 2099{
2100 struct kvm_io_device *dev;
2101
ad312c7c
ZX		 2102 if (vcpu->arch.apic) {
2103 dev = &vcpu->arch.apic->dev;
92760499 2104 if (dev->in_range(dev, addr, len, is_write))
bbd9b64e
CO		 2105 return dev;
2106 }
2107 return NULL;
2108}
2109
2110
2111static struct kvm_io_device *vcpu_find_mmio_dev(struct kvm_vcpu *vcpu,
92760499
LV		 2112 gpa_t addr, int len,
2113 int is_write)
bbd9b64e
CO		 2114{
2115 struct kvm_io_device *dev;
2116
92760499 2117 dev = vcpu_find_pervcpu_dev(vcpu, addr, len, is_write);
bbd9b64e 2118 if (dev == NULL)
92760499
LV		 2119 dev = kvm_io_bus_find_dev(&vcpu->kvm->mmio_bus, addr, len,
2120 is_write);
bbd9b64e
CO		 2121 return dev;
2122}
2123
2124int emulator_read_std(unsigned long addr,
2125 void *val,
2126 unsigned int bytes,
2127 struct kvm_vcpu *vcpu)
2128{
2129 void *data = val;
10589a46 2130 int r = X86EMUL_CONTINUE;
bbd9b64e
CO		 2131
2132 while (bytes) {
ad312c7c 2133 gpa_t gpa = vcpu->arch.mmu.gva_to_gpa(vcpu, addr);
bbd9b64e
CO		 2134 unsigned offset = addr & (PAGE_SIZE-1);
2135 unsigned tocopy = min(bytes, (unsigned)PAGE_SIZE - offset);
2136 int ret;
2137
10589a46
MT		 2138 if (gpa == UNMAPPED_GVA) {
2139 r = X86EMUL_PROPAGATE_FAULT;
2140 goto out;
2141 }
bbd9b64e 2142 ret = kvm_read_guest(vcpu->kvm, gpa, data, tocopy);
10589a46
MT		 2143 if (ret < 0) {
2144 r = X86EMUL_UNHANDLEABLE;
2145 goto out;
2146 }
bbd9b64e
CO		 2147
2148 bytes -= tocopy;
2149 data += tocopy;
2150 addr += tocopy;
2151 }
10589a46 2152out:
10589a46 2153 return r;
bbd9b64e
CO		 2154}
2155EXPORT_SYMBOL_GPL(emulator_read_std);
2156
bbd9b64e
CO		 2157static int emulator_read_emulated(unsigned long addr,
2158 void *val,
2159 unsigned int bytes,
2160 struct kvm_vcpu *vcpu)
2161{
2162 struct kvm_io_device *mmio_dev;
2163 gpa_t gpa;
2164
2165 if (vcpu->mmio_read_completed) {
2166 memcpy(val, vcpu->mmio_data, bytes);
2167 vcpu->mmio_read_completed = 0;
2168 return X86EMUL_CONTINUE;
2169 }
2170
ad312c7c 2171 gpa = vcpu->arch.mmu.gva_to_gpa(vcpu, addr);
bbd9b64e
CO		 2172
2173 /* For APIC access vmexit */
2174 if ((gpa & PAGE_MASK) == APIC_DEFAULT_PHYS_BASE)
2175 goto mmio;
2176
2177 if (emulator_read_std(addr, val, bytes, vcpu)
2178 == X86EMUL_CONTINUE)
2179 return X86EMUL_CONTINUE;
2180 if (gpa == UNMAPPED_GVA)
2181 return X86EMUL_PROPAGATE_FAULT;
2182
2183mmio:
2184 /*
2185 * Is this MMIO handled locally?
2186 */
10589a46 2187 mutex_lock(&vcpu->kvm->lock);
92760499 2188 mmio_dev = vcpu_find_mmio_dev(vcpu, gpa, bytes, 0);
bbd9b64e
CO		 2189 if (mmio_dev) {
2190 kvm_iodevice_read(mmio_dev, gpa, bytes, val);
10589a46 2191 mutex_unlock(&vcpu->kvm->lock);
bbd9b64e
CO		 2192 return X86EMUL_CONTINUE;
2193 }
10589a46 2194 mutex_unlock(&vcpu->kvm->lock);
bbd9b64e
CO		 2195
2196 vcpu->mmio_needed = 1;
2197 vcpu->mmio_phys_addr = gpa;
2198 vcpu->mmio_size = bytes;
2199 vcpu->mmio_is_write = 0;
2200
2201 return X86EMUL_UNHANDLEABLE;
2202}
2203
3200f405 2204int emulator_write_phys(struct kvm_vcpu *vcpu, gpa_t gpa,
9f811285 2205 const void *val, int bytes)
bbd9b64e
CO		 2206{
2207 int ret;
2208
2209 ret = kvm_write_guest(vcpu->kvm, gpa, val, bytes);
9f811285 2210 if (ret < 0)
bbd9b64e
CO		 2211 return 0;
2212 kvm_mmu_pte_write(vcpu, gpa, val, bytes);
2213 return 1;
2214}
2215
2216static int emulator_write_emulated_onepage(unsigned long addr,
2217 const void *val,
2218 unsigned int bytes,
2219 struct kvm_vcpu *vcpu)
2220{
2221 struct kvm_io_device *mmio_dev;
10589a46
MT		 2222 gpa_t gpa;
2223
10589a46 2224 gpa = vcpu->arch.mmu.gva_to_gpa(vcpu, addr);
bbd9b64e
CO		 2225
2226 if (gpa == UNMAPPED_GVA) {
c3c91fee 2227 kvm_inject_page_fault(vcpu, addr, 2);
bbd9b64e
CO		 2228 return X86EMUL_PROPAGATE_FAULT;
2229 }
2230
2231 /* For APIC access vmexit */
2232 if ((gpa & PAGE_MASK) == APIC_DEFAULT_PHYS_BASE)
2233 goto mmio;
2234
2235 if (emulator_write_phys(vcpu, gpa, val, bytes))
2236 return X86EMUL_CONTINUE;
2237
2238mmio:
2239 /*
2240 * Is this MMIO handled locally?
2241 */
10589a46 2242 mutex_lock(&vcpu->kvm->lock);
92760499 2243 mmio_dev = vcpu_find_mmio_dev(vcpu, gpa, bytes, 1);
bbd9b64e
CO		 2244 if (mmio_dev) {
2245 kvm_iodevice_write(mmio_dev, gpa, bytes, val);
10589a46 2246 mutex_unlock(&vcpu->kvm->lock);
bbd9b64e
CO		 2247 return X86EMUL_CONTINUE;
2248 }
10589a46 2249 mutex_unlock(&vcpu->kvm->lock);
bbd9b64e
CO		 2250
2251 vcpu->mmio_needed = 1;
2252 vcpu->mmio_phys_addr = gpa;
2253 vcpu->mmio_size = bytes;
2254 vcpu->mmio_is_write = 1;
2255 memcpy(vcpu->mmio_data, val, bytes);
2256
2257 return X86EMUL_CONTINUE;
2258}
2259
2260int emulator_write_emulated(unsigned long addr,
2261 const void *val,
2262 unsigned int bytes,
2263 struct kvm_vcpu *vcpu)
2264{
2265 /* Crossing a page boundary? */
2266 if (((addr + bytes - 1) ^ addr) & PAGE_MASK) {
2267 int rc, now;
2268
2269 now = -addr & ~PAGE_MASK;
2270 rc = emulator_write_emulated_onepage(addr, val, now, vcpu);
2271 if (rc != X86EMUL_CONTINUE)
2272 return rc;
2273 addr += now;
2274 val += now;
2275 bytes -= now;
2276 }
2277 return emulator_write_emulated_onepage(addr, val, bytes, vcpu);
2278}
2279EXPORT_SYMBOL_GPL(emulator_write_emulated);
2280
2281static int emulator_cmpxchg_emulated(unsigned long addr,
2282 const void *old,
2283 const void *new,
2284 unsigned int bytes,
2285 struct kvm_vcpu *vcpu)
2286{
2287 static int reported;
2288
2289 if (!reported) {
2290 reported = 1;
2291 printk(KERN_WARNING "kvm: emulating exchange as write\n");
2292 }
2bacc55c
MT		 2293#ifndef CONFIG_X86_64
2294 /* guests cmpxchg8b have to be emulated atomically */
2295 if (bytes == 8) {
10589a46 2296 gpa_t gpa;
2bacc55c 2297 struct page *page;
c0b49b0d 2298 char *kaddr;
2bacc55c
MT		 2299 u64 val;
2300
10589a46
MT		 2301 gpa = vcpu->arch.mmu.gva_to_gpa(vcpu, addr);
2302
2bacc55c
MT		 2303 if (gpa == UNMAPPED_GVA ||
2304 (gpa & PAGE_MASK) == APIC_DEFAULT_PHYS_BASE)
2305 goto emul_write;
2306
2307 if (((gpa + bytes - 1) & PAGE_MASK) != (gpa & PAGE_MASK))
2308 goto emul_write;
2309
2310 val = *(u64 *)new;
72dc67a6
IE		 2311
2312 down_read(&current->mm->mmap_sem);
2bacc55c 2313 page = gfn_to_page(vcpu->kvm, gpa >> PAGE_SHIFT);
72dc67a6
IE		 2314 up_read(&current->mm->mmap_sem);
2315
c0b49b0d
AM		 2316 kaddr = kmap_atomic(page, KM_USER0);
2317 set_64bit((u64 *)(kaddr + offset_in_page(gpa)), val);
2318 kunmap_atomic(kaddr, KM_USER0);
2bacc55c
MT		 2319 kvm_release_page_dirty(page);
2320 }
3200f405 2321emul_write:
2bacc55c
MT		 2322#endif
2323
bbd9b64e
CO		 2324 return emulator_write_emulated(addr, new, bytes, vcpu);
2325}
2326
2327static unsigned long get_segment_base(struct kvm_vcpu *vcpu, int seg)
2328{
2329 return kvm_x86_ops->get_segment_base(vcpu, seg);
2330}
2331
2332int emulate_invlpg(struct kvm_vcpu *vcpu, gva_t address)
2333{
2334 return X86EMUL_CONTINUE;
2335}
2336
2337int emulate_clts(struct kvm_vcpu *vcpu)
2338{
54e445ca 2339 KVMTRACE_0D(CLTS, vcpu, handler);
ad312c7c 2340 kvm_x86_ops->set_cr0(vcpu, vcpu->arch.cr0 & ~X86_CR0_TS);
bbd9b64e
CO		 2341 return X86EMUL_CONTINUE;
2342}
2343
2344int emulator_get_dr(struct x86_emulate_ctxt *ctxt, int dr, unsigned long *dest)
2345{
2346 struct kvm_vcpu *vcpu = ctxt->vcpu;
2347
2348 switch (dr) {
2349 case 0 ... 3:
2350 *dest = kvm_x86_ops->get_dr(vcpu, dr);
2351 return X86EMUL_CONTINUE;
2352 default:
b8688d51 2353 pr_unimpl(vcpu, "%s: unexpected dr %u\n", __func__, dr);
bbd9b64e
CO		 2354 return X86EMUL_UNHANDLEABLE;
2355 }
2356}
2357
2358int emulator_set_dr(struct x86_emulate_ctxt *ctxt, int dr, unsigned long value)
2359{
2360 unsigned long mask = (ctxt->mode == X86EMUL_MODE_PROT64) ? ~0ULL : ~0U;
2361 int exception;
2362
2363 kvm_x86_ops->set_dr(ctxt->vcpu, dr, value & mask, &exception);
2364 if (exception) {
2365 /* FIXME: better handling */
2366 return X86EMUL_UNHANDLEABLE;
2367 }
2368 return X86EMUL_CONTINUE;
2369}
2370
2371void kvm_report_emulation_failure(struct kvm_vcpu *vcpu, const char *context)
2372{
bbd9b64e 2373 u8 opcodes[4];
5fdbf976 2374 unsigned long rip = kvm_rip_read(vcpu);
bbd9b64e
CO		 2375 unsigned long rip_linear;
2376
f76c710d 2377 if (!printk_ratelimit())
bbd9b64e
CO		 2378 return;
2379
25be4608
GC		 2380 rip_linear = rip + get_segment_base(vcpu, VCPU_SREG_CS);
2381
bbd9b64e
CO		 2382 emulator_read_std(rip_linear, (void *)opcodes, 4, vcpu);
2383
2384 printk(KERN_ERR "emulation failed (%s) rip %lx %02x %02x %02x %02x\n",
2385 context, rip, opcodes[0], opcodes[1], opcodes[2], opcodes[3]);
bbd9b64e
CO		 2386}
2387EXPORT_SYMBOL_GPL(kvm_report_emulation_failure);
2388
14af3f3c 2389static struct x86_emulate_ops emulate_ops = {
bbd9b64e 2390 .read_std = emulator_read_std,
bbd9b64e
CO		 2391 .read_emulated = emulator_read_emulated,
2392 .write_emulated = emulator_write_emulated,
2393 .cmpxchg_emulated = emulator_cmpxchg_emulated,
2394};
2395
5fdbf976
MT		 2396static void cache_all_regs(struct kvm_vcpu *vcpu)
2397{
2398 kvm_register_read(vcpu, VCPU_REGS_RAX);
2399 kvm_register_read(vcpu, VCPU_REGS_RSP);
2400 kvm_register_read(vcpu, VCPU_REGS_RIP);
2401 vcpu->arch.regs_dirty = ~0;
2402}
2403
bbd9b64e
CO		 2404int emulate_instruction(struct kvm_vcpu *vcpu,
2405 struct kvm_run *run,
2406 unsigned long cr2,
2407 u16 error_code,
571008da 2408 int emulation_type)
bbd9b64e
CO		 2409{
2410 int r;
571008da 2411 struct decode_cache *c;
bbd9b64e 2412
26eef70c 2413 kvm_clear_exception_queue(vcpu);
ad312c7c 2414 vcpu->arch.mmio_fault_cr2 = cr2;
5fdbf976
MT		 2415 /*
2416 * TODO: fix x86_emulate.c to use guest_read/write_register
2417 * instead of direct ->regs accesses, can save hundred cycles
2418 * on Intel for instructions that don't read/change RSP, for
2419 * for example.
2420 */
2421 cache_all_regs(vcpu);
bbd9b64e
CO		 2422
2423 vcpu->mmio_is_write = 0;
ad312c7c 2424 vcpu->arch.pio.string = 0;
bbd9b64e 2425
571008da 2426 if (!(emulation_type & EMULTYPE_NO_DECODE)) {
bbd9b64e
CO		 2427 int cs_db, cs_l;
2428 kvm_x86_ops->get_cs_db_l_bits(vcpu, &cs_db, &cs_l);
2429
ad312c7c
ZX		 2430 vcpu->arch.emulate_ctxt.vcpu = vcpu;
2431 vcpu->arch.emulate_ctxt.eflags = kvm_x86_ops->get_rflags(vcpu);
2432 vcpu->arch.emulate_ctxt.mode =
2433 (vcpu->arch.emulate_ctxt.eflags & X86_EFLAGS_VM)
bbd9b64e
CO		 2434 ? X86EMUL_MODE_REAL : cs_l
2435 ? X86EMUL_MODE_PROT64 : cs_db
2436 ? X86EMUL_MODE_PROT32 : X86EMUL_MODE_PROT16;
2437
ad312c7c 2438 r = x86_decode_insn(&vcpu->arch.emulate_ctxt, &emulate_ops);
571008da
SY		 2439
2440 /* Reject the instructions other than VMCALL/VMMCALL when
2441 * try to emulate invalid opcode */
2442 c = &vcpu->arch.emulate_ctxt.decode;
2443 if ((emulation_type & EMULTYPE_TRAP_UD) &&
2444 (!(c->twobyte && c->b == 0x01 &&
2445 (c->modrm_reg == 0 || c->modrm_reg == 3) &&
2446 c->modrm_mod == 3 && c->modrm_rm == 1)))
2447 return EMULATE_FAIL;
2448
f2b5756b 2449 ++vcpu->stat.insn_emulation;
bbd9b64e 2450 if (r) {
f2b5756b 2451 ++vcpu->stat.insn_emulation_fail;
bbd9b64e
CO		 2452 if (kvm_mmu_unprotect_page_virt(vcpu, cr2))
2453 return EMULATE_DONE;
2454 return EMULATE_FAIL;
2455 }
2456 }
2457
ad312c7c 2458 r = x86_emulate_insn(&vcpu->arch.emulate_ctxt, &emulate_ops);
bbd9b64e 2459
ad312c7c 2460 if (vcpu->arch.pio.string)
bbd9b64e
CO		 2461 return EMULATE_DO_MMIO;
2462
2463 if ((r || vcpu->mmio_is_write) && run) {
2464 run->exit_reason = KVM_EXIT_MMIO;
2465 run->mmio.phys_addr = vcpu->mmio_phys_addr;
2466 memcpy(run->mmio.data, vcpu->mmio_data, 8);
2467 run->mmio.len = vcpu->mmio_size;
2468 run->mmio.is_write = vcpu->mmio_is_write;
2469 }
2470
2471 if (r) {
2472 if (kvm_mmu_unprotect_page_virt(vcpu, cr2))
2473 return EMULATE_DONE;
2474 if (!vcpu->mmio_needed) {
2475 kvm_report_emulation_failure(vcpu, "mmio");
2476 return EMULATE_FAIL;
2477 }
2478 return EMULATE_DO_MMIO;
2479 }
2480
ad312c7c 2481 kvm_x86_ops->set_rflags(vcpu, vcpu->arch.emulate_ctxt.eflags);
bbd9b64e
CO		 2482
2483 if (vcpu->mmio_is_write) {
2484 vcpu->mmio_needed = 0;
2485 return EMULATE_DO_MMIO;
2486 }
2487
2488 return EMULATE_DONE;
2489}
2490EXPORT_SYMBOL_GPL(emulate_instruction);
2491
de7d789a
CO		 2492static void free_pio_guest_pages(struct kvm_vcpu *vcpu)
2493{
2494 int i;
2495
ad312c7c
ZX		 2496 for (i = 0; i < ARRAY_SIZE(vcpu->arch.pio.guest_pages); ++i)
2497 if (vcpu->arch.pio.guest_pages[i]) {
2498 kvm_release_page_dirty(vcpu->arch.pio.guest_pages[i]);
2499 vcpu->arch.pio.guest_pages[i] = NULL;
de7d789a
CO		 2500 }
2501}
2502
2503static int pio_copy_data(struct kvm_vcpu *vcpu)
2504{
ad312c7c 2505 void *p = vcpu->arch.pio_data;
de7d789a
CO		 2506 void *q;
2507 unsigned bytes;
ad312c7c 2508 int nr_pages = vcpu->arch.pio.guest_pages[1] ? 2 : 1;
de7d789a 2509
ad312c7c 2510 q = vmap(vcpu->arch.pio.guest_pages, nr_pages, VM_READ|VM_WRITE,
de7d789a
CO		 2511 PAGE_KERNEL);
2512 if (!q) {
2513 free_pio_guest_pages(vcpu);
2514 return -ENOMEM;
2515 }
ad312c7c
ZX		 2516 q += vcpu->arch.pio.guest_page_offset;
2517 bytes = vcpu->arch.pio.size * vcpu->arch.pio.cur_count;
2518 if (vcpu->arch.pio.in)
de7d789a
CO		 2519 memcpy(q, p, bytes);
2520 else
2521 memcpy(p, q, bytes);
ad312c7c 2522 q -= vcpu->arch.pio.guest_page_offset;
de7d789a
CO		 2523 vunmap(q);
2524 free_pio_guest_pages(vcpu);
2525 return 0;
2526}
2527
2528int complete_pio(struct kvm_vcpu *vcpu)
2529{
ad312c7c 2530 struct kvm_pio_request *io = &vcpu->arch.pio;
de7d789a
CO		 2531 long delta;
2532 int r;
5fdbf976 2533 unsigned long val;
de7d789a
CO		 2534
2535 if (!io->string) {
5fdbf976
MT		 2536 if (io->in) {
2537 val = kvm_register_read(vcpu, VCPU_REGS_RAX);
2538 memcpy(&val, vcpu->arch.pio_data, io->size);
2539 kvm_register_write(vcpu, VCPU_REGS_RAX, val);
2540 }
de7d789a
CO		 2541 } else {
2542 if (io->in) {
2543 r = pio_copy_data(vcpu);
5fdbf976 2544 if (r)
de7d789a 2545 return r;
de7d789a
CO		 2546 }
2547
2548 delta = 1;
2549 if (io->rep) {
2550 delta *= io->cur_count;
2551 /*
2552 * The size of the register should really depend on
2553 * current address size.
2554 */
5fdbf976
MT		 2555 val = kvm_register_read(vcpu, VCPU_REGS_RCX);
2556 val -= delta;
2557 kvm_register_write(vcpu, VCPU_REGS_RCX, val);
de7d789a
CO		 2558 }
2559 if (io->down)
2560 delta = -delta;
2561 delta *= io->size;
5fdbf976
MT		 2562 if (io->in) {
2563 val = kvm_register_read(vcpu, VCPU_REGS_RDI);
2564 val += delta;
2565 kvm_register_write(vcpu, VCPU_REGS_RDI, val);
2566 } else {
2567 val = kvm_register_read(vcpu, VCPU_REGS_RSI);
2568 val += delta;
2569 kvm_register_write(vcpu, VCPU_REGS_RSI, val);
2570 }
de7d789a
CO		 2571 }
2572
de7d789a
CO		 2573 io->count -= io->cur_count;
2574 io->cur_count = 0;
2575
2576 return 0;
2577}
2578
2579static void kernel_pio(struct kvm_io_device *pio_dev,
2580 struct kvm_vcpu *vcpu,
2581 void *pd)
2582{
2583 /* TODO: String I/O for in kernel device */
2584
2585 mutex_lock(&vcpu->kvm->lock);
ad312c7c
ZX		 2586 if (vcpu->arch.pio.in)
2587 kvm_iodevice_read(pio_dev, vcpu->arch.pio.port,
2588 vcpu->arch.pio.size,
de7d789a
CO		 2589 pd);
2590 else
ad312c7c
ZX		 2591 kvm_iodevice_write(pio_dev, vcpu->arch.pio.port,
2592 vcpu->arch.pio.size,
de7d789a
CO		 2593 pd);
2594 mutex_unlock(&vcpu->kvm->lock);
2595}
2596
2597static void pio_string_write(struct kvm_io_device *pio_dev,
2598 struct kvm_vcpu *vcpu)
2599{
ad312c7c
ZX		 2600 struct kvm_pio_request *io = &vcpu->arch.pio;
2601 void *pd = vcpu->arch.pio_data;
de7d789a
CO		 2602 int i;
2603
2604 mutex_lock(&vcpu->kvm->lock);
2605 for (i = 0; i < io->cur_count; i++) {
2606 kvm_iodevice_write(pio_dev, io->port,
2607 io->size,
2608 pd);
2609 pd += io->size;
2610 }
2611 mutex_unlock(&vcpu->kvm->lock);
2612}
2613
2614static struct kvm_io_device *vcpu_find_pio_dev(struct kvm_vcpu *vcpu,
92760499
LV		 2615 gpa_t addr, int len,
2616 int is_write)
de7d789a 2617{
92760499 2618 return kvm_io_bus_find_dev(&vcpu->kvm->pio_bus, addr, len, is_write);
de7d789a
CO		 2619}
2620
2621int kvm_emulate_pio(struct kvm_vcpu *vcpu, struct kvm_run *run, int in,
2622 int size, unsigned port)
2623{
2624 struct kvm_io_device *pio_dev;
5fdbf976 2625 unsigned long val;
de7d789a
CO		 2626
2627 vcpu->run->exit_reason = KVM_EXIT_IO;
2628 vcpu->run->io.direction = in ? KVM_EXIT_IO_IN : KVM_EXIT_IO_OUT;
ad312c7c 2629 vcpu->run->io.size = vcpu->arch.pio.size = size;
de7d789a 2630 vcpu->run->io.data_offset = KVM_PIO_PAGE_OFFSET * PAGE_SIZE;
ad312c7c
ZX		 2631 vcpu->run->io.count = vcpu->arch.pio.count = vcpu->arch.pio.cur_count = 1;
2632 vcpu->run->io.port = vcpu->arch.pio.port = port;
2633 vcpu->arch.pio.in = in;
2634 vcpu->arch.pio.string = 0;
2635 vcpu->arch.pio.down = 0;
2636 vcpu->arch.pio.guest_page_offset = 0;
2637 vcpu->arch.pio.rep = 0;
de7d789a 2638
2714d1d3
FEL		 2639 if (vcpu->run->io.direction == KVM_EXIT_IO_IN)
2640 KVMTRACE_2D(IO_READ, vcpu, vcpu->run->io.port, (u32)size,
2641 handler);
2642 else
2643 KVMTRACE_2D(IO_WRITE, vcpu, vcpu->run->io.port, (u32)size,
2644 handler);
2645
5fdbf976
MT		 2646 val = kvm_register_read(vcpu, VCPU_REGS_RAX);
2647 memcpy(vcpu->arch.pio_data, &val, 4);
de7d789a
CO		 2648
2649 kvm_x86_ops->skip_emulated_instruction(vcpu);
2650
92760499 2651 pio_dev = vcpu_find_pio_dev(vcpu, port, size, !in);
de7d789a 2652 if (pio_dev) {
ad312c7c 2653 kernel_pio(pio_dev, vcpu, vcpu->arch.pio_data);
de7d789a
CO		 2654 complete_pio(vcpu);
2655 return 1;
2656 }
2657 return 0;
2658}
2659EXPORT_SYMBOL_GPL(kvm_emulate_pio);
2660
2661int kvm_emulate_pio_string(struct kvm_vcpu *vcpu, struct kvm_run *run, int in,
2662 int size, unsigned long count, int down,
2663 gva_t address, int rep, unsigned port)
2664{
2665 unsigned now, in_page;
2666 int i, ret = 0;
2667 int nr_pages = 1;
2668 struct page *page;
2669 struct kvm_io_device *pio_dev;
2670
2671 vcpu->run->exit_reason = KVM_EXIT_IO;
2672 vcpu->run->io.direction = in ? KVM_EXIT_IO_IN : KVM_EXIT_IO_OUT;
ad312c7c 2673 vcpu->run->io.size = vcpu->arch.pio.size = size;
de7d789a 2674 vcpu->run->io.data_offset = KVM_PIO_PAGE_OFFSET * PAGE_SIZE;
ad312c7c
ZX		 2675 vcpu->run->io.count = vcpu->arch.pio.count = vcpu->arch.pio.cur_count = count;
2676 vcpu->run->io.port = vcpu->arch.pio.port = port;
2677 vcpu->arch.pio.in = in;
2678 vcpu->arch.pio.string = 1;
2679 vcpu->arch.pio.down = down;
2680 vcpu->arch.pio.guest_page_offset = offset_in_page(address);
2681 vcpu->arch.pio.rep = rep;
de7d789a 2682
2714d1d3
FEL		 2683 if (vcpu->run->io.direction == KVM_EXIT_IO_IN)
2684 KVMTRACE_2D(IO_READ, vcpu, vcpu->run->io.port, (u32)size,
2685 handler);
2686 else
2687 KVMTRACE_2D(IO_WRITE, vcpu, vcpu->run->io.port, (u32)size,
2688 handler);
2689
de7d789a
CO		 2690 if (!count) {
2691 kvm_x86_ops->skip_emulated_instruction(vcpu);
2692 return 1;
2693 }
2694
2695 if (!down)
2696 in_page = PAGE_SIZE - offset_in_page(address);
2697 else
2698 in_page = offset_in_page(address) + size;
2699 now = min(count, (unsigned long)in_page / size);
2700 if (!now) {
2701 /*
2702 * String I/O straddles page boundary. Pin two guest pages
2703 * so that we satisfy atomicity constraints. Do just one
2704 * transaction to avoid complexity.
2705 */
2706 nr_pages = 2;
2707 now = 1;
2708 }
2709 if (down) {
2710 /*
2711 * String I/O in reverse. Yuck. Kill the guest, fix later.
2712 */
2713 pr_unimpl(vcpu, "guest string pio down\n");
c1a5d4f9 2714 kvm_inject_gp(vcpu, 0);
de7d789a
CO		 2715 return 1;
2716 }
2717 vcpu->run->io.count = now;
ad312c7c 2718 vcpu->arch.pio.cur_count = now;
de7d789a 2719
ad312c7c 2720 if (vcpu->arch.pio.cur_count == vcpu->arch.pio.count)
de7d789a
CO		 2721 kvm_x86_ops->skip_emulated_instruction(vcpu);
2722
2723 for (i = 0; i < nr_pages; ++i) {
de7d789a 2724 page = gva_to_page(vcpu, address + i * PAGE_SIZE);
ad312c7c 2725 vcpu->arch.pio.guest_pages[i] = page;
de7d789a 2726 if (!page) {
c1a5d4f9 2727 kvm_inject_gp(vcpu, 0);
de7d789a
CO		 2728 free_pio_guest_pages(vcpu);
2729 return 1;
2730 }
2731 }
2732
92760499
LV		 2733 pio_dev = vcpu_find_pio_dev(vcpu, port,
2734 vcpu->arch.pio.cur_count,
2735 !vcpu->arch.pio.in);
ad312c7c 2736 if (!vcpu->arch.pio.in) {
de7d789a
CO		 2737 /* string PIO write */
2738 ret = pio_copy_data(vcpu);
2739 if (ret >= 0 && pio_dev) {
2740 pio_string_write(pio_dev, vcpu);
2741 complete_pio(vcpu);
ad312c7c 2742 if (vcpu->arch.pio.count == 0)
de7d789a
CO		 2743 ret = 1;
2744 }
2745 } else if (pio_dev)
2746 pr_unimpl(vcpu, "no string pio read support yet, "
2747 "port %x size %d count %ld\n",
2748 port, size, count);
2749
2750 return ret;
2751}
2752EXPORT_SYMBOL_GPL(kvm_emulate_pio_string);
2753
f8c16bba 2754int kvm_arch_init(void *opaque)
043405e1 2755{
56c6d28a 2756 int r;
f8c16bba
ZX		 2757 struct kvm_x86_ops *ops = (struct kvm_x86_ops *)opaque;
2758
f8c16bba
ZX		 2759 if (kvm_x86_ops) {
2760 printk(KERN_ERR "kvm: already loaded the other module\n");
56c6d28a
ZX		 2761 r = -EEXIST;
2762 goto out;
f8c16bba
ZX		 2763 }
2764
2765 if (!ops->cpu_has_kvm_support()) {
2766 printk(KERN_ERR "kvm: no hardware support\n");
56c6d28a
ZX		 2767 r = -EOPNOTSUPP;
2768 goto out;
f8c16bba
ZX		 2769 }
2770 if (ops->disabled_by_bios()) {
2771 printk(KERN_ERR "kvm: disabled by bios\n");
56c6d28a
ZX		 2772 r = -EOPNOTSUPP;
2773 goto out;
f8c16bba
ZX		 2774 }
2775
97db56ce
AK		 2776 r = kvm_mmu_module_init();
2777 if (r)
2778 goto out;
2779
2780 kvm_init_msr_list();
2781
f8c16bba 2782 kvm_x86_ops = ops;
56c6d28a 2783 kvm_mmu_set_nonpresent_ptes(0ull, 0ull);
7b52345e
SY		 2784 kvm_mmu_set_base_ptes(PT_PRESENT_MASK);
2785 kvm_mmu_set_mask_ptes(PT_USER_MASK, PT_ACCESSED_MASK,
2786 PT_DIRTY_MASK, PT64_NX_MASK, 0);
f8c16bba 2787 return 0;
56c6d28a
ZX		 2788
2789out:
56c6d28a 2790 return r;
043405e1 2791}
8776e519 2792
f8c16bba
ZX		 2793void kvm_arch_exit(void)
2794{
2795 kvm_x86_ops = NULL;
56c6d28a
ZX		 2796 kvm_mmu_module_exit();
2797}
f8c16bba 2798
8776e519
HB		 2799int kvm_emulate_halt(struct kvm_vcpu *vcpu)
2800{
2801 ++vcpu->stat.halt_exits;
2714d1d3 2802 KVMTRACE_0D(HLT, vcpu, handler);
8776e519 2803 if (irqchip_in_kernel(vcpu->kvm)) {
a4535290 2804 vcpu->arch.mp_state = KVM_MP_STATE_HALTED;
3200f405 2805 up_read(&vcpu->kvm->slots_lock);
8776e519 2806 kvm_vcpu_block(vcpu);
3200f405 2807 down_read(&vcpu->kvm->slots_lock);
a4535290 2808 if (vcpu->arch.mp_state != KVM_MP_STATE_RUNNABLE)
8776e519
HB		 2809 return -EINTR;
2810 return 1;
2811 } else {
2812 vcpu->run->exit_reason = KVM_EXIT_HLT;
2813 return 0;
2814 }
2815}
2816EXPORT_SYMBOL_GPL(kvm_emulate_halt);
2817
2f333bcb
MT		 2818static inline gpa_t hc_gpa(struct kvm_vcpu *vcpu, unsigned long a0,
2819 unsigned long a1)
2820{
2821 if (is_long_mode(vcpu))
2822 return a0;
2823 else
2824 return a0 | ((gpa_t)a1 << 32);
2825}
2826
8776e519
HB		 2827int kvm_emulate_hypercall(struct kvm_vcpu *vcpu)
2828{
2829 unsigned long nr, a0, a1, a2, a3, ret;
2f333bcb 2830 int r = 1;
8776e519 2831
5fdbf976
MT		 2832 nr = kvm_register_read(vcpu, VCPU_REGS_RAX);
2833 a0 = kvm_register_read(vcpu, VCPU_REGS_RBX);
2834 a1 = kvm_register_read(vcpu, VCPU_REGS_RCX);
2835 a2 = kvm_register_read(vcpu, VCPU_REGS_RDX);
2836 a3 = kvm_register_read(vcpu, VCPU_REGS_RSI);
8776e519 2837
2714d1d3
FEL		 2838 KVMTRACE_1D(VMMCALL, vcpu, (u32)nr, handler);
2839
8776e519
HB		 2840 if (!is_long_mode(vcpu)) {
2841 nr &= 0xFFFFFFFF;
2842 a0 &= 0xFFFFFFFF;
2843 a1 &= 0xFFFFFFFF;
2844 a2 &= 0xFFFFFFFF;
2845 a3 &= 0xFFFFFFFF;
2846 }
2847
2848 switch (nr) {
b93463aa
AK		 2849 case KVM_HC_VAPIC_POLL_IRQ:
2850 ret = 0;
2851 break;
2f333bcb
MT		 2852 case KVM_HC_MMU_OP:
2853 r = kvm_pv_mmu_op(vcpu, a0, hc_gpa(vcpu, a1, a2), &ret);
2854 break;
8776e519
HB		 2855 default:
2856 ret = -KVM_ENOSYS;
2857 break;
2858 }
5fdbf976 2859 kvm_register_write(vcpu, VCPU_REGS_RAX, ret);
f11c3a8d 2860 ++vcpu->stat.hypercalls;
2f333bcb 2861 return r;
8776e519
HB		 2862}
2863EXPORT_SYMBOL_GPL(kvm_emulate_hypercall);
2864
2865int kvm_fix_hypercall(struct kvm_vcpu *vcpu)
2866{
2867 char instruction[3];
2868 int ret = 0;
5fdbf976 2869 unsigned long rip = kvm_rip_read(vcpu);
8776e519 2870
8776e519
HB		 2871
2872 /*
2873 * Blow out the MMU to ensure that no other VCPU has an active mapping
2874 * to ensure that the updated hypercall appears atomically across all
2875 * VCPUs.
2876 */
2877 kvm_mmu_zap_all(vcpu->kvm);
2878
8776e519 2879 kvm_x86_ops->patch_hypercall(vcpu, instruction);
5fdbf976 2880 if (emulator_write_emulated(rip, instruction, 3, vcpu)
8776e519
HB		 2881 != X86EMUL_CONTINUE)
2882 ret = -EFAULT;
2883
8776e519
HB		 2884 return ret;
2885}
2886
2887static u64 mk_cr_64(u64 curr_cr, u32 new_val)
2888{
2889 return (curr_cr & ~((1ULL << 32) - 1)) | new_val;
2890}
2891
2892void realmode_lgdt(struct kvm_vcpu *vcpu, u16 limit, unsigned long base)
2893{
2894 struct descriptor_table dt = { limit, base };
2895
2896 kvm_x86_ops->set_gdt(vcpu, &dt);
2897}
2898
2899void realmode_lidt(struct kvm_vcpu *vcpu, u16 limit, unsigned long base)
2900{
2901 struct descriptor_table dt = { limit, base };
2902
2903 kvm_x86_ops->set_idt(vcpu, &dt);
2904}
2905
2906void realmode_lmsw(struct kvm_vcpu *vcpu, unsigned long msw,
2907 unsigned long *rflags)
2908{
2d3ad1f4 2909 kvm_lmsw(vcpu, msw);
8776e519
HB		 2910 *rflags = kvm_x86_ops->get_rflags(vcpu);
2911}
2912
2913unsigned long realmode_get_cr(struct kvm_vcpu *vcpu, int cr)
2914{
54e445ca
JR		 2915 unsigned long value;
2916
8776e519
HB		 2917 kvm_x86_ops->decache_cr4_guest_bits(vcpu);
2918 switch (cr) {
2919 case 0:
54e445ca
JR		 2920 value = vcpu->arch.cr0;
2921 break;
8776e519 2922 case 2:
54e445ca
JR		 2923 value = vcpu->arch.cr2;
2924 break;
8776e519 2925 case 3:
54e445ca
JR		 2926 value = vcpu->arch.cr3;
2927 break;
8776e519 2928 case 4:
54e445ca
JR		 2929 value = vcpu->arch.cr4;
2930 break;
152ff9be 2931 case 8:
54e445ca
JR		 2932 value = kvm_get_cr8(vcpu);
2933 break;
8776e519 2934 default:
b8688d51 2935 vcpu_printf(vcpu, "%s: unexpected cr %u\n", __func__, cr);
8776e519
HB		 2936 return 0;
2937 }
54e445ca
JR		 2938 KVMTRACE_3D(CR_READ, vcpu, (u32)cr, (u32)value,
2939 (u32)((u64)value >> 32), handler);
2940
2941 return value;
8776e519
HB		 2942}
2943
2944void realmode_set_cr(struct kvm_vcpu *vcpu, int cr, unsigned long val,
2945 unsigned long *rflags)
2946{
54e445ca
JR		 2947 KVMTRACE_3D(CR_WRITE, vcpu, (u32)cr, (u32)val,
2948 (u32)((u64)val >> 32), handler);
2949
8776e519
HB		 2950 switch (cr) {
2951 case 0:
2d3ad1f4 2952 kvm_set_cr0(vcpu, mk_cr_64(vcpu->arch.cr0, val));
8776e519
HB		 2953 *rflags = kvm_x86_ops->get_rflags(vcpu);
2954 break;
2955 case 2:
ad312c7c 2956 vcpu->arch.cr2 = val;
8776e519
HB		 2957 break;
2958 case 3:
2d3ad1f4 2959 kvm_set_cr3(vcpu, val);
8776e519
HB		 2960 break;
2961 case 4:
2d3ad1f4 2962 kvm_set_cr4(vcpu, mk_cr_64(vcpu->arch.cr4, val));
8776e519 2963 break;
152ff9be 2964 case 8:
2d3ad1f4 2965 kvm_set_cr8(vcpu, val & 0xfUL);
152ff9be 2966 break;
8776e519 2967 default:
b8688d51 2968 vcpu_printf(vcpu, "%s: unexpected cr %u\n", __func__, cr);
8776e519
HB		 2969 }
2970}
2971
07716717
DK		 2972static int move_to_next_stateful_cpuid_entry(struct kvm_vcpu *vcpu, int i)
2973{
ad312c7c
ZX		 2974 struct kvm_cpuid_entry2 *e = &vcpu->arch.cpuid_entries[i];
2975 int j, nent = vcpu->arch.cpuid_nent;
07716717
DK		 2976
2977 e->flags &= ~KVM_CPUID_FLAG_STATE_READ_NEXT;
2978 /* when no next entry is found, the current entry[i] is reselected */
2979 for (j = i + 1; j == i; j = (j + 1) % nent) {
ad312c7c 2980 struct kvm_cpuid_entry2 *ej = &vcpu->arch.cpuid_entries[j];
07716717
DK		 2981 if (ej->function == e->function) {
2982 ej->flags |= KVM_CPUID_FLAG_STATE_READ_NEXT;
2983 return j;
2984 }
2985 }
2986 return 0; /* silence gcc, even though control never reaches here */
2987}
2988
2989/* find an entry with matching function, matching index (if needed), and that
2990 * should be read next (if it's stateful) */
2991static int is_matching_cpuid_entry(struct kvm_cpuid_entry2 *e,
2992 u32 function, u32 index)
2993{
2994 if (e->function != function)
2995 return 0;
2996 if ((e->flags & KVM_CPUID_FLAG_SIGNIFCANT_INDEX) && e->index != index)
2997 return 0;
2998 if ((e->flags & KVM_CPUID_FLAG_STATEFUL_FUNC) &&
2999 !(e->flags & KVM_CPUID_FLAG_STATE_READ_NEXT))
3000 return 0;
3001 return 1;
3002}
3003
8776e519
HB		 3004void kvm_emulate_cpuid(struct kvm_vcpu *vcpu)
3005{
3006 int i;
07716717
DK		 3007 u32 function, index;
3008 struct kvm_cpuid_entry2 *e, *best;
8776e519 3009
5fdbf976
MT		 3010 function = kvm_register_read(vcpu, VCPU_REGS_RAX);
3011 index = kvm_register_read(vcpu, VCPU_REGS_RCX);
3012 kvm_register_write(vcpu, VCPU_REGS_RAX, 0);
3013 kvm_register_write(vcpu, VCPU_REGS_RBX, 0);
3014 kvm_register_write(vcpu, VCPU_REGS_RCX, 0);
3015 kvm_register_write(vcpu, VCPU_REGS_RDX, 0);
8776e519 3016 best = NULL;
ad312c7c
ZX		 3017 for (i = 0; i < vcpu->arch.cpuid_nent; ++i) {
3018 e = &vcpu->arch.cpuid_entries[i];
07716717
DK		 3019 if (is_matching_cpuid_entry(e, function, index)) {
3020 if (e->flags & KVM_CPUID_FLAG_STATEFUL_FUNC)
3021 move_to_next_stateful_cpuid_entry(vcpu, i);
8776e519
HB		 3022 best = e;
3023 break;
3024 }
3025 /*
3026 * Both basic or both extended?
3027 */
3028 if (((e->function ^ function) & 0x80000000) == 0)
3029 if (!best || e->function > best->function)
3030 best = e;
3031 }
3032 if (best) {
5fdbf976
MT		 3033 kvm_register_write(vcpu, VCPU_REGS_RAX, best->eax);
3034 kvm_register_write(vcpu, VCPU_REGS_RBX, best->ebx);
3035 kvm_register_write(vcpu, VCPU_REGS_RCX, best->ecx);
3036 kvm_register_write(vcpu, VCPU_REGS_RDX, best->edx);
8776e519 3037 }
8776e519 3038 kvm_x86_ops->skip_emulated_instruction(vcpu);
2714d1d3 3039 KVMTRACE_5D(CPUID, vcpu, function,
5fdbf976
MT		 3040 (u32)kvm_register_read(vcpu, VCPU_REGS_RAX),
3041 (u32)kvm_register_read(vcpu, VCPU_REGS_RBX),
3042 (u32)kvm_register_read(vcpu, VCPU_REGS_RCX),
3043 (u32)kvm_register_read(vcpu, VCPU_REGS_RDX), handler);
8776e519
HB		 3044}
3045EXPORT_SYMBOL_GPL(kvm_emulate_cpuid);
d0752060 3046
b6c7a5dc
HB		 3047/*
3048 * Check if userspace requested an interrupt window, and that the
3049 * interrupt window is open.
3050 *
3051 * No need to exit to userspace if we already have an interrupt queued.
3052 */
3053static int dm_request_for_irq_injection(struct kvm_vcpu *vcpu,
3054 struct kvm_run *kvm_run)
3055{
ad312c7c 3056 return (!vcpu->arch.irq_summary &&
b6c7a5dc 3057 kvm_run->request_interrupt_window &&
ad312c7c 3058 vcpu->arch.interrupt_window_open &&
b6c7a5dc
HB		 3059 (kvm_x86_ops->get_rflags(vcpu) & X86_EFLAGS_IF));
3060}
3061
3062static void post_kvm_run_save(struct kvm_vcpu *vcpu,
3063 struct kvm_run *kvm_run)
3064{
3065 kvm_run->if_flag = (kvm_x86_ops->get_rflags(vcpu) & X86_EFLAGS_IF) != 0;
2d3ad1f4 3066 kvm_run->cr8 = kvm_get_cr8(vcpu);
b6c7a5dc
HB		 3067 kvm_run->apic_base = kvm_get_apic_base(vcpu);
3068 if (irqchip_in_kernel(vcpu->kvm))
3069 kvm_run->ready_for_interrupt_injection = 1;
3070 else
3071 kvm_run->ready_for_interrupt_injection =
ad312c7c
ZX		 3072 (vcpu->arch.interrupt_window_open &&
3073 vcpu->arch.irq_summary == 0);
b6c7a5dc
HB		 3074}
3075
b93463aa
AK		 3076static void vapic_enter(struct kvm_vcpu *vcpu)
3077{
3078 struct kvm_lapic *apic = vcpu->arch.apic;
3079 struct page *page;
3080
3081 if (!apic || !apic->vapic_addr)
3082 return;
3083
10589a46 3084 down_read(&current->mm->mmap_sem);
b93463aa 3085 page = gfn_to_page(vcpu->kvm, apic->vapic_addr >> PAGE_SHIFT);
10589a46 3086 up_read(&current->mm->mmap_sem);
72dc67a6
IE		 3087
3088 vcpu->arch.apic->vapic_page = page;
b93463aa
AK		 3089}
3090
3091static void vapic_exit(struct kvm_vcpu *vcpu)
3092{
3093 struct kvm_lapic *apic = vcpu->arch.apic;
3094
3095 if (!apic || !apic->vapic_addr)
3096 return;
3097
f8b78fa3 3098 down_read(&vcpu->kvm->slots_lock);
b93463aa
AK		 3099 kvm_release_page_dirty(apic->vapic_page);
3100 mark_page_dirty(vcpu->kvm, apic->vapic_addr >> PAGE_SHIFT);
f8b78fa3 3101 up_read(&vcpu->kvm->slots_lock);
b93463aa
AK		 3102}
3103
b6c7a5dc
HB		 3104static int __vcpu_run(struct kvm_vcpu *vcpu, struct kvm_run *kvm_run)
3105{
3106 int r;
3107
a4535290 3108 if (unlikely(vcpu->arch.mp_state == KVM_MP_STATE_SIPI_RECEIVED)) {
b6c7a5dc 3109 pr_debug("vcpu %d received sipi with vector # %x\n",
ad312c7c 3110 vcpu->vcpu_id, vcpu->arch.sipi_vector);
b6c7a5dc
HB		 3111 kvm_lapic_reset(vcpu);
3112 r = kvm_x86_ops->vcpu_reset(vcpu);
3113 if (r)
3114 return r;
a4535290 3115 vcpu->arch.mp_state = KVM_MP_STATE_RUNNABLE;
b6c7a5dc
HB		 3116 }
3117
3200f405 3118 down_read(&vcpu->kvm->slots_lock);
b93463aa
AK		 3119 vapic_enter(vcpu);
3120
b6c7a5dc 3121again:
2e53d63a
MT		 3122 if (vcpu->requests)
3123 if (test_and_clear_bit(KVM_REQ_MMU_RELOAD, &vcpu->requests))
3124 kvm_mmu_unload(vcpu);
3125
b6c7a5dc
HB		 3126 r = kvm_mmu_reload(vcpu);
3127 if (unlikely(r))
3128 goto out;
3129
2f52d58c
AK		 3130 if (vcpu->requests) {
3131 if (test_and_clear_bit(KVM_REQ_MIGRATE_TIMER, &vcpu->requests))
2f599714 3132 __kvm_migrate_timers(vcpu);
d4acf7e7
MT		 3133 if (test_and_clear_bit(KVM_REQ_TLB_FLUSH, &vcpu->requests))
3134 kvm_x86_ops->tlb_flush(vcpu);
b93463aa
AK		 3135 if (test_and_clear_bit(KVM_REQ_REPORT_TPR_ACCESS,
3136 &vcpu->requests)) {
3137 kvm_run->exit_reason = KVM_EXIT_TPR_ACCESS;
3138 r = 0;
3139 goto out;
3140 }
71c4dfaf
JR		 3141 if (test_and_clear_bit(KVM_REQ_TRIPLE_FAULT, &vcpu->requests)) {
3142 kvm_run->exit_reason = KVM_EXIT_SHUTDOWN;
3143 r = 0;
3144 goto out;
3145 }
2f52d58c 3146 }
b93463aa 3147
06e05645 3148 clear_bit(KVM_REQ_PENDING_TIMER, &vcpu->requests);
b6c7a5dc
HB		 3149 kvm_inject_pending_timer_irqs(vcpu);
3150
3151 preempt_disable();
3152
3153 kvm_x86_ops->prepare_guest_switch(vcpu);
3154 kvm_load_guest_fpu(vcpu);
3155
3156 local_irq_disable();
3157
d4acf7e7 3158 if (vcpu->requests || need_resched()) {
6c142801
AK		 3159 local_irq_enable();
3160 preempt_enable();
3161 r = 1;
3162 goto out;
3163 }
3164
b6c7a5dc
HB		 3165 if (signal_pending(current)) {
3166 local_irq_enable();
3167 preempt_enable();
3168 r = -EINTR;
3169 kvm_run->exit_reason = KVM_EXIT_INTR;
3170 ++vcpu->stat.signal_exits;
3171 goto out;
3172 }
3173
29415c37
MT		 3174 if (vcpu->guest_debug.enabled)
3175 kvm_x86_ops->guest_debug_pre(vcpu);
3176
e9571ed5
MT		 3177 vcpu->guest_mode = 1;
3178 /*
3179 * Make sure that guest_mode assignment won't happen after
3180 * testing the pending IRQ vector bitmap.
3181 */
3182 smp_wmb();
3183
ad312c7c 3184 if (vcpu->arch.exception.pending)
298101da
AK		 3185 __queue_exception(vcpu);
3186 else if (irqchip_in_kernel(vcpu->kvm))
b6c7a5dc 3187 kvm_x86_ops->inject_pending_irq(vcpu);
eb9774f0 3188 else
b6c7a5dc
HB		 3189 kvm_x86_ops->inject_pending_vectors(vcpu, kvm_run);
3190
b93463aa
AK		 3191 kvm_lapic_sync_to_vapic(vcpu);
3192
3200f405
MT		 3193 up_read(&vcpu->kvm->slots_lock);
3194
b6c7a5dc
HB		 3195 kvm_guest_enter();
3196
b6c7a5dc 3197
2714d1d3 3198 KVMTRACE_0D(VMENTRY, vcpu, entryexit);
b6c7a5dc
HB		 3199 kvm_x86_ops->run(vcpu, kvm_run);
3200
3201 vcpu->guest_mode = 0;
3202 local_irq_enable();
3203
3204 ++vcpu->stat.exits;
3205
3206 /*
3207 * We must have an instruction between local_irq_enable() and
3208 * kvm_guest_exit(), so the timer interrupt isn't delayed by
3209 * the interrupt shadow. The stat.exits increment will do nicely.
3210 * But we need to prevent reordering, hence this barrier():
3211 */
3212 barrier();
3213
3214 kvm_guest_exit();
3215
3216 preempt_enable();
3217
3200f405
MT		 3218 down_read(&vcpu->kvm->slots_lock);
3219
b6c7a5dc
HB		 3220 /*
3221 * Profile KVM exit RIPs:
3222 */
3223 if (unlikely(prof_on == KVM_PROFILING)) {
5fdbf976
MT		 3224 unsigned long rip = kvm_rip_read(vcpu);
3225 profile_hit(KVM_PROFILING, (void *)rip);
b6c7a5dc
HB		 3226 }
3227
ad312c7c
ZX		 3228 if (vcpu->arch.exception.pending && kvm_x86_ops->exception_injected(vcpu))
3229 vcpu->arch.exception.pending = false;
298101da 3230
b93463aa
AK		 3231 kvm_lapic_sync_from_vapic(vcpu);
3232
b6c7a5dc
HB		 3233 r = kvm_x86_ops->handle_exit(kvm_run, vcpu);
3234
3235 if (r > 0) {
3236 if (dm_request_for_irq_injection(vcpu, kvm_run)) {
3237 r = -EINTR;
3238 kvm_run->exit_reason = KVM_EXIT_INTR;
3239 ++vcpu->stat.request_irq_exits;
3240 goto out;
3241 }
e1beb1d3 3242 if (!need_resched())
b6c7a5dc 3243 goto again;
b6c7a5dc
HB		 3244 }
3245
3246out:
3200f405 3247 up_read(&vcpu->kvm->slots_lock);
b6c7a5dc
HB		 3248 if (r > 0) {
3249 kvm_resched(vcpu);
3200f405 3250 down_read(&vcpu->kvm->slots_lock);
29415c37 3251 goto again;
b6c7a5dc
HB		 3252 }
3253
3254 post_kvm_run_save(vcpu, kvm_run);
3255
b93463aa
AK		 3256 vapic_exit(vcpu);
3257
b6c7a5dc
HB		 3258 return r;
3259}
3260
3261int kvm_arch_vcpu_ioctl_run(struct kvm_vcpu *vcpu, struct kvm_run *kvm_run)
3262{
3263 int r;
3264 sigset_t sigsaved;
3265
3266 vcpu_load(vcpu);
3267
ac9f6dc0
AK		 3268 if (vcpu->sigset_active)
3269 sigprocmask(SIG_SETMASK, &vcpu->sigset, &sigsaved);
3270
a4535290 3271 if (unlikely(vcpu->arch.mp_state == KVM_MP_STATE_UNINITIALIZED)) {
b6c7a5dc 3272 kvm_vcpu_block(vcpu);
ac9f6dc0
AK		 3273 r = -EAGAIN;
3274 goto out;
b6c7a5dc
HB		 3275 }
3276
b6c7a5dc
HB		 3277 /* re-sync apic's tpr */
3278 if (!irqchip_in_kernel(vcpu->kvm))
2d3ad1f4 3279 kvm_set_cr8(vcpu, kvm_run->cr8);
b6c7a5dc 3280
ad312c7c 3281 if (vcpu->arch.pio.cur_count) {
b6c7a5dc
HB		 3282 r = complete_pio(vcpu);
3283 if (r)
3284 goto out;
3285 }
3286#if CONFIG_HAS_IOMEM
3287 if (vcpu->mmio_needed) {
3288 memcpy(vcpu->mmio_data, kvm_run->mmio.data, 8);
3289 vcpu->mmio_read_completed = 1;
3290 vcpu->mmio_needed = 0;
3200f405
MT		 3291
3292 down_read(&vcpu->kvm->slots_lock);
b6c7a5dc 3293 r = emulate_instruction(vcpu, kvm_run,
571008da
SY		 3294 vcpu->arch.mmio_fault_cr2, 0,
3295 EMULTYPE_NO_DECODE);
3200f405 3296 up_read(&vcpu->kvm->slots_lock);
b6c7a5dc
HB		 3297 if (r == EMULATE_DO_MMIO) {
3298 /*
3299 * Read-modify-write. Back to userspace.
3300 */
3301 r = 0;
3302 goto out;
3303 }
3304 }
3305#endif
5fdbf976
MT		 3306 if (kvm_run->exit_reason == KVM_EXIT_HYPERCALL)
3307 kvm_register_write(vcpu, VCPU_REGS_RAX,
3308 kvm_run->hypercall.ret);
b6c7a5dc
HB		 3309
3310 r = __vcpu_run(vcpu, kvm_run);
3311
3312out:
3313 if (vcpu->sigset_active)
3314 sigprocmask(SIG_SETMASK, &sigsaved, NULL);
3315
3316 vcpu_put(vcpu);
3317 return r;
3318}
3319
3320int kvm_arch_vcpu_ioctl_get_regs(struct kvm_vcpu *vcpu, struct kvm_regs *regs)
3321{
3322 vcpu_load(vcpu);
3323
5fdbf976
MT		 3324 regs->rax = kvm_register_read(vcpu, VCPU_REGS_RAX);
3325 regs->rbx = kvm_register_read(vcpu, VCPU_REGS_RBX);
3326 regs->rcx = kvm_register_read(vcpu, VCPU_REGS_RCX);
3327 regs->rdx = kvm_register_read(vcpu, VCPU_REGS_RDX);
3328 regs->rsi = kvm_register_read(vcpu, VCPU_REGS_RSI);
3329 regs->rdi = kvm_register_read(vcpu, VCPU_REGS_RDI);
3330 regs->rsp = kvm_register_read(vcpu, VCPU_REGS_RSP);
3331 regs->rbp = kvm_register_read(vcpu, VCPU_REGS_RBP);
b6c7a5dc 3332#ifdef CONFIG_X86_64
5fdbf976
MT		 3333 regs->r8 = kvm_register_read(vcpu, VCPU_REGS_R8);
3334 regs->r9 = kvm_register_read(vcpu, VCPU_REGS_R9);
3335 regs->r10 = kvm_register_read(vcpu, VCPU_REGS_R10);
3336 regs->r11 = kvm_register_read(vcpu, VCPU_REGS_R11);
3337 regs->r12 = kvm_register_read(vcpu, VCPU_REGS_R12);
3338 regs->r13 = kvm_register_read(vcpu, VCPU_REGS_R13);
3339 regs->r14 = kvm_register_read(vcpu, VCPU_REGS_R14);
3340 regs->r15 = kvm_register_read(vcpu, VCPU_REGS_R15);
b6c7a5dc
HB		 3341#endif
3342
5fdbf976 3343 regs->rip = kvm_rip_read(vcpu);
b6c7a5dc
HB		 3344 regs->rflags = kvm_x86_ops->get_rflags(vcpu);
3345
3346 /*
3347 * Don't leak debug flags in case they were set for guest debugging
3348 */
3349 if (vcpu->guest_debug.enabled && vcpu->guest_debug.singlestep)
3350 regs->rflags &= ~(X86_EFLAGS_TF | X86_EFLAGS_RF);
3351
3352 vcpu_put(vcpu);
3353
3354 return 0;
3355}
3356
3357int kvm_arch_vcpu_ioctl_set_regs(struct kvm_vcpu *vcpu, struct kvm_regs *regs)
3358{
3359 vcpu_load(vcpu);
3360
5fdbf976
MT		 3361 kvm_register_write(vcpu, VCPU_REGS_RAX, regs->rax);
3362 kvm_register_write(vcpu, VCPU_REGS_RBX, regs->rbx);
3363 kvm_register_write(vcpu, VCPU_REGS_RCX, regs->rcx);
3364 kvm_register_write(vcpu, VCPU_REGS_RDX, regs->rdx);
3365 kvm_register_write(vcpu, VCPU_REGS_RSI, regs->rsi);
3366 kvm_register_write(vcpu, VCPU_REGS_RDI, regs->rdi);
3367 kvm_register_write(vcpu, VCPU_REGS_RSP, regs->rsp);
3368 kvm_register_write(vcpu, VCPU_REGS_RBP, regs->rbp);
b6c7a5dc 3369#ifdef CONFIG_X86_64
5fdbf976
MT		 3370 kvm_register_write(vcpu, VCPU_REGS_R8, regs->r8);
3371 kvm_register_write(vcpu, VCPU_REGS_R9, regs->r9);
3372 kvm_register_write(vcpu, VCPU_REGS_R10, regs->r10);
3373 kvm_register_write(vcpu, VCPU_REGS_R11, regs->r11);
3374 kvm_register_write(vcpu, VCPU_REGS_R12, regs->r12);
3375 kvm_register_write(vcpu, VCPU_REGS_R13, regs->r13);
3376 kvm_register_write(vcpu, VCPU_REGS_R14, regs->r14);
3377 kvm_register_write(vcpu, VCPU_REGS_R15, regs->r15);
3378
b6c7a5dc
HB		 3379#endif
3380
5fdbf976 3381 kvm_rip_write(vcpu, regs->rip);
b6c7a5dc
HB		 3382 kvm_x86_ops->set_rflags(vcpu, regs->rflags);
3383
b6c7a5dc 3384
b4f14abd
JK		 3385 vcpu->arch.exception.pending = false;
3386
b6c7a5dc
HB		 3387 vcpu_put(vcpu);
3388
3389 return 0;
3390}
3391
3e6e0aab
GT		 3392void kvm_get_segment(struct kvm_vcpu *vcpu,
3393 struct kvm_segment *var, int seg)
b6c7a5dc 3394{
14af3f3c 3395 kvm_x86_ops->get_segment(vcpu, var, seg);
b6c7a5dc
HB		 3396}
3397
3398void kvm_get_cs_db_l_bits(struct kvm_vcpu *vcpu, int *db, int *l)
3399{
3400 struct kvm_segment cs;
3401
3e6e0aab 3402 kvm_get_segment(vcpu, &cs, VCPU_SREG_CS);
b6c7a5dc
HB		 3403 *db = cs.db;
3404 *l = cs.l;
3405}
3406EXPORT_SYMBOL_GPL(kvm_get_cs_db_l_bits);
3407
3408int kvm_arch_vcpu_ioctl_get_sregs(struct kvm_vcpu *vcpu,
3409 struct kvm_sregs *sregs)
3410{
3411 struct descriptor_table dt;
3412 int pending_vec;
3413
3414 vcpu_load(vcpu);
3415
3e6e0aab
GT		 3416 kvm_get_segment(vcpu, &sregs->cs, VCPU_SREG_CS);
3417 kvm_get_segment(vcpu, &sregs->ds, VCPU_SREG_DS);
3418 kvm_get_segment(vcpu, &sregs->es, VCPU_SREG_ES);
3419 kvm_get_segment(vcpu, &sregs->fs, VCPU_SREG_FS);
3420 kvm_get_segment(vcpu, &sregs->gs, VCPU_SREG_GS);
3421 kvm_get_segment(vcpu, &sregs->ss, VCPU_SREG_SS);
b6c7a5dc 3422
3e6e0aab
GT		 3423 kvm_get_segment(vcpu, &sregs->tr, VCPU_SREG_TR);
3424 kvm_get_segment(vcpu, &sregs->ldt, VCPU_SREG_LDTR);
b6c7a5dc
HB		 3425
3426 kvm_x86_ops->get_idt(vcpu, &dt);
3427 sregs->idt.limit = dt.limit;
3428 sregs->idt.base = dt.base;
3429 kvm_x86_ops->get_gdt(vcpu, &dt);
3430 sregs->gdt.limit = dt.limit;
3431 sregs->gdt.base = dt.base;
3432
3433 kvm_x86_ops->decache_cr4_guest_bits(vcpu);
ad312c7c
ZX		 3434 sregs->cr0 = vcpu->arch.cr0;
3435 sregs->cr2 = vcpu->arch.cr2;
3436 sregs->cr3 = vcpu->arch.cr3;
3437 sregs->cr4 = vcpu->arch.cr4;
2d3ad1f4 3438 sregs->cr8 = kvm_get_cr8(vcpu);
ad312c7c 3439 sregs->efer = vcpu->arch.shadow_efer;
b6c7a5dc
HB		 3440 sregs->apic_base = kvm_get_apic_base(vcpu);
3441
3442 if (irqchip_in_kernel(vcpu->kvm)) {
3443 memset(sregs->interrupt_bitmap, 0,
3444 sizeof sregs->interrupt_bitmap);
3445 pending_vec = kvm_x86_ops->get_irq(vcpu);
3446 if (pending_vec >= 0)
3447 set_bit(pending_vec,
3448 (unsigned long *)sregs->interrupt_bitmap);
3449 } else
ad312c7c 3450 memcpy(sregs->interrupt_bitmap, vcpu->arch.irq_pending,
b6c7a5dc
HB		 3451 sizeof sregs->interrupt_bitmap);
3452
3453 vcpu_put(vcpu);
3454
3455 return 0;
3456}
3457
62d9f0db
MT		 3458int kvm_arch_vcpu_ioctl_get_mpstate(struct kvm_vcpu *vcpu,
3459 struct kvm_mp_state *mp_state)
3460{
3461 vcpu_load(vcpu);
3462 mp_state->mp_state = vcpu->arch.mp_state;
3463 vcpu_put(vcpu);
3464 return 0;
3465}
3466
3467int kvm_arch_vcpu_ioctl_set_mpstate(struct kvm_vcpu *vcpu,
3468 struct kvm_mp_state *mp_state)
3469{
3470 vcpu_load(vcpu);
3471 vcpu->arch.mp_state = mp_state->mp_state;
3472 vcpu_put(vcpu);
3473 return 0;
3474}
3475
3e6e0aab 3476static void kvm_set_segment(struct kvm_vcpu *vcpu,
b6c7a5dc
HB		 3477 struct kvm_segment *var, int seg)
3478{
14af3f3c 3479 kvm_x86_ops->set_segment(vcpu, var, seg);
b6c7a5dc
HB		 3480}
3481
37817f29
IE		 3482static void seg_desct_to_kvm_desct(struct desc_struct *seg_desc, u16 selector,
3483 struct kvm_segment *kvm_desct)
3484{
3485 kvm_desct->base = seg_desc->base0;
3486 kvm_desct->base |= seg_desc->base1 << 16;
3487 kvm_desct->base |= seg_desc->base2 << 24;
3488 kvm_desct->limit = seg_desc->limit0;
3489 kvm_desct->limit |= seg_desc->limit << 16;
c93cd3a5
MT		 3490 if (seg_desc->g) {
3491 kvm_desct->limit <<= 12;
3492 kvm_desct->limit |= 0xfff;
3493 }
37817f29
IE		 3494 kvm_desct->selector = selector;
3495 kvm_desct->type = seg_desc->type;
3496 kvm_desct->present = seg_desc->p;
3497 kvm_desct->dpl = seg_desc->dpl;
3498 kvm_desct->db = seg_desc->d;
3499 kvm_desct->s = seg_desc->s;
3500 kvm_desct->l = seg_desc->l;
3501 kvm_desct->g = seg_desc->g;
3502 kvm_desct->avl = seg_desc->avl;
3503 if (!selector)
3504 kvm_desct->unusable = 1;
3505 else
3506 kvm_desct->unusable = 0;
3507 kvm_desct->padding = 0;
3508}
3509
3510static void get_segment_descritptor_dtable(struct kvm_vcpu *vcpu,
3511 u16 selector,
3512 struct descriptor_table *dtable)
3513{
3514 if (selector & 1 << 2) {
3515 struct kvm_segment kvm_seg;
3516
3e6e0aab 3517 kvm_get_segment(vcpu, &kvm_seg, VCPU_SREG_LDTR);
37817f29
IE		 3518
3519 if (kvm_seg.unusable)
3520 dtable->limit = 0;
3521 else
3522 dtable->limit = kvm_seg.limit;
3523 dtable->base = kvm_seg.base;
3524 }
3525 else
3526 kvm_x86_ops->get_gdt(vcpu, dtable);
3527}
3528
3529/* allowed just for 8 bytes segments */
3530static int load_guest_segment_descriptor(struct kvm_vcpu *vcpu, u16 selector,
3531 struct desc_struct *seg_desc)
3532{
98899aa0 3533 gpa_t gpa;
37817f29
IE		 3534 struct descriptor_table dtable;
3535 u16 index = selector >> 3;
3536
3537 get_segment_descritptor_dtable(vcpu, selector, &dtable);
3538
3539 if (dtable.limit < index * 8 + 7) {
3540 kvm_queue_exception_e(vcpu, GP_VECTOR, selector & 0xfffc);
3541 return 1;
3542 }
98899aa0
MT		 3543 gpa = vcpu->arch.mmu.gva_to_gpa(vcpu, dtable.base);
3544 gpa += index * 8;
3545 return kvm_read_guest(vcpu->kvm, gpa, seg_desc, 8);
37817f29
IE		 3546}
3547
3548/* allowed just for 8 bytes segments */
3549static int save_guest_segment_descriptor(struct kvm_vcpu *vcpu, u16 selector,
3550 struct desc_struct *seg_desc)
3551{
98899aa0 3552 gpa_t gpa;
37817f29
IE		 3553 struct descriptor_table dtable;
3554 u16 index = selector >> 3;
3555
3556 get_segment_descritptor_dtable(vcpu, selector, &dtable);
3557
3558 if (dtable.limit < index * 8 + 7)
3559 return 1;
98899aa0
MT		 3560 gpa = vcpu->arch.mmu.gva_to_gpa(vcpu, dtable.base);
3561 gpa += index * 8;
3562 return kvm_write_guest(vcpu->kvm, gpa, seg_desc, 8);
37817f29
IE		 3563}
3564
3565static u32 get_tss_base_addr(struct kvm_vcpu *vcpu,
3566 struct desc_struct *seg_desc)
3567{
3568 u32 base_addr;
3569
3570 base_addr = seg_desc->base0;
3571 base_addr |= (seg_desc->base1 << 16);
3572 base_addr |= (seg_desc->base2 << 24);
3573
98899aa0 3574 return vcpu->arch.mmu.gva_to_gpa(vcpu, base_addr);
37817f29
IE		 3575}
3576
37817f29
IE		 3577static u16 get_segment_selector(struct kvm_vcpu *vcpu, int seg)
3578{
3579 struct kvm_segment kvm_seg;
3580
3e6e0aab 3581 kvm_get_segment(vcpu, &kvm_seg, seg);
37817f29
IE		 3582 return kvm_seg.selector;
3583}
3584
3585static int load_segment_descriptor_to_kvm_desct(struct kvm_vcpu *vcpu,
3586 u16 selector,
3587 struct kvm_segment *kvm_seg)
3588{
3589 struct desc_struct seg_desc;
3590
3591 if (load_guest_segment_descriptor(vcpu, selector, &seg_desc))
3592 return 1;
3593 seg_desct_to_kvm_desct(&seg_desc, selector, kvm_seg);
3594 return 0;
3595}
3596
3e6e0aab
GT		 3597int kvm_load_segment_descriptor(struct kvm_vcpu *vcpu, u16 selector,
3598 int type_bits, int seg)
37817f29
IE		 3599{
3600 struct kvm_segment kvm_seg;
3601
3602 if (load_segment_descriptor_to_kvm_desct(vcpu, selector, &kvm_seg))
3603 return 1;
3604 kvm_seg.type |= type_bits;
3605
3606 if (seg != VCPU_SREG_SS && seg != VCPU_SREG_CS &&
3607 seg != VCPU_SREG_LDTR)
3608 if (!kvm_seg.s)
3609 kvm_seg.unusable = 1;
3610
3e6e0aab 3611 kvm_set_segment(vcpu, &kvm_seg, seg);
37817f29
IE		 3612 return 0;
3613}
3614
3615static void save_state_to_tss32(struct kvm_vcpu *vcpu,
3616 struct tss_segment_32 *tss)
3617{
3618 tss->cr3 = vcpu->arch.cr3;
5fdbf976 3619 tss->eip = kvm_rip_read(vcpu);
37817f29 3620 tss->eflags = kvm_x86_ops->get_rflags(vcpu);
5fdbf976
MT		 3621 tss->eax = kvm_register_read(vcpu, VCPU_REGS_RAX);
3622 tss->ecx = kvm_register_read(vcpu, VCPU_REGS_RCX);
3623 tss->edx = kvm_register_read(vcpu, VCPU_REGS_RDX);
3624 tss->ebx = kvm_register_read(vcpu, VCPU_REGS_RBX);
3625 tss->esp = kvm_register_read(vcpu, VCPU_REGS_RSP);
3626 tss->ebp = kvm_register_read(vcpu, VCPU_REGS_RBP);
3627 tss->esi = kvm_register_read(vcpu, VCPU_REGS_RSI);
3628 tss->edi = kvm_register_read(vcpu, VCPU_REGS_RDI);
37817f29
IE		 3629 tss->es = get_segment_selector(vcpu, VCPU_SREG_ES);
3630 tss->cs = get_segment_selector(vcpu, VCPU_SREG_CS);
3631 tss->ss = get_segment_selector(vcpu, VCPU_SREG_SS);
3632 tss->ds = get_segment_selector(vcpu, VCPU_SREG_DS);
3633 tss->fs = get_segment_selector(vcpu, VCPU_SREG_FS);
3634 tss->gs = get_segment_selector(vcpu, VCPU_SREG_GS);
3635 tss->ldt_selector = get_segment_selector(vcpu, VCPU_SREG_LDTR);
3636 tss->prev_task_link = get_segment_selector(vcpu, VCPU_SREG_TR);
3637}
3638
3639static int load_state_from_tss32(struct kvm_vcpu *vcpu,
3640 struct tss_segment_32 *tss)
3641{
3642 kvm_set_cr3(vcpu, tss->cr3);
3643
5fdbf976 3644 kvm_rip_write(vcpu, tss->eip);
37817f29
IE		 3645 kvm_x86_ops->set_rflags(vcpu, tss->eflags | 2);
3646
5fdbf976
MT		 3647 kvm_register_write(vcpu, VCPU_REGS_RAX, tss->eax);
3648 kvm_register_write(vcpu, VCPU_REGS_RCX, tss->ecx);
3649 kvm_register_write(vcpu, VCPU_REGS_RDX, tss->edx);
3650 kvm_register_write(vcpu, VCPU_REGS_RBX, tss->ebx);
3651 kvm_register_write(vcpu, VCPU_REGS_RSP, tss->esp);
3652 kvm_register_write(vcpu, VCPU_REGS_RBP, tss->ebp);
3653 kvm_register_write(vcpu, VCPU_REGS_RSI, tss->esi);
3654 kvm_register_write(vcpu, VCPU_REGS_RDI, tss->edi);
37817f29 3655
3e6e0aab 3656 if (kvm_load_segment_descriptor(vcpu, tss->ldt_selector, 0, VCPU_SREG_LDTR))
37817f29
IE		 3657 return 1;
3658
3e6e0aab 3659 if (kvm_load_segment_descriptor(vcpu, tss->es, 1, VCPU_SREG_ES))
37817f29
IE		 3660 return 1;
3661
3e6e0aab 3662 if (kvm_load_segment_descriptor(vcpu, tss->cs, 9, VCPU_SREG_CS))
37817f29
IE		 3663 return 1;
3664
3e6e0aab 3665 if (kvm_load_segment_descriptor(vcpu, tss->ss, 1, VCPU_SREG_SS))
37817f29
IE		 3666 return 1;
3667
3e6e0aab 3668 if (kvm_load_segment_descriptor(vcpu, tss->ds, 1, VCPU_SREG_DS))
37817f29
IE		 3669 return 1;
3670
3e6e0aab 3671 if (kvm_load_segment_descriptor(vcpu, tss->fs, 1, VCPU_SREG_FS))
37817f29
IE		 3672 return 1;
3673
3e6e0aab 3674 if (kvm_load_segment_descriptor(vcpu, tss->gs, 1, VCPU_SREG_GS))
37817f29
IE		 3675 return 1;
3676 return 0;
3677}
3678
3679static void save_state_to_tss16(struct kvm_vcpu *vcpu,
3680 struct tss_segment_16 *tss)
3681{
5fdbf976 3682 tss->ip = kvm_rip_read(vcpu);
37817f29 3683 tss->flag = kvm_x86_ops->get_rflags(vcpu);
5fdbf976
MT		 3684 tss->ax = kvm_register_read(vcpu, VCPU_REGS_RAX);
3685 tss->cx = kvm_register_read(vcpu, VCPU_REGS_RCX);
3686 tss->dx = kvm_register_read(vcpu, VCPU_REGS_RDX);
3687 tss->bx = kvm_register_read(vcpu, VCPU_REGS_RBX);
3688 tss->sp = kvm_register_read(vcpu, VCPU_REGS_RSP);
3689 tss->bp = kvm_register_read(vcpu, VCPU_REGS_RBP);
3690 tss->si = kvm_register_read(vcpu, VCPU_REGS_RSI);
3691 tss->di = kvm_register_read(vcpu, VCPU_REGS_RDI);
37817f29
IE		 3692
3693 tss->es = get_segment_selector(vcpu, VCPU_SREG_ES);
3694 tss->cs = get_segment_selector(vcpu, VCPU_SREG_CS);
3695 tss->ss = get_segment_selector(vcpu, VCPU_SREG_SS);
3696 tss->ds = get_segment_selector(vcpu, VCPU_SREG_DS);
3697 tss->ldt = get_segment_selector(vcpu, VCPU_SREG_LDTR);
3698 tss->prev_task_link = get_segment_selector(vcpu, VCPU_SREG_TR);
3699}
3700
3701static int load_state_from_tss16(struct kvm_vcpu *vcpu,
3702 struct tss_segment_16 *tss)
3703{
5fdbf976 3704 kvm_rip_write(vcpu, tss->ip);
37817f29 3705 kvm_x86_ops->set_rflags(vcpu, tss->flag | 2);
5fdbf976
MT		 3706 kvm_register_write(vcpu, VCPU_REGS_RAX, tss->ax);
3707 kvm_register_write(vcpu, VCPU_REGS_RCX, tss->cx);
3708 kvm_register_write(vcpu, VCPU_REGS_RDX, tss->dx);
3709 kvm_register_write(vcpu, VCPU_REGS_RBX, tss->bx);
3710 kvm_register_write(vcpu, VCPU_REGS_RSP, tss->sp);
3711 kvm_register_write(vcpu, VCPU_REGS_RBP, tss->bp);
3712 kvm_register_write(vcpu, VCPU_REGS_RSI, tss->si);
3713 kvm_register_write(vcpu, VCPU_REGS_RDI, tss->di);
37817f29 3714
3e6e0aab 3715 if (kvm_load_segment_descriptor(vcpu, tss->ldt, 0, VCPU_SREG_LDTR))
37817f29
IE		 3716 return 1;
3717
3e6e0aab 3718 if (kvm_load_segment_descriptor(vcpu, tss->es, 1, VCPU_SREG_ES))
37817f29
IE		 3719 return 1;
3720
3e6e0aab 3721 if (kvm_load_segment_descriptor(vcpu, tss->cs, 9, VCPU_SREG_CS))
37817f29
IE		 3722 return 1;
3723
3e6e0aab 3724 if (kvm_load_segment_descriptor(vcpu, tss->ss, 1, VCPU_SREG_SS))
37817f29
IE		 3725 return 1;
3726
3e6e0aab 3727 if (kvm_load_segment_descriptor(vcpu, tss->ds, 1, VCPU_SREG_DS))
37817f29
IE		 3728 return 1;
3729 return 0;
3730}
3731
8b2cf73c 3732static int kvm_task_switch_16(struct kvm_vcpu *vcpu, u16 tss_selector,
34198bf8 3733 u32 old_tss_base,
37817f29
IE		 3734 struct desc_struct *nseg_desc)
3735{
3736 struct tss_segment_16 tss_segment_16;
3737 int ret = 0;
3738
34198bf8
MT		 3739 if (kvm_read_guest(vcpu->kvm, old_tss_base, &tss_segment_16,
3740 sizeof tss_segment_16))
37817f29
IE		 3741 goto out;
3742
3743 save_state_to_tss16(vcpu, &tss_segment_16);
37817f29 3744
34198bf8
MT		 3745 if (kvm_write_guest(vcpu->kvm, old_tss_base, &tss_segment_16,
3746 sizeof tss_segment_16))
37817f29 3747 goto out;
34198bf8
MT		 3748
3749 if (kvm_read_guest(vcpu->kvm, get_tss_base_addr(vcpu, nseg_desc),
3750 &tss_segment_16, sizeof tss_segment_16))
3751 goto out;
3752
37817f29
IE		 3753 if (load_state_from_tss16(vcpu, &tss_segment_16))
3754 goto out;
3755
3756 ret = 1;
3757out:
3758 return ret;
3759}
3760
8b2cf73c 3761static int kvm_task_switch_32(struct kvm_vcpu *vcpu, u16 tss_selector,
34198bf8 3762 u32 old_tss_base,
37817f29
IE		 3763 struct desc_struct *nseg_desc)
3764{
3765 struct tss_segment_32 tss_segment_32;
3766 int ret = 0;
3767
34198bf8
MT		 3768 if (kvm_read_guest(vcpu->kvm, old_tss_base, &tss_segment_32,
3769 sizeof tss_segment_32))
37817f29
IE		 3770 goto out;
3771
3772 save_state_to_tss32(vcpu, &tss_segment_32);
37817f29 3773
34198bf8
MT		 3774 if (kvm_write_guest(vcpu->kvm, old_tss_base, &tss_segment_32,
3775 sizeof tss_segment_32))
3776 goto out;
3777
3778 if (kvm_read_guest(vcpu->kvm, get_tss_base_addr(vcpu, nseg_desc),
3779 &tss_segment_32, sizeof tss_segment_32))
37817f29 3780 goto out;
34198bf8 3781
37817f29
IE		 3782 if (load_state_from_tss32(vcpu, &tss_segment_32))
3783 goto out;
3784
3785 ret = 1;
3786out:
3787 return ret;
3788}
3789
3790int kvm_task_switch(struct kvm_vcpu *vcpu, u16 tss_selector, int reason)
3791{
3792 struct kvm_segment tr_seg;
3793 struct desc_struct cseg_desc;
3794 struct desc_struct nseg_desc;
3795 int ret = 0;
34198bf8
MT		 3796 u32 old_tss_base = get_segment_base(vcpu, VCPU_SREG_TR);
3797 u16 old_tss_sel = get_segment_selector(vcpu, VCPU_SREG_TR);
37817f29 3798
34198bf8 3799 old_tss_base = vcpu->arch.mmu.gva_to_gpa(vcpu, old_tss_base);
37817f29 3800
34198bf8
MT		 3801 /* FIXME: Handle errors. Failure to read either TSS or their
3802 * descriptors should generate a pagefault.
3803 */
37817f29
IE		 3804 if (load_guest_segment_descriptor(vcpu, tss_selector, &nseg_desc))
3805 goto out;
3806
34198bf8 3807 if (load_guest_segment_descriptor(vcpu, old_tss_sel, &cseg_desc))
37817f29
IE		 3808 goto out;
3809
37817f29
IE		 3810 if (reason != TASK_SWITCH_IRET) {
3811 int cpl;
3812
3813 cpl = kvm_x86_ops->get_cpl(vcpu);
3814 if ((tss_selector & 3) > nseg_desc.dpl || cpl > nseg_desc.dpl) {
3815 kvm_queue_exception_e(vcpu, GP_VECTOR, 0);
3816 return 1;
3817 }
3818 }
3819
3820 if (!nseg_desc.p || (nseg_desc.limit0 | nseg_desc.limit << 16) < 0x67) {
3821 kvm_queue_exception_e(vcpu, TS_VECTOR, tss_selector & 0xfffc);
3822 return 1;
3823 }
3824
3825 if (reason == TASK_SWITCH_IRET || reason == TASK_SWITCH_JMP) {
3fe913e7 3826 cseg_desc.type &= ~(1 << 1); //clear the B flag
34198bf8 3827 save_guest_segment_descriptor(vcpu, old_tss_sel, &cseg_desc);
37817f29
IE		 3828 }
3829
3830 if (reason == TASK_SWITCH_IRET) {
3831 u32 eflags = kvm_x86_ops->get_rflags(vcpu);
3832 kvm_x86_ops->set_rflags(vcpu, eflags & ~X86_EFLAGS_NT);
3833 }
3834
3835 kvm_x86_ops->skip_emulated_instruction(vcpu);
37817f29
IE		 3836
3837 if (nseg_desc.type & 8)
34198bf8 3838 ret = kvm_task_switch_32(vcpu, tss_selector, old_tss_base,
37817f29
IE		 3839 &nseg_desc);
3840 else
34198bf8 3841 ret = kvm_task_switch_16(vcpu, tss_selector, old_tss_base,
37817f29
IE		 3842 &nseg_desc);
3843
3844 if (reason == TASK_SWITCH_CALL || reason == TASK_SWITCH_GATE) {
3845 u32 eflags = kvm_x86_ops->get_rflags(vcpu);
3846 kvm_x86_ops->set_rflags(vcpu, eflags | X86_EFLAGS_NT);
3847 }
3848
3849 if (reason != TASK_SWITCH_IRET) {
3fe913e7 3850 nseg_desc.type |= (1 << 1);
37817f29
IE		 3851 save_guest_segment_descriptor(vcpu, tss_selector,
3852 &nseg_desc);
3853 }
3854
3855 kvm_x86_ops->set_cr0(vcpu, vcpu->arch.cr0 | X86_CR0_TS);
3856 seg_desct_to_kvm_desct(&nseg_desc, tss_selector, &tr_seg);
3857 tr_seg.type = 11;
3e6e0aab 3858 kvm_set_segment(vcpu, &tr_seg, VCPU_SREG_TR);
37817f29 3859out:
37817f29
IE		 3860 return ret;
3861}
3862EXPORT_SYMBOL_GPL(kvm_task_switch);
3863
b6c7a5dc
HB		 3864int kvm_arch_vcpu_ioctl_set_sregs(struct kvm_vcpu *vcpu,
3865 struct kvm_sregs *sregs)
3866{
3867 int mmu_reset_needed = 0;
3868 int i, pending_vec, max_bits;
3869 struct descriptor_table dt;
3870
3871 vcpu_load(vcpu);
3872
3873 dt.limit = sregs->idt.limit;
3874 dt.base = sregs->idt.base;
3875 kvm_x86_ops->set_idt(vcpu, &dt);
3876 dt.limit = sregs->gdt.limit;
3877 dt.base = sregs->gdt.base;
3878 kvm_x86_ops->set_gdt(vcpu, &dt);
3879
ad312c7c
ZX		 3880 vcpu->arch.cr2 = sregs->cr2;
3881 mmu_reset_needed |= vcpu->arch.cr3 != sregs->cr3;
3882 vcpu->arch.cr3 = sregs->cr3;
b6c7a5dc 3883
2d3ad1f4 3884 kvm_set_cr8(vcpu, sregs->cr8);
b6c7a5dc 3885
ad312c7c 3886 mmu_reset_needed |= vcpu->arch.shadow_efer != sregs->efer;
b6c7a5dc 3887 kvm_x86_ops->set_efer(vcpu, sregs->efer);
b6c7a5dc
HB		 3888 kvm_set_apic_base(vcpu, sregs->apic_base);
3889
3890 kvm_x86_ops->decache_cr4_guest_bits(vcpu);
3891
ad312c7c 3892 mmu_reset_needed |= vcpu->arch.cr0 != sregs->cr0;
b6c7a5dc 3893 kvm_x86_ops->set_cr0(vcpu, sregs->cr0);
d7306163 3894 vcpu->arch.cr0 = sregs->cr0;
b6c7a5dc 3895
ad312c7c 3896 mmu_reset_needed |= vcpu->arch.cr4 != sregs->cr4;
b6c7a5dc
HB		 3897 kvm_x86_ops->set_cr4(vcpu, sregs->cr4);
3898 if (!is_long_mode(vcpu) && is_pae(vcpu))
ad312c7c 3899 load_pdptrs(vcpu, vcpu->arch.cr3);
b6c7a5dc
HB		 3900
3901 if (mmu_reset_needed)
3902 kvm_mmu_reset_context(vcpu);
3903
3904 if (!irqchip_in_kernel(vcpu->kvm)) {
ad312c7c
ZX		 3905 memcpy(vcpu->arch.irq_pending, sregs->interrupt_bitmap,
3906 sizeof vcpu->arch.irq_pending);
3907 vcpu->arch.irq_summary = 0;
3908 for (i = 0; i < ARRAY_SIZE(vcpu->arch.irq_pending); ++i)
3909 if (vcpu->arch.irq_pending[i])
3910 __set_bit(i, &vcpu->arch.irq_summary);
b6c7a5dc
HB		 3911 } else {
3912 max_bits = (sizeof sregs->interrupt_bitmap) << 3;
3913 pending_vec = find_first_bit(
3914 (const unsigned long *)sregs->interrupt_bitmap,
3915 max_bits);
3916 /* Only pending external irq is handled here */
3917 if (pending_vec < max_bits) {
3918 kvm_x86_ops->set_irq(vcpu, pending_vec);
3919 pr_debug("Set back pending irq %d\n",
3920 pending_vec);
3921 }
3922 }
3923
3e6e0aab
GT		 3924 kvm_set_segment(vcpu, &sregs->cs, VCPU_SREG_CS);
3925 kvm_set_segment(vcpu, &sregs->ds, VCPU_SREG_DS);
3926 kvm_set_segment(vcpu, &sregs->es, VCPU_SREG_ES);
3927 kvm_set_segment(vcpu, &sregs->fs, VCPU_SREG_FS);
3928 kvm_set_segment(vcpu, &sregs->gs, VCPU_SREG_GS);
3929 kvm_set_segment(vcpu, &sregs->ss, VCPU_SREG_SS);
b6c7a5dc 3930
3e6e0aab
GT		 3931 kvm_set_segment(vcpu, &sregs->tr, VCPU_SREG_TR);
3932 kvm_set_segment(vcpu, &sregs->ldt, VCPU_SREG_LDTR);
b6c7a5dc
HB		 3933
3934 vcpu_put(vcpu);
3935
3936 return 0;
3937}
3938
3939int kvm_arch_vcpu_ioctl_debug_guest(struct kvm_vcpu *vcpu,
3940 struct kvm_debug_guest *dbg)
3941{
3942 int r;
3943
3944 vcpu_load(vcpu);
3945
3946 r = kvm_x86_ops->set_guest_debug(vcpu, dbg);
3947
3948 vcpu_put(vcpu);
3949
3950 return r;
3951}
3952
d0752060
HB		 3953/*
3954 * fxsave fpu state. Taken from x86_64/processor.h. To be killed when
3955 * we have asm/x86/processor.h
3956 */
3957struct fxsave {
3958 u16 cwd;
3959 u16 swd;
3960 u16 twd;
3961 u16 fop;
3962 u64 rip;
3963 u64 rdp;
3964 u32 mxcsr;
3965 u32 mxcsr_mask;
3966 u32 st_space[32]; /* 8*16 bytes for each FP-reg = 128 bytes */
3967#ifdef CONFIG_X86_64
3968 u32 xmm_space[64]; /* 16*16 bytes for each XMM-reg = 256 bytes */
3969#else
3970 u32 xmm_space[32]; /* 8*16 bytes for each XMM-reg = 128 bytes */
3971#endif
3972};
3973
8b006791
ZX		 3974/*
3975 * Translate a guest virtual address to a guest physical address.
3976 */
3977int kvm_arch_vcpu_ioctl_translate(struct kvm_vcpu *vcpu,
3978 struct kvm_translation *tr)
3979{
3980 unsigned long vaddr = tr->linear_address;
3981 gpa_t gpa;
3982
3983 vcpu_load(vcpu);
72dc67a6 3984 down_read(&vcpu->kvm->slots_lock);
ad312c7c 3985 gpa = vcpu->arch.mmu.gva_to_gpa(vcpu, vaddr);
72dc67a6 3986 up_read(&vcpu->kvm->slots_lock);
8b006791
ZX		 3987 tr->physical_address = gpa;
3988 tr->valid = gpa != UNMAPPED_GVA;
3989 tr->writeable = 1;
3990 tr->usermode = 0;
8b006791
ZX		 3991 vcpu_put(vcpu);
3992
3993 return 0;
3994}
3995
d0752060
HB		 3996int kvm_arch_vcpu_ioctl_get_fpu(struct kvm_vcpu *vcpu, struct kvm_fpu *fpu)
3997{
ad312c7c 3998 struct fxsave *fxsave = (struct fxsave *)&vcpu->arch.guest_fx_image;
d0752060
HB		 3999
4000 vcpu_load(vcpu);
4001
4002 memcpy(fpu->fpr, fxsave->st_space, 128);
4003 fpu->fcw = fxsave->cwd;
4004 fpu->fsw = fxsave->swd;
4005 fpu->ftwx = fxsave->twd;
4006 fpu->last_opcode = fxsave->fop;
4007 fpu->last_ip = fxsave->rip;
4008 fpu->last_dp = fxsave->rdp;
4009 memcpy(fpu->xmm, fxsave->xmm_space, sizeof fxsave->xmm_space);
4010
4011 vcpu_put(vcpu);
4012
4013 return 0;
4014}
4015
4016int kvm_arch_vcpu_ioctl_set_fpu(struct kvm_vcpu *vcpu, struct kvm_fpu *fpu)
4017{
ad312c7c 4018 struct fxsave *fxsave = (struct fxsave *)&vcpu->arch.guest_fx_image;
d0752060
HB		 4019
4020 vcpu_load(vcpu);
4021
4022 memcpy(fxsave->st_space, fpu->fpr, 128);
4023 fxsave->cwd = fpu->fcw;
4024 fxsave->swd = fpu->fsw;
4025 fxsave->twd = fpu->ftwx;
4026 fxsave->fop = fpu->last_opcode;
4027 fxsave->rip = fpu->last_ip;
4028 fxsave->rdp = fpu->last_dp;
4029 memcpy(fxsave->xmm_space, fpu->xmm, sizeof fxsave->xmm_space);
4030
4031 vcpu_put(vcpu);
4032
4033 return 0;
4034}
4035
4036void fx_init(struct kvm_vcpu *vcpu)
4037{
4038 unsigned after_mxcsr_mask;
4039
bc1a34f1
AA		 4040 /*
4041 * Touch the fpu the first time in non atomic context as if
4042 * this is the first fpu instruction the exception handler
4043 * will fire before the instruction returns and it'll have to
4044 * allocate ram with GFP_KERNEL.
4045 */
4046 if (!used_math())
d6e88aec 4047 kvm_fx_save(&vcpu->arch.host_fx_image);
bc1a34f1 4048
d0752060
HB		 4049 /* Initialize guest FPU by resetting ours and saving into guest's */
4050 preempt_disable();
d6e88aec
AK		 4051 kvm_fx_save(&vcpu->arch.host_fx_image);
4052 kvm_fx_finit();
4053 kvm_fx_save(&vcpu->arch.guest_fx_image);
4054 kvm_fx_restore(&vcpu->arch.host_fx_image);
d0752060
HB		 4055 preempt_enable();
4056
ad312c7c 4057 vcpu->arch.cr0 |= X86_CR0_ET;
d0752060 4058 after_mxcsr_mask = offsetof(struct i387_fxsave_struct, st_space);
ad312c7c
ZX		 4059 vcpu->arch.guest_fx_image.mxcsr = 0x1f80;
4060 memset((void *)&vcpu->arch.guest_fx_image + after_mxcsr_mask,
d0752060
HB		 4061 0, sizeof(struct i387_fxsave_struct) - after_mxcsr_mask);
4062}
4063EXPORT_SYMBOL_GPL(fx_init);
4064
4065void kvm_load_guest_fpu(struct kvm_vcpu *vcpu)
4066{
4067 if (!vcpu->fpu_active || vcpu->guest_fpu_loaded)
4068 return;
4069
4070 vcpu->guest_fpu_loaded = 1;
d6e88aec
AK		 4071 kvm_fx_save(&vcpu->arch.host_fx_image);
4072 kvm_fx_restore(&vcpu->arch.guest_fx_image);
d0752060
HB		 4073}
4074EXPORT_SYMBOL_GPL(kvm_load_guest_fpu);
4075
4076void kvm_put_guest_fpu(struct kvm_vcpu *vcpu)
4077{
4078 if (!vcpu->guest_fpu_loaded)
4079 return;
4080
4081 vcpu->guest_fpu_loaded = 0;
d6e88aec
AK		 4082 kvm_fx_save(&vcpu->arch.guest_fx_image);
4083 kvm_fx_restore(&vcpu->arch.host_fx_image);
f096ed85 4084 ++vcpu->stat.fpu_reload;
d0752060
HB		 4085}
4086EXPORT_SYMBOL_GPL(kvm_put_guest_fpu);
e9b11c17
ZX		 4087
4088void kvm_arch_vcpu_free(struct kvm_vcpu *vcpu)
4089{
4090 kvm_x86_ops->vcpu_free(vcpu);
4091}
4092
4093struct kvm_vcpu *kvm_arch_vcpu_create(struct kvm *kvm,
4094 unsigned int id)
4095{
26e5215f
AK		 4096 return kvm_x86_ops->vcpu_create(kvm, id);
4097}
e9b11c17 4098
26e5215f
AK		 4099int kvm_arch_vcpu_setup(struct kvm_vcpu *vcpu)
4100{
4101 int r;
e9b11c17
ZX		 4102
4103 /* We do fxsave: this must be aligned. */
ad312c7c 4104 BUG_ON((unsigned long)&vcpu->arch.host_fx_image & 0xF);
e9b11c17
ZX		 4105
4106 vcpu_load(vcpu);
4107 r = kvm_arch_vcpu_reset(vcpu);
4108 if (r == 0)
4109 r = kvm_mmu_setup(vcpu);
4110 vcpu_put(vcpu);
4111 if (r < 0)
4112 goto free_vcpu;
4113
26e5215f 4114 return 0;
e9b11c17
ZX		 4115free_vcpu:
4116 kvm_x86_ops->vcpu_free(vcpu);
26e5215f 4117 return r;
e9b11c17
ZX		 4118}
4119
d40ccc62 4120void kvm_arch_vcpu_destroy(struct kvm_vcpu *vcpu)
e9b11c17
ZX		 4121{
4122 vcpu_load(vcpu);
4123 kvm_mmu_unload(vcpu);
4124 vcpu_put(vcpu);
4125
4126 kvm_x86_ops->vcpu_free(vcpu);
4127}
4128
4129int kvm_arch_vcpu_reset(struct kvm_vcpu *vcpu)
4130{
4131 return kvm_x86_ops->vcpu_reset(vcpu);
4132}
4133
4134void kvm_arch_hardware_enable(void *garbage)
4135{
4136 kvm_x86_ops->hardware_enable(garbage);
4137}
4138
4139void kvm_arch_hardware_disable(void *garbage)
4140{
4141 kvm_x86_ops->hardware_disable(garbage);
4142}
4143
4144int kvm_arch_hardware_setup(void)
4145{
4146 return kvm_x86_ops->hardware_setup();
4147}
4148
4149void kvm_arch_hardware_unsetup(void)
4150{
4151 kvm_x86_ops->hardware_unsetup();
4152}
4153
4154void kvm_arch_check_processor_compat(void *rtn)
4155{
4156 kvm_x86_ops->check_processor_compatibility(rtn);
4157}
4158
4159int kvm_arch_vcpu_init(struct kvm_vcpu *vcpu)
4160{
4161 struct page *page;
4162 struct kvm *kvm;
4163 int r;
4164
4165 BUG_ON(vcpu->kvm == NULL);
4166 kvm = vcpu->kvm;
4167
ad312c7c 4168 vcpu->arch.mmu.root_hpa = INVALID_PAGE;
e9b11c17 4169 if (!irqchip_in_kernel(kvm) || vcpu->vcpu_id == 0)
a4535290 4170 vcpu->arch.mp_state = KVM_MP_STATE_RUNNABLE;
e9b11c17 4171 else
a4535290 4172 vcpu->arch.mp_state = KVM_MP_STATE_UNINITIALIZED;
e9b11c17
ZX		 4173
4174 page = alloc_page(GFP_KERNEL | __GFP_ZERO);
4175 if (!page) {
4176 r = -ENOMEM;
4177 goto fail;
4178 }
ad312c7c 4179 vcpu->arch.pio_data = page_address(page);
e9b11c17
ZX		 4180
4181 r = kvm_mmu_create(vcpu);
4182 if (r < 0)
4183 goto fail_free_pio_data;
4184
4185 if (irqchip_in_kernel(kvm)) {
4186 r = kvm_create_lapic(vcpu);
4187 if (r < 0)
4188 goto fail_mmu_destroy;
4189 }
4190
4191 return 0;
4192
4193fail_mmu_destroy:
4194 kvm_mmu_destroy(vcpu);
4195fail_free_pio_data:
ad312c7c 4196 free_page((unsigned long)vcpu->arch.pio_data);
e9b11c17
ZX		 4197fail:
4198 return r;
4199}
4200
4201void kvm_arch_vcpu_uninit(struct kvm_vcpu *vcpu)
4202{
4203 kvm_free_lapic(vcpu);
3200f405 4204 down_read(&vcpu->kvm->slots_lock);
e9b11c17 4205 kvm_mmu_destroy(vcpu);
3200f405 4206 up_read(&vcpu->kvm->slots_lock);
ad312c7c 4207 free_page((unsigned long)vcpu->arch.pio_data);
e9b11c17 4208}
d19a9cd2
ZX		 4209
4210struct kvm *kvm_arch_create_vm(void)
4211{
4212 struct kvm *kvm = kzalloc(sizeof(struct kvm), GFP_KERNEL);
4213
4214 if (!kvm)
4215 return ERR_PTR(-ENOMEM);
4216
f05e70ac 4217 INIT_LIST_HEAD(&kvm->arch.active_mmu_pages);
4d5c5d0f 4218 INIT_LIST_HEAD(&kvm->arch.assigned_dev_head);
d19a9cd2
ZX		 4219
4220 return kvm;
4221}
4222
4223static void kvm_unload_vcpu_mmu(struct kvm_vcpu *vcpu)
4224{
4225 vcpu_load(vcpu);
4226 kvm_mmu_unload(vcpu);
4227 vcpu_put(vcpu);
4228}
4229
4230static void kvm_free_vcpus(struct kvm *kvm)
4231{
4232 unsigned int i;
4233
4234 /*
4235 * Unpin any mmu pages first.
4236 */
4237 for (i = 0; i < KVM_MAX_VCPUS; ++i)
4238 if (kvm->vcpus[i])
4239 kvm_unload_vcpu_mmu(kvm->vcpus[i]);
4240 for (i = 0; i < KVM_MAX_VCPUS; ++i) {
4241 if (kvm->vcpus[i]) {
4242 kvm_arch_vcpu_free(kvm->vcpus[i]);
4243 kvm->vcpus[i] = NULL;
4244 }
4245 }
4246
4247}
4248
4249void kvm_arch_destroy_vm(struct kvm *kvm)
4250{
4d5c5d0f 4251 kvm_free_assigned_devices(kvm);
7837699f 4252 kvm_free_pit(kvm);
d7deeeb0
ZX		 4253 kfree(kvm->arch.vpic);
4254 kfree(kvm->arch.vioapic);
d19a9cd2
ZX		 4255 kvm_free_vcpus(kvm);
4256 kvm_free_physmem(kvm);
3d45830c
AK		 4257 if (kvm->arch.apic_access_page)
4258 put_page(kvm->arch.apic_access_page);
b7ebfb05
SY		 4259 if (kvm->arch.ept_identity_pagetable)
4260 put_page(kvm->arch.ept_identity_pagetable);
d19a9cd2
ZX		 4261 kfree(kvm);
4262}
0de10343
ZX		 4263
4264int kvm_arch_set_memory_region(struct kvm *kvm,
4265 struct kvm_userspace_memory_region *mem,
4266 struct kvm_memory_slot old,
4267 int user_alloc)
4268{
4269 int npages = mem->memory_size >> PAGE_SHIFT;
4270 struct kvm_memory_slot *memslot = &kvm->memslots[mem->slot];
4271
4272 /*To keep backward compatibility with older userspace,
4273 *x86 needs to hanlde !user_alloc case.
4274 */
4275 if (!user_alloc) {
4276 if (npages && !old.rmap) {
604b38ac
AA		 4277 unsigned long userspace_addr;
4278
72dc67a6 4279 down_write(&current->mm->mmap_sem);
604b38ac
AA		 4280 userspace_addr = do_mmap(NULL, 0,
4281 npages * PAGE_SIZE,
4282 PROT_READ | PROT_WRITE,
4283 MAP_SHARED | MAP_ANONYMOUS,
4284 0);
72dc67a6 4285 up_write(&current->mm->mmap_sem);
0de10343 4286
604b38ac
AA		 4287 if (IS_ERR((void *)userspace_addr))
4288 return PTR_ERR((void *)userspace_addr);
4289
4290 /* set userspace_addr atomically for kvm_hva_to_rmapp */
4291 spin_lock(&kvm->mmu_lock);
4292 memslot->userspace_addr = userspace_addr;
4293 spin_unlock(&kvm->mmu_lock);
0de10343
ZX		 4294 } else {
4295 if (!old.user_alloc && old.rmap) {
4296 int ret;
4297
72dc67a6 4298 down_write(&current->mm->mmap_sem);
0de10343
ZX		 4299 ret = do_munmap(current->mm, old.userspace_addr,
4300 old.npages * PAGE_SIZE);
72dc67a6 4301 up_write(&current->mm->mmap_sem);
0de10343
ZX		 4302 if (ret < 0)
4303 printk(KERN_WARNING
4304 "kvm_vm_ioctl_set_memory_region: "
4305 "failed to munmap memory\n");
4306 }
4307 }
4308 }
4309
f05e70ac 4310 if (!kvm->arch.n_requested_mmu_pages) {
0de10343
ZX		 4311 unsigned int nr_mmu_pages = kvm_mmu_calculate_mmu_pages(kvm);
4312 kvm_mmu_change_mmu_pages(kvm, nr_mmu_pages);
4313 }
4314
4315 kvm_mmu_slot_remove_write_access(kvm, mem->slot);
4316 kvm_flush_remote_tlbs(kvm);
4317
4318 return 0;
4319}
1d737c8a 4320
34d4cb8f
MT		 4321void kvm_arch_flush_shadow(struct kvm *kvm)
4322{
4323 kvm_mmu_zap_all(kvm);
4324}
4325
1d737c8a
ZX		 4326int kvm_arch_vcpu_runnable(struct kvm_vcpu *vcpu)
4327{
a4535290
AK		 4328 return vcpu->arch.mp_state == KVM_MP_STATE_RUNNABLE
4329 || vcpu->arch.mp_state == KVM_MP_STATE_SIPI_RECEIVED;
1d737c8a 4330}
5736199a
ZX		 4331
4332static void vcpu_kick_intr(void *info)
4333{
4334#ifdef DEBUG
4335 struct kvm_vcpu *vcpu = (struct kvm_vcpu *)info;
4336 printk(KERN_DEBUG "vcpu_kick_intr %p \n", vcpu);
4337#endif
4338}
4339
4340void kvm_vcpu_kick(struct kvm_vcpu *vcpu)
4341{
4342 int ipi_pcpu = vcpu->cpu;
e9571ed5 4343 int cpu = get_cpu();
5736199a
ZX		 4344
4345 if (waitqueue_active(&vcpu->wq)) {
4346 wake_up_interruptible(&vcpu->wq);
4347 ++vcpu->stat.halt_wakeup;
4348 }
e9571ed5
MT		 4349 /*
4350 * We may be called synchronously with irqs disabled in guest mode,
4351 * So need not to call smp_call_function_single() in that case.
4352 */
4353 if (vcpu->guest_mode && vcpu->cpu != cpu)
8691e5a8 4354 smp_call_function_single(ipi_pcpu, vcpu_kick_intr, vcpu, 0);
e9571ed5 4355 put_cpu();
5736199a 4356}
Linux 6.x block layer and io_uring tree(s)