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KVM: SVM: enable LBR virtualization
[linux-2.6-block.git] / arch / x86 / kvm / x86.c
CommitLineData
043405e1
CO		 1/*
2 * Kernel-based Virtual Machine driver for Linux
3 *
4 * derived from drivers/kvm/kvm_main.c
5 *
6 * Copyright (C) 2006 Qumranet, Inc.
7 *
8 * Authors:
9 * Avi Kivity <avi@qumranet.com>
10 * Yaniv Kamay <yaniv@qumranet.com>
11 *
12 * This work is licensed under the terms of the GNU GPL, version 2. See
13 * the COPYING file in the top-level directory.
14 *
15 */
16
edf88417 17#include <linux/kvm_host.h>
5fb76f9b 18#include "segment_descriptor.h"
313a3dc7 19#include "irq.h"
1d737c8a 20#include "mmu.h"
313a3dc7
CO		 21
22#include <linux/kvm.h>
23#include <linux/fs.h>
24#include <linux/vmalloc.h>
5fb76f9b 25#include <linux/module.h>
0de10343 26#include <linux/mman.h>
2bacc55c 27#include <linux/highmem.h>
043405e1
CO		 28
29#include <asm/uaccess.h>
d825ed0a 30#include <asm/msr.h>
043405e1 31
313a3dc7 32#define MAX_IO_MSRS 256
a03490ed
CO		 33#define CR0_RESERVED_BITS \
34 (~(unsigned long)(X86_CR0_PE | X86_CR0_MP | X86_CR0_EM | X86_CR0_TS \
35 | X86_CR0_ET | X86_CR0_NE | X86_CR0_WP | X86_CR0_AM \
36 | X86_CR0_NW | X86_CR0_CD | X86_CR0_PG))
37#define CR4_RESERVED_BITS \
38 (~(unsigned long)(X86_CR4_VME | X86_CR4_PVI | X86_CR4_TSD | X86_CR4_DE\
39 | X86_CR4_PSE | X86_CR4_PAE | X86_CR4_MCE \
40 | X86_CR4_PGE | X86_CR4_PCE | X86_CR4_OSFXSR \
41 | X86_CR4_OSXMMEXCPT | X86_CR4_VMXE))
42
43#define CR8_RESERVED_BITS (~(unsigned long)X86_CR8_TPR)
50a37eb4
JR		 44/* EFER defaults:
45 * - enable syscall per default because its emulated by KVM
46 * - enable LME and LMA per default on 64 bit KVM
47 */
48#ifdef CONFIG_X86_64
49static u64 __read_mostly efer_reserved_bits = 0xfffffffffffffafeULL;
50#else
51static u64 __read_mostly efer_reserved_bits = 0xfffffffffffffffeULL;
52#endif
313a3dc7 53
ba1389b7
AK		 54#define VM_STAT(x) offsetof(struct kvm, stat.x), KVM_STAT_VM
55#define VCPU_STAT(x) offsetof(struct kvm_vcpu, stat.x), KVM_STAT_VCPU
417bc304 56
674eea0f
AK		 57static int kvm_dev_ioctl_get_supported_cpuid(struct kvm_cpuid2 *cpuid,
58 struct kvm_cpuid_entry2 __user *entries);
59
97896d04
ZX		 60struct kvm_x86_ops *kvm_x86_ops;
61
417bc304 62struct kvm_stats_debugfs_item debugfs_entries[] = {
ba1389b7
AK		 63 { "pf_fixed", VCPU_STAT(pf_fixed) },
64 { "pf_guest", VCPU_STAT(pf_guest) },
65 { "tlb_flush", VCPU_STAT(tlb_flush) },
66 { "invlpg", VCPU_STAT(invlpg) },
67 { "exits", VCPU_STAT(exits) },
68 { "io_exits", VCPU_STAT(io_exits) },
69 { "mmio_exits", VCPU_STAT(mmio_exits) },
70 { "signal_exits", VCPU_STAT(signal_exits) },
71 { "irq_window", VCPU_STAT(irq_window_exits) },
72 { "halt_exits", VCPU_STAT(halt_exits) },
73 { "halt_wakeup", VCPU_STAT(halt_wakeup) },
74 { "request_irq", VCPU_STAT(request_irq_exits) },
75 { "irq_exits", VCPU_STAT(irq_exits) },
76 { "host_state_reload", VCPU_STAT(host_state_reload) },
77 { "efer_reload", VCPU_STAT(efer_reload) },
78 { "fpu_reload", VCPU_STAT(fpu_reload) },
79 { "insn_emulation", VCPU_STAT(insn_emulation) },
80 { "insn_emulation_fail", VCPU_STAT(insn_emulation_fail) },
4cee5764
AK		 81 { "mmu_shadow_zapped", VM_STAT(mmu_shadow_zapped) },
82 { "mmu_pte_write", VM_STAT(mmu_pte_write) },
83 { "mmu_pte_updated", VM_STAT(mmu_pte_updated) },
84 { "mmu_pde_zapped", VM_STAT(mmu_pde_zapped) },
85 { "mmu_flooded", VM_STAT(mmu_flooded) },
86 { "mmu_recycled", VM_STAT(mmu_recycled) },
dfc5aa00 87 { "mmu_cache_miss", VM_STAT(mmu_cache_miss) },
0f74a24c 88 { "remote_tlb_flush", VM_STAT(remote_tlb_flush) },
417bc304
HB		 89 { NULL }
90};
91
92
5fb76f9b
CO		 93unsigned long segment_base(u16 selector)
94{
95 struct descriptor_table gdt;
96 struct segment_descriptor *d;
97 unsigned long table_base;
98 unsigned long v;
99
100 if (selector == 0)
101 return 0;
102
103 asm("sgdt %0" : "=m"(gdt));
104 table_base = gdt.base;
105
106 if (selector & 4) { /* from ldt */
107 u16 ldt_selector;
108
109 asm("sldt %0" : "=g"(ldt_selector));
110 table_base = segment_base(ldt_selector);
111 }
112 d = (struct segment_descriptor *)(table_base + (selector & ~7));
113 v = d->base_low | ((unsigned long)d->base_mid << 16) |
114 ((unsigned long)d->base_high << 24);
115#ifdef CONFIG_X86_64
116 if (d->system == 0 && (d->type == 2 || d->type == 9 || d->type == 11))
117 v |= ((unsigned long) \
118 ((struct segment_descriptor_64 *)d)->base_higher) << 32;
119#endif
120 return v;
121}
122EXPORT_SYMBOL_GPL(segment_base);
123
6866b83e
CO		 124u64 kvm_get_apic_base(struct kvm_vcpu *vcpu)
125{
126 if (irqchip_in_kernel(vcpu->kvm))
ad312c7c 127 return vcpu->arch.apic_base;
6866b83e 128 else
ad312c7c 129 return vcpu->arch.apic_base;
6866b83e
CO		 130}
131EXPORT_SYMBOL_GPL(kvm_get_apic_base);
132
133void kvm_set_apic_base(struct kvm_vcpu *vcpu, u64 data)
134{
135 /* TODO: reserve bits check */
136 if (irqchip_in_kernel(vcpu->kvm))
137 kvm_lapic_set_base(vcpu, data);
138 else
ad312c7c 139 vcpu->arch.apic_base = data;
6866b83e
CO		 140}
141EXPORT_SYMBOL_GPL(kvm_set_apic_base);
142
298101da
AK		 143void kvm_queue_exception(struct kvm_vcpu *vcpu, unsigned nr)
144{
ad312c7c
ZX		 145 WARN_ON(vcpu->arch.exception.pending);
146 vcpu->arch.exception.pending = true;
147 vcpu->arch.exception.has_error_code = false;
148 vcpu->arch.exception.nr = nr;
298101da
AK		 149}
150EXPORT_SYMBOL_GPL(kvm_queue_exception);
151
c3c91fee
AK		 152void kvm_inject_page_fault(struct kvm_vcpu *vcpu, unsigned long addr,
153 u32 error_code)
154{
155 ++vcpu->stat.pf_guest;
ad312c7c 156 if (vcpu->arch.exception.pending && vcpu->arch.exception.nr == PF_VECTOR) {
c3c91fee
AK		 157 printk(KERN_DEBUG "kvm: inject_page_fault:"
158 " double fault 0x%lx\n", addr);
ad312c7c
ZX		 159 vcpu->arch.exception.nr = DF_VECTOR;
160 vcpu->arch.exception.error_code = 0;
c3c91fee
AK		 161 return;
162 }
ad312c7c 163 vcpu->arch.cr2 = addr;
c3c91fee
AK		 164 kvm_queue_exception_e(vcpu, PF_VECTOR, error_code);
165}
166
298101da
AK		 167void kvm_queue_exception_e(struct kvm_vcpu *vcpu, unsigned nr, u32 error_code)
168{
ad312c7c
ZX		 169 WARN_ON(vcpu->arch.exception.pending);
170 vcpu->arch.exception.pending = true;
171 vcpu->arch.exception.has_error_code = true;
172 vcpu->arch.exception.nr = nr;
173 vcpu->arch.exception.error_code = error_code;
298101da
AK		 174}
175EXPORT_SYMBOL_GPL(kvm_queue_exception_e);
176
177static void __queue_exception(struct kvm_vcpu *vcpu)
178{
ad312c7c
ZX		 179 kvm_x86_ops->queue_exception(vcpu, vcpu->arch.exception.nr,
180 vcpu->arch.exception.has_error_code,
181 vcpu->arch.exception.error_code);
298101da
AK		 182}
183
a03490ed
CO		 184/*
185 * Load the pae pdptrs. Return true is they are all valid.
186 */
187int load_pdptrs(struct kvm_vcpu *vcpu, unsigned long cr3)
188{
189 gfn_t pdpt_gfn = cr3 >> PAGE_SHIFT;
190 unsigned offset = ((cr3 & (PAGE_SIZE-1)) >> 5) << 2;
191 int i;
192 int ret;
ad312c7c 193 u64 pdpte[ARRAY_SIZE(vcpu->arch.pdptrs)];
a03490ed 194
72dc67a6 195 down_read(&vcpu->kvm->slots_lock);
a03490ed
CO		 196 ret = kvm_read_guest_page(vcpu->kvm, pdpt_gfn, pdpte,
197 offset * sizeof(u64), sizeof(pdpte));
198 if (ret < 0) {
199 ret = 0;
200 goto out;
201 }
202 for (i = 0; i < ARRAY_SIZE(pdpte); ++i) {
203 if ((pdpte[i] & 1) && (pdpte[i] & 0xfffffff0000001e6ull)) {
204 ret = 0;
205 goto out;
206 }
207 }
208 ret = 1;
209
ad312c7c 210 memcpy(vcpu->arch.pdptrs, pdpte, sizeof(vcpu->arch.pdptrs));
a03490ed 211out:
72dc67a6 212 up_read(&vcpu->kvm->slots_lock);
a03490ed
CO		 213
214 return ret;
215}
cc4b6871 216EXPORT_SYMBOL_GPL(load_pdptrs);
a03490ed 217
d835dfec
AK		 218static bool pdptrs_changed(struct kvm_vcpu *vcpu)
219{
ad312c7c 220 u64 pdpte[ARRAY_SIZE(vcpu->arch.pdptrs)];
d835dfec
AK		 221 bool changed = true;
222 int r;
223
224 if (is_long_mode(vcpu) || !is_pae(vcpu))
225 return false;
226
72dc67a6 227 down_read(&vcpu->kvm->slots_lock);
ad312c7c 228 r = kvm_read_guest(vcpu->kvm, vcpu->arch.cr3 & ~31u, pdpte, sizeof(pdpte));
d835dfec
AK		 229 if (r < 0)
230 goto out;
ad312c7c 231 changed = memcmp(pdpte, vcpu->arch.pdptrs, sizeof(pdpte)) != 0;
d835dfec 232out:
72dc67a6 233 up_read(&vcpu->kvm->slots_lock);
d835dfec
AK		 234
235 return changed;
236}
237
a03490ed
CO		 238void set_cr0(struct kvm_vcpu *vcpu, unsigned long cr0)
239{
240 if (cr0 & CR0_RESERVED_BITS) {
241 printk(KERN_DEBUG "set_cr0: 0x%lx #GP, reserved bits 0x%lx\n",
ad312c7c 242 cr0, vcpu->arch.cr0);
c1a5d4f9 243 kvm_inject_gp(vcpu, 0);
a03490ed
CO		 244 return;
245 }
246
247 if ((cr0 & X86_CR0_NW) && !(cr0 & X86_CR0_CD)) {
248 printk(KERN_DEBUG "set_cr0: #GP, CD == 0 && NW == 1\n");
c1a5d4f9 249 kvm_inject_gp(vcpu, 0);
a03490ed
CO		 250 return;
251 }
252
253 if ((cr0 & X86_CR0_PG) && !(cr0 & X86_CR0_PE)) {
254 printk(KERN_DEBUG "set_cr0: #GP, set PG flag "
255 "and a clear PE flag\n");
c1a5d4f9 256 kvm_inject_gp(vcpu, 0);
a03490ed
CO		 257 return;
258 }
259
260 if (!is_paging(vcpu) && (cr0 & X86_CR0_PG)) {
261#ifdef CONFIG_X86_64
ad312c7c 262 if ((vcpu->arch.shadow_efer & EFER_LME)) {
a03490ed
CO		 263 int cs_db, cs_l;
264
265 if (!is_pae(vcpu)) {
266 printk(KERN_DEBUG "set_cr0: #GP, start paging "
267 "in long mode while PAE is disabled\n");
c1a5d4f9 268 kvm_inject_gp(vcpu, 0);
a03490ed
CO		 269 return;
270 }
271 kvm_x86_ops->get_cs_db_l_bits(vcpu, &cs_db, &cs_l);
272 if (cs_l) {
273 printk(KERN_DEBUG "set_cr0: #GP, start paging "
274 "in long mode while CS.L == 1\n");
c1a5d4f9 275 kvm_inject_gp(vcpu, 0);
a03490ed
CO		 276 return;
277
278 }
279 } else
280#endif
ad312c7c 281 if (is_pae(vcpu) && !load_pdptrs(vcpu, vcpu->arch.cr3)) {
a03490ed
CO		 282 printk(KERN_DEBUG "set_cr0: #GP, pdptrs "
283 "reserved bits\n");
c1a5d4f9 284 kvm_inject_gp(vcpu, 0);
a03490ed
CO		 285 return;
286 }
287
288 }
289
290 kvm_x86_ops->set_cr0(vcpu, cr0);
ad312c7c 291 vcpu->arch.cr0 = cr0;
a03490ed 292
a03490ed 293 kvm_mmu_reset_context(vcpu);
a03490ed
CO		 294 return;
295}
296EXPORT_SYMBOL_GPL(set_cr0);
297
298void lmsw(struct kvm_vcpu *vcpu, unsigned long msw)
299{
ad312c7c 300 set_cr0(vcpu, (vcpu->arch.cr0 & ~0x0ful) | (msw & 0x0f));
a03490ed
CO		 301}
302EXPORT_SYMBOL_GPL(lmsw);
303
304void set_cr4(struct kvm_vcpu *vcpu, unsigned long cr4)
305{
306 if (cr4 & CR4_RESERVED_BITS) {
307 printk(KERN_DEBUG "set_cr4: #GP, reserved bits\n");
c1a5d4f9 308 kvm_inject_gp(vcpu, 0);
a03490ed
CO		 309 return;
310 }
311
312 if (is_long_mode(vcpu)) {
313 if (!(cr4 & X86_CR4_PAE)) {
314 printk(KERN_DEBUG "set_cr4: #GP, clearing PAE while "
315 "in long mode\n");
c1a5d4f9 316 kvm_inject_gp(vcpu, 0);
a03490ed
CO		 317 return;
318 }
319 } else if (is_paging(vcpu) && !is_pae(vcpu) && (cr4 & X86_CR4_PAE)
ad312c7c 320 && !load_pdptrs(vcpu, vcpu->arch.cr3)) {
a03490ed 321 printk(KERN_DEBUG "set_cr4: #GP, pdptrs reserved bits\n");
c1a5d4f9 322 kvm_inject_gp(vcpu, 0);
a03490ed
CO		 323 return;
324 }
325
326 if (cr4 & X86_CR4_VMXE) {
327 printk(KERN_DEBUG "set_cr4: #GP, setting VMXE\n");
c1a5d4f9 328 kvm_inject_gp(vcpu, 0);
a03490ed
CO		 329 return;
330 }
331 kvm_x86_ops->set_cr4(vcpu, cr4);
ad312c7c 332 vcpu->arch.cr4 = cr4;
a03490ed 333 kvm_mmu_reset_context(vcpu);
a03490ed
CO		 334}
335EXPORT_SYMBOL_GPL(set_cr4);
336
337void set_cr3(struct kvm_vcpu *vcpu, unsigned long cr3)
338{
ad312c7c 339 if (cr3 == vcpu->arch.cr3 && !pdptrs_changed(vcpu)) {
d835dfec
AK		 340 kvm_mmu_flush_tlb(vcpu);
341 return;
342 }
343
a03490ed
CO		 344 if (is_long_mode(vcpu)) {
345 if (cr3 & CR3_L_MODE_RESERVED_BITS) {
346 printk(KERN_DEBUG "set_cr3: #GP, reserved bits\n");
c1a5d4f9 347 kvm_inject_gp(vcpu, 0);
a03490ed
CO		 348 return;
349 }
350 } else {
351 if (is_pae(vcpu)) {
352 if (cr3 & CR3_PAE_RESERVED_BITS) {
353 printk(KERN_DEBUG
354 "set_cr3: #GP, reserved bits\n");
c1a5d4f9 355 kvm_inject_gp(vcpu, 0);
a03490ed
CO		 356 return;
357 }
358 if (is_paging(vcpu) && !load_pdptrs(vcpu, cr3)) {
359 printk(KERN_DEBUG "set_cr3: #GP, pdptrs "
360 "reserved bits\n");
c1a5d4f9 361 kvm_inject_gp(vcpu, 0);
a03490ed
CO		 362 return;
363 }
364 }
365 /*
366 * We don't check reserved bits in nonpae mode, because
367 * this isn't enforced, and VMware depends on this.
368 */
369 }
370
72dc67a6 371 down_read(&vcpu->kvm->slots_lock);
a03490ed
CO		 372 /*
373 * Does the new cr3 value map to physical memory? (Note, we
374 * catch an invalid cr3 even in real-mode, because it would
375 * cause trouble later on when we turn on paging anyway.)
376 *
377 * A real CPU would silently accept an invalid cr3 and would
378 * attempt to use it - with largely undefined (and often hard
379 * to debug) behavior on the guest side.
380 */
381 if (unlikely(!gfn_to_memslot(vcpu->kvm, cr3 >> PAGE_SHIFT)))
c1a5d4f9 382 kvm_inject_gp(vcpu, 0);
a03490ed 383 else {
ad312c7c
ZX		 384 vcpu->arch.cr3 = cr3;
385 vcpu->arch.mmu.new_cr3(vcpu);
a03490ed 386 }
72dc67a6 387 up_read(&vcpu->kvm->slots_lock);
a03490ed
CO		 388}
389EXPORT_SYMBOL_GPL(set_cr3);
390
391void set_cr8(struct kvm_vcpu *vcpu, unsigned long cr8)
392{
393 if (cr8 & CR8_RESERVED_BITS) {
394 printk(KERN_DEBUG "set_cr8: #GP, reserved bits 0x%lx\n", cr8);
c1a5d4f9 395 kvm_inject_gp(vcpu, 0);
a03490ed
CO		 396 return;
397 }
398 if (irqchip_in_kernel(vcpu->kvm))
399 kvm_lapic_set_tpr(vcpu, cr8);
400 else
ad312c7c 401 vcpu->arch.cr8 = cr8;
a03490ed
CO		 402}
403EXPORT_SYMBOL_GPL(set_cr8);
404
405unsigned long get_cr8(struct kvm_vcpu *vcpu)
406{
407 if (irqchip_in_kernel(vcpu->kvm))
408 return kvm_lapic_get_cr8(vcpu);
409 else
ad312c7c 410 return vcpu->arch.cr8;
a03490ed
CO		 411}
412EXPORT_SYMBOL_GPL(get_cr8);
413
043405e1
CO		 414/*
415 * List of msr numbers which we expose to userspace through KVM_GET_MSRS
416 * and KVM_SET_MSRS, and KVM_GET_MSR_INDEX_LIST.
417 *
418 * This list is modified at module load time to reflect the
419 * capabilities of the host cpu.
420 */
421static u32 msrs_to_save[] = {
422 MSR_IA32_SYSENTER_CS, MSR_IA32_SYSENTER_ESP, MSR_IA32_SYSENTER_EIP,
423 MSR_K6_STAR,
424#ifdef CONFIG_X86_64
425 MSR_CSTAR, MSR_KERNEL_GS_BASE, MSR_SYSCALL_MASK, MSR_LSTAR,
426#endif
427 MSR_IA32_TIME_STAMP_COUNTER,
428};
429
430static unsigned num_msrs_to_save;
431
432static u32 emulated_msrs[] = {
433 MSR_IA32_MISC_ENABLE,
434};
435
15c4a640
CO		 436static void set_efer(struct kvm_vcpu *vcpu, u64 efer)
437{
f2b4b7dd 438 if (efer & efer_reserved_bits) {
15c4a640
CO		 439 printk(KERN_DEBUG "set_efer: 0x%llx #GP, reserved bits\n",
440 efer);
c1a5d4f9 441 kvm_inject_gp(vcpu, 0);
15c4a640
CO		 442 return;
443 }
444
445 if (is_paging(vcpu)
ad312c7c 446 && (vcpu->arch.shadow_efer & EFER_LME) != (efer & EFER_LME)) {
15c4a640 447 printk(KERN_DEBUG "set_efer: #GP, change LME while paging\n");
c1a5d4f9 448 kvm_inject_gp(vcpu, 0);
15c4a640
CO		 449 return;
450 }
451
452 kvm_x86_ops->set_efer(vcpu, efer);
453
454 efer &= ~EFER_LMA;
ad312c7c 455 efer |= vcpu->arch.shadow_efer & EFER_LMA;
15c4a640 456
ad312c7c 457 vcpu->arch.shadow_efer = efer;
15c4a640
CO		 458}
459
f2b4b7dd
JR		 460void kvm_enable_efer_bits(u64 mask)
461{
462 efer_reserved_bits &= ~mask;
463}
464EXPORT_SYMBOL_GPL(kvm_enable_efer_bits);
465
466
15c4a640
CO		 467/*
468 * Writes msr value into into the appropriate "register".
469 * Returns 0 on success, non-0 otherwise.
470 * Assumes vcpu_load() was already called.
471 */
472int kvm_set_msr(struct kvm_vcpu *vcpu, u32 msr_index, u64 data)
473{
474 return kvm_x86_ops->set_msr(vcpu, msr_index, data);
475}
476
313a3dc7
CO		 477/*
478 * Adapt set_msr() to msr_io()'s calling convention
479 */
480static int do_set_msr(struct kvm_vcpu *vcpu, unsigned index, u64 *data)
481{
482 return kvm_set_msr(vcpu, index, *data);
483}
484
15c4a640
CO		 485
486int kvm_set_msr_common(struct kvm_vcpu *vcpu, u32 msr, u64 data)
487{
488 switch (msr) {
15c4a640
CO		 489 case MSR_EFER:
490 set_efer(vcpu, data);
491 break;
15c4a640
CO		 492 case MSR_IA32_MC0_STATUS:
493 pr_unimpl(vcpu, "%s: MSR_IA32_MC0_STATUS 0x%llx, nop\n",
494 __FUNCTION__, data);
495 break;
496 case MSR_IA32_MCG_STATUS:
497 pr_unimpl(vcpu, "%s: MSR_IA32_MCG_STATUS 0x%llx, nop\n",
498 __FUNCTION__, data);
499 break;
c7ac679c
JR		 500 case MSR_IA32_MCG_CTL:
501 pr_unimpl(vcpu, "%s: MSR_IA32_MCG_CTL 0x%llx, nop\n",
502 __FUNCTION__, data);
503 break;
15c4a640
CO		 504 case MSR_IA32_UCODE_REV:
505 case MSR_IA32_UCODE_WRITE:
506 case 0x200 ... 0x2ff: /* MTRRs */
507 break;
508 case MSR_IA32_APICBASE:
509 kvm_set_apic_base(vcpu, data);
510 break;
511 case MSR_IA32_MISC_ENABLE:
ad312c7c 512 vcpu->arch.ia32_misc_enable_msr = data;
15c4a640
CO		 513 break;
514 default:
565f1fbd 515 pr_unimpl(vcpu, "unhandled wrmsr: 0x%x data %llx\n", msr, data);
15c4a640
CO		 516 return 1;
517 }
518 return 0;
519}
520EXPORT_SYMBOL_GPL(kvm_set_msr_common);
521
522
523/*
524 * Reads an msr value (of 'msr_index') into 'pdata'.
525 * Returns 0 on success, non-0 otherwise.
526 * Assumes vcpu_load() was already called.
527 */
528int kvm_get_msr(struct kvm_vcpu *vcpu, u32 msr_index, u64 *pdata)
529{
530 return kvm_x86_ops->get_msr(vcpu, msr_index, pdata);
531}
532
533int kvm_get_msr_common(struct kvm_vcpu *vcpu, u32 msr, u64 *pdata)
534{
535 u64 data;
536
537 switch (msr) {
538 case 0xc0010010: /* SYSCFG */
539 case 0xc0010015: /* HWCR */
540 case MSR_IA32_PLATFORM_ID:
541 case MSR_IA32_P5_MC_ADDR:
542 case MSR_IA32_P5_MC_TYPE:
543 case MSR_IA32_MC0_CTL:
544 case MSR_IA32_MCG_STATUS:
545 case MSR_IA32_MCG_CAP:
c7ac679c 546 case MSR_IA32_MCG_CTL:
15c4a640
CO		 547 case MSR_IA32_MC0_MISC:
548 case MSR_IA32_MC0_MISC+4:
549 case MSR_IA32_MC0_MISC+8:
550 case MSR_IA32_MC0_MISC+12:
551 case MSR_IA32_MC0_MISC+16:
552 case MSR_IA32_UCODE_REV:
553 case MSR_IA32_PERF_STATUS:
554 case MSR_IA32_EBL_CR_POWERON:
555 /* MTRR registers */
556 case 0xfe:
557 case 0x200 ... 0x2ff:
558 data = 0;
559 break;
560 case 0xcd: /* fsb frequency */
561 data = 3;
562 break;
563 case MSR_IA32_APICBASE:
564 data = kvm_get_apic_base(vcpu);
565 break;
566 case MSR_IA32_MISC_ENABLE:
ad312c7c 567 data = vcpu->arch.ia32_misc_enable_msr;
15c4a640 568 break;
15c4a640 569 case MSR_EFER:
ad312c7c 570 data = vcpu->arch.shadow_efer;
15c4a640 571 break;
15c4a640
CO		 572 default:
573 pr_unimpl(vcpu, "unhandled rdmsr: 0x%x\n", msr);
574 return 1;
575 }
576 *pdata = data;
577 return 0;
578}
579EXPORT_SYMBOL_GPL(kvm_get_msr_common);
580
313a3dc7
CO		 581/*
582 * Read or write a bunch of msrs. All parameters are kernel addresses.
583 *
584 * @return number of msrs set successfully.
585 */
586static int __msr_io(struct kvm_vcpu *vcpu, struct kvm_msrs *msrs,
587 struct kvm_msr_entry *entries,
588 int (*do_msr)(struct kvm_vcpu *vcpu,
589 unsigned index, u64 *data))
590{
591 int i;
592
593 vcpu_load(vcpu);
594
595 for (i = 0; i < msrs->nmsrs; ++i)
596 if (do_msr(vcpu, entries[i].index, &entries[i].data))
597 break;
598
599 vcpu_put(vcpu);
600
601 return i;
602}
603
604/*
605 * Read or write a bunch of msrs. Parameters are user addresses.
606 *
607 * @return number of msrs set successfully.
608 */
609static int msr_io(struct kvm_vcpu *vcpu, struct kvm_msrs __user *user_msrs,
610 int (*do_msr)(struct kvm_vcpu *vcpu,
611 unsigned index, u64 *data),
612 int writeback)
613{
614 struct kvm_msrs msrs;
615 struct kvm_msr_entry *entries;
616 int r, n;
617 unsigned size;
618
619 r = -EFAULT;
620 if (copy_from_user(&msrs, user_msrs, sizeof msrs))
621 goto out;
622
623 r = -E2BIG;
624 if (msrs.nmsrs >= MAX_IO_MSRS)
625 goto out;
626
627 r = -ENOMEM;
628 size = sizeof(struct kvm_msr_entry) * msrs.nmsrs;
629 entries = vmalloc(size);
630 if (!entries)
631 goto out;
632
633 r = -EFAULT;
634 if (copy_from_user(entries, user_msrs->entries, size))
635 goto out_free;
636
637 r = n = __msr_io(vcpu, &msrs, entries, do_msr);
638 if (r < 0)
639 goto out_free;
640
641 r = -EFAULT;
642 if (writeback && copy_to_user(user_msrs->entries, entries, size))
643 goto out_free;
644
645 r = n;
646
647out_free:
648 vfree(entries);
649out:
650 return r;
651}
652
e9b11c17
ZX		 653/*
654 * Make sure that a cpu that is being hot-unplugged does not have any vcpus
655 * cached on it.
656 */
657void decache_vcpus_on_cpu(int cpu)
658{
659 struct kvm *vm;
660 struct kvm_vcpu *vcpu;
661 int i;
662
663 spin_lock(&kvm_lock);
664 list_for_each_entry(vm, &vm_list, vm_list)
665 for (i = 0; i < KVM_MAX_VCPUS; ++i) {
666 vcpu = vm->vcpus[i];
667 if (!vcpu)
668 continue;
669 /*
670 * If the vcpu is locked, then it is running on some
671 * other cpu and therefore it is not cached on the
672 * cpu in question.
673 *
674 * If it's not locked, check the last cpu it executed
675 * on.
676 */
677 if (mutex_trylock(&vcpu->mutex)) {
678 if (vcpu->cpu == cpu) {
679 kvm_x86_ops->vcpu_decache(vcpu);
680 vcpu->cpu = -1;
681 }
682 mutex_unlock(&vcpu->mutex);
683 }
684 }
685 spin_unlock(&kvm_lock);
686}
687
018d00d2
ZX		 688int kvm_dev_ioctl_check_extension(long ext)
689{
690 int r;
691
692 switch (ext) {
693 case KVM_CAP_IRQCHIP:
694 case KVM_CAP_HLT:
695 case KVM_CAP_MMU_SHADOW_CACHE_CONTROL:
696 case KVM_CAP_USER_MEMORY:
697 case KVM_CAP_SET_TSS_ADDR:
07716717 698 case KVM_CAP_EXT_CPUID:
018d00d2
ZX		 699 r = 1;
700 break;
774ead3a
AK		 701 case KVM_CAP_VAPIC:
702 r = !kvm_x86_ops->cpu_has_accelerated_tpr();
703 break;
018d00d2
ZX		 704 default:
705 r = 0;
706 break;
707 }
708 return r;
709
710}
711
043405e1
CO		 712long kvm_arch_dev_ioctl(struct file *filp,
713 unsigned int ioctl, unsigned long arg)
714{
715 void __user *argp = (void __user *)arg;
716 long r;
717
718 switch (ioctl) {
719 case KVM_GET_MSR_INDEX_LIST: {
720 struct kvm_msr_list __user *user_msr_list = argp;
721 struct kvm_msr_list msr_list;
722 unsigned n;
723
724 r = -EFAULT;
725 if (copy_from_user(&msr_list, user_msr_list, sizeof msr_list))
726 goto out;
727 n = msr_list.nmsrs;
728 msr_list.nmsrs = num_msrs_to_save + ARRAY_SIZE(emulated_msrs);
729 if (copy_to_user(user_msr_list, &msr_list, sizeof msr_list))
730 goto out;
731 r = -E2BIG;
732 if (n < num_msrs_to_save)
733 goto out;
734 r = -EFAULT;
735 if (copy_to_user(user_msr_list->indices, &msrs_to_save,
736 num_msrs_to_save * sizeof(u32)))
737 goto out;
738 if (copy_to_user(user_msr_list->indices
739 + num_msrs_to_save * sizeof(u32),
740 &emulated_msrs,
741 ARRAY_SIZE(emulated_msrs) * sizeof(u32)))
742 goto out;
743 r = 0;
744 break;
745 }
674eea0f
AK		 746 case KVM_GET_SUPPORTED_CPUID: {
747 struct kvm_cpuid2 __user *cpuid_arg = argp;
748 struct kvm_cpuid2 cpuid;
749
750 r = -EFAULT;
751 if (copy_from_user(&cpuid, cpuid_arg, sizeof cpuid))
752 goto out;
753 r = kvm_dev_ioctl_get_supported_cpuid(&cpuid,
754 cpuid_arg->entries);
755 if (r)
756 goto out;
757
758 r = -EFAULT;
759 if (copy_to_user(cpuid_arg, &cpuid, sizeof cpuid))
760 goto out;
761 r = 0;
762 break;
763 }
043405e1
CO		 764 default:
765 r = -EINVAL;
766 }
767out:
768 return r;
769}
770
313a3dc7
CO		 771void kvm_arch_vcpu_load(struct kvm_vcpu *vcpu, int cpu)
772{
773 kvm_x86_ops->vcpu_load(vcpu, cpu);
774}
775
776void kvm_arch_vcpu_put(struct kvm_vcpu *vcpu)
777{
778 kvm_x86_ops->vcpu_put(vcpu);
9327fd11 779 kvm_put_guest_fpu(vcpu);
313a3dc7
CO		 780}
781
07716717 782static int is_efer_nx(void)
313a3dc7
CO		 783{
784 u64 efer;
313a3dc7
CO		 785
786 rdmsrl(MSR_EFER, efer);
07716717
DK		 787 return efer & EFER_NX;
788}
789
790static void cpuid_fix_nx_cap(struct kvm_vcpu *vcpu)
791{
792 int i;
793 struct kvm_cpuid_entry2 *e, *entry;
794
313a3dc7 795 entry = NULL;
ad312c7c
ZX		 796 for (i = 0; i < vcpu->arch.cpuid_nent; ++i) {
797 e = &vcpu->arch.cpuid_entries[i];
313a3dc7
CO		 798 if (e->function == 0x80000001) {
799 entry = e;
800 break;
801 }
802 }
07716717 803 if (entry && (entry->edx & (1 << 20)) && !is_efer_nx()) {
313a3dc7
CO		 804 entry->edx &= ~(1 << 20);
805 printk(KERN_INFO "kvm: guest NX capability removed\n");
806 }
807}
808
07716717 809/* when an old userspace process fills a new kernel module */
313a3dc7
CO		 810static int kvm_vcpu_ioctl_set_cpuid(struct kvm_vcpu *vcpu,
811 struct kvm_cpuid *cpuid,
812 struct kvm_cpuid_entry __user *entries)
07716717
DK		 813{
814 int r, i;
815 struct kvm_cpuid_entry *cpuid_entries;
816
817 r = -E2BIG;
818 if (cpuid->nent > KVM_MAX_CPUID_ENTRIES)
819 goto out;
820 r = -ENOMEM;
821 cpuid_entries = vmalloc(sizeof(struct kvm_cpuid_entry) * cpuid->nent);
822 if (!cpuid_entries)
823 goto out;
824 r = -EFAULT;
825 if (copy_from_user(cpuid_entries, entries,
826 cpuid->nent * sizeof(struct kvm_cpuid_entry)))
827 goto out_free;
828 for (i = 0; i < cpuid->nent; i++) {
ad312c7c
ZX		 829 vcpu->arch.cpuid_entries[i].function = cpuid_entries[i].function;
830 vcpu->arch.cpuid_entries[i].eax = cpuid_entries[i].eax;
831 vcpu->arch.cpuid_entries[i].ebx = cpuid_entries[i].ebx;
832 vcpu->arch.cpuid_entries[i].ecx = cpuid_entries[i].ecx;
833 vcpu->arch.cpuid_entries[i].edx = cpuid_entries[i].edx;
834 vcpu->arch.cpuid_entries[i].index = 0;
835 vcpu->arch.cpuid_entries[i].flags = 0;
836 vcpu->arch.cpuid_entries[i].padding[0] = 0;
837 vcpu->arch.cpuid_entries[i].padding[1] = 0;
838 vcpu->arch.cpuid_entries[i].padding[2] = 0;
839 }
840 vcpu->arch.cpuid_nent = cpuid->nent;
07716717
DK		 841 cpuid_fix_nx_cap(vcpu);
842 r = 0;
843
844out_free:
845 vfree(cpuid_entries);
846out:
847 return r;
848}
849
850static int kvm_vcpu_ioctl_set_cpuid2(struct kvm_vcpu *vcpu,
851 struct kvm_cpuid2 *cpuid,
852 struct kvm_cpuid_entry2 __user *entries)
313a3dc7
CO		 853{
854 int r;
855
856 r = -E2BIG;
857 if (cpuid->nent > KVM_MAX_CPUID_ENTRIES)
858 goto out;
859 r = -EFAULT;
ad312c7c 860 if (copy_from_user(&vcpu->arch.cpuid_entries, entries,
07716717 861 cpuid->nent * sizeof(struct kvm_cpuid_entry2)))
313a3dc7 862 goto out;
ad312c7c 863 vcpu->arch.cpuid_nent = cpuid->nent;
313a3dc7
CO		 864 return 0;
865
866out:
867 return r;
868}
869
07716717
DK		 870static int kvm_vcpu_ioctl_get_cpuid2(struct kvm_vcpu *vcpu,
871 struct kvm_cpuid2 *cpuid,
872 struct kvm_cpuid_entry2 __user *entries)
873{
874 int r;
875
876 r = -E2BIG;
ad312c7c 877 if (cpuid->nent < vcpu->arch.cpuid_nent)
07716717
DK		 878 goto out;
879 r = -EFAULT;
ad312c7c
ZX		 880 if (copy_to_user(entries, &vcpu->arch.cpuid_entries,
881 vcpu->arch.cpuid_nent * sizeof(struct kvm_cpuid_entry2)))
07716717
DK		 882 goto out;
883 return 0;
884
885out:
ad312c7c 886 cpuid->nent = vcpu->arch.cpuid_nent;
07716717
DK		 887 return r;
888}
889
890static inline u32 bit(int bitno)
891{
892 return 1 << (bitno & 31);
893}
894
895static void do_cpuid_1_ent(struct kvm_cpuid_entry2 *entry, u32 function,
896 u32 index)
897{
898 entry->function = function;
899 entry->index = index;
900 cpuid_count(entry->function, entry->index,
901 &entry->eax, &entry->ebx, &entry->ecx, &entry->edx);
902 entry->flags = 0;
903}
904
905static void do_cpuid_ent(struct kvm_cpuid_entry2 *entry, u32 function,
906 u32 index, int *nent, int maxnent)
907{
908 const u32 kvm_supported_word0_x86_features = bit(X86_FEATURE_FPU) |
909 bit(X86_FEATURE_VME) | bit(X86_FEATURE_DE) |
910 bit(X86_FEATURE_PSE) | bit(X86_FEATURE_TSC) |
911 bit(X86_FEATURE_MSR) | bit(X86_FEATURE_PAE) |
912 bit(X86_FEATURE_CX8) | bit(X86_FEATURE_APIC) |
913 bit(X86_FEATURE_SEP) | bit(X86_FEATURE_PGE) |
914 bit(X86_FEATURE_CMOV) | bit(X86_FEATURE_PSE36) |
915 bit(X86_FEATURE_CLFLSH) | bit(X86_FEATURE_MMX) |
916 bit(X86_FEATURE_FXSR) | bit(X86_FEATURE_XMM) |
917 bit(X86_FEATURE_XMM2) | bit(X86_FEATURE_SELFSNOOP);
918 const u32 kvm_supported_word1_x86_features = bit(X86_FEATURE_FPU) |
919 bit(X86_FEATURE_VME) | bit(X86_FEATURE_DE) |
920 bit(X86_FEATURE_PSE) | bit(X86_FEATURE_TSC) |
921 bit(X86_FEATURE_MSR) | bit(X86_FEATURE_PAE) |
922 bit(X86_FEATURE_CX8) | bit(X86_FEATURE_APIC) |
923 bit(X86_FEATURE_PGE) |
924 bit(X86_FEATURE_CMOV) | bit(X86_FEATURE_PSE36) |
925 bit(X86_FEATURE_MMX) | bit(X86_FEATURE_FXSR) |
926 bit(X86_FEATURE_SYSCALL) |
927 (bit(X86_FEATURE_NX) && is_efer_nx()) |
928#ifdef CONFIG_X86_64
929 bit(X86_FEATURE_LM) |
930#endif
931 bit(X86_FEATURE_MMXEXT) |
932 bit(X86_FEATURE_3DNOWEXT) |
933 bit(X86_FEATURE_3DNOW);
934 const u32 kvm_supported_word3_x86_features =
935 bit(X86_FEATURE_XMM3) | bit(X86_FEATURE_CX16);
936 const u32 kvm_supported_word6_x86_features =
937 bit(X86_FEATURE_LAHF_LM) | bit(X86_FEATURE_CMP_LEGACY);
938
939 /* all func 2 cpuid_count() should be called on the same cpu */
940 get_cpu();
941 do_cpuid_1_ent(entry, function, index);
942 ++*nent;
943
944 switch (function) {
945 case 0:
946 entry->eax = min(entry->eax, (u32)0xb);
947 break;
948 case 1:
949 entry->edx &= kvm_supported_word0_x86_features;
950 entry->ecx &= kvm_supported_word3_x86_features;
951 break;
952 /* function 2 entries are STATEFUL. That is, repeated cpuid commands
953 * may return different values. This forces us to get_cpu() before
954 * issuing the first command, and also to emulate this annoying behavior
955 * in kvm_emulate_cpuid() using KVM_CPUID_FLAG_STATE_READ_NEXT */
956 case 2: {
957 int t, times = entry->eax & 0xff;
958
959 entry->flags |= KVM_CPUID_FLAG_STATEFUL_FUNC;
960 for (t = 1; t < times && *nent < maxnent; ++t) {
961 do_cpuid_1_ent(&entry[t], function, 0);
962 entry[t].flags |= KVM_CPUID_FLAG_STATEFUL_FUNC;
963 ++*nent;
964 }
965 break;
966 }
967 /* function 4 and 0xb have additional index. */
968 case 4: {
969 int index, cache_type;
970
971 entry->flags |= KVM_CPUID_FLAG_SIGNIFCANT_INDEX;
972 /* read more entries until cache_type is zero */
973 for (index = 1; *nent < maxnent; ++index) {
974 cache_type = entry[index - 1].eax & 0x1f;
975 if (!cache_type)
976 break;
977 do_cpuid_1_ent(&entry[index], function, index);
978 entry[index].flags |=
979 KVM_CPUID_FLAG_SIGNIFCANT_INDEX;
980 ++*nent;
981 }
982 break;
983 }
984 case 0xb: {
985 int index, level_type;
986
987 entry->flags |= KVM_CPUID_FLAG_SIGNIFCANT_INDEX;
988 /* read more entries until level_type is zero */
989 for (index = 1; *nent < maxnent; ++index) {
990 level_type = entry[index - 1].ecx & 0xff;
991 if (!level_type)
992 break;
993 do_cpuid_1_ent(&entry[index], function, index);
994 entry[index].flags |=
995 KVM_CPUID_FLAG_SIGNIFCANT_INDEX;
996 ++*nent;
997 }
998 break;
999 }
1000 case 0x80000000:
1001 entry->eax = min(entry->eax, 0x8000001a);
1002 break;
1003 case 0x80000001:
1004 entry->edx &= kvm_supported_word1_x86_features;
1005 entry->ecx &= kvm_supported_word6_x86_features;
1006 break;
1007 }
1008 put_cpu();
1009}
1010
674eea0f 1011static int kvm_dev_ioctl_get_supported_cpuid(struct kvm_cpuid2 *cpuid,
07716717
DK		 1012 struct kvm_cpuid_entry2 __user *entries)
1013{
1014 struct kvm_cpuid_entry2 *cpuid_entries;
1015 int limit, nent = 0, r = -E2BIG;
1016 u32 func;
1017
1018 if (cpuid->nent < 1)
1019 goto out;
1020 r = -ENOMEM;
1021 cpuid_entries = vmalloc(sizeof(struct kvm_cpuid_entry2) * cpuid->nent);
1022 if (!cpuid_entries)
1023 goto out;
1024
1025 do_cpuid_ent(&cpuid_entries[0], 0, 0, &nent, cpuid->nent);
1026 limit = cpuid_entries[0].eax;
1027 for (func = 1; func <= limit && nent < cpuid->nent; ++func)
1028 do_cpuid_ent(&cpuid_entries[nent], func, 0,
1029 &nent, cpuid->nent);
1030 r = -E2BIG;
1031 if (nent >= cpuid->nent)
1032 goto out_free;
1033
1034 do_cpuid_ent(&cpuid_entries[nent], 0x80000000, 0, &nent, cpuid->nent);
1035 limit = cpuid_entries[nent - 1].eax;
1036 for (func = 0x80000001; func <= limit && nent < cpuid->nent; ++func)
1037 do_cpuid_ent(&cpuid_entries[nent], func, 0,
1038 &nent, cpuid->nent);
1039 r = -EFAULT;
1040 if (copy_to_user(entries, cpuid_entries,
1041 nent * sizeof(struct kvm_cpuid_entry2)))
1042 goto out_free;
1043 cpuid->nent = nent;
1044 r = 0;
1045
1046out_free:
1047 vfree(cpuid_entries);
1048out:
1049 return r;
1050}
1051
313a3dc7
CO		 1052static int kvm_vcpu_ioctl_get_lapic(struct kvm_vcpu *vcpu,
1053 struct kvm_lapic_state *s)
1054{
1055 vcpu_load(vcpu);
ad312c7c 1056 memcpy(s->regs, vcpu->arch.apic->regs, sizeof *s);
313a3dc7
CO		 1057 vcpu_put(vcpu);
1058
1059 return 0;
1060}
1061
1062static int kvm_vcpu_ioctl_set_lapic(struct kvm_vcpu *vcpu,
1063 struct kvm_lapic_state *s)
1064{
1065 vcpu_load(vcpu);
ad312c7c 1066 memcpy(vcpu->arch.apic->regs, s->regs, sizeof *s);
313a3dc7
CO		 1067 kvm_apic_post_state_restore(vcpu);
1068 vcpu_put(vcpu);
1069
1070 return 0;
1071}
1072
f77bc6a4
ZX		 1073static int kvm_vcpu_ioctl_interrupt(struct kvm_vcpu *vcpu,
1074 struct kvm_interrupt *irq)
1075{
1076 if (irq->irq < 0 || irq->irq >= 256)
1077 return -EINVAL;
1078 if (irqchip_in_kernel(vcpu->kvm))
1079 return -ENXIO;
1080 vcpu_load(vcpu);
1081
ad312c7c
ZX		 1082 set_bit(irq->irq, vcpu->arch.irq_pending);
1083 set_bit(irq->irq / BITS_PER_LONG, &vcpu->arch.irq_summary);
f77bc6a4
ZX		 1084
1085 vcpu_put(vcpu);
1086
1087 return 0;
1088}
1089
b209749f
AK		 1090static int vcpu_ioctl_tpr_access_reporting(struct kvm_vcpu *vcpu,
1091 struct kvm_tpr_access_ctl *tac)
1092{
1093 if (tac->flags)
1094 return -EINVAL;
1095 vcpu->arch.tpr_access_reporting = !!tac->enabled;
1096 return 0;
1097}
1098
313a3dc7
CO		 1099long kvm_arch_vcpu_ioctl(struct file *filp,
1100 unsigned int ioctl, unsigned long arg)
1101{
1102 struct kvm_vcpu *vcpu = filp->private_data;
1103 void __user *argp = (void __user *)arg;
1104 int r;
1105
1106 switch (ioctl) {
1107 case KVM_GET_LAPIC: {
1108 struct kvm_lapic_state lapic;
1109
1110 memset(&lapic, 0, sizeof lapic);
1111 r = kvm_vcpu_ioctl_get_lapic(vcpu, &lapic);
1112 if (r)
1113 goto out;
1114 r = -EFAULT;
1115 if (copy_to_user(argp, &lapic, sizeof lapic))
1116 goto out;
1117 r = 0;
1118 break;
1119 }
1120 case KVM_SET_LAPIC: {
1121 struct kvm_lapic_state lapic;
1122
1123 r = -EFAULT;
1124 if (copy_from_user(&lapic, argp, sizeof lapic))
1125 goto out;
1126 r = kvm_vcpu_ioctl_set_lapic(vcpu, &lapic);;
1127 if (r)
1128 goto out;
1129 r = 0;
1130 break;
1131 }
f77bc6a4
ZX		 1132 case KVM_INTERRUPT: {
1133 struct kvm_interrupt irq;
1134
1135 r = -EFAULT;
1136 if (copy_from_user(&irq, argp, sizeof irq))
1137 goto out;
1138 r = kvm_vcpu_ioctl_interrupt(vcpu, &irq);
1139 if (r)
1140 goto out;
1141 r = 0;
1142 break;
1143 }
313a3dc7
CO		 1144 case KVM_SET_CPUID: {
1145 struct kvm_cpuid __user *cpuid_arg = argp;
1146 struct kvm_cpuid cpuid;
1147
1148 r = -EFAULT;
1149 if (copy_from_user(&cpuid, cpuid_arg, sizeof cpuid))
1150 goto out;
1151 r = kvm_vcpu_ioctl_set_cpuid(vcpu, &cpuid, cpuid_arg->entries);
1152 if (r)
1153 goto out;
1154 break;
1155 }
07716717
DK		 1156 case KVM_SET_CPUID2: {
1157 struct kvm_cpuid2 __user *cpuid_arg = argp;
1158 struct kvm_cpuid2 cpuid;
1159
1160 r = -EFAULT;
1161 if (copy_from_user(&cpuid, cpuid_arg, sizeof cpuid))
1162 goto out;
1163 r = kvm_vcpu_ioctl_set_cpuid2(vcpu, &cpuid,
1164 cpuid_arg->entries);
1165 if (r)
1166 goto out;
1167 break;
1168 }
1169 case KVM_GET_CPUID2: {
1170 struct kvm_cpuid2 __user *cpuid_arg = argp;
1171 struct kvm_cpuid2 cpuid;
1172
1173 r = -EFAULT;
1174 if (copy_from_user(&cpuid, cpuid_arg, sizeof cpuid))
1175 goto out;
1176 r = kvm_vcpu_ioctl_get_cpuid2(vcpu, &cpuid,
1177 cpuid_arg->entries);
1178 if (r)
1179 goto out;
1180 r = -EFAULT;
1181 if (copy_to_user(cpuid_arg, &cpuid, sizeof cpuid))
1182 goto out;
1183 r = 0;
1184 break;
1185 }
313a3dc7
CO		 1186 case KVM_GET_MSRS:
1187 r = msr_io(vcpu, argp, kvm_get_msr, 1);
1188 break;
1189 case KVM_SET_MSRS:
1190 r = msr_io(vcpu, argp, do_set_msr, 0);
1191 break;
b209749f
AK		 1192 case KVM_TPR_ACCESS_REPORTING: {
1193 struct kvm_tpr_access_ctl tac;
1194
1195 r = -EFAULT;
1196 if (copy_from_user(&tac, argp, sizeof tac))
1197 goto out;
1198 r = vcpu_ioctl_tpr_access_reporting(vcpu, &tac);
1199 if (r)
1200 goto out;
1201 r = -EFAULT;
1202 if (copy_to_user(argp, &tac, sizeof tac))
1203 goto out;
1204 r = 0;
1205 break;
1206 };
b93463aa
AK		 1207 case KVM_SET_VAPIC_ADDR: {
1208 struct kvm_vapic_addr va;
1209
1210 r = -EINVAL;
1211 if (!irqchip_in_kernel(vcpu->kvm))
1212 goto out;
1213 r = -EFAULT;
1214 if (copy_from_user(&va, argp, sizeof va))
1215 goto out;
1216 r = 0;
1217 kvm_lapic_set_vapic_addr(vcpu, va.vapic_addr);
1218 break;
1219 }
313a3dc7
CO		 1220 default:
1221 r = -EINVAL;
1222 }
1223out:
1224 return r;
1225}
1226
1fe779f8
CO		 1227static int kvm_vm_ioctl_set_tss_addr(struct kvm *kvm, unsigned long addr)
1228{
1229 int ret;
1230
1231 if (addr > (unsigned int)(-3 * PAGE_SIZE))
1232 return -1;
1233 ret = kvm_x86_ops->set_tss_addr(kvm, addr);
1234 return ret;
1235}
1236
1237static int kvm_vm_ioctl_set_nr_mmu_pages(struct kvm *kvm,
1238 u32 kvm_nr_mmu_pages)
1239{
1240 if (kvm_nr_mmu_pages < KVM_MIN_ALLOC_MMU_PAGES)
1241 return -EINVAL;
1242
72dc67a6 1243 down_write(&kvm->slots_lock);
1fe779f8
CO		 1244
1245 kvm_mmu_change_mmu_pages(kvm, kvm_nr_mmu_pages);
f05e70ac 1246 kvm->arch.n_requested_mmu_pages = kvm_nr_mmu_pages;
1fe779f8 1247
72dc67a6 1248 up_write(&kvm->slots_lock);
1fe779f8
CO		 1249 return 0;
1250}
1251
1252static int kvm_vm_ioctl_get_nr_mmu_pages(struct kvm *kvm)
1253{
f05e70ac 1254 return kvm->arch.n_alloc_mmu_pages;
1fe779f8
CO		 1255}
1256
e9f85cde
ZX		 1257gfn_t unalias_gfn(struct kvm *kvm, gfn_t gfn)
1258{
1259 int i;
1260 struct kvm_mem_alias *alias;
1261
d69fb81f
ZX		 1262 for (i = 0; i < kvm->arch.naliases; ++i) {
1263 alias = &kvm->arch.aliases[i];
e9f85cde
ZX		 1264 if (gfn >= alias->base_gfn
1265 && gfn < alias->base_gfn + alias->npages)
1266 return alias->target_gfn + gfn - alias->base_gfn;
1267 }
1268 return gfn;
1269}
1270
1fe779f8
CO		 1271/*
1272 * Set a new alias region. Aliases map a portion of physical memory into
1273 * another portion. This is useful for memory windows, for example the PC
1274 * VGA region.
1275 */
1276static int kvm_vm_ioctl_set_memory_alias(struct kvm *kvm,
1277 struct kvm_memory_alias *alias)
1278{
1279 int r, n;
1280 struct kvm_mem_alias *p;
1281
1282 r = -EINVAL;
1283 /* General sanity checks */
1284 if (alias->memory_size & (PAGE_SIZE - 1))
1285 goto out;
1286 if (alias->guest_phys_addr & (PAGE_SIZE - 1))
1287 goto out;
1288 if (alias->slot >= KVM_ALIAS_SLOTS)
1289 goto out;
1290 if (alias->guest_phys_addr + alias->memory_size
1291 < alias->guest_phys_addr)
1292 goto out;
1293 if (alias->target_phys_addr + alias->memory_size
1294 < alias->target_phys_addr)
1295 goto out;
1296
72dc67a6 1297 down_write(&kvm->slots_lock);
1fe779f8 1298
d69fb81f 1299 p = &kvm->arch.aliases[alias->slot];
1fe779f8
CO		 1300 p->base_gfn = alias->guest_phys_addr >> PAGE_SHIFT;
1301 p->npages = alias->memory_size >> PAGE_SHIFT;
1302 p->target_gfn = alias->target_phys_addr >> PAGE_SHIFT;
1303
1304 for (n = KVM_ALIAS_SLOTS; n > 0; --n)
d69fb81f 1305 if (kvm->arch.aliases[n - 1].npages)
1fe779f8 1306 break;
d69fb81f 1307 kvm->arch.naliases = n;
1fe779f8
CO		 1308
1309 kvm_mmu_zap_all(kvm);
1310
72dc67a6 1311 up_write(&kvm->slots_lock);
1fe779f8
CO		 1312
1313 return 0;
1314
1315out:
1316 return r;
1317}
1318
1319static int kvm_vm_ioctl_get_irqchip(struct kvm *kvm, struct kvm_irqchip *chip)
1320{
1321 int r;
1322
1323 r = 0;
1324 switch (chip->chip_id) {
1325 case KVM_IRQCHIP_PIC_MASTER:
1326 memcpy(&chip->chip.pic,
1327 &pic_irqchip(kvm)->pics[0],
1328 sizeof(struct kvm_pic_state));
1329 break;
1330 case KVM_IRQCHIP_PIC_SLAVE:
1331 memcpy(&chip->chip.pic,
1332 &pic_irqchip(kvm)->pics[1],
1333 sizeof(struct kvm_pic_state));
1334 break;
1335 case KVM_IRQCHIP_IOAPIC:
1336 memcpy(&chip->chip.ioapic,
1337 ioapic_irqchip(kvm),
1338 sizeof(struct kvm_ioapic_state));
1339 break;
1340 default:
1341 r = -EINVAL;
1342 break;
1343 }
1344 return r;
1345}
1346
1347static int kvm_vm_ioctl_set_irqchip(struct kvm *kvm, struct kvm_irqchip *chip)
1348{
1349 int r;
1350
1351 r = 0;
1352 switch (chip->chip_id) {
1353 case KVM_IRQCHIP_PIC_MASTER:
1354 memcpy(&pic_irqchip(kvm)->pics[0],
1355 &chip->chip.pic,
1356 sizeof(struct kvm_pic_state));
1357 break;
1358 case KVM_IRQCHIP_PIC_SLAVE:
1359 memcpy(&pic_irqchip(kvm)->pics[1],
1360 &chip->chip.pic,
1361 sizeof(struct kvm_pic_state));
1362 break;
1363 case KVM_IRQCHIP_IOAPIC:
1364 memcpy(ioapic_irqchip(kvm),
1365 &chip->chip.ioapic,
1366 sizeof(struct kvm_ioapic_state));
1367 break;
1368 default:
1369 r = -EINVAL;
1370 break;
1371 }
1372 kvm_pic_update_irq(pic_irqchip(kvm));
1373 return r;
1374}
1375
5bb064dc
ZX		 1376/*
1377 * Get (and clear) the dirty memory log for a memory slot.
1378 */
1379int kvm_vm_ioctl_get_dirty_log(struct kvm *kvm,
1380 struct kvm_dirty_log *log)
1381{
1382 int r;
1383 int n;
1384 struct kvm_memory_slot *memslot;
1385 int is_dirty = 0;
1386
72dc67a6 1387 down_write(&kvm->slots_lock);
5bb064dc
ZX		 1388
1389 r = kvm_get_dirty_log(kvm, log, &is_dirty);
1390 if (r)
1391 goto out;
1392
1393 /* If nothing is dirty, don't bother messing with page tables. */
1394 if (is_dirty) {
1395 kvm_mmu_slot_remove_write_access(kvm, log->slot);
1396 kvm_flush_remote_tlbs(kvm);
1397 memslot = &kvm->memslots[log->slot];
1398 n = ALIGN(memslot->npages, BITS_PER_LONG) / 8;
1399 memset(memslot->dirty_bitmap, 0, n);
1400 }
1401 r = 0;
1402out:
72dc67a6 1403 up_write(&kvm->slots_lock);
5bb064dc
ZX		 1404 return r;
1405}
1406
1fe779f8
CO		 1407long kvm_arch_vm_ioctl(struct file *filp,
1408 unsigned int ioctl, unsigned long arg)
1409{
1410 struct kvm *kvm = filp->private_data;
1411 void __user *argp = (void __user *)arg;
1412 int r = -EINVAL;
1413
1414 switch (ioctl) {
1415 case KVM_SET_TSS_ADDR:
1416 r = kvm_vm_ioctl_set_tss_addr(kvm, arg);
1417 if (r < 0)
1418 goto out;
1419 break;
1420 case KVM_SET_MEMORY_REGION: {
1421 struct kvm_memory_region kvm_mem;
1422 struct kvm_userspace_memory_region kvm_userspace_mem;
1423
1424 r = -EFAULT;
1425 if (copy_from_user(&kvm_mem, argp, sizeof kvm_mem))
1426 goto out;
1427 kvm_userspace_mem.slot = kvm_mem.slot;
1428 kvm_userspace_mem.flags = kvm_mem.flags;
1429 kvm_userspace_mem.guest_phys_addr = kvm_mem.guest_phys_addr;
1430 kvm_userspace_mem.memory_size = kvm_mem.memory_size;
1431 r = kvm_vm_ioctl_set_memory_region(kvm, &kvm_userspace_mem, 0);
1432 if (r)
1433 goto out;
1434 break;
1435 }
1436 case KVM_SET_NR_MMU_PAGES:
1437 r = kvm_vm_ioctl_set_nr_mmu_pages(kvm, arg);
1438 if (r)
1439 goto out;
1440 break;
1441 case KVM_GET_NR_MMU_PAGES:
1442 r = kvm_vm_ioctl_get_nr_mmu_pages(kvm);
1443 break;
1444 case KVM_SET_MEMORY_ALIAS: {
1445 struct kvm_memory_alias alias;
1446
1447 r = -EFAULT;
1448 if (copy_from_user(&alias, argp, sizeof alias))
1449 goto out;
1450 r = kvm_vm_ioctl_set_memory_alias(kvm, &alias);
1451 if (r)
1452 goto out;
1453 break;
1454 }
1455 case KVM_CREATE_IRQCHIP:
1456 r = -ENOMEM;
d7deeeb0
ZX		 1457 kvm->arch.vpic = kvm_create_pic(kvm);
1458 if (kvm->arch.vpic) {
1fe779f8
CO		 1459 r = kvm_ioapic_init(kvm);
1460 if (r) {
d7deeeb0
ZX		 1461 kfree(kvm->arch.vpic);
1462 kvm->arch.vpic = NULL;
1fe779f8
CO		 1463 goto out;
1464 }
1465 } else
1466 goto out;
1467 break;
1468 case KVM_IRQ_LINE: {
1469 struct kvm_irq_level irq_event;
1470
1471 r = -EFAULT;
1472 if (copy_from_user(&irq_event, argp, sizeof irq_event))
1473 goto out;
1474 if (irqchip_in_kernel(kvm)) {
1475 mutex_lock(&kvm->lock);
1476 if (irq_event.irq < 16)
1477 kvm_pic_set_irq(pic_irqchip(kvm),
1478 irq_event.irq,
1479 irq_event.level);
d7deeeb0 1480 kvm_ioapic_set_irq(kvm->arch.vioapic,
1fe779f8
CO		 1481 irq_event.irq,
1482 irq_event.level);
1483 mutex_unlock(&kvm->lock);
1484 r = 0;
1485 }
1486 break;
1487 }
1488 case KVM_GET_IRQCHIP: {
1489 /* 0: PIC master, 1: PIC slave, 2: IOAPIC */
1490 struct kvm_irqchip chip;
1491
1492 r = -EFAULT;
1493 if (copy_from_user(&chip, argp, sizeof chip))
1494 goto out;
1495 r = -ENXIO;
1496 if (!irqchip_in_kernel(kvm))
1497 goto out;
1498 r = kvm_vm_ioctl_get_irqchip(kvm, &chip);
1499 if (r)
1500 goto out;
1501 r = -EFAULT;
1502 if (copy_to_user(argp, &chip, sizeof chip))
1503 goto out;
1504 r = 0;
1505 break;
1506 }
1507 case KVM_SET_IRQCHIP: {
1508 /* 0: PIC master, 1: PIC slave, 2: IOAPIC */
1509 struct kvm_irqchip chip;
1510
1511 r = -EFAULT;
1512 if (copy_from_user(&chip, argp, sizeof chip))
1513 goto out;
1514 r = -ENXIO;
1515 if (!irqchip_in_kernel(kvm))
1516 goto out;
1517 r = kvm_vm_ioctl_set_irqchip(kvm, &chip);
1518 if (r)
1519 goto out;
1520 r = 0;
1521 break;
1522 }
1523 default:
1524 ;
1525 }
1526out:
1527 return r;
1528}
1529
a16b043c 1530static void kvm_init_msr_list(void)
043405e1
CO		 1531{
1532 u32 dummy[2];
1533 unsigned i, j;
1534
1535 for (i = j = 0; i < ARRAY_SIZE(msrs_to_save); i++) {
1536 if (rdmsr_safe(msrs_to_save[i], &dummy[0], &dummy[1]) < 0)
1537 continue;
1538 if (j < i)
1539 msrs_to_save[j] = msrs_to_save[i];
1540 j++;
1541 }
1542 num_msrs_to_save = j;
1543}
1544
bbd9b64e
CO		 1545/*
1546 * Only apic need an MMIO device hook, so shortcut now..
1547 */
1548static struct kvm_io_device *vcpu_find_pervcpu_dev(struct kvm_vcpu *vcpu,
1549 gpa_t addr)
1550{
1551 struct kvm_io_device *dev;
1552
ad312c7c
ZX		 1553 if (vcpu->arch.apic) {
1554 dev = &vcpu->arch.apic->dev;
bbd9b64e
CO		 1555 if (dev->in_range(dev, addr))
1556 return dev;
1557 }
1558 return NULL;
1559}
1560
1561
1562static struct kvm_io_device *vcpu_find_mmio_dev(struct kvm_vcpu *vcpu,
1563 gpa_t addr)
1564{
1565 struct kvm_io_device *dev;
1566
1567 dev = vcpu_find_pervcpu_dev(vcpu, addr);
1568 if (dev == NULL)
1569 dev = kvm_io_bus_find_dev(&vcpu->kvm->mmio_bus, addr);
1570 return dev;
1571}
1572
1573int emulator_read_std(unsigned long addr,
1574 void *val,
1575 unsigned int bytes,
1576 struct kvm_vcpu *vcpu)
1577{
1578 void *data = val;
10589a46 1579 int r = X86EMUL_CONTINUE;
bbd9b64e 1580
72dc67a6 1581 down_read(&vcpu->kvm->slots_lock);
bbd9b64e 1582 while (bytes) {
ad312c7c 1583 gpa_t gpa = vcpu->arch.mmu.gva_to_gpa(vcpu, addr);
bbd9b64e
CO		 1584 unsigned offset = addr & (PAGE_SIZE-1);
1585 unsigned tocopy = min(bytes, (unsigned)PAGE_SIZE - offset);
1586 int ret;
1587
10589a46
MT		 1588 if (gpa == UNMAPPED_GVA) {
1589 r = X86EMUL_PROPAGATE_FAULT;
1590 goto out;
1591 }
bbd9b64e 1592 ret = kvm_read_guest(vcpu->kvm, gpa, data, tocopy);
10589a46
MT		 1593 if (ret < 0) {
1594 r = X86EMUL_UNHANDLEABLE;
1595 goto out;
1596 }
bbd9b64e
CO		 1597
1598 bytes -= tocopy;
1599 data += tocopy;
1600 addr += tocopy;
1601 }
10589a46 1602out:
72dc67a6 1603 up_read(&vcpu->kvm->slots_lock);
10589a46 1604 return r;
bbd9b64e
CO		 1605}
1606EXPORT_SYMBOL_GPL(emulator_read_std);
1607
bbd9b64e
CO		 1608static int emulator_read_emulated(unsigned long addr,
1609 void *val,
1610 unsigned int bytes,
1611 struct kvm_vcpu *vcpu)
1612{
1613 struct kvm_io_device *mmio_dev;
1614 gpa_t gpa;
1615
1616 if (vcpu->mmio_read_completed) {
1617 memcpy(val, vcpu->mmio_data, bytes);
1618 vcpu->mmio_read_completed = 0;
1619 return X86EMUL_CONTINUE;
1620 }
1621
72dc67a6 1622 down_read(&vcpu->kvm->slots_lock);
ad312c7c 1623 gpa = vcpu->arch.mmu.gva_to_gpa(vcpu, addr);
72dc67a6 1624 up_read(&vcpu->kvm->slots_lock);
bbd9b64e
CO		 1625
1626 /* For APIC access vmexit */
1627 if ((gpa & PAGE_MASK) == APIC_DEFAULT_PHYS_BASE)
1628 goto mmio;
1629
1630 if (emulator_read_std(addr, val, bytes, vcpu)
1631 == X86EMUL_CONTINUE)
1632 return X86EMUL_CONTINUE;
1633 if (gpa == UNMAPPED_GVA)
1634 return X86EMUL_PROPAGATE_FAULT;
1635
1636mmio:
1637 /*
1638 * Is this MMIO handled locally?
1639 */
10589a46 1640 mutex_lock(&vcpu->kvm->lock);
bbd9b64e
CO		 1641 mmio_dev = vcpu_find_mmio_dev(vcpu, gpa);
1642 if (mmio_dev) {
1643 kvm_iodevice_read(mmio_dev, gpa, bytes, val);
10589a46 1644 mutex_unlock(&vcpu->kvm->lock);
bbd9b64e
CO		 1645 return X86EMUL_CONTINUE;
1646 }
10589a46 1647 mutex_unlock(&vcpu->kvm->lock);
bbd9b64e
CO		 1648
1649 vcpu->mmio_needed = 1;
1650 vcpu->mmio_phys_addr = gpa;
1651 vcpu->mmio_size = bytes;
1652 vcpu->mmio_is_write = 0;
1653
1654 return X86EMUL_UNHANDLEABLE;
1655}
1656
1657static int emulator_write_phys(struct kvm_vcpu *vcpu, gpa_t gpa,
1658 const void *val, int bytes)
1659{
1660 int ret;
1661
72dc67a6 1662 down_read(&vcpu->kvm->slots_lock);
bbd9b64e 1663 ret = kvm_write_guest(vcpu->kvm, gpa, val, bytes);
10589a46 1664 if (ret < 0) {
72dc67a6 1665 up_read(&vcpu->kvm->slots_lock);
bbd9b64e 1666 return 0;
10589a46 1667 }
bbd9b64e 1668 kvm_mmu_pte_write(vcpu, gpa, val, bytes);
72dc67a6 1669 up_read(&vcpu->kvm->slots_lock);
bbd9b64e
CO		 1670 return 1;
1671}
1672
1673static int emulator_write_emulated_onepage(unsigned long addr,
1674 const void *val,
1675 unsigned int bytes,
1676 struct kvm_vcpu *vcpu)
1677{
1678 struct kvm_io_device *mmio_dev;
10589a46
MT		 1679 gpa_t gpa;
1680
72dc67a6 1681 down_read(&vcpu->kvm->slots_lock);
10589a46 1682 gpa = vcpu->arch.mmu.gva_to_gpa(vcpu, addr);
72dc67a6 1683 up_read(&vcpu->kvm->slots_lock);
bbd9b64e
CO		 1684
1685 if (gpa == UNMAPPED_GVA) {
c3c91fee 1686 kvm_inject_page_fault(vcpu, addr, 2);
bbd9b64e
CO		 1687 return X86EMUL_PROPAGATE_FAULT;
1688 }
1689
1690 /* For APIC access vmexit */
1691 if ((gpa & PAGE_MASK) == APIC_DEFAULT_PHYS_BASE)
1692 goto mmio;
1693
1694 if (emulator_write_phys(vcpu, gpa, val, bytes))
1695 return X86EMUL_CONTINUE;
1696
1697mmio:
1698 /*
1699 * Is this MMIO handled locally?
1700 */
10589a46 1701 mutex_lock(&vcpu->kvm->lock);
bbd9b64e
CO		 1702 mmio_dev = vcpu_find_mmio_dev(vcpu, gpa);
1703 if (mmio_dev) {
1704 kvm_iodevice_write(mmio_dev, gpa, bytes, val);
10589a46 1705 mutex_unlock(&vcpu->kvm->lock);
bbd9b64e
CO		 1706 return X86EMUL_CONTINUE;
1707 }
10589a46 1708 mutex_unlock(&vcpu->kvm->lock);
bbd9b64e
CO		 1709
1710 vcpu->mmio_needed = 1;
1711 vcpu->mmio_phys_addr = gpa;
1712 vcpu->mmio_size = bytes;
1713 vcpu->mmio_is_write = 1;
1714 memcpy(vcpu->mmio_data, val, bytes);
1715
1716 return X86EMUL_CONTINUE;
1717}
1718
1719int emulator_write_emulated(unsigned long addr,
1720 const void *val,
1721 unsigned int bytes,
1722 struct kvm_vcpu *vcpu)
1723{
1724 /* Crossing a page boundary? */
1725 if (((addr + bytes - 1) ^ addr) & PAGE_MASK) {
1726 int rc, now;
1727
1728 now = -addr & ~PAGE_MASK;
1729 rc = emulator_write_emulated_onepage(addr, val, now, vcpu);
1730 if (rc != X86EMUL_CONTINUE)
1731 return rc;
1732 addr += now;
1733 val += now;
1734 bytes -= now;
1735 }
1736 return emulator_write_emulated_onepage(addr, val, bytes, vcpu);
1737}
1738EXPORT_SYMBOL_GPL(emulator_write_emulated);
1739
1740static int emulator_cmpxchg_emulated(unsigned long addr,
1741 const void *old,
1742 const void *new,
1743 unsigned int bytes,
1744 struct kvm_vcpu *vcpu)
1745{
1746 static int reported;
1747
1748 if (!reported) {
1749 reported = 1;
1750 printk(KERN_WARNING "kvm: emulating exchange as write\n");
1751 }
2bacc55c
MT		 1752#ifndef CONFIG_X86_64
1753 /* guests cmpxchg8b have to be emulated atomically */
1754 if (bytes == 8) {
10589a46 1755 gpa_t gpa;
2bacc55c 1756 struct page *page;
c0b49b0d 1757 char *kaddr;
2bacc55c
MT		 1758 u64 val;
1759
72dc67a6 1760 down_read(&vcpu->kvm->slots_lock);
10589a46
MT		 1761 gpa = vcpu->arch.mmu.gva_to_gpa(vcpu, addr);
1762
2bacc55c
MT		 1763 if (gpa == UNMAPPED_GVA ||
1764 (gpa & PAGE_MASK) == APIC_DEFAULT_PHYS_BASE)
1765 goto emul_write;
1766
1767 if (((gpa + bytes - 1) & PAGE_MASK) != (gpa & PAGE_MASK))
1768 goto emul_write;
1769
1770 val = *(u64 *)new;
72dc67a6
IE		 1771
1772 down_read(&current->mm->mmap_sem);
2bacc55c 1773 page = gfn_to_page(vcpu->kvm, gpa >> PAGE_SHIFT);
72dc67a6
IE		 1774 up_read(&current->mm->mmap_sem);
1775
c0b49b0d
AM		 1776 kaddr = kmap_atomic(page, KM_USER0);
1777 set_64bit((u64 *)(kaddr + offset_in_page(gpa)), val);
1778 kunmap_atomic(kaddr, KM_USER0);
2bacc55c 1779 kvm_release_page_dirty(page);
10589a46 1780 emul_write:
72dc67a6 1781 up_read(&vcpu->kvm->slots_lock);
2bacc55c 1782 }
2bacc55c
MT		 1783#endif
1784
bbd9b64e
CO		 1785 return emulator_write_emulated(addr, new, bytes, vcpu);
1786}
1787
1788static unsigned long get_segment_base(struct kvm_vcpu *vcpu, int seg)
1789{
1790 return kvm_x86_ops->get_segment_base(vcpu, seg);
1791}
1792
1793int emulate_invlpg(struct kvm_vcpu *vcpu, gva_t address)
1794{
1795 return X86EMUL_CONTINUE;
1796}
1797
1798int emulate_clts(struct kvm_vcpu *vcpu)
1799{
ad312c7c 1800 kvm_x86_ops->set_cr0(vcpu, vcpu->arch.cr0 & ~X86_CR0_TS);
bbd9b64e
CO		 1801 return X86EMUL_CONTINUE;
1802}
1803
1804int emulator_get_dr(struct x86_emulate_ctxt *ctxt, int dr, unsigned long *dest)
1805{
1806 struct kvm_vcpu *vcpu = ctxt->vcpu;
1807
1808 switch (dr) {
1809 case 0 ... 3:
1810 *dest = kvm_x86_ops->get_dr(vcpu, dr);
1811 return X86EMUL_CONTINUE;
1812 default:
1813 pr_unimpl(vcpu, "%s: unexpected dr %u\n", __FUNCTION__, dr);
1814 return X86EMUL_UNHANDLEABLE;
1815 }
1816}
1817
1818int emulator_set_dr(struct x86_emulate_ctxt *ctxt, int dr, unsigned long value)
1819{
1820 unsigned long mask = (ctxt->mode == X86EMUL_MODE_PROT64) ? ~0ULL : ~0U;
1821 int exception;
1822
1823 kvm_x86_ops->set_dr(ctxt->vcpu, dr, value & mask, &exception);
1824 if (exception) {
1825 /* FIXME: better handling */
1826 return X86EMUL_UNHANDLEABLE;
1827 }
1828 return X86EMUL_CONTINUE;
1829}
1830
1831void kvm_report_emulation_failure(struct kvm_vcpu *vcpu, const char *context)
1832{
1833 static int reported;
1834 u8 opcodes[4];
ad312c7c 1835 unsigned long rip = vcpu->arch.rip;
bbd9b64e
CO		 1836 unsigned long rip_linear;
1837
1838 rip_linear = rip + get_segment_base(vcpu, VCPU_SREG_CS);
1839
1840 if (reported)
1841 return;
1842
1843 emulator_read_std(rip_linear, (void *)opcodes, 4, vcpu);
1844
1845 printk(KERN_ERR "emulation failed (%s) rip %lx %02x %02x %02x %02x\n",
1846 context, rip, opcodes[0], opcodes[1], opcodes[2], opcodes[3]);
1847 reported = 1;
1848}
1849EXPORT_SYMBOL_GPL(kvm_report_emulation_failure);
1850
1851struct x86_emulate_ops emulate_ops = {
1852 .read_std = emulator_read_std,
bbd9b64e
CO		 1853 .read_emulated = emulator_read_emulated,
1854 .write_emulated = emulator_write_emulated,
1855 .cmpxchg_emulated = emulator_cmpxchg_emulated,
1856};
1857
1858int emulate_instruction(struct kvm_vcpu *vcpu,
1859 struct kvm_run *run,
1860 unsigned long cr2,
1861 u16 error_code,
571008da 1862 int emulation_type)
bbd9b64e
CO		 1863{
1864 int r;
571008da 1865 struct decode_cache *c;
bbd9b64e 1866
ad312c7c 1867 vcpu->arch.mmio_fault_cr2 = cr2;
bbd9b64e
CO		 1868 kvm_x86_ops->cache_regs(vcpu);
1869
1870 vcpu->mmio_is_write = 0;
ad312c7c 1871 vcpu->arch.pio.string = 0;
bbd9b64e 1872
571008da 1873 if (!(emulation_type & EMULTYPE_NO_DECODE)) {
bbd9b64e
CO		 1874 int cs_db, cs_l;
1875 kvm_x86_ops->get_cs_db_l_bits(vcpu, &cs_db, &cs_l);
1876
ad312c7c
ZX		 1877 vcpu->arch.emulate_ctxt.vcpu = vcpu;
1878 vcpu->arch.emulate_ctxt.eflags = kvm_x86_ops->get_rflags(vcpu);
1879 vcpu->arch.emulate_ctxt.mode =
1880 (vcpu->arch.emulate_ctxt.eflags & X86_EFLAGS_VM)
bbd9b64e
CO		 1881 ? X86EMUL_MODE_REAL : cs_l
1882 ? X86EMUL_MODE_PROT64 : cs_db
1883 ? X86EMUL_MODE_PROT32 : X86EMUL_MODE_PROT16;
1884
ad312c7c
ZX		 1885 if (vcpu->arch.emulate_ctxt.mode == X86EMUL_MODE_PROT64) {
1886 vcpu->arch.emulate_ctxt.cs_base = 0;
1887 vcpu->arch.emulate_ctxt.ds_base = 0;
1888 vcpu->arch.emulate_ctxt.es_base = 0;
1889 vcpu->arch.emulate_ctxt.ss_base = 0;
bbd9b64e 1890 } else {
ad312c7c 1891 vcpu->arch.emulate_ctxt.cs_base =
bbd9b64e 1892 get_segment_base(vcpu, VCPU_SREG_CS);
ad312c7c 1893 vcpu->arch.emulate_ctxt.ds_base =
bbd9b64e 1894 get_segment_base(vcpu, VCPU_SREG_DS);
ad312c7c 1895 vcpu->arch.emulate_ctxt.es_base =
bbd9b64e 1896 get_segment_base(vcpu, VCPU_SREG_ES);
ad312c7c 1897 vcpu->arch.emulate_ctxt.ss_base =
bbd9b64e
CO		 1898 get_segment_base(vcpu, VCPU_SREG_SS);
1899 }
1900
ad312c7c 1901 vcpu->arch.emulate_ctxt.gs_base =
bbd9b64e 1902 get_segment_base(vcpu, VCPU_SREG_GS);
ad312c7c 1903 vcpu->arch.emulate_ctxt.fs_base =
bbd9b64e
CO		 1904 get_segment_base(vcpu, VCPU_SREG_FS);
1905
ad312c7c 1906 r = x86_decode_insn(&vcpu->arch.emulate_ctxt, &emulate_ops);
571008da
SY		 1907
1908 /* Reject the instructions other than VMCALL/VMMCALL when
1909 * try to emulate invalid opcode */
1910 c = &vcpu->arch.emulate_ctxt.decode;
1911 if ((emulation_type & EMULTYPE_TRAP_UD) &&
1912 (!(c->twobyte && c->b == 0x01 &&
1913 (c->modrm_reg == 0 || c->modrm_reg == 3) &&
1914 c->modrm_mod == 3 && c->modrm_rm == 1)))
1915 return EMULATE_FAIL;
1916
f2b5756b 1917 ++vcpu->stat.insn_emulation;
bbd9b64e 1918 if (r) {
f2b5756b 1919 ++vcpu->stat.insn_emulation_fail;
bbd9b64e
CO		 1920 if (kvm_mmu_unprotect_page_virt(vcpu, cr2))
1921 return EMULATE_DONE;
1922 return EMULATE_FAIL;
1923 }
1924 }
1925
ad312c7c 1926 r = x86_emulate_insn(&vcpu->arch.emulate_ctxt, &emulate_ops);
bbd9b64e 1927
ad312c7c 1928 if (vcpu->arch.pio.string)
bbd9b64e
CO		 1929 return EMULATE_DO_MMIO;
1930
1931 if ((r || vcpu->mmio_is_write) && run) {
1932 run->exit_reason = KVM_EXIT_MMIO;
1933 run->mmio.phys_addr = vcpu->mmio_phys_addr;
1934 memcpy(run->mmio.data, vcpu->mmio_data, 8);
1935 run->mmio.len = vcpu->mmio_size;
1936 run->mmio.is_write = vcpu->mmio_is_write;
1937 }
1938
1939 if (r) {
1940 if (kvm_mmu_unprotect_page_virt(vcpu, cr2))
1941 return EMULATE_DONE;
1942 if (!vcpu->mmio_needed) {
1943 kvm_report_emulation_failure(vcpu, "mmio");
1944 return EMULATE_FAIL;
1945 }
1946 return EMULATE_DO_MMIO;
1947 }
1948
1949 kvm_x86_ops->decache_regs(vcpu);
ad312c7c 1950 kvm_x86_ops->set_rflags(vcpu, vcpu->arch.emulate_ctxt.eflags);
bbd9b64e
CO		 1951
1952 if (vcpu->mmio_is_write) {
1953 vcpu->mmio_needed = 0;
1954 return EMULATE_DO_MMIO;
1955 }
1956
1957 return EMULATE_DONE;
1958}
1959EXPORT_SYMBOL_GPL(emulate_instruction);
1960
de7d789a
CO		 1961static void free_pio_guest_pages(struct kvm_vcpu *vcpu)
1962{
1963 int i;
1964
ad312c7c
ZX		 1965 for (i = 0; i < ARRAY_SIZE(vcpu->arch.pio.guest_pages); ++i)
1966 if (vcpu->arch.pio.guest_pages[i]) {
1967 kvm_release_page_dirty(vcpu->arch.pio.guest_pages[i]);
1968 vcpu->arch.pio.guest_pages[i] = NULL;
de7d789a
CO		 1969 }
1970}
1971
1972static int pio_copy_data(struct kvm_vcpu *vcpu)
1973{
ad312c7c 1974 void *p = vcpu->arch.pio_data;
de7d789a
CO		 1975 void *q;
1976 unsigned bytes;
ad312c7c 1977 int nr_pages = vcpu->arch.pio.guest_pages[1] ? 2 : 1;
de7d789a 1978
ad312c7c 1979 q = vmap(vcpu->arch.pio.guest_pages, nr_pages, VM_READ|VM_WRITE,
de7d789a
CO		 1980 PAGE_KERNEL);
1981 if (!q) {
1982 free_pio_guest_pages(vcpu);
1983 return -ENOMEM;
1984 }
ad312c7c
ZX		 1985 q += vcpu->arch.pio.guest_page_offset;
1986 bytes = vcpu->arch.pio.size * vcpu->arch.pio.cur_count;
1987 if (vcpu->arch.pio.in)
de7d789a
CO		 1988 memcpy(q, p, bytes);
1989 else
1990 memcpy(p, q, bytes);
ad312c7c 1991 q -= vcpu->arch.pio.guest_page_offset;
de7d789a
CO		 1992 vunmap(q);
1993 free_pio_guest_pages(vcpu);
1994 return 0;
1995}
1996
1997int complete_pio(struct kvm_vcpu *vcpu)
1998{
ad312c7c 1999 struct kvm_pio_request *io = &vcpu->arch.pio;
de7d789a
CO		 2000 long delta;
2001 int r;
2002
2003 kvm_x86_ops->cache_regs(vcpu);
2004
2005 if (!io->string) {
2006 if (io->in)
ad312c7c 2007 memcpy(&vcpu->arch.regs[VCPU_REGS_RAX], vcpu->arch.pio_data,
de7d789a
CO		 2008 io->size);
2009 } else {
2010 if (io->in) {
2011 r = pio_copy_data(vcpu);
2012 if (r) {
2013 kvm_x86_ops->cache_regs(vcpu);
2014 return r;
2015 }
2016 }
2017
2018 delta = 1;
2019 if (io->rep) {
2020 delta *= io->cur_count;
2021 /*
2022 * The size of the register should really depend on
2023 * current address size.
2024 */
ad312c7c 2025 vcpu->arch.regs[VCPU_REGS_RCX] -= delta;
de7d789a
CO		 2026 }
2027 if (io->down)
2028 delta = -delta;
2029 delta *= io->size;
2030 if (io->in)
ad312c7c 2031 vcpu->arch.regs[VCPU_REGS_RDI] += delta;
de7d789a 2032 else
ad312c7c 2033 vcpu->arch.regs[VCPU_REGS_RSI] += delta;
de7d789a
CO		 2034 }
2035
2036 kvm_x86_ops->decache_regs(vcpu);
2037
2038 io->count -= io->cur_count;
2039 io->cur_count = 0;
2040
2041 return 0;
2042}
2043
2044static void kernel_pio(struct kvm_io_device *pio_dev,
2045 struct kvm_vcpu *vcpu,
2046 void *pd)
2047{
2048 /* TODO: String I/O for in kernel device */
2049
2050 mutex_lock(&vcpu->kvm->lock);
ad312c7c
ZX		 2051 if (vcpu->arch.pio.in)
2052 kvm_iodevice_read(pio_dev, vcpu->arch.pio.port,
2053 vcpu->arch.pio.size,
de7d789a
CO		 2054 pd);
2055 else
ad312c7c
ZX		 2056 kvm_iodevice_write(pio_dev, vcpu->arch.pio.port,
2057 vcpu->arch.pio.size,
de7d789a
CO		 2058 pd);
2059 mutex_unlock(&vcpu->kvm->lock);
2060}
2061
2062static void pio_string_write(struct kvm_io_device *pio_dev,
2063 struct kvm_vcpu *vcpu)
2064{
ad312c7c
ZX		 2065 struct kvm_pio_request *io = &vcpu->arch.pio;
2066 void *pd = vcpu->arch.pio_data;
de7d789a
CO		 2067 int i;
2068
2069 mutex_lock(&vcpu->kvm->lock);
2070 for (i = 0; i < io->cur_count; i++) {
2071 kvm_iodevice_write(pio_dev, io->port,
2072 io->size,
2073 pd);
2074 pd += io->size;
2075 }
2076 mutex_unlock(&vcpu->kvm->lock);
2077}
2078
2079static struct kvm_io_device *vcpu_find_pio_dev(struct kvm_vcpu *vcpu,
2080 gpa_t addr)
2081{
2082 return kvm_io_bus_find_dev(&vcpu->kvm->pio_bus, addr);
2083}
2084
2085int kvm_emulate_pio(struct kvm_vcpu *vcpu, struct kvm_run *run, int in,
2086 int size, unsigned port)
2087{
2088 struct kvm_io_device *pio_dev;
2089
2090 vcpu->run->exit_reason = KVM_EXIT_IO;
2091 vcpu->run->io.direction = in ? KVM_EXIT_IO_IN : KVM_EXIT_IO_OUT;
ad312c7c 2092 vcpu->run->io.size = vcpu->arch.pio.size = size;
de7d789a 2093 vcpu->run->io.data_offset = KVM_PIO_PAGE_OFFSET * PAGE_SIZE;
ad312c7c
ZX		 2094 vcpu->run->io.count = vcpu->arch.pio.count = vcpu->arch.pio.cur_count = 1;
2095 vcpu->run->io.port = vcpu->arch.pio.port = port;
2096 vcpu->arch.pio.in = in;
2097 vcpu->arch.pio.string = 0;
2098 vcpu->arch.pio.down = 0;
2099 vcpu->arch.pio.guest_page_offset = 0;
2100 vcpu->arch.pio.rep = 0;
de7d789a
CO		 2101
2102 kvm_x86_ops->cache_regs(vcpu);
ad312c7c 2103 memcpy(vcpu->arch.pio_data, &vcpu->arch.regs[VCPU_REGS_RAX], 4);
de7d789a
CO		 2104 kvm_x86_ops->decache_regs(vcpu);
2105
2106 kvm_x86_ops->skip_emulated_instruction(vcpu);
2107
2108 pio_dev = vcpu_find_pio_dev(vcpu, port);
2109 if (pio_dev) {
ad312c7c 2110 kernel_pio(pio_dev, vcpu, vcpu->arch.pio_data);
de7d789a
CO		 2111 complete_pio(vcpu);
2112 return 1;
2113 }
2114 return 0;
2115}
2116EXPORT_SYMBOL_GPL(kvm_emulate_pio);
2117
2118int kvm_emulate_pio_string(struct kvm_vcpu *vcpu, struct kvm_run *run, int in,
2119 int size, unsigned long count, int down,
2120 gva_t address, int rep, unsigned port)
2121{
2122 unsigned now, in_page;
2123 int i, ret = 0;
2124 int nr_pages = 1;
2125 struct page *page;
2126 struct kvm_io_device *pio_dev;
2127
2128 vcpu->run->exit_reason = KVM_EXIT_IO;
2129 vcpu->run->io.direction = in ? KVM_EXIT_IO_IN : KVM_EXIT_IO_OUT;
ad312c7c 2130 vcpu->run->io.size = vcpu->arch.pio.size = size;
de7d789a 2131 vcpu->run->io.data_offset = KVM_PIO_PAGE_OFFSET * PAGE_SIZE;
ad312c7c
ZX		 2132 vcpu->run->io.count = vcpu->arch.pio.count = vcpu->arch.pio.cur_count = count;
2133 vcpu->run->io.port = vcpu->arch.pio.port = port;
2134 vcpu->arch.pio.in = in;
2135 vcpu->arch.pio.string = 1;
2136 vcpu->arch.pio.down = down;
2137 vcpu->arch.pio.guest_page_offset = offset_in_page(address);
2138 vcpu->arch.pio.rep = rep;
de7d789a
CO		 2139
2140 if (!count) {
2141 kvm_x86_ops->skip_emulated_instruction(vcpu);
2142 return 1;
2143 }
2144
2145 if (!down)
2146 in_page = PAGE_SIZE - offset_in_page(address);
2147 else
2148 in_page = offset_in_page(address) + size;
2149 now = min(count, (unsigned long)in_page / size);
2150 if (!now) {
2151 /*
2152 * String I/O straddles page boundary. Pin two guest pages
2153 * so that we satisfy atomicity constraints. Do just one
2154 * transaction to avoid complexity.
2155 */
2156 nr_pages = 2;
2157 now = 1;
2158 }
2159 if (down) {
2160 /*
2161 * String I/O in reverse. Yuck. Kill the guest, fix later.
2162 */
2163 pr_unimpl(vcpu, "guest string pio down\n");
c1a5d4f9 2164 kvm_inject_gp(vcpu, 0);
de7d789a
CO		 2165 return 1;
2166 }
2167 vcpu->run->io.count = now;
ad312c7c 2168 vcpu->arch.pio.cur_count = now;
de7d789a 2169
ad312c7c 2170 if (vcpu->arch.pio.cur_count == vcpu->arch.pio.count)
de7d789a
CO		 2171 kvm_x86_ops->skip_emulated_instruction(vcpu);
2172
2173 for (i = 0; i < nr_pages; ++i) {
72dc67a6 2174 down_read(&vcpu->kvm->slots_lock);
de7d789a 2175 page = gva_to_page(vcpu, address + i * PAGE_SIZE);
ad312c7c 2176 vcpu->arch.pio.guest_pages[i] = page;
72dc67a6 2177 up_read(&vcpu->kvm->slots_lock);
de7d789a 2178 if (!page) {
c1a5d4f9 2179 kvm_inject_gp(vcpu, 0);
de7d789a
CO		 2180 free_pio_guest_pages(vcpu);
2181 return 1;
2182 }
2183 }
2184
2185 pio_dev = vcpu_find_pio_dev(vcpu, port);
ad312c7c 2186 if (!vcpu->arch.pio.in) {
de7d789a
CO		 2187 /* string PIO write */
2188 ret = pio_copy_data(vcpu);
2189 if (ret >= 0 && pio_dev) {
2190 pio_string_write(pio_dev, vcpu);
2191 complete_pio(vcpu);
ad312c7c 2192 if (vcpu->arch.pio.count == 0)
de7d789a
CO		 2193 ret = 1;
2194 }
2195 } else if (pio_dev)
2196 pr_unimpl(vcpu, "no string pio read support yet, "
2197 "port %x size %d count %ld\n",
2198 port, size, count);
2199
2200 return ret;
2201}
2202EXPORT_SYMBOL_GPL(kvm_emulate_pio_string);
2203
f8c16bba 2204int kvm_arch_init(void *opaque)
043405e1 2205{
56c6d28a 2206 int r;
f8c16bba
ZX		 2207 struct kvm_x86_ops *ops = (struct kvm_x86_ops *)opaque;
2208
f8c16bba
ZX		 2209 if (kvm_x86_ops) {
2210 printk(KERN_ERR "kvm: already loaded the other module\n");
56c6d28a
ZX		 2211 r = -EEXIST;
2212 goto out;
f8c16bba
ZX		 2213 }
2214
2215 if (!ops->cpu_has_kvm_support()) {
2216 printk(KERN_ERR "kvm: no hardware support\n");
56c6d28a
ZX		 2217 r = -EOPNOTSUPP;
2218 goto out;
f8c16bba
ZX		 2219 }
2220 if (ops->disabled_by_bios()) {
2221 printk(KERN_ERR "kvm: disabled by bios\n");
56c6d28a
ZX		 2222 r = -EOPNOTSUPP;
2223 goto out;
f8c16bba
ZX		 2224 }
2225
97db56ce
AK		 2226 r = kvm_mmu_module_init();
2227 if (r)
2228 goto out;
2229
2230 kvm_init_msr_list();
2231
f8c16bba 2232 kvm_x86_ops = ops;
56c6d28a 2233 kvm_mmu_set_nonpresent_ptes(0ull, 0ull);
f8c16bba 2234 return 0;
56c6d28a
ZX		 2235
2236out:
56c6d28a 2237 return r;
043405e1 2238}
8776e519 2239
f8c16bba
ZX		 2240void kvm_arch_exit(void)
2241{
2242 kvm_x86_ops = NULL;
56c6d28a
ZX		 2243 kvm_mmu_module_exit();
2244}
f8c16bba 2245
8776e519
HB		 2246int kvm_emulate_halt(struct kvm_vcpu *vcpu)
2247{
2248 ++vcpu->stat.halt_exits;
2249 if (irqchip_in_kernel(vcpu->kvm)) {
ad312c7c 2250 vcpu->arch.mp_state = VCPU_MP_STATE_HALTED;
8776e519 2251 kvm_vcpu_block(vcpu);
ad312c7c 2252 if (vcpu->arch.mp_state != VCPU_MP_STATE_RUNNABLE)
8776e519
HB		 2253 return -EINTR;
2254 return 1;
2255 } else {
2256 vcpu->run->exit_reason = KVM_EXIT_HLT;
2257 return 0;
2258 }
2259}
2260EXPORT_SYMBOL_GPL(kvm_emulate_halt);
2261
2262int kvm_emulate_hypercall(struct kvm_vcpu *vcpu)
2263{
2264 unsigned long nr, a0, a1, a2, a3, ret;
2265
2266 kvm_x86_ops->cache_regs(vcpu);
2267
ad312c7c
ZX		 2268 nr = vcpu->arch.regs[VCPU_REGS_RAX];
2269 a0 = vcpu->arch.regs[VCPU_REGS_RBX];
2270 a1 = vcpu->arch.regs[VCPU_REGS_RCX];
2271 a2 = vcpu->arch.regs[VCPU_REGS_RDX];
2272 a3 = vcpu->arch.regs[VCPU_REGS_RSI];
8776e519
HB		 2273
2274 if (!is_long_mode(vcpu)) {
2275 nr &= 0xFFFFFFFF;
2276 a0 &= 0xFFFFFFFF;
2277 a1 &= 0xFFFFFFFF;
2278 a2 &= 0xFFFFFFFF;
2279 a3 &= 0xFFFFFFFF;
2280 }
2281
2282 switch (nr) {
b93463aa
AK		 2283 case KVM_HC_VAPIC_POLL_IRQ:
2284 ret = 0;
2285 break;
8776e519
HB		 2286 default:
2287 ret = -KVM_ENOSYS;
2288 break;
2289 }
ad312c7c 2290 vcpu->arch.regs[VCPU_REGS_RAX] = ret;
8776e519
HB		 2291 kvm_x86_ops->decache_regs(vcpu);
2292 return 0;
2293}
2294EXPORT_SYMBOL_GPL(kvm_emulate_hypercall);
2295
2296int kvm_fix_hypercall(struct kvm_vcpu *vcpu)
2297{
2298 char instruction[3];
2299 int ret = 0;
2300
8776e519
HB		 2301
2302 /*
2303 * Blow out the MMU to ensure that no other VCPU has an active mapping
2304 * to ensure that the updated hypercall appears atomically across all
2305 * VCPUs.
2306 */
2307 kvm_mmu_zap_all(vcpu->kvm);
2308
2309 kvm_x86_ops->cache_regs(vcpu);
2310 kvm_x86_ops->patch_hypercall(vcpu, instruction);
ad312c7c 2311 if (emulator_write_emulated(vcpu->arch.rip, instruction, 3, vcpu)
8776e519
HB		 2312 != X86EMUL_CONTINUE)
2313 ret = -EFAULT;
2314
8776e519
HB		 2315 return ret;
2316}
2317
2318static u64 mk_cr_64(u64 curr_cr, u32 new_val)
2319{
2320 return (curr_cr & ~((1ULL << 32) - 1)) | new_val;
2321}
2322
2323void realmode_lgdt(struct kvm_vcpu *vcpu, u16 limit, unsigned long base)
2324{
2325 struct descriptor_table dt = { limit, base };
2326
2327 kvm_x86_ops->set_gdt(vcpu, &dt);
2328}
2329
2330void realmode_lidt(struct kvm_vcpu *vcpu, u16 limit, unsigned long base)
2331{
2332 struct descriptor_table dt = { limit, base };
2333
2334 kvm_x86_ops->set_idt(vcpu, &dt);
2335}
2336
2337void realmode_lmsw(struct kvm_vcpu *vcpu, unsigned long msw,
2338 unsigned long *rflags)
2339{
2340 lmsw(vcpu, msw);
2341 *rflags = kvm_x86_ops->get_rflags(vcpu);
2342}
2343
2344unsigned long realmode_get_cr(struct kvm_vcpu *vcpu, int cr)
2345{
2346 kvm_x86_ops->decache_cr4_guest_bits(vcpu);
2347 switch (cr) {
2348 case 0:
ad312c7c 2349 return vcpu->arch.cr0;
8776e519 2350 case 2:
ad312c7c 2351 return vcpu->arch.cr2;
8776e519 2352 case 3:
ad312c7c 2353 return vcpu->arch.cr3;
8776e519 2354 case 4:
ad312c7c 2355 return vcpu->arch.cr4;
152ff9be
JR		 2356 case 8:
2357 return get_cr8(vcpu);
8776e519
HB		 2358 default:
2359 vcpu_printf(vcpu, "%s: unexpected cr %u\n", __FUNCTION__, cr);
2360 return 0;
2361 }
2362}
2363
2364void realmode_set_cr(struct kvm_vcpu *vcpu, int cr, unsigned long val,
2365 unsigned long *rflags)
2366{
2367 switch (cr) {
2368 case 0:
ad312c7c 2369 set_cr0(vcpu, mk_cr_64(vcpu->arch.cr0, val));
8776e519
HB		 2370 *rflags = kvm_x86_ops->get_rflags(vcpu);
2371 break;
2372 case 2:
ad312c7c 2373 vcpu->arch.cr2 = val;
8776e519
HB		 2374 break;
2375 case 3:
2376 set_cr3(vcpu, val);
2377 break;
2378 case 4:
ad312c7c 2379 set_cr4(vcpu, mk_cr_64(vcpu->arch.cr4, val));
8776e519 2380 break;
152ff9be
JR		 2381 case 8:
2382 set_cr8(vcpu, val & 0xfUL);
2383 break;
8776e519
HB		 2384 default:
2385 vcpu_printf(vcpu, "%s: unexpected cr %u\n", __FUNCTION__, cr);
2386 }
2387}
2388
07716717
DK		 2389static int move_to_next_stateful_cpuid_entry(struct kvm_vcpu *vcpu, int i)
2390{
ad312c7c
ZX		 2391 struct kvm_cpuid_entry2 *e = &vcpu->arch.cpuid_entries[i];
2392 int j, nent = vcpu->arch.cpuid_nent;
07716717
DK		 2393
2394 e->flags &= ~KVM_CPUID_FLAG_STATE_READ_NEXT;
2395 /* when no next entry is found, the current entry[i] is reselected */
2396 for (j = i + 1; j == i; j = (j + 1) % nent) {
ad312c7c 2397 struct kvm_cpuid_entry2 *ej = &vcpu->arch.cpuid_entries[j];
07716717
DK		 2398 if (ej->function == e->function) {
2399 ej->flags |= KVM_CPUID_FLAG_STATE_READ_NEXT;
2400 return j;
2401 }
2402 }
2403 return 0; /* silence gcc, even though control never reaches here */
2404}
2405
2406/* find an entry with matching function, matching index (if needed), and that
2407 * should be read next (if it's stateful) */
2408static int is_matching_cpuid_entry(struct kvm_cpuid_entry2 *e,
2409 u32 function, u32 index)
2410{
2411 if (e->function != function)
2412 return 0;
2413 if ((e->flags & KVM_CPUID_FLAG_SIGNIFCANT_INDEX) && e->index != index)
2414 return 0;
2415 if ((e->flags & KVM_CPUID_FLAG_STATEFUL_FUNC) &&
2416 !(e->flags & KVM_CPUID_FLAG_STATE_READ_NEXT))
2417 return 0;
2418 return 1;
2419}
2420
8776e519
HB		 2421void kvm_emulate_cpuid(struct kvm_vcpu *vcpu)
2422{
2423 int i;
07716717
DK		 2424 u32 function, index;
2425 struct kvm_cpuid_entry2 *e, *best;
8776e519
HB		 2426
2427 kvm_x86_ops->cache_regs(vcpu);
ad312c7c
ZX		 2428 function = vcpu->arch.regs[VCPU_REGS_RAX];
2429 index = vcpu->arch.regs[VCPU_REGS_RCX];
2430 vcpu->arch.regs[VCPU_REGS_RAX] = 0;
2431 vcpu->arch.regs[VCPU_REGS_RBX] = 0;
2432 vcpu->arch.regs[VCPU_REGS_RCX] = 0;
2433 vcpu->arch.regs[VCPU_REGS_RDX] = 0;
8776e519 2434 best = NULL;
ad312c7c
ZX		 2435 for (i = 0; i < vcpu->arch.cpuid_nent; ++i) {
2436 e = &vcpu->arch.cpuid_entries[i];
07716717
DK		 2437 if (is_matching_cpuid_entry(e, function, index)) {
2438 if (e->flags & KVM_CPUID_FLAG_STATEFUL_FUNC)
2439 move_to_next_stateful_cpuid_entry(vcpu, i);
8776e519
HB		 2440 best = e;
2441 break;
2442 }
2443 /*
2444 * Both basic or both extended?
2445 */
2446 if (((e->function ^ function) & 0x80000000) == 0)
2447 if (!best || e->function > best->function)
2448 best = e;
2449 }
2450 if (best) {
ad312c7c
ZX		 2451 vcpu->arch.regs[VCPU_REGS_RAX] = best->eax;
2452 vcpu->arch.regs[VCPU_REGS_RBX] = best->ebx;
2453 vcpu->arch.regs[VCPU_REGS_RCX] = best->ecx;
2454 vcpu->arch.regs[VCPU_REGS_RDX] = best->edx;
8776e519
HB		 2455 }
2456 kvm_x86_ops->decache_regs(vcpu);
2457 kvm_x86_ops->skip_emulated_instruction(vcpu);
2458}
2459EXPORT_SYMBOL_GPL(kvm_emulate_cpuid);
d0752060 2460
b6c7a5dc
HB		 2461/*
2462 * Check if userspace requested an interrupt window, and that the
2463 * interrupt window is open.
2464 *
2465 * No need to exit to userspace if we already have an interrupt queued.
2466 */
2467static int dm_request_for_irq_injection(struct kvm_vcpu *vcpu,
2468 struct kvm_run *kvm_run)
2469{
ad312c7c 2470 return (!vcpu->arch.irq_summary &&
b6c7a5dc 2471 kvm_run->request_interrupt_window &&
ad312c7c 2472 vcpu->arch.interrupt_window_open &&
b6c7a5dc
HB		 2473 (kvm_x86_ops->get_rflags(vcpu) & X86_EFLAGS_IF));
2474}
2475
2476static void post_kvm_run_save(struct kvm_vcpu *vcpu,
2477 struct kvm_run *kvm_run)
2478{
2479 kvm_run->if_flag = (kvm_x86_ops->get_rflags(vcpu) & X86_EFLAGS_IF) != 0;
2480 kvm_run->cr8 = get_cr8(vcpu);
2481 kvm_run->apic_base = kvm_get_apic_base(vcpu);
2482 if (irqchip_in_kernel(vcpu->kvm))
2483 kvm_run->ready_for_interrupt_injection = 1;
2484 else
2485 kvm_run->ready_for_interrupt_injection =
ad312c7c
ZX		 2486 (vcpu->arch.interrupt_window_open &&
2487 vcpu->arch.irq_summary == 0);
b6c7a5dc
HB		 2488}
2489
b93463aa
AK		 2490static void vapic_enter(struct kvm_vcpu *vcpu)
2491{
2492 struct kvm_lapic *apic = vcpu->arch.apic;
2493 struct page *page;
2494
2495 if (!apic || !apic->vapic_addr)
2496 return;
2497
10589a46 2498 down_read(&current->mm->mmap_sem);
b93463aa 2499 page = gfn_to_page(vcpu->kvm, apic->vapic_addr >> PAGE_SHIFT);
10589a46 2500 up_read(&current->mm->mmap_sem);
72dc67a6
IE		 2501
2502 vcpu->arch.apic->vapic_page = page;
b93463aa
AK		 2503}
2504
2505static void vapic_exit(struct kvm_vcpu *vcpu)
2506{
2507 struct kvm_lapic *apic = vcpu->arch.apic;
2508
2509 if (!apic || !apic->vapic_addr)
2510 return;
2511
2512 kvm_release_page_dirty(apic->vapic_page);
2513 mark_page_dirty(vcpu->kvm, apic->vapic_addr >> PAGE_SHIFT);
2514}
2515
b6c7a5dc
HB		 2516static int __vcpu_run(struct kvm_vcpu *vcpu, struct kvm_run *kvm_run)
2517{
2518 int r;
2519
ad312c7c 2520 if (unlikely(vcpu->arch.mp_state == VCPU_MP_STATE_SIPI_RECEIVED)) {
b6c7a5dc 2521 pr_debug("vcpu %d received sipi with vector # %x\n",
ad312c7c 2522 vcpu->vcpu_id, vcpu->arch.sipi_vector);
b6c7a5dc
HB		 2523 kvm_lapic_reset(vcpu);
2524 r = kvm_x86_ops->vcpu_reset(vcpu);
2525 if (r)
2526 return r;
ad312c7c 2527 vcpu->arch.mp_state = VCPU_MP_STATE_RUNNABLE;
b6c7a5dc
HB		 2528 }
2529
b93463aa
AK		 2530 vapic_enter(vcpu);
2531
b6c7a5dc
HB		 2532preempted:
2533 if (vcpu->guest_debug.enabled)
2534 kvm_x86_ops->guest_debug_pre(vcpu);
2535
2536again:
2537 r = kvm_mmu_reload(vcpu);
2538 if (unlikely(r))
2539 goto out;
2540
2f52d58c
AK		 2541 if (vcpu->requests) {
2542 if (test_and_clear_bit(KVM_REQ_MIGRATE_TIMER, &vcpu->requests))
2543 __kvm_migrate_apic_timer(vcpu);
b93463aa
AK		 2544 if (test_and_clear_bit(KVM_REQ_REPORT_TPR_ACCESS,
2545 &vcpu->requests)) {
2546 kvm_run->exit_reason = KVM_EXIT_TPR_ACCESS;
2547 r = 0;
2548 goto out;
2549 }
2f52d58c 2550 }
b93463aa 2551
b6c7a5dc
HB		 2552 kvm_inject_pending_timer_irqs(vcpu);
2553
2554 preempt_disable();
2555
2556 kvm_x86_ops->prepare_guest_switch(vcpu);
2557 kvm_load_guest_fpu(vcpu);
2558
2559 local_irq_disable();
2560
6c142801
AK		 2561 if (need_resched()) {
2562 local_irq_enable();
2563 preempt_enable();
2564 r = 1;
2565 goto out;
2566 }
2567
b6c7a5dc
HB		 2568 if (signal_pending(current)) {
2569 local_irq_enable();
2570 preempt_enable();
2571 r = -EINTR;
2572 kvm_run->exit_reason = KVM_EXIT_INTR;
2573 ++vcpu->stat.signal_exits;
2574 goto out;
2575 }
2576
ad312c7c 2577 if (vcpu->arch.exception.pending)
298101da
AK		 2578 __queue_exception(vcpu);
2579 else if (irqchip_in_kernel(vcpu->kvm))
b6c7a5dc 2580 kvm_x86_ops->inject_pending_irq(vcpu);
eb9774f0 2581 else
b6c7a5dc
HB		 2582 kvm_x86_ops->inject_pending_vectors(vcpu, kvm_run);
2583
b93463aa
AK		 2584 kvm_lapic_sync_to_vapic(vcpu);
2585
b6c7a5dc
HB		 2586 vcpu->guest_mode = 1;
2587 kvm_guest_enter();
2588
2589 if (vcpu->requests)
2590 if (test_and_clear_bit(KVM_REQ_TLB_FLUSH, &vcpu->requests))
2591 kvm_x86_ops->tlb_flush(vcpu);
2592
2593 kvm_x86_ops->run(vcpu, kvm_run);
2594
2595 vcpu->guest_mode = 0;
2596 local_irq_enable();
2597
2598 ++vcpu->stat.exits;
2599
2600 /*
2601 * We must have an instruction between local_irq_enable() and
2602 * kvm_guest_exit(), so the timer interrupt isn't delayed by
2603 * the interrupt shadow. The stat.exits increment will do nicely.
2604 * But we need to prevent reordering, hence this barrier():
2605 */
2606 barrier();
2607
2608 kvm_guest_exit();
2609
2610 preempt_enable();
2611
2612 /*
2613 * Profile KVM exit RIPs:
2614 */
2615 if (unlikely(prof_on == KVM_PROFILING)) {
2616 kvm_x86_ops->cache_regs(vcpu);
ad312c7c 2617 profile_hit(KVM_PROFILING, (void *)vcpu->arch.rip);
b6c7a5dc
HB		 2618 }
2619
ad312c7c
ZX		 2620 if (vcpu->arch.exception.pending && kvm_x86_ops->exception_injected(vcpu))
2621 vcpu->arch.exception.pending = false;
298101da 2622
b93463aa
AK		 2623 kvm_lapic_sync_from_vapic(vcpu);
2624
b6c7a5dc
HB		 2625 r = kvm_x86_ops->handle_exit(kvm_run, vcpu);
2626
2627 if (r > 0) {
2628 if (dm_request_for_irq_injection(vcpu, kvm_run)) {
2629 r = -EINTR;
2630 kvm_run->exit_reason = KVM_EXIT_INTR;
2631 ++vcpu->stat.request_irq_exits;
2632 goto out;
2633 }
e1beb1d3 2634 if (!need_resched())
b6c7a5dc 2635 goto again;
b6c7a5dc
HB		 2636 }
2637
2638out:
2639 if (r > 0) {
2640 kvm_resched(vcpu);
2641 goto preempted;
2642 }
2643
2644 post_kvm_run_save(vcpu, kvm_run);
2645
b93463aa
AK		 2646 vapic_exit(vcpu);
2647
b6c7a5dc
HB		 2648 return r;
2649}
2650
2651int kvm_arch_vcpu_ioctl_run(struct kvm_vcpu *vcpu, struct kvm_run *kvm_run)
2652{
2653 int r;
2654 sigset_t sigsaved;
2655
2656 vcpu_load(vcpu);
2657
ad312c7c 2658 if (unlikely(vcpu->arch.mp_state == VCPU_MP_STATE_UNINITIALIZED)) {
b6c7a5dc
HB		 2659 kvm_vcpu_block(vcpu);
2660 vcpu_put(vcpu);
2661 return -EAGAIN;
2662 }
2663
2664 if (vcpu->sigset_active)
2665 sigprocmask(SIG_SETMASK, &vcpu->sigset, &sigsaved);
2666
2667 /* re-sync apic's tpr */
2668 if (!irqchip_in_kernel(vcpu->kvm))
2669 set_cr8(vcpu, kvm_run->cr8);
2670
ad312c7c 2671 if (vcpu->arch.pio.cur_count) {
b6c7a5dc
HB		 2672 r = complete_pio(vcpu);
2673 if (r)
2674 goto out;
2675 }
2676#if CONFIG_HAS_IOMEM
2677 if (vcpu->mmio_needed) {
2678 memcpy(vcpu->mmio_data, kvm_run->mmio.data, 8);
2679 vcpu->mmio_read_completed = 1;
2680 vcpu->mmio_needed = 0;
2681 r = emulate_instruction(vcpu, kvm_run,
571008da
SY		 2682 vcpu->arch.mmio_fault_cr2, 0,
2683 EMULTYPE_NO_DECODE);
b6c7a5dc
HB		 2684 if (r == EMULATE_DO_MMIO) {
2685 /*
2686 * Read-modify-write. Back to userspace.
2687 */
2688 r = 0;
2689 goto out;
2690 }
2691 }
2692#endif
2693 if (kvm_run->exit_reason == KVM_EXIT_HYPERCALL) {
2694 kvm_x86_ops->cache_regs(vcpu);
ad312c7c 2695 vcpu->arch.regs[VCPU_REGS_RAX] = kvm_run->hypercall.ret;
b6c7a5dc
HB		 2696 kvm_x86_ops->decache_regs(vcpu);
2697 }
2698
2699 r = __vcpu_run(vcpu, kvm_run);
2700
2701out:
2702 if (vcpu->sigset_active)
2703 sigprocmask(SIG_SETMASK, &sigsaved, NULL);
2704
2705 vcpu_put(vcpu);
2706 return r;
2707}
2708
2709int kvm_arch_vcpu_ioctl_get_regs(struct kvm_vcpu *vcpu, struct kvm_regs *regs)
2710{
2711 vcpu_load(vcpu);
2712
2713 kvm_x86_ops->cache_regs(vcpu);
2714
ad312c7c
ZX		 2715 regs->rax = vcpu->arch.regs[VCPU_REGS_RAX];
2716 regs->rbx = vcpu->arch.regs[VCPU_REGS_RBX];
2717 regs->rcx = vcpu->arch.regs[VCPU_REGS_RCX];
2718 regs->rdx = vcpu->arch.regs[VCPU_REGS_RDX];
2719 regs->rsi = vcpu->arch.regs[VCPU_REGS_RSI];
2720 regs->rdi = vcpu->arch.regs[VCPU_REGS_RDI];
2721 regs->rsp = vcpu->arch.regs[VCPU_REGS_RSP];
2722 regs->rbp = vcpu->arch.regs[VCPU_REGS_RBP];
b6c7a5dc 2723#ifdef CONFIG_X86_64
ad312c7c
ZX		 2724 regs->r8 = vcpu->arch.regs[VCPU_REGS_R8];
2725 regs->r9 = vcpu->arch.regs[VCPU_REGS_R9];
2726 regs->r10 = vcpu->arch.regs[VCPU_REGS_R10];
2727 regs->r11 = vcpu->arch.regs[VCPU_REGS_R11];
2728 regs->r12 = vcpu->arch.regs[VCPU_REGS_R12];
2729 regs->r13 = vcpu->arch.regs[VCPU_REGS_R13];
2730 regs->r14 = vcpu->arch.regs[VCPU_REGS_R14];
2731 regs->r15 = vcpu->arch.regs[VCPU_REGS_R15];
b6c7a5dc
HB		 2732#endif
2733
ad312c7c 2734 regs->rip = vcpu->arch.rip;
b6c7a5dc
HB		 2735 regs->rflags = kvm_x86_ops->get_rflags(vcpu);
2736
2737 /*
2738 * Don't leak debug flags in case they were set for guest debugging
2739 */
2740 if (vcpu->guest_debug.enabled && vcpu->guest_debug.singlestep)
2741 regs->rflags &= ~(X86_EFLAGS_TF | X86_EFLAGS_RF);
2742
2743 vcpu_put(vcpu);
2744
2745 return 0;
2746}
2747
2748int kvm_arch_vcpu_ioctl_set_regs(struct kvm_vcpu *vcpu, struct kvm_regs *regs)
2749{
2750 vcpu_load(vcpu);
2751
ad312c7c
ZX		 2752 vcpu->arch.regs[VCPU_REGS_RAX] = regs->rax;
2753 vcpu->arch.regs[VCPU_REGS_RBX] = regs->rbx;
2754 vcpu->arch.regs[VCPU_REGS_RCX] = regs->rcx;
2755 vcpu->arch.regs[VCPU_REGS_RDX] = regs->rdx;
2756 vcpu->arch.regs[VCPU_REGS_RSI] = regs->rsi;
2757 vcpu->arch.regs[VCPU_REGS_RDI] = regs->rdi;
2758 vcpu->arch.regs[VCPU_REGS_RSP] = regs->rsp;
2759 vcpu->arch.regs[VCPU_REGS_RBP] = regs->rbp;
b6c7a5dc 2760#ifdef CONFIG_X86_64
ad312c7c
ZX		 2761 vcpu->arch.regs[VCPU_REGS_R8] = regs->r8;
2762 vcpu->arch.regs[VCPU_REGS_R9] = regs->r9;
2763 vcpu->arch.regs[VCPU_REGS_R10] = regs->r10;
2764 vcpu->arch.regs[VCPU_REGS_R11] = regs->r11;
2765 vcpu->arch.regs[VCPU_REGS_R12] = regs->r12;
2766 vcpu->arch.regs[VCPU_REGS_R13] = regs->r13;
2767 vcpu->arch.regs[VCPU_REGS_R14] = regs->r14;
2768 vcpu->arch.regs[VCPU_REGS_R15] = regs->r15;
b6c7a5dc
HB		 2769#endif
2770
ad312c7c 2771 vcpu->arch.rip = regs->rip;
b6c7a5dc
HB		 2772 kvm_x86_ops->set_rflags(vcpu, regs->rflags);
2773
2774 kvm_x86_ops->decache_regs(vcpu);
2775
2776 vcpu_put(vcpu);
2777
2778 return 0;
2779}
2780
2781static void get_segment(struct kvm_vcpu *vcpu,
2782 struct kvm_segment *var, int seg)
2783{
2784 return kvm_x86_ops->get_segment(vcpu, var, seg);
2785}
2786
2787void kvm_get_cs_db_l_bits(struct kvm_vcpu *vcpu, int *db, int *l)
2788{
2789 struct kvm_segment cs;
2790
2791 get_segment(vcpu, &cs, VCPU_SREG_CS);
2792 *db = cs.db;
2793 *l = cs.l;
2794}
2795EXPORT_SYMBOL_GPL(kvm_get_cs_db_l_bits);
2796
2797int kvm_arch_vcpu_ioctl_get_sregs(struct kvm_vcpu *vcpu,
2798 struct kvm_sregs *sregs)
2799{
2800 struct descriptor_table dt;
2801 int pending_vec;
2802
2803 vcpu_load(vcpu);
2804
2805 get_segment(vcpu, &sregs->cs, VCPU_SREG_CS);
2806 get_segment(vcpu, &sregs->ds, VCPU_SREG_DS);
2807 get_segment(vcpu, &sregs->es, VCPU_SREG_ES);
2808 get_segment(vcpu, &sregs->fs, VCPU_SREG_FS);
2809 get_segment(vcpu, &sregs->gs, VCPU_SREG_GS);
2810 get_segment(vcpu, &sregs->ss, VCPU_SREG_SS);
2811
2812 get_segment(vcpu, &sregs->tr, VCPU_SREG_TR);
2813 get_segment(vcpu, &sregs->ldt, VCPU_SREG_LDTR);
2814
2815 kvm_x86_ops->get_idt(vcpu, &dt);
2816 sregs->idt.limit = dt.limit;
2817 sregs->idt.base = dt.base;
2818 kvm_x86_ops->get_gdt(vcpu, &dt);
2819 sregs->gdt.limit = dt.limit;
2820 sregs->gdt.base = dt.base;
2821
2822 kvm_x86_ops->decache_cr4_guest_bits(vcpu);
ad312c7c
ZX		 2823 sregs->cr0 = vcpu->arch.cr0;
2824 sregs->cr2 = vcpu->arch.cr2;
2825 sregs->cr3 = vcpu->arch.cr3;
2826 sregs->cr4 = vcpu->arch.cr4;
b6c7a5dc 2827 sregs->cr8 = get_cr8(vcpu);
ad312c7c 2828 sregs->efer = vcpu->arch.shadow_efer;
b6c7a5dc
HB		 2829 sregs->apic_base = kvm_get_apic_base(vcpu);
2830
2831 if (irqchip_in_kernel(vcpu->kvm)) {
2832 memset(sregs->interrupt_bitmap, 0,
2833 sizeof sregs->interrupt_bitmap);
2834 pending_vec = kvm_x86_ops->get_irq(vcpu);
2835 if (pending_vec >= 0)
2836 set_bit(pending_vec,
2837 (unsigned long *)sregs->interrupt_bitmap);
2838 } else
ad312c7c 2839 memcpy(sregs->interrupt_bitmap, vcpu->arch.irq_pending,
b6c7a5dc
HB		 2840 sizeof sregs->interrupt_bitmap);
2841
2842 vcpu_put(vcpu);
2843
2844 return 0;
2845}
2846
2847static void set_segment(struct kvm_vcpu *vcpu,
2848 struct kvm_segment *var, int seg)
2849{
2850 return kvm_x86_ops->set_segment(vcpu, var, seg);
2851}
2852
2853int kvm_arch_vcpu_ioctl_set_sregs(struct kvm_vcpu *vcpu,
2854 struct kvm_sregs *sregs)
2855{
2856 int mmu_reset_needed = 0;
2857 int i, pending_vec, max_bits;
2858 struct descriptor_table dt;
2859
2860 vcpu_load(vcpu);
2861
2862 dt.limit = sregs->idt.limit;
2863 dt.base = sregs->idt.base;
2864 kvm_x86_ops->set_idt(vcpu, &dt);
2865 dt.limit = sregs->gdt.limit;
2866 dt.base = sregs->gdt.base;
2867 kvm_x86_ops->set_gdt(vcpu, &dt);
2868
ad312c7c
ZX		 2869 vcpu->arch.cr2 = sregs->cr2;
2870 mmu_reset_needed |= vcpu->arch.cr3 != sregs->cr3;
2871 vcpu->arch.cr3 = sregs->cr3;
b6c7a5dc
HB		 2872
2873 set_cr8(vcpu, sregs->cr8);
2874
ad312c7c 2875 mmu_reset_needed |= vcpu->arch.shadow_efer != sregs->efer;
b6c7a5dc 2876 kvm_x86_ops->set_efer(vcpu, sregs->efer);
b6c7a5dc
HB		 2877 kvm_set_apic_base(vcpu, sregs->apic_base);
2878
2879 kvm_x86_ops->decache_cr4_guest_bits(vcpu);
2880
ad312c7c 2881 mmu_reset_needed |= vcpu->arch.cr0 != sregs->cr0;
b6c7a5dc 2882 kvm_x86_ops->set_cr0(vcpu, sregs->cr0);
d7306163 2883 vcpu->arch.cr0 = sregs->cr0;
b6c7a5dc 2884
ad312c7c 2885 mmu_reset_needed |= vcpu->arch.cr4 != sregs->cr4;
b6c7a5dc
HB		 2886 kvm_x86_ops->set_cr4(vcpu, sregs->cr4);
2887 if (!is_long_mode(vcpu) && is_pae(vcpu))
ad312c7c 2888 load_pdptrs(vcpu, vcpu->arch.cr3);
b6c7a5dc
HB		 2889
2890 if (mmu_reset_needed)
2891 kvm_mmu_reset_context(vcpu);
2892
2893 if (!irqchip_in_kernel(vcpu->kvm)) {
ad312c7c
ZX		 2894 memcpy(vcpu->arch.irq_pending, sregs->interrupt_bitmap,
2895 sizeof vcpu->arch.irq_pending);
2896 vcpu->arch.irq_summary = 0;
2897 for (i = 0; i < ARRAY_SIZE(vcpu->arch.irq_pending); ++i)
2898 if (vcpu->arch.irq_pending[i])
2899 __set_bit(i, &vcpu->arch.irq_summary);
b6c7a5dc
HB		 2900 } else {
2901 max_bits = (sizeof sregs->interrupt_bitmap) << 3;
2902 pending_vec = find_first_bit(
2903 (const unsigned long *)sregs->interrupt_bitmap,
2904 max_bits);
2905 /* Only pending external irq is handled here */
2906 if (pending_vec < max_bits) {
2907 kvm_x86_ops->set_irq(vcpu, pending_vec);
2908 pr_debug("Set back pending irq %d\n",
2909 pending_vec);
2910 }
2911 }
2912
2913 set_segment(vcpu, &sregs->cs, VCPU_SREG_CS);
2914 set_segment(vcpu, &sregs->ds, VCPU_SREG_DS);
2915 set_segment(vcpu, &sregs->es, VCPU_SREG_ES);
2916 set_segment(vcpu, &sregs->fs, VCPU_SREG_FS);
2917 set_segment(vcpu, &sregs->gs, VCPU_SREG_GS);
2918 set_segment(vcpu, &sregs->ss, VCPU_SREG_SS);
2919
2920 set_segment(vcpu, &sregs->tr, VCPU_SREG_TR);
2921 set_segment(vcpu, &sregs->ldt, VCPU_SREG_LDTR);
2922
2923 vcpu_put(vcpu);
2924
2925 return 0;
2926}
2927
2928int kvm_arch_vcpu_ioctl_debug_guest(struct kvm_vcpu *vcpu,
2929 struct kvm_debug_guest *dbg)
2930{
2931 int r;
2932
2933 vcpu_load(vcpu);
2934
2935 r = kvm_x86_ops->set_guest_debug(vcpu, dbg);
2936
2937 vcpu_put(vcpu);
2938
2939 return r;
2940}
2941
d0752060
HB		 2942/*
2943 * fxsave fpu state. Taken from x86_64/processor.h. To be killed when
2944 * we have asm/x86/processor.h
2945 */
2946struct fxsave {
2947 u16 cwd;
2948 u16 swd;
2949 u16 twd;
2950 u16 fop;
2951 u64 rip;
2952 u64 rdp;
2953 u32 mxcsr;
2954 u32 mxcsr_mask;
2955 u32 st_space[32]; /* 8*16 bytes for each FP-reg = 128 bytes */
2956#ifdef CONFIG_X86_64
2957 u32 xmm_space[64]; /* 16*16 bytes for each XMM-reg = 256 bytes */
2958#else
2959 u32 xmm_space[32]; /* 8*16 bytes for each XMM-reg = 128 bytes */
2960#endif
2961};
2962
8b006791
ZX		 2963/*
2964 * Translate a guest virtual address to a guest physical address.
2965 */
2966int kvm_arch_vcpu_ioctl_translate(struct kvm_vcpu *vcpu,
2967 struct kvm_translation *tr)
2968{
2969 unsigned long vaddr = tr->linear_address;
2970 gpa_t gpa;
2971
2972 vcpu_load(vcpu);
72dc67a6 2973 down_read(&vcpu->kvm->slots_lock);
ad312c7c 2974 gpa = vcpu->arch.mmu.gva_to_gpa(vcpu, vaddr);
72dc67a6 2975 up_read(&vcpu->kvm->slots_lock);
8b006791
ZX		 2976 tr->physical_address = gpa;
2977 tr->valid = gpa != UNMAPPED_GVA;
2978 tr->writeable = 1;
2979 tr->usermode = 0;
8b006791
ZX		 2980 vcpu_put(vcpu);
2981
2982 return 0;
2983}
2984
d0752060
HB		 2985int kvm_arch_vcpu_ioctl_get_fpu(struct kvm_vcpu *vcpu, struct kvm_fpu *fpu)
2986{
ad312c7c 2987 struct fxsave *fxsave = (struct fxsave *)&vcpu->arch.guest_fx_image;
d0752060
HB		 2988
2989 vcpu_load(vcpu);
2990
2991 memcpy(fpu->fpr, fxsave->st_space, 128);
2992 fpu->fcw = fxsave->cwd;
2993 fpu->fsw = fxsave->swd;
2994 fpu->ftwx = fxsave->twd;
2995 fpu->last_opcode = fxsave->fop;
2996 fpu->last_ip = fxsave->rip;
2997 fpu->last_dp = fxsave->rdp;
2998 memcpy(fpu->xmm, fxsave->xmm_space, sizeof fxsave->xmm_space);
2999
3000 vcpu_put(vcpu);
3001
3002 return 0;
3003}
3004
3005int kvm_arch_vcpu_ioctl_set_fpu(struct kvm_vcpu *vcpu, struct kvm_fpu *fpu)
3006{
ad312c7c 3007 struct fxsave *fxsave = (struct fxsave *)&vcpu->arch.guest_fx_image;
d0752060
HB		 3008
3009 vcpu_load(vcpu);
3010
3011 memcpy(fxsave->st_space, fpu->fpr, 128);
3012 fxsave->cwd = fpu->fcw;
3013 fxsave->swd = fpu->fsw;
3014 fxsave->twd = fpu->ftwx;
3015 fxsave->fop = fpu->last_opcode;
3016 fxsave->rip = fpu->last_ip;
3017 fxsave->rdp = fpu->last_dp;
3018 memcpy(fxsave->xmm_space, fpu->xmm, sizeof fxsave->xmm_space);
3019
3020 vcpu_put(vcpu);
3021
3022 return 0;
3023}
3024
3025void fx_init(struct kvm_vcpu *vcpu)
3026{
3027 unsigned after_mxcsr_mask;
3028
3029 /* Initialize guest FPU by resetting ours and saving into guest's */
3030 preempt_disable();
ad312c7c 3031 fx_save(&vcpu->arch.host_fx_image);
d0752060 3032 fpu_init();
ad312c7c
ZX		 3033 fx_save(&vcpu->arch.guest_fx_image);
3034 fx_restore(&vcpu->arch.host_fx_image);
d0752060
HB		 3035 preempt_enable();
3036
ad312c7c 3037 vcpu->arch.cr0 |= X86_CR0_ET;
d0752060 3038 after_mxcsr_mask = offsetof(struct i387_fxsave_struct, st_space);
ad312c7c
ZX		 3039 vcpu->arch.guest_fx_image.mxcsr = 0x1f80;
3040 memset((void *)&vcpu->arch.guest_fx_image + after_mxcsr_mask,
d0752060
HB		 3041 0, sizeof(struct i387_fxsave_struct) - after_mxcsr_mask);
3042}
3043EXPORT_SYMBOL_GPL(fx_init);
3044
3045void kvm_load_guest_fpu(struct kvm_vcpu *vcpu)
3046{
3047 if (!vcpu->fpu_active || vcpu->guest_fpu_loaded)
3048 return;
3049
3050 vcpu->guest_fpu_loaded = 1;
ad312c7c
ZX		 3051 fx_save(&vcpu->arch.host_fx_image);
3052 fx_restore(&vcpu->arch.guest_fx_image);
d0752060
HB		 3053}
3054EXPORT_SYMBOL_GPL(kvm_load_guest_fpu);
3055
3056void kvm_put_guest_fpu(struct kvm_vcpu *vcpu)
3057{
3058 if (!vcpu->guest_fpu_loaded)
3059 return;
3060
3061 vcpu->guest_fpu_loaded = 0;
ad312c7c
ZX		 3062 fx_save(&vcpu->arch.guest_fx_image);
3063 fx_restore(&vcpu->arch.host_fx_image);
f096ed85 3064 ++vcpu->stat.fpu_reload;
d0752060
HB		 3065}
3066EXPORT_SYMBOL_GPL(kvm_put_guest_fpu);
e9b11c17
ZX		 3067
3068void kvm_arch_vcpu_free(struct kvm_vcpu *vcpu)
3069{
3070 kvm_x86_ops->vcpu_free(vcpu);
3071}
3072
3073struct kvm_vcpu *kvm_arch_vcpu_create(struct kvm *kvm,
3074 unsigned int id)
3075{
26e5215f
AK		 3076 return kvm_x86_ops->vcpu_create(kvm, id);
3077}
e9b11c17 3078
26e5215f
AK		 3079int kvm_arch_vcpu_setup(struct kvm_vcpu *vcpu)
3080{
3081 int r;
e9b11c17
ZX		 3082
3083 /* We do fxsave: this must be aligned. */
ad312c7c 3084 BUG_ON((unsigned long)&vcpu->arch.host_fx_image & 0xF);
e9b11c17
ZX		 3085
3086 vcpu_load(vcpu);
3087 r = kvm_arch_vcpu_reset(vcpu);
3088 if (r == 0)
3089 r = kvm_mmu_setup(vcpu);
3090 vcpu_put(vcpu);
3091 if (r < 0)
3092 goto free_vcpu;
3093
26e5215f 3094 return 0;
e9b11c17
ZX		 3095free_vcpu:
3096 kvm_x86_ops->vcpu_free(vcpu);
26e5215f 3097 return r;
e9b11c17
ZX		 3098}
3099
d40ccc62 3100void kvm_arch_vcpu_destroy(struct kvm_vcpu *vcpu)
e9b11c17
ZX		 3101{
3102 vcpu_load(vcpu);
3103 kvm_mmu_unload(vcpu);
3104 vcpu_put(vcpu);
3105
3106 kvm_x86_ops->vcpu_free(vcpu);
3107}
3108
3109int kvm_arch_vcpu_reset(struct kvm_vcpu *vcpu)
3110{
3111 return kvm_x86_ops->vcpu_reset(vcpu);
3112}
3113
3114void kvm_arch_hardware_enable(void *garbage)
3115{
3116 kvm_x86_ops->hardware_enable(garbage);
3117}
3118
3119void kvm_arch_hardware_disable(void *garbage)
3120{
3121 kvm_x86_ops->hardware_disable(garbage);
3122}
3123
3124int kvm_arch_hardware_setup(void)
3125{
3126 return kvm_x86_ops->hardware_setup();
3127}
3128
3129void kvm_arch_hardware_unsetup(void)
3130{
3131 kvm_x86_ops->hardware_unsetup();
3132}
3133
3134void kvm_arch_check_processor_compat(void *rtn)
3135{
3136 kvm_x86_ops->check_processor_compatibility(rtn);
3137}
3138
3139int kvm_arch_vcpu_init(struct kvm_vcpu *vcpu)
3140{
3141 struct page *page;
3142 struct kvm *kvm;
3143 int r;
3144
3145 BUG_ON(vcpu->kvm == NULL);
3146 kvm = vcpu->kvm;
3147
ad312c7c 3148 vcpu->arch.mmu.root_hpa = INVALID_PAGE;
e9b11c17 3149 if (!irqchip_in_kernel(kvm) || vcpu->vcpu_id == 0)
ad312c7c 3150 vcpu->arch.mp_state = VCPU_MP_STATE_RUNNABLE;
e9b11c17 3151 else
ad312c7c 3152 vcpu->arch.mp_state = VCPU_MP_STATE_UNINITIALIZED;
e9b11c17
ZX		 3153
3154 page = alloc_page(GFP_KERNEL | __GFP_ZERO);
3155 if (!page) {
3156 r = -ENOMEM;
3157 goto fail;
3158 }
ad312c7c 3159 vcpu->arch.pio_data = page_address(page);
e9b11c17
ZX		 3160
3161 r = kvm_mmu_create(vcpu);
3162 if (r < 0)
3163 goto fail_free_pio_data;
3164
3165 if (irqchip_in_kernel(kvm)) {
3166 r = kvm_create_lapic(vcpu);
3167 if (r < 0)
3168 goto fail_mmu_destroy;
3169 }
3170
3171 return 0;
3172
3173fail_mmu_destroy:
3174 kvm_mmu_destroy(vcpu);
3175fail_free_pio_data:
ad312c7c 3176 free_page((unsigned long)vcpu->arch.pio_data);
e9b11c17
ZX		 3177fail:
3178 return r;
3179}
3180
3181void kvm_arch_vcpu_uninit(struct kvm_vcpu *vcpu)
3182{
3183 kvm_free_lapic(vcpu);
3184 kvm_mmu_destroy(vcpu);
ad312c7c 3185 free_page((unsigned long)vcpu->arch.pio_data);
e9b11c17 3186}
d19a9cd2
ZX		 3187
3188struct kvm *kvm_arch_create_vm(void)
3189{
3190 struct kvm *kvm = kzalloc(sizeof(struct kvm), GFP_KERNEL);
3191
3192 if (!kvm)
3193 return ERR_PTR(-ENOMEM);
3194
f05e70ac 3195 INIT_LIST_HEAD(&kvm->arch.active_mmu_pages);
d19a9cd2
ZX		 3196
3197 return kvm;
3198}
3199
3200static void kvm_unload_vcpu_mmu(struct kvm_vcpu *vcpu)
3201{
3202 vcpu_load(vcpu);
3203 kvm_mmu_unload(vcpu);
3204 vcpu_put(vcpu);
3205}
3206
3207static void kvm_free_vcpus(struct kvm *kvm)
3208{
3209 unsigned int i;
3210
3211 /*
3212 * Unpin any mmu pages first.
3213 */
3214 for (i = 0; i < KVM_MAX_VCPUS; ++i)
3215 if (kvm->vcpus[i])
3216 kvm_unload_vcpu_mmu(kvm->vcpus[i]);
3217 for (i = 0; i < KVM_MAX_VCPUS; ++i) {
3218 if (kvm->vcpus[i]) {
3219 kvm_arch_vcpu_free(kvm->vcpus[i]);
3220 kvm->vcpus[i] = NULL;
3221 }
3222 }
3223
3224}
3225
3226void kvm_arch_destroy_vm(struct kvm *kvm)
3227{
d7deeeb0
ZX		 3228 kfree(kvm->arch.vpic);
3229 kfree(kvm->arch.vioapic);
d19a9cd2
ZX		 3230 kvm_free_vcpus(kvm);
3231 kvm_free_physmem(kvm);
3232 kfree(kvm);
3233}
0de10343
ZX		 3234
3235int kvm_arch_set_memory_region(struct kvm *kvm,
3236 struct kvm_userspace_memory_region *mem,
3237 struct kvm_memory_slot old,
3238 int user_alloc)
3239{
3240 int npages = mem->memory_size >> PAGE_SHIFT;
3241 struct kvm_memory_slot *memslot = &kvm->memslots[mem->slot];
3242
3243 /*To keep backward compatibility with older userspace,
3244 *x86 needs to hanlde !user_alloc case.
3245 */
3246 if (!user_alloc) {
3247 if (npages && !old.rmap) {
72dc67a6 3248 down_write(&current->mm->mmap_sem);
0de10343
ZX		 3249 memslot->userspace_addr = do_mmap(NULL, 0,
3250 npages * PAGE_SIZE,
3251 PROT_READ | PROT_WRITE,
3252 MAP_SHARED | MAP_ANONYMOUS,
3253 0);
72dc67a6 3254 up_write(&current->mm->mmap_sem);
0de10343
ZX		 3255
3256 if (IS_ERR((void *)memslot->userspace_addr))
3257 return PTR_ERR((void *)memslot->userspace_addr);
3258 } else {
3259 if (!old.user_alloc && old.rmap) {
3260 int ret;
3261
72dc67a6 3262 down_write(&current->mm->mmap_sem);
0de10343
ZX		 3263 ret = do_munmap(current->mm, old.userspace_addr,
3264 old.npages * PAGE_SIZE);
72dc67a6 3265 up_write(&current->mm->mmap_sem);
0de10343
ZX		 3266 if (ret < 0)
3267 printk(KERN_WARNING
3268 "kvm_vm_ioctl_set_memory_region: "
3269 "failed to munmap memory\n");
3270 }
3271 }
3272 }
3273
f05e70ac 3274 if (!kvm->arch.n_requested_mmu_pages) {
0de10343
ZX		 3275 unsigned int nr_mmu_pages = kvm_mmu_calculate_mmu_pages(kvm);
3276 kvm_mmu_change_mmu_pages(kvm, nr_mmu_pages);
3277 }
3278
3279 kvm_mmu_slot_remove_write_access(kvm, mem->slot);
3280 kvm_flush_remote_tlbs(kvm);
3281
3282 return 0;
3283}
1d737c8a
ZX		 3284
3285int kvm_arch_vcpu_runnable(struct kvm_vcpu *vcpu)
3286{
3287 return vcpu->arch.mp_state == VCPU_MP_STATE_RUNNABLE
3288 || vcpu->arch.mp_state == VCPU_MP_STATE_SIPI_RECEIVED;
3289}
5736199a
ZX		 3290
3291static void vcpu_kick_intr(void *info)
3292{
3293#ifdef DEBUG
3294 struct kvm_vcpu *vcpu = (struct kvm_vcpu *)info;
3295 printk(KERN_DEBUG "vcpu_kick_intr %p \n", vcpu);
3296#endif
3297}
3298
3299void kvm_vcpu_kick(struct kvm_vcpu *vcpu)
3300{
3301 int ipi_pcpu = vcpu->cpu;
3302
3303 if (waitqueue_active(&vcpu->wq)) {
3304 wake_up_interruptible(&vcpu->wq);
3305 ++vcpu->stat.halt_wakeup;
3306 }
3307 if (vcpu->guest_mode)
3308 smp_call_function_single(ipi_pcpu, vcpu_kick_intr, vcpu, 0, 0);
3309}
Linux 6.x block layer and io_uring tree(s)