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Merge branch 'net-2.6' of git://git.kernel.org/pub/scm/linux/kernel/git/mst/vhost
[linux-2.6-block.git] / arch / x86 / kvm / mmu.c
CommitLineData
6aa8b732
AK		 1/*
2 * Kernel-based Virtual Machine driver for Linux
3 *
4 * This module enables machines with Intel VT-x extensions to run virtual
5 * machines without emulation or binary translation.
6 *
7 * MMU support
8 *
9 * Copyright (C) 2006 Qumranet, Inc.
10 *
11 * Authors:
12 * Yaniv Kamay <yaniv@qumranet.com>
13 * Avi Kivity <avi@qumranet.com>
14 *
15 * This work is licensed under the terms of the GNU GPL, version 2. See
16 * the COPYING file in the top-level directory.
17 *
18 */
e495606d 19
1d737c8a 20#include "mmu.h"
836a1b3c 21#include "x86.h"
6de4f3ad 22#include "kvm_cache_regs.h"
e495606d 23
edf88417 24#include <linux/kvm_host.h>
6aa8b732
AK		 25#include <linux/types.h>
26#include <linux/string.h>
6aa8b732
AK		 27#include <linux/mm.h>
28#include <linux/highmem.h>
29#include <linux/module.h>
448353ca 30#include <linux/swap.h>
05da4558 31#include <linux/hugetlb.h>
2f333bcb 32#include <linux/compiler.h>
bc6678a3 33#include <linux/srcu.h>
5a0e3ad6 34#include <linux/slab.h>
6aa8b732 35
e495606d
AK		 36#include <asm/page.h>
37#include <asm/cmpxchg.h>
4e542370 38#include <asm/io.h>
13673a90 39#include <asm/vmx.h>
6aa8b732 40
18552672
JR		 41/*
42 * When setting this variable to true it enables Two-Dimensional-Paging
43 * where the hardware walks 2 page tables:
44 * 1. the guest-virtual to guest-physical
45 * 2. while doing 1. it walks guest-physical to host-physical
46 * If the hardware supports that we don't need to do shadow paging.
47 */
2f333bcb 48bool tdp_enabled = false;
18552672 49
37a7d8b0
AK		 50#undef MMU_DEBUG
51
52#undef AUDIT
53
54#ifdef AUDIT
55static void kvm_mmu_audit(struct kvm_vcpu *vcpu, const char *msg);
56#else
57static void kvm_mmu_audit(struct kvm_vcpu *vcpu, const char *msg) {}
58#endif
59
60#ifdef MMU_DEBUG
61
62#define pgprintk(x...) do { if (dbg) printk(x); } while (0)
63#define rmap_printk(x...) do { if (dbg) printk(x); } while (0)
64
65#else
66
67#define pgprintk(x...) do { } while (0)
68#define rmap_printk(x...) do { } while (0)
69
70#endif
71
72#if defined(MMU_DEBUG) || defined(AUDIT)
6ada8cca
AK		 73static int dbg = 0;
74module_param(dbg, bool, 0644);
37a7d8b0 75#endif
6aa8b732 76
582801a9
MT		 77static int oos_shadow = 1;
78module_param(oos_shadow, bool, 0644);
79
d6c69ee9
YD		 80#ifndef MMU_DEBUG
81#define ASSERT(x) do { } while (0)
82#else
6aa8b732
AK		 83#define ASSERT(x) \
84 if (!(x)) { \
85 printk(KERN_WARNING "assertion failed %s:%d: %s\n", \
86 __FILE__, __LINE__, #x); \
87 }
d6c69ee9 88#endif
6aa8b732 89
6aa8b732
AK		 90#define PT_FIRST_AVAIL_BITS_SHIFT 9
91#define PT64_SECOND_AVAIL_BITS_SHIFT 52
92
6aa8b732
AK		 93#define VALID_PAGE(x) ((x) != INVALID_PAGE)
94
95#define PT64_LEVEL_BITS 9
96
97#define PT64_LEVEL_SHIFT(level) \
d77c26fc 98 (PAGE_SHIFT + (level - 1) * PT64_LEVEL_BITS)
6aa8b732
AK		 99
100#define PT64_LEVEL_MASK(level) \
101 (((1ULL << PT64_LEVEL_BITS) - 1) << PT64_LEVEL_SHIFT(level))
102
103#define PT64_INDEX(address, level)\
104 (((address) >> PT64_LEVEL_SHIFT(level)) & ((1 << PT64_LEVEL_BITS) - 1))
105
106
107#define PT32_LEVEL_BITS 10
108
109#define PT32_LEVEL_SHIFT(level) \
d77c26fc 110 (PAGE_SHIFT + (level - 1) * PT32_LEVEL_BITS)
6aa8b732
AK		 111
112#define PT32_LEVEL_MASK(level) \
113 (((1ULL << PT32_LEVEL_BITS) - 1) << PT32_LEVEL_SHIFT(level))
e04da980
JR		 114#define PT32_LVL_OFFSET_MASK(level) \
115 (PT32_BASE_ADDR_MASK & ((1ULL << (PAGE_SHIFT + (((level) - 1) \
116 * PT32_LEVEL_BITS))) - 1))
6aa8b732
AK		 117
118#define PT32_INDEX(address, level)\
119 (((address) >> PT32_LEVEL_SHIFT(level)) & ((1 << PT32_LEVEL_BITS) - 1))
120
121
27aba766 122#define PT64_BASE_ADDR_MASK (((1ULL << 52) - 1) & ~(u64)(PAGE_SIZE-1))
6aa8b732
AK		 123#define PT64_DIR_BASE_ADDR_MASK \
124 (PT64_BASE_ADDR_MASK & ~((1ULL << (PAGE_SHIFT + PT64_LEVEL_BITS)) - 1))
e04da980
JR		 125#define PT64_LVL_ADDR_MASK(level) \
126 (PT64_BASE_ADDR_MASK & ~((1ULL << (PAGE_SHIFT + (((level) - 1) \
127 * PT64_LEVEL_BITS))) - 1))
128#define PT64_LVL_OFFSET_MASK(level) \
129 (PT64_BASE_ADDR_MASK & ((1ULL << (PAGE_SHIFT + (((level) - 1) \
130 * PT64_LEVEL_BITS))) - 1))
6aa8b732
AK		 131
132#define PT32_BASE_ADDR_MASK PAGE_MASK
133#define PT32_DIR_BASE_ADDR_MASK \
134 (PAGE_MASK & ~((1ULL << (PAGE_SHIFT + PT32_LEVEL_BITS)) - 1))
e04da980
JR		 135#define PT32_LVL_ADDR_MASK(level) \
136 (PAGE_MASK & ~((1ULL << (PAGE_SHIFT + (((level) - 1) \
137 * PT32_LEVEL_BITS))) - 1))
6aa8b732 138
79539cec
AK		 139#define PT64_PERM_MASK (PT_PRESENT_MASK | PT_WRITABLE_MASK | PT_USER_MASK \
140 | PT64_NX_MASK)
6aa8b732 141
cd4a4e53
AK		 142#define RMAP_EXT 4
143
fe135d2c
AK		 144#define ACC_EXEC_MASK 1
145#define ACC_WRITE_MASK PT_WRITABLE_MASK
146#define ACC_USER_MASK PT_USER_MASK
147#define ACC_ALL (ACC_EXEC_MASK | ACC_WRITE_MASK | ACC_USER_MASK)
148
90bb6fc5
AK		 149#include <trace/events/kvm.h>
150
151#undef TRACE_INCLUDE_FILE
07420171
AK		 152#define CREATE_TRACE_POINTS
153#include "mmutrace.h"
154
1403283a
IE		 155#define SPTE_HOST_WRITEABLE (1ULL << PT_FIRST_AVAIL_BITS_SHIFT)
156
135f8c2b
AK		 157#define SHADOW_PT_INDEX(addr, level) PT64_INDEX(addr, level)
158
cd4a4e53 159struct kvm_rmap_desc {
d555c333 160 u64 *sptes[RMAP_EXT];
cd4a4e53
AK		 161 struct kvm_rmap_desc *more;
162};
163
2d11123a
AK		 164struct kvm_shadow_walk_iterator {
165 u64 addr;
166 hpa_t shadow_addr;
167 int level;
168 u64 *sptep;
169 unsigned index;
170};
171
172#define for_each_shadow_entry(_vcpu, _addr, _walker) \
173 for (shadow_walk_init(&(_walker), _vcpu, _addr); \
174 shadow_walk_okay(&(_walker)); \
175 shadow_walk_next(&(_walker)))
176
177
4731d4c7
MT		 178struct kvm_unsync_walk {
179 int (*entry) (struct kvm_mmu_page *sp, struct kvm_unsync_walk *walk);
180};
181
ad8cfbe3
MT		 182typedef int (*mmu_parent_walk_fn) (struct kvm_vcpu *vcpu, struct kvm_mmu_page *sp);
183
b5a33a75
AK		 184static struct kmem_cache *pte_chain_cache;
185static struct kmem_cache *rmap_desc_cache;
d3d25b04 186static struct kmem_cache *mmu_page_header_cache;
b5a33a75 187
c7addb90
AK		 188static u64 __read_mostly shadow_trap_nonpresent_pte;
189static u64 __read_mostly shadow_notrap_nonpresent_pte;
7b52345e
SY		 190static u64 __read_mostly shadow_base_present_pte;
191static u64 __read_mostly shadow_nx_mask;
192static u64 __read_mostly shadow_x_mask; /* mutual exclusive with nx_mask */
193static u64 __read_mostly shadow_user_mask;
194static u64 __read_mostly shadow_accessed_mask;
195static u64 __read_mostly shadow_dirty_mask;
c7addb90 196
82725b20
DE		 197static inline u64 rsvd_bits(int s, int e)
198{
199 return ((1ULL << (e - s + 1)) - 1) << s;
200}
201
c7addb90
AK		 202void kvm_mmu_set_nonpresent_ptes(u64 trap_pte, u64 notrap_pte)
203{
204 shadow_trap_nonpresent_pte = trap_pte;
205 shadow_notrap_nonpresent_pte = notrap_pte;
206}
207EXPORT_SYMBOL_GPL(kvm_mmu_set_nonpresent_ptes);
208
7b52345e
SY		 209void kvm_mmu_set_base_ptes(u64 base_pte)
210{
211 shadow_base_present_pte = base_pte;
212}
213EXPORT_SYMBOL_GPL(kvm_mmu_set_base_ptes);
214
215void kvm_mmu_set_mask_ptes(u64 user_mask, u64 accessed_mask,
4b12f0de 216 u64 dirty_mask, u64 nx_mask, u64 x_mask)
7b52345e
SY		 217{
218 shadow_user_mask = user_mask;
219 shadow_accessed_mask = accessed_mask;
220 shadow_dirty_mask = dirty_mask;
221 shadow_nx_mask = nx_mask;
222 shadow_x_mask = x_mask;
223}
224EXPORT_SYMBOL_GPL(kvm_mmu_set_mask_ptes);
225
6aa8b732
AK		 226static int is_write_protection(struct kvm_vcpu *vcpu)
227{
4d4ec087 228 return kvm_read_cr0_bits(vcpu, X86_CR0_WP);
6aa8b732
AK		 229}
230
231static int is_cpuid_PSE36(void)
232{
233 return 1;
234}
235
73b1087e
AK		 236static int is_nx(struct kvm_vcpu *vcpu)
237{
f6801dff 238 return vcpu->arch.efer & EFER_NX;
73b1087e
AK		 239}
240
c7addb90
AK		 241static int is_shadow_present_pte(u64 pte)
242{
c7addb90
AK		 243 return pte != shadow_trap_nonpresent_pte
244 && pte != shadow_notrap_nonpresent_pte;
245}
246
05da4558
MT		 247static int is_large_pte(u64 pte)
248{
249 return pte & PT_PAGE_SIZE_MASK;
250}
251
8dae4445 252static int is_writable_pte(unsigned long pte)
6aa8b732
AK		 253{
254 return pte & PT_WRITABLE_MASK;
255}
256
43a3795a 257static int is_dirty_gpte(unsigned long pte)
e3c5e7ec 258{
439e218a 259 return pte & PT_DIRTY_MASK;
e3c5e7ec
AK		 260}
261
43a3795a 262static int is_rmap_spte(u64 pte)
cd4a4e53 263{
4b1a80fa 264 return is_shadow_present_pte(pte);
cd4a4e53
AK		 265}
266
776e6633
MT		 267static int is_last_spte(u64 pte, int level)
268{
269 if (level == PT_PAGE_TABLE_LEVEL)
270 return 1;
852e3c19 271 if (is_large_pte(pte))
776e6633
MT		 272 return 1;
273 return 0;
274}
275
35149e21 276static pfn_t spte_to_pfn(u64 pte)
0b49ea86 277{
35149e21 278 return (pte & PT64_BASE_ADDR_MASK) >> PAGE_SHIFT;
0b49ea86
AK		 279}
280
da928521
AK		 281static gfn_t pse36_gfn_delta(u32 gpte)
282{
283 int shift = 32 - PT32_DIR_PSE36_SHIFT - PAGE_SHIFT;
284
285 return (gpte & PT32_DIR_PSE36_MASK) << shift;
286}
287
d555c333 288static void __set_spte(u64 *sptep, u64 spte)
e663ee64
AK		 289{
290#ifdef CONFIG_X86_64
291 set_64bit((unsigned long *)sptep, spte);
292#else
293 set_64bit((unsigned long long *)sptep, spte);
294#endif
295}
296
e2dec939 297static int mmu_topup_memory_cache(struct kvm_mmu_memory_cache *cache,
2e3e5882 298 struct kmem_cache *base_cache, int min)
714b93da
AK		 299{
300 void *obj;
301
302 if (cache->nobjs >= min)
e2dec939 303 return 0;
714b93da 304 while (cache->nobjs < ARRAY_SIZE(cache->objects)) {
2e3e5882 305 obj = kmem_cache_zalloc(base_cache, GFP_KERNEL);
714b93da 306 if (!obj)
e2dec939 307 return -ENOMEM;
714b93da
AK		 308 cache->objects[cache->nobjs++] = obj;
309 }
e2dec939 310 return 0;
714b93da
AK		 311}
312
313static void mmu_free_memory_cache(struct kvm_mmu_memory_cache *mc)
314{
315 while (mc->nobjs)
316 kfree(mc->objects[--mc->nobjs]);
317}
318
c1158e63 319static int mmu_topup_memory_cache_page(struct kvm_mmu_memory_cache *cache,
2e3e5882 320 int min)
c1158e63
AK		 321{
322 struct page *page;
323
324 if (cache->nobjs >= min)
325 return 0;
326 while (cache->nobjs < ARRAY_SIZE(cache->objects)) {
2e3e5882 327 page = alloc_page(GFP_KERNEL);
c1158e63
AK		 328 if (!page)
329 return -ENOMEM;
330 set_page_private(page, 0);
331 cache->objects[cache->nobjs++] = page_address(page);
332 }
333 return 0;
334}
335
336static void mmu_free_memory_cache_page(struct kvm_mmu_memory_cache *mc)
337{
338 while (mc->nobjs)
c4d198d5 339 free_page((unsigned long)mc->objects[--mc->nobjs]);
c1158e63
AK		 340}
341
2e3e5882 342static int mmu_topup_memory_caches(struct kvm_vcpu *vcpu)
714b93da 343{
e2dec939
AK		 344 int r;
345
ad312c7c 346 r = mmu_topup_memory_cache(&vcpu->arch.mmu_pte_chain_cache,
2e3e5882 347 pte_chain_cache, 4);
e2dec939
AK		 348 if (r)
349 goto out;
ad312c7c 350 r = mmu_topup_memory_cache(&vcpu->arch.mmu_rmap_desc_cache,
c41ef344 351 rmap_desc_cache, 4);
d3d25b04
AK		 352 if (r)
353 goto out;
ad312c7c 354 r = mmu_topup_memory_cache_page(&vcpu->arch.mmu_page_cache, 8);
d3d25b04
AK		 355 if (r)
356 goto out;
ad312c7c 357 r = mmu_topup_memory_cache(&vcpu->arch.mmu_page_header_cache,
2e3e5882 358 mmu_page_header_cache, 4);
e2dec939
AK		 359out:
360 return r;
714b93da
AK		 361}
362
363static void mmu_free_memory_caches(struct kvm_vcpu *vcpu)
364{
ad312c7c
ZX		 365 mmu_free_memory_cache(&vcpu->arch.mmu_pte_chain_cache);
366 mmu_free_memory_cache(&vcpu->arch.mmu_rmap_desc_cache);
367 mmu_free_memory_cache_page(&vcpu->arch.mmu_page_cache);
368 mmu_free_memory_cache(&vcpu->arch.mmu_page_header_cache);
714b93da
AK		 369}
370
371static void *mmu_memory_cache_alloc(struct kvm_mmu_memory_cache *mc,
372 size_t size)
373{
374 void *p;
375
376 BUG_ON(!mc->nobjs);
377 p = mc->objects[--mc->nobjs];
714b93da
AK		 378 return p;
379}
380
714b93da
AK		 381static struct kvm_pte_chain *mmu_alloc_pte_chain(struct kvm_vcpu *vcpu)
382{
ad312c7c 383 return mmu_memory_cache_alloc(&vcpu->arch.mmu_pte_chain_cache,
714b93da
AK		 384 sizeof(struct kvm_pte_chain));
385}
386
90cb0529 387static void mmu_free_pte_chain(struct kvm_pte_chain *pc)
714b93da 388{
90cb0529 389 kfree(pc);
714b93da
AK		 390}
391
392static struct kvm_rmap_desc *mmu_alloc_rmap_desc(struct kvm_vcpu *vcpu)
393{
ad312c7c 394 return mmu_memory_cache_alloc(&vcpu->arch.mmu_rmap_desc_cache,
714b93da
AK		 395 sizeof(struct kvm_rmap_desc));
396}
397
90cb0529 398static void mmu_free_rmap_desc(struct kvm_rmap_desc *rd)
714b93da 399{
90cb0529 400 kfree(rd);
714b93da
AK		 401}
402
05da4558
MT		 403/*
404 * Return the pointer to the largepage write count for a given
405 * gfn, handling slots that are not large page aligned.
406 */
d25797b2
JR		 407static int *slot_largepage_idx(gfn_t gfn,
408 struct kvm_memory_slot *slot,
409 int level)
05da4558
MT		 410{
411 unsigned long idx;
412
d25797b2
JR		 413 idx = (gfn / KVM_PAGES_PER_HPAGE(level)) -
414 (slot->base_gfn / KVM_PAGES_PER_HPAGE(level));
415 return &slot->lpage_info[level - 2][idx].write_count;
05da4558
MT		 416}
417
418static void account_shadowed(struct kvm *kvm, gfn_t gfn)
419{
d25797b2 420 struct kvm_memory_slot *slot;
05da4558 421 int *write_count;
d25797b2 422 int i;
05da4558 423
2843099f 424 gfn = unalias_gfn(kvm, gfn);
d25797b2
JR		 425
426 slot = gfn_to_memslot_unaliased(kvm, gfn);
427 for (i = PT_DIRECTORY_LEVEL;
428 i < PT_PAGE_TABLE_LEVEL + KVM_NR_PAGE_SIZES; ++i) {
429 write_count = slot_largepage_idx(gfn, slot, i);
430 *write_count += 1;
431 }
05da4558
MT		 432}
433
434static void unaccount_shadowed(struct kvm *kvm, gfn_t gfn)
435{
d25797b2 436 struct kvm_memory_slot *slot;
05da4558 437 int *write_count;
d25797b2 438 int i;
05da4558 439
2843099f 440 gfn = unalias_gfn(kvm, gfn);
d25797b2
JR		 441 for (i = PT_DIRECTORY_LEVEL;
442 i < PT_PAGE_TABLE_LEVEL + KVM_NR_PAGE_SIZES; ++i) {
443 slot = gfn_to_memslot_unaliased(kvm, gfn);
444 write_count = slot_largepage_idx(gfn, slot, i);
445 *write_count -= 1;
446 WARN_ON(*write_count < 0);
447 }
05da4558
MT		 448}
449
d25797b2
JR		 450static int has_wrprotected_page(struct kvm *kvm,
451 gfn_t gfn,
452 int level)
05da4558 453{
2843099f 454 struct kvm_memory_slot *slot;
05da4558
MT		 455 int *largepage_idx;
456
2843099f
IE		 457 gfn = unalias_gfn(kvm, gfn);
458 slot = gfn_to_memslot_unaliased(kvm, gfn);
05da4558 459 if (slot) {
d25797b2 460 largepage_idx = slot_largepage_idx(gfn, slot, level);
05da4558
MT		 461 return *largepage_idx;
462 }
463
464 return 1;
465}
466
d25797b2 467static int host_mapping_level(struct kvm *kvm, gfn_t gfn)
05da4558 468{
8f0b1ab6 469 unsigned long page_size;
d25797b2 470 int i, ret = 0;
05da4558 471
8f0b1ab6 472 page_size = kvm_host_page_size(kvm, gfn);
05da4558 473
d25797b2
JR		 474 for (i = PT_PAGE_TABLE_LEVEL;
475 i < (PT_PAGE_TABLE_LEVEL + KVM_NR_PAGE_SIZES); ++i) {
476 if (page_size >= KVM_HPAGE_SIZE(i))
477 ret = i;
478 else
479 break;
480 }
481
4c2155ce 482 return ret;
05da4558
MT		 483}
484
d25797b2 485static int mapping_level(struct kvm_vcpu *vcpu, gfn_t large_gfn)
05da4558
MT		 486{
487 struct kvm_memory_slot *slot;
878403b7 488 int host_level, level, max_level;
05da4558
MT		 489
490 slot = gfn_to_memslot(vcpu->kvm, large_gfn);
491 if (slot && slot->dirty_bitmap)
d25797b2 492 return PT_PAGE_TABLE_LEVEL;
05da4558 493
d25797b2
JR		 494 host_level = host_mapping_level(vcpu->kvm, large_gfn);
495
496 if (host_level == PT_PAGE_TABLE_LEVEL)
497 return host_level;
498
878403b7
SY		 499 max_level = kvm_x86_ops->get_lpage_level() < host_level ?
500 kvm_x86_ops->get_lpage_level() : host_level;
501
502 for (level = PT_DIRECTORY_LEVEL; level <= max_level; ++level)
d25797b2
JR		 503 if (has_wrprotected_page(vcpu->kvm, large_gfn, level))
504 break;
d25797b2
JR		 505
506 return level - 1;
05da4558
MT		 507}
508
290fc38d
IE		 509/*
510 * Take gfn and return the reverse mapping to it.
511 * Note: gfn must be unaliased before this function get called
512 */
513
44ad9944 514static unsigned long *gfn_to_rmap(struct kvm *kvm, gfn_t gfn, int level)
290fc38d
IE		 515{
516 struct kvm_memory_slot *slot;
05da4558 517 unsigned long idx;
290fc38d
IE		 518
519 slot = gfn_to_memslot(kvm, gfn);
44ad9944 520 if (likely(level == PT_PAGE_TABLE_LEVEL))
05da4558
MT		 521 return &slot->rmap[gfn - slot->base_gfn];
522
44ad9944
JR		 523 idx = (gfn / KVM_PAGES_PER_HPAGE(level)) -
524 (slot->base_gfn / KVM_PAGES_PER_HPAGE(level));
05da4558 525
44ad9944 526 return &slot->lpage_info[level - 2][idx].rmap_pde;
290fc38d
IE		 527}
528
cd4a4e53
AK		 529/*
530 * Reverse mapping data structures:
531 *
290fc38d
IE		 532 * If rmapp bit zero is zero, then rmapp point to the shadw page table entry
533 * that points to page_address(page).
cd4a4e53 534 *
290fc38d
IE		 535 * If rmapp bit zero is one, (then rmap & ~1) points to a struct kvm_rmap_desc
536 * containing more mappings.
53a27b39
MT		 537 *
538 * Returns the number of rmap entries before the spte was added or zero if
539 * the spte was not added.
540 *
cd4a4e53 541 */
44ad9944 542static int rmap_add(struct kvm_vcpu *vcpu, u64 *spte, gfn_t gfn)
cd4a4e53 543{
4db35314 544 struct kvm_mmu_page *sp;
cd4a4e53 545 struct kvm_rmap_desc *desc;
290fc38d 546 unsigned long *rmapp;
53a27b39 547 int i, count = 0;
cd4a4e53 548
43a3795a 549 if (!is_rmap_spte(*spte))
53a27b39 550 return count;
290fc38d 551 gfn = unalias_gfn(vcpu->kvm, gfn);
4db35314
AK		 552 sp = page_header(__pa(spte));
553 sp->gfns[spte - sp->spt] = gfn;
44ad9944 554 rmapp = gfn_to_rmap(vcpu->kvm, gfn, sp->role.level);
290fc38d 555 if (!*rmapp) {
cd4a4e53 556 rmap_printk("rmap_add: %p %llx 0->1\n", spte, *spte);
290fc38d
IE		 557 *rmapp = (unsigned long)spte;
558 } else if (!(*rmapp & 1)) {
cd4a4e53 559 rmap_printk("rmap_add: %p %llx 1->many\n", spte, *spte);
714b93da 560 desc = mmu_alloc_rmap_desc(vcpu);
d555c333
AK		 561 desc->sptes[0] = (u64 *)*rmapp;
562 desc->sptes[1] = spte;
290fc38d 563 *rmapp = (unsigned long)desc | 1;
cd4a4e53
AK		 564 } else {
565 rmap_printk("rmap_add: %p %llx many->many\n", spte, *spte);
290fc38d 566 desc = (struct kvm_rmap_desc *)(*rmapp & ~1ul);
d555c333 567 while (desc->sptes[RMAP_EXT-1] && desc->more) {
cd4a4e53 568 desc = desc->more;
53a27b39
MT		 569 count += RMAP_EXT;
570 }
d555c333 571 if (desc->sptes[RMAP_EXT-1]) {
714b93da 572 desc->more = mmu_alloc_rmap_desc(vcpu);
cd4a4e53
AK		 573 desc = desc->more;
574 }
d555c333 575 for (i = 0; desc->sptes[i]; ++i)
cd4a4e53 576 ;
d555c333 577 desc->sptes[i] = spte;
cd4a4e53 578 }
53a27b39 579 return count;
cd4a4e53
AK		 580}
581
290fc38d 582static void rmap_desc_remove_entry(unsigned long *rmapp,
cd4a4e53
AK		 583 struct kvm_rmap_desc *desc,
584 int i,
585 struct kvm_rmap_desc *prev_desc)
586{
587 int j;
588
d555c333 589 for (j = RMAP_EXT - 1; !desc->sptes[j] && j > i; --j)
cd4a4e53 590 ;
d555c333
AK		 591 desc->sptes[i] = desc->sptes[j];
592 desc->sptes[j] = NULL;
cd4a4e53
AK		 593 if (j != 0)
594 return;
595 if (!prev_desc && !desc->more)
d555c333 596 *rmapp = (unsigned long)desc->sptes[0];
cd4a4e53
AK		 597 else
598 if (prev_desc)
599 prev_desc->more = desc->more;
600 else
290fc38d 601 *rmapp = (unsigned long)desc->more | 1;
90cb0529 602 mmu_free_rmap_desc(desc);
cd4a4e53
AK		 603}
604
290fc38d 605static void rmap_remove(struct kvm *kvm, u64 *spte)
cd4a4e53 606{
cd4a4e53
AK		 607 struct kvm_rmap_desc *desc;
608 struct kvm_rmap_desc *prev_desc;
4db35314 609 struct kvm_mmu_page *sp;
35149e21 610 pfn_t pfn;
290fc38d 611 unsigned long *rmapp;
cd4a4e53
AK		 612 int i;
613
43a3795a 614 if (!is_rmap_spte(*spte))
cd4a4e53 615 return;
4db35314 616 sp = page_header(__pa(spte));
35149e21 617 pfn = spte_to_pfn(*spte);
7b52345e 618 if (*spte & shadow_accessed_mask)
35149e21 619 kvm_set_pfn_accessed(pfn);
8dae4445 620 if (is_writable_pte(*spte))
acb66dd0 621 kvm_set_pfn_dirty(pfn);
44ad9944 622 rmapp = gfn_to_rmap(kvm, sp->gfns[spte - sp->spt], sp->role.level);
290fc38d 623 if (!*rmapp) {
cd4a4e53
AK		 624 printk(KERN_ERR "rmap_remove: %p %llx 0->BUG\n", spte, *spte);
625 BUG();
290fc38d 626 } else if (!(*rmapp & 1)) {
cd4a4e53 627 rmap_printk("rmap_remove: %p %llx 1->0\n", spte, *spte);
290fc38d 628 if ((u64 *)*rmapp != spte) {
cd4a4e53
AK		 629 printk(KERN_ERR "rmap_remove: %p %llx 1->BUG\n",
630 spte, *spte);
631 BUG();
632 }
290fc38d 633 *rmapp = 0;
cd4a4e53
AK		 634 } else {
635 rmap_printk("rmap_remove: %p %llx many->many\n", spte, *spte);
290fc38d 636 desc = (struct kvm_rmap_desc *)(*rmapp & ~1ul);
cd4a4e53
AK		 637 prev_desc = NULL;
638 while (desc) {
d555c333
AK		 639 for (i = 0; i < RMAP_EXT && desc->sptes[i]; ++i)
640 if (desc->sptes[i] == spte) {
290fc38d 641 rmap_desc_remove_entry(rmapp,
714b93da 642 desc, i,
cd4a4e53
AK		 643 prev_desc);
644 return;
645 }
646 prev_desc = desc;
647 desc = desc->more;
648 }
186a3e52 649 pr_err("rmap_remove: %p %llx many->many\n", spte, *spte);
cd4a4e53
AK		 650 BUG();
651 }
652}
653
98348e95 654static u64 *rmap_next(struct kvm *kvm, unsigned long *rmapp, u64 *spte)
374cbac0 655{
374cbac0 656 struct kvm_rmap_desc *desc;
98348e95
IE		 657 struct kvm_rmap_desc *prev_desc;
658 u64 *prev_spte;
659 int i;
660
661 if (!*rmapp)
662 return NULL;
663 else if (!(*rmapp & 1)) {
664 if (!spte)
665 return (u64 *)*rmapp;
666 return NULL;
667 }
668 desc = (struct kvm_rmap_desc *)(*rmapp & ~1ul);
669 prev_desc = NULL;
670 prev_spte = NULL;
671 while (desc) {
d555c333 672 for (i = 0; i < RMAP_EXT && desc->sptes[i]; ++i) {
98348e95 673 if (prev_spte == spte)
d555c333
AK		 674 return desc->sptes[i];
675 prev_spte = desc->sptes[i];
98348e95
IE		 676 }
677 desc = desc->more;
678 }
679 return NULL;
680}
681
b1a36821 682static int rmap_write_protect(struct kvm *kvm, u64 gfn)
98348e95 683{
290fc38d 684 unsigned long *rmapp;
374cbac0 685 u64 *spte;
44ad9944 686 int i, write_protected = 0;
374cbac0 687
4a4c9924 688 gfn = unalias_gfn(kvm, gfn);
44ad9944 689 rmapp = gfn_to_rmap(kvm, gfn, PT_PAGE_TABLE_LEVEL);
374cbac0 690
98348e95
IE		 691 spte = rmap_next(kvm, rmapp, NULL);
692 while (spte) {
374cbac0 693 BUG_ON(!spte);
374cbac0 694 BUG_ON(!(*spte & PT_PRESENT_MASK));
374cbac0 695 rmap_printk("rmap_write_protect: spte %p %llx\n", spte, *spte);
8dae4445 696 if (is_writable_pte(*spte)) {
d555c333 697 __set_spte(spte, *spte & ~PT_WRITABLE_MASK);
caa5b8a5
ED		 698 write_protected = 1;
699 }
9647c14c 700 spte = rmap_next(kvm, rmapp, spte);
374cbac0 701 }
855149aa 702 if (write_protected) {
35149e21 703 pfn_t pfn;
855149aa
IE		 704
705 spte = rmap_next(kvm, rmapp, NULL);
35149e21
AL		 706 pfn = spte_to_pfn(*spte);
707 kvm_set_pfn_dirty(pfn);
855149aa
IE		 708 }
709
05da4558 710 /* check for huge page mappings */
44ad9944
JR		 711 for (i = PT_DIRECTORY_LEVEL;
712 i < PT_PAGE_TABLE_LEVEL + KVM_NR_PAGE_SIZES; ++i) {
713 rmapp = gfn_to_rmap(kvm, gfn, i);
714 spte = rmap_next(kvm, rmapp, NULL);
715 while (spte) {
716 BUG_ON(!spte);
717 BUG_ON(!(*spte & PT_PRESENT_MASK));
718 BUG_ON((*spte & (PT_PAGE_SIZE_MASK|PT_PRESENT_MASK)) != (PT_PAGE_SIZE_MASK|PT_PRESENT_MASK));
719 pgprintk("rmap_write_protect(large): spte %p %llx %lld\n", spte, *spte, gfn);
8dae4445 720 if (is_writable_pte(*spte)) {
44ad9944
JR		 721 rmap_remove(kvm, spte);
722 --kvm->stat.lpages;
723 __set_spte(spte, shadow_trap_nonpresent_pte);
724 spte = NULL;
725 write_protected = 1;
726 }
727 spte = rmap_next(kvm, rmapp, spte);
05da4558 728 }
05da4558
MT		 729 }
730
b1a36821 731 return write_protected;
374cbac0
AK		 732}
733
8a8365c5
FD		 734static int kvm_unmap_rmapp(struct kvm *kvm, unsigned long *rmapp,
735 unsigned long data)
e930bffe
AA		 736{
737 u64 *spte;
738 int need_tlb_flush = 0;
739
740 while ((spte = rmap_next(kvm, rmapp, NULL))) {
741 BUG_ON(!(*spte & PT_PRESENT_MASK));
742 rmap_printk("kvm_rmap_unmap_hva: spte %p %llx\n", spte, *spte);
743 rmap_remove(kvm, spte);
d555c333 744 __set_spte(spte, shadow_trap_nonpresent_pte);
e930bffe
AA		 745 need_tlb_flush = 1;
746 }
747 return need_tlb_flush;
748}
749
8a8365c5
FD		 750static int kvm_set_pte_rmapp(struct kvm *kvm, unsigned long *rmapp,
751 unsigned long data)
3da0dd43
IE		 752{
753 int need_flush = 0;
754 u64 *spte, new_spte;
755 pte_t *ptep = (pte_t *)data;
756 pfn_t new_pfn;
757
758 WARN_ON(pte_huge(*ptep));
759 new_pfn = pte_pfn(*ptep);
760 spte = rmap_next(kvm, rmapp, NULL);
761 while (spte) {
762 BUG_ON(!is_shadow_present_pte(*spte));
763 rmap_printk("kvm_set_pte_rmapp: spte %p %llx\n", spte, *spte);
764 need_flush = 1;
765 if (pte_write(*ptep)) {
766 rmap_remove(kvm, spte);
767 __set_spte(spte, shadow_trap_nonpresent_pte);
768 spte = rmap_next(kvm, rmapp, NULL);
769 } else {
770 new_spte = *spte &~ (PT64_BASE_ADDR_MASK);
771 new_spte |= (u64)new_pfn << PAGE_SHIFT;
772
773 new_spte &= ~PT_WRITABLE_MASK;
774 new_spte &= ~SPTE_HOST_WRITEABLE;
8dae4445 775 if (is_writable_pte(*spte))
3da0dd43
IE		 776 kvm_set_pfn_dirty(spte_to_pfn(*spte));
777 __set_spte(spte, new_spte);
778 spte = rmap_next(kvm, rmapp, spte);
779 }
780 }
781 if (need_flush)
782 kvm_flush_remote_tlbs(kvm);
783
784 return 0;
785}
786
8a8365c5
FD		 787static int kvm_handle_hva(struct kvm *kvm, unsigned long hva,
788 unsigned long data,
3da0dd43 789 int (*handler)(struct kvm *kvm, unsigned long *rmapp,
8a8365c5 790 unsigned long data))
e930bffe 791{
852e3c19 792 int i, j;
90bb6fc5 793 int ret;
e930bffe 794 int retval = 0;
bc6678a3
MT		 795 struct kvm_memslots *slots;
796
797 slots = rcu_dereference(kvm->memslots);
e930bffe 798
46a26bf5
MT		 799 for (i = 0; i < slots->nmemslots; i++) {
800 struct kvm_memory_slot *memslot = &slots->memslots[i];
e930bffe
AA		 801 unsigned long start = memslot->userspace_addr;
802 unsigned long end;
803
e930bffe
AA		 804 end = start + (memslot->npages << PAGE_SHIFT);
805 if (hva >= start && hva < end) {
806 gfn_t gfn_offset = (hva - start) >> PAGE_SHIFT;
852e3c19 807
90bb6fc5 808 ret = handler(kvm, &memslot->rmap[gfn_offset], data);
852e3c19
JR		 809
810 for (j = 0; j < KVM_NR_PAGE_SIZES - 1; ++j) {
811 int idx = gfn_offset;
812 idx /= KVM_PAGES_PER_HPAGE(PT_DIRECTORY_LEVEL + j);
90bb6fc5 813 ret |= handler(kvm,
3da0dd43
IE		 814 &memslot->lpage_info[j][idx].rmap_pde,
815 data);
852e3c19 816 }
90bb6fc5
AK		 817 trace_kvm_age_page(hva, memslot, ret);
818 retval |= ret;
e930bffe
AA		 819 }
820 }
821
822 return retval;
823}
824
825int kvm_unmap_hva(struct kvm *kvm, unsigned long hva)
826{
3da0dd43
IE		 827 return kvm_handle_hva(kvm, hva, 0, kvm_unmap_rmapp);
828}
829
830void kvm_set_spte_hva(struct kvm *kvm, unsigned long hva, pte_t pte)
831{
8a8365c5 832 kvm_handle_hva(kvm, hva, (unsigned long)&pte, kvm_set_pte_rmapp);
e930bffe
AA		 833}
834
8a8365c5
FD		 835static int kvm_age_rmapp(struct kvm *kvm, unsigned long *rmapp,
836 unsigned long data)
e930bffe
AA		 837{
838 u64 *spte;
839 int young = 0;
840
6316e1c8
RR		 841 /*
842 * Emulate the accessed bit for EPT, by checking if this page has
843 * an EPT mapping, and clearing it if it does. On the next access,
844 * a new EPT mapping will be established.
845 * This has some overhead, but not as much as the cost of swapping
846 * out actively used pages or breaking up actively used hugepages.
847 */
534e38b4 848 if (!shadow_accessed_mask)
6316e1c8 849 return kvm_unmap_rmapp(kvm, rmapp, data);
534e38b4 850
e930bffe
AA		 851 spte = rmap_next(kvm, rmapp, NULL);
852 while (spte) {
853 int _young;
854 u64 _spte = *spte;
855 BUG_ON(!(_spte & PT_PRESENT_MASK));
856 _young = _spte & PT_ACCESSED_MASK;
857 if (_young) {
858 young = 1;
859 clear_bit(PT_ACCESSED_SHIFT, (unsigned long *)spte);
860 }
861 spte = rmap_next(kvm, rmapp, spte);
862 }
863 return young;
864}
865
53a27b39
MT		 866#define RMAP_RECYCLE_THRESHOLD 1000
867
852e3c19 868static void rmap_recycle(struct kvm_vcpu *vcpu, u64 *spte, gfn_t gfn)
53a27b39
MT		 869{
870 unsigned long *rmapp;
852e3c19
JR		 871 struct kvm_mmu_page *sp;
872
873 sp = page_header(__pa(spte));
53a27b39
MT		 874
875 gfn = unalias_gfn(vcpu->kvm, gfn);
852e3c19 876 rmapp = gfn_to_rmap(vcpu->kvm, gfn, sp->role.level);
53a27b39 877
3da0dd43 878 kvm_unmap_rmapp(vcpu->kvm, rmapp, 0);
53a27b39
MT		 879 kvm_flush_remote_tlbs(vcpu->kvm);
880}
881
e930bffe
AA		 882int kvm_age_hva(struct kvm *kvm, unsigned long hva)
883{
3da0dd43 884 return kvm_handle_hva(kvm, hva, 0, kvm_age_rmapp);
e930bffe
AA		 885}
886
d6c69ee9 887#ifdef MMU_DEBUG
47ad8e68 888static int is_empty_shadow_page(u64 *spt)
6aa8b732 889{
139bdb2d
AK		 890 u64 *pos;
891 u64 *end;
892
47ad8e68 893 for (pos = spt, end = pos + PAGE_SIZE / sizeof(u64); pos != end; pos++)
3c915510 894 if (is_shadow_present_pte(*pos)) {
b8688d51 895 printk(KERN_ERR "%s: %p %llx\n", __func__,
139bdb2d 896 pos, *pos);
6aa8b732 897 return 0;
139bdb2d 898 }
6aa8b732
AK		 899 return 1;
900}
d6c69ee9 901#endif
6aa8b732 902
4db35314 903static void kvm_mmu_free_page(struct kvm *kvm, struct kvm_mmu_page *sp)
260746c0 904{
4db35314
AK		 905 ASSERT(is_empty_shadow_page(sp->spt));
906 list_del(&sp->link);
907 __free_page(virt_to_page(sp->spt));
908 __free_page(virt_to_page(sp->gfns));
909 kfree(sp);
f05e70ac 910 ++kvm->arch.n_free_mmu_pages;
260746c0
AK		 911}
912
cea0f0e7
AK		 913static unsigned kvm_page_table_hashfn(gfn_t gfn)
914{
1ae0a13d 915 return gfn & ((1 << KVM_MMU_HASH_SHIFT) - 1);
cea0f0e7
AK		 916}
917
25c0de2c
AK		 918static struct kvm_mmu_page *kvm_mmu_alloc_page(struct kvm_vcpu *vcpu,
919 u64 *parent_pte)
6aa8b732 920{
4db35314 921 struct kvm_mmu_page *sp;
6aa8b732 922
ad312c7c
ZX		 923 sp = mmu_memory_cache_alloc(&vcpu->arch.mmu_page_header_cache, sizeof *sp);
924 sp->spt = mmu_memory_cache_alloc(&vcpu->arch.mmu_page_cache, PAGE_SIZE);
925 sp->gfns = mmu_memory_cache_alloc(&vcpu->arch.mmu_page_cache, PAGE_SIZE);
4db35314 926 set_page_private(virt_to_page(sp->spt), (unsigned long)sp);
f05e70ac 927 list_add(&sp->link, &vcpu->kvm->arch.active_mmu_pages);
6cffe8ca 928 INIT_LIST_HEAD(&sp->oos_link);
291f26bc 929 bitmap_zero(sp->slot_bitmap, KVM_MEMORY_SLOTS + KVM_PRIVATE_MEM_SLOTS);
4db35314
AK		 930 sp->multimapped = 0;
931 sp->parent_pte = parent_pte;
f05e70ac 932 --vcpu->kvm->arch.n_free_mmu_pages;
4db35314 933 return sp;
6aa8b732
AK		 934}
935
714b93da 936static void mmu_page_add_parent_pte(struct kvm_vcpu *vcpu,
4db35314 937 struct kvm_mmu_page *sp, u64 *parent_pte)
cea0f0e7
AK		 938{
939 struct kvm_pte_chain *pte_chain;
940 struct hlist_node *node;
941 int i;
942
943 if (!parent_pte)
944 return;
4db35314
AK		 945 if (!sp->multimapped) {
946 u64 *old = sp->parent_pte;
cea0f0e7
AK		 947
948 if (!old) {
4db35314 949 sp->parent_pte = parent_pte;
cea0f0e7
AK		 950 return;
951 }
4db35314 952 sp->multimapped = 1;
714b93da 953 pte_chain = mmu_alloc_pte_chain(vcpu);
4db35314
AK		 954 INIT_HLIST_HEAD(&sp->parent_ptes);
955 hlist_add_head(&pte_chain->link, &sp->parent_ptes);
cea0f0e7
AK		 956 pte_chain->parent_ptes[0] = old;
957 }
4db35314 958 hlist_for_each_entry(pte_chain, node, &sp->parent_ptes, link) {
cea0f0e7
AK		 959 if (pte_chain->parent_ptes[NR_PTE_CHAIN_ENTRIES-1])
960 continue;
961 for (i = 0; i < NR_PTE_CHAIN_ENTRIES; ++i)
962 if (!pte_chain->parent_ptes[i]) {
963 pte_chain->parent_ptes[i] = parent_pte;
964 return;
965 }
966 }
714b93da 967 pte_chain = mmu_alloc_pte_chain(vcpu);
cea0f0e7 968 BUG_ON(!pte_chain);
4db35314 969 hlist_add_head(&pte_chain->link, &sp->parent_ptes);
cea0f0e7
AK		 970 pte_chain->parent_ptes[0] = parent_pte;
971}
972
4db35314 973static void mmu_page_remove_parent_pte(struct kvm_mmu_page *sp,
cea0f0e7
AK		 974 u64 *parent_pte)
975{
976 struct kvm_pte_chain *pte_chain;
977 struct hlist_node *node;
978 int i;
979
4db35314
AK		 980 if (!sp->multimapped) {
981 BUG_ON(sp->parent_pte != parent_pte);
982 sp->parent_pte = NULL;
cea0f0e7
AK		 983 return;
984 }
4db35314 985 hlist_for_each_entry(pte_chain, node, &sp->parent_ptes, link)
cea0f0e7
AK		 986 for (i = 0; i < NR_PTE_CHAIN_ENTRIES; ++i) {
987 if (!pte_chain->parent_ptes[i])
988 break;
989 if (pte_chain->parent_ptes[i] != parent_pte)
990 continue;
697fe2e2
AK		 991 while (i + 1 < NR_PTE_CHAIN_ENTRIES
992 && pte_chain->parent_ptes[i + 1]) {
cea0f0e7
AK		 993 pte_chain->parent_ptes[i]
994 = pte_chain->parent_ptes[i + 1];
995 ++i;
996 }
997 pte_chain->parent_ptes[i] = NULL;
697fe2e2
AK		 998 if (i == 0) {
999 hlist_del(&pte_chain->link);
90cb0529 1000 mmu_free_pte_chain(pte_chain);
4db35314
AK		 1001 if (hlist_empty(&sp->parent_ptes)) {
1002 sp->multimapped = 0;
1003 sp->parent_pte = NULL;
697fe2e2
AK		 1004 }
1005 }
cea0f0e7
AK		 1006 return;
1007 }
1008 BUG();
1009}
1010
ad8cfbe3
MT		 1011
1012static void mmu_parent_walk(struct kvm_vcpu *vcpu, struct kvm_mmu_page *sp,
1013 mmu_parent_walk_fn fn)
1014{
1015 struct kvm_pte_chain *pte_chain;
1016 struct hlist_node *node;
1017 struct kvm_mmu_page *parent_sp;
1018 int i;
1019
1020 if (!sp->multimapped && sp->parent_pte) {
1021 parent_sp = page_header(__pa(sp->parent_pte));
1022 fn(vcpu, parent_sp);
1023 mmu_parent_walk(vcpu, parent_sp, fn);
1024 return;
1025 }
1026 hlist_for_each_entry(pte_chain, node, &sp->parent_ptes, link)
1027 for (i = 0; i < NR_PTE_CHAIN_ENTRIES; ++i) {
1028 if (!pte_chain->parent_ptes[i])
1029 break;
1030 parent_sp = page_header(__pa(pte_chain->parent_ptes[i]));
1031 fn(vcpu, parent_sp);
1032 mmu_parent_walk(vcpu, parent_sp, fn);
1033 }
1034}
1035
0074ff63
MT		 1036static void kvm_mmu_update_unsync_bitmap(u64 *spte)
1037{
1038 unsigned int index;
1039 struct kvm_mmu_page *sp = page_header(__pa(spte));
1040
1041 index = spte - sp->spt;
60c8aec6
MT		 1042 if (!__test_and_set_bit(index, sp->unsync_child_bitmap))
1043 sp->unsync_children++;
1044 WARN_ON(!sp->unsync_children);
0074ff63
MT		 1045}
1046
1047static void kvm_mmu_update_parents_unsync(struct kvm_mmu_page *sp)
1048{
1049 struct kvm_pte_chain *pte_chain;
1050 struct hlist_node *node;
1051 int i;
1052
1053 if (!sp->parent_pte)
1054 return;
1055
1056 if (!sp->multimapped) {
1057 kvm_mmu_update_unsync_bitmap(sp->parent_pte);
1058 return;
1059 }
1060
1061 hlist_for_each_entry(pte_chain, node, &sp->parent_ptes, link)
1062 for (i = 0; i < NR_PTE_CHAIN_ENTRIES; ++i) {
1063 if (!pte_chain->parent_ptes[i])
1064 break;
1065 kvm_mmu_update_unsync_bitmap(pte_chain->parent_ptes[i]);
1066 }
1067}
1068
1069static int unsync_walk_fn(struct kvm_vcpu *vcpu, struct kvm_mmu_page *sp)
1070{
0074ff63
MT		 1071 kvm_mmu_update_parents_unsync(sp);
1072 return 1;
1073}
1074
1075static void kvm_mmu_mark_parents_unsync(struct kvm_vcpu *vcpu,
1076 struct kvm_mmu_page *sp)
1077{
1078 mmu_parent_walk(vcpu, sp, unsync_walk_fn);
1079 kvm_mmu_update_parents_unsync(sp);
1080}
1081
d761a501
AK		 1082static void nonpaging_prefetch_page(struct kvm_vcpu *vcpu,
1083 struct kvm_mmu_page *sp)
1084{
1085 int i;
1086
1087 for (i = 0; i < PT64_ENT_PER_PAGE; ++i)
1088 sp->spt[i] = shadow_trap_nonpresent_pte;
1089}
1090
e8bc217a
MT		 1091static int nonpaging_sync_page(struct kvm_vcpu *vcpu,
1092 struct kvm_mmu_page *sp)
1093{
1094 return 1;
1095}
1096
a7052897
MT		 1097static void nonpaging_invlpg(struct kvm_vcpu *vcpu, gva_t gva)
1098{
1099}
1100
60c8aec6
MT		 1101#define KVM_PAGE_ARRAY_NR 16
1102
1103struct kvm_mmu_pages {
1104 struct mmu_page_and_offset {
1105 struct kvm_mmu_page *sp;
1106 unsigned int idx;
1107 } page[KVM_PAGE_ARRAY_NR];
1108 unsigned int nr;
1109};
1110
0074ff63
MT		 1111#define for_each_unsync_children(bitmap, idx) \
1112 for (idx = find_first_bit(bitmap, 512); \
1113 idx < 512; \
1114 idx = find_next_bit(bitmap, 512, idx+1))
1115
cded19f3
HE		 1116static int mmu_pages_add(struct kvm_mmu_pages *pvec, struct kvm_mmu_page *sp,
1117 int idx)
4731d4c7 1118{
60c8aec6 1119 int i;
4731d4c7 1120
60c8aec6
MT		 1121 if (sp->unsync)
1122 for (i=0; i < pvec->nr; i++)
1123 if (pvec->page[i].sp == sp)
1124 return 0;
1125
1126 pvec->page[pvec->nr].sp = sp;
1127 pvec->page[pvec->nr].idx = idx;
1128 pvec->nr++;
1129 return (pvec->nr == KVM_PAGE_ARRAY_NR);
1130}
1131
1132static int __mmu_unsync_walk(struct kvm_mmu_page *sp,
1133 struct kvm_mmu_pages *pvec)
1134{
1135 int i, ret, nr_unsync_leaf = 0;
4731d4c7 1136
0074ff63 1137 for_each_unsync_children(sp->unsync_child_bitmap, i) {
4731d4c7
MT		 1138 u64 ent = sp->spt[i];
1139
87917239 1140 if (is_shadow_present_pte(ent) && !is_large_pte(ent)) {
4731d4c7
MT		 1141 struct kvm_mmu_page *child;
1142 child = page_header(ent & PT64_BASE_ADDR_MASK);
1143
1144 if (child->unsync_children) {
60c8aec6
MT		 1145 if (mmu_pages_add(pvec, child, i))
1146 return -ENOSPC;
1147
1148 ret = __mmu_unsync_walk(child, pvec);
1149 if (!ret)
1150 __clear_bit(i, sp->unsync_child_bitmap);
1151 else if (ret > 0)
1152 nr_unsync_leaf += ret;
1153 else
4731d4c7
MT		 1154 return ret;
1155 }
1156
1157 if (child->unsync) {
60c8aec6
MT		 1158 nr_unsync_leaf++;
1159 if (mmu_pages_add(pvec, child, i))
1160 return -ENOSPC;
4731d4c7
MT		 1161 }
1162 }
1163 }
1164
0074ff63 1165 if (find_first_bit(sp->unsync_child_bitmap, 512) == 512)
4731d4c7
MT		 1166 sp->unsync_children = 0;
1167
60c8aec6
MT		 1168 return nr_unsync_leaf;
1169}
1170
1171static int mmu_unsync_walk(struct kvm_mmu_page *sp,
1172 struct kvm_mmu_pages *pvec)
1173{
1174 if (!sp->unsync_children)
1175 return 0;
1176
1177 mmu_pages_add(pvec, sp, 0);
1178 return __mmu_unsync_walk(sp, pvec);
4731d4c7
MT		 1179}
1180
4db35314 1181static struct kvm_mmu_page *kvm_mmu_lookup_page(struct kvm *kvm, gfn_t gfn)
cea0f0e7
AK		 1182{
1183 unsigned index;
1184 struct hlist_head *bucket;
4db35314 1185 struct kvm_mmu_page *sp;
cea0f0e7
AK		 1186 struct hlist_node *node;
1187
b8688d51 1188 pgprintk("%s: looking for gfn %lx\n", __func__, gfn);
1ae0a13d 1189 index = kvm_page_table_hashfn(gfn);
f05e70ac 1190 bucket = &kvm->arch.mmu_page_hash[index];
4db35314 1191 hlist_for_each_entry(sp, node, bucket, hash_link)
f6e2c02b 1192 if (sp->gfn == gfn && !sp->role.direct
2e53d63a 1193 && !sp->role.invalid) {
cea0f0e7 1194 pgprintk("%s: found role %x\n",
b8688d51 1195 __func__, sp->role.word);
4db35314 1196 return sp;
cea0f0e7
AK		 1197 }
1198 return NULL;
1199}
1200
4731d4c7
MT		 1201static void kvm_unlink_unsync_page(struct kvm *kvm, struct kvm_mmu_page *sp)
1202{
1203 WARN_ON(!sp->unsync);
1204 sp->unsync = 0;
1205 --kvm->stat.mmu_unsync;
1206}
1207
1208static int kvm_mmu_zap_page(struct kvm *kvm, struct kvm_mmu_page *sp);
1209
1210static int kvm_sync_page(struct kvm_vcpu *vcpu, struct kvm_mmu_page *sp)
1211{
1212 if (sp->role.glevels != vcpu->arch.mmu.root_level) {
1213 kvm_mmu_zap_page(vcpu->kvm, sp);
1214 return 1;
1215 }
1216
f691fe1d 1217 trace_kvm_mmu_sync_page(sp);
b1a36821
MT		 1218 if (rmap_write_protect(vcpu->kvm, sp->gfn))
1219 kvm_flush_remote_tlbs(vcpu->kvm);
0c0f40bd 1220 kvm_unlink_unsync_page(vcpu->kvm, sp);
4731d4c7
MT		 1221 if (vcpu->arch.mmu.sync_page(vcpu, sp)) {
1222 kvm_mmu_zap_page(vcpu->kvm, sp);
1223 return 1;
1224 }
1225
1226 kvm_mmu_flush_tlb(vcpu);
4731d4c7
MT		 1227 return 0;
1228}
1229
60c8aec6
MT		 1230struct mmu_page_path {
1231 struct kvm_mmu_page *parent[PT64_ROOT_LEVEL-1];
1232 unsigned int idx[PT64_ROOT_LEVEL-1];
4731d4c7
MT		 1233};
1234
60c8aec6
MT		 1235#define for_each_sp(pvec, sp, parents, i) \
1236 for (i = mmu_pages_next(&pvec, &parents, -1), \
1237 sp = pvec.page[i].sp; \
1238 i < pvec.nr && ({ sp = pvec.page[i].sp; 1;}); \
1239 i = mmu_pages_next(&pvec, &parents, i))
1240
cded19f3
HE		 1241static int mmu_pages_next(struct kvm_mmu_pages *pvec,
1242 struct mmu_page_path *parents,
1243 int i)
60c8aec6
MT		 1244{
1245 int n;
1246
1247 for (n = i+1; n < pvec->nr; n++) {
1248 struct kvm_mmu_page *sp = pvec->page[n].sp;
1249
1250 if (sp->role.level == PT_PAGE_TABLE_LEVEL) {
1251 parents->idx[0] = pvec->page[n].idx;
1252 return n;
1253 }
1254
1255 parents->parent[sp->role.level-2] = sp;
1256 parents->idx[sp->role.level-1] = pvec->page[n].idx;
1257 }
1258
1259 return n;
1260}
1261
cded19f3 1262static void mmu_pages_clear_parents(struct mmu_page_path *parents)
4731d4c7 1263{
60c8aec6
MT		 1264 struct kvm_mmu_page *sp;
1265 unsigned int level = 0;
1266
1267 do {
1268 unsigned int idx = parents->idx[level];
4731d4c7 1269
60c8aec6
MT		 1270 sp = parents->parent[level];
1271 if (!sp)
1272 return;
1273
1274 --sp->unsync_children;
1275 WARN_ON((int)sp->unsync_children < 0);
1276 __clear_bit(idx, sp->unsync_child_bitmap);
1277 level++;
1278 } while (level < PT64_ROOT_LEVEL-1 && !sp->unsync_children);
4731d4c7
MT		 1279}
1280
60c8aec6
MT		 1281static void kvm_mmu_pages_init(struct kvm_mmu_page *parent,
1282 struct mmu_page_path *parents,
1283 struct kvm_mmu_pages *pvec)
4731d4c7 1284{
60c8aec6
MT		 1285 parents->parent[parent->role.level-1] = NULL;
1286 pvec->nr = 0;
1287}
4731d4c7 1288
60c8aec6
MT		 1289static void mmu_sync_children(struct kvm_vcpu *vcpu,
1290 struct kvm_mmu_page *parent)
1291{
1292 int i;
1293 struct kvm_mmu_page *sp;
1294 struct mmu_page_path parents;
1295 struct kvm_mmu_pages pages;
1296
1297 kvm_mmu_pages_init(parent, &parents, &pages);
1298 while (mmu_unsync_walk(parent, &pages)) {
b1a36821
MT		 1299 int protected = 0;
1300
1301 for_each_sp(pages, sp, parents, i)
1302 protected |= rmap_write_protect(vcpu->kvm, sp->gfn);
1303
1304 if (protected)
1305 kvm_flush_remote_tlbs(vcpu->kvm);
1306
60c8aec6
MT		 1307 for_each_sp(pages, sp, parents, i) {
1308 kvm_sync_page(vcpu, sp);
1309 mmu_pages_clear_parents(&parents);
1310 }
4731d4c7 1311 cond_resched_lock(&vcpu->kvm->mmu_lock);
60c8aec6
MT		 1312 kvm_mmu_pages_init(parent, &parents, &pages);
1313 }
4731d4c7
MT		 1314}
1315
cea0f0e7
AK		 1316static struct kvm_mmu_page *kvm_mmu_get_page(struct kvm_vcpu *vcpu,
1317 gfn_t gfn,
1318 gva_t gaddr,
1319 unsigned level,
f6e2c02b 1320 int direct,
41074d07 1321 unsigned access,
f7d9c7b7 1322 u64 *parent_pte)
cea0f0e7
AK		 1323{
1324 union kvm_mmu_page_role role;
1325 unsigned index;
1326 unsigned quadrant;
1327 struct hlist_head *bucket;
4db35314 1328 struct kvm_mmu_page *sp;
4731d4c7 1329 struct hlist_node *node, *tmp;
cea0f0e7 1330
a770f6f2 1331 role = vcpu->arch.mmu.base_role;
cea0f0e7 1332 role.level = level;
f6e2c02b 1333 role.direct = direct;
41074d07 1334 role.access = access;
ad312c7c 1335 if (vcpu->arch.mmu.root_level <= PT32_ROOT_LEVEL) {
cea0f0e7
AK		 1336 quadrant = gaddr >> (PAGE_SHIFT + (PT64_PT_BITS * level));
1337 quadrant &= (1 << ((PT32_PT_BITS - PT64_PT_BITS) * level)) - 1;
1338 role.quadrant = quadrant;
1339 }
1ae0a13d 1340 index = kvm_page_table_hashfn(gfn);
f05e70ac 1341 bucket = &vcpu->kvm->arch.mmu_page_hash[index];
4731d4c7
MT		 1342 hlist_for_each_entry_safe(sp, node, tmp, bucket, hash_link)
1343 if (sp->gfn == gfn) {
1344 if (sp->unsync)
1345 if (kvm_sync_page(vcpu, sp))
1346 continue;
1347
1348 if (sp->role.word != role.word)
1349 continue;
1350
4db35314 1351 mmu_page_add_parent_pte(vcpu, sp, parent_pte);
0074ff63
MT		 1352 if (sp->unsync_children) {
1353 set_bit(KVM_REQ_MMU_SYNC, &vcpu->requests);
1354 kvm_mmu_mark_parents_unsync(vcpu, sp);
1355 }
f691fe1d 1356 trace_kvm_mmu_get_page(sp, false);
4db35314 1357 return sp;
cea0f0e7 1358 }
dfc5aa00 1359 ++vcpu->kvm->stat.mmu_cache_miss;
4db35314
AK		 1360 sp = kvm_mmu_alloc_page(vcpu, parent_pte);
1361 if (!sp)
1362 return sp;
4db35314
AK		 1363 sp->gfn = gfn;
1364 sp->role = role;
1365 hlist_add_head(&sp->hash_link, bucket);
f6e2c02b 1366 if (!direct) {
b1a36821
MT		 1367 if (rmap_write_protect(vcpu->kvm, gfn))
1368 kvm_flush_remote_tlbs(vcpu->kvm);
4731d4c7
MT		 1369 account_shadowed(vcpu->kvm, gfn);
1370 }
131d8279
AK		 1371 if (shadow_trap_nonpresent_pte != shadow_notrap_nonpresent_pte)
1372 vcpu->arch.mmu.prefetch_page(vcpu, sp);
1373 else
1374 nonpaging_prefetch_page(vcpu, sp);
f691fe1d 1375 trace_kvm_mmu_get_page(sp, true);
4db35314 1376 return sp;
cea0f0e7
AK		 1377}
1378
2d11123a
AK		 1379static void shadow_walk_init(struct kvm_shadow_walk_iterator *iterator,
1380 struct kvm_vcpu *vcpu, u64 addr)
1381{
1382 iterator->addr = addr;
1383 iterator->shadow_addr = vcpu->arch.mmu.root_hpa;
1384 iterator->level = vcpu->arch.mmu.shadow_root_level;
1385 if (iterator->level == PT32E_ROOT_LEVEL) {
1386 iterator->shadow_addr
1387 = vcpu->arch.mmu.pae_root[(addr >> 30) & 3];
1388 iterator->shadow_addr &= PT64_BASE_ADDR_MASK;
1389 --iterator->level;
1390 if (!iterator->shadow_addr)
1391 iterator->level = 0;
1392 }
1393}
1394
1395static bool shadow_walk_okay(struct kvm_shadow_walk_iterator *iterator)
1396{
1397 if (iterator->level < PT_PAGE_TABLE_LEVEL)
1398 return false;
4d88954d
MT		 1399
1400 if (iterator->level == PT_PAGE_TABLE_LEVEL)
1401 if (is_large_pte(*iterator->sptep))
1402 return false;
1403
2d11123a
AK		 1404 iterator->index = SHADOW_PT_INDEX(iterator->addr, iterator->level);
1405 iterator->sptep = ((u64 *)__va(iterator->shadow_addr)) + iterator->index;
1406 return true;
1407}
1408
1409static void shadow_walk_next(struct kvm_shadow_walk_iterator *iterator)
1410{
1411 iterator->shadow_addr = *iterator->sptep & PT64_BASE_ADDR_MASK;
1412 --iterator->level;
1413}
1414
90cb0529 1415static void kvm_mmu_page_unlink_children(struct kvm *kvm,
4db35314 1416 struct kvm_mmu_page *sp)
a436036b 1417{
697fe2e2
AK		 1418 unsigned i;
1419 u64 *pt;
1420 u64 ent;
1421
4db35314 1422 pt = sp->spt;
697fe2e2 1423
697fe2e2
AK		 1424 for (i = 0; i < PT64_ENT_PER_PAGE; ++i) {
1425 ent = pt[i];
1426
05da4558 1427 if (is_shadow_present_pte(ent)) {
776e6633 1428 if (!is_last_spte(ent, sp->role.level)) {
05da4558
MT		 1429 ent &= PT64_BASE_ADDR_MASK;
1430 mmu_page_remove_parent_pte(page_header(ent),
1431 &pt[i]);
1432 } else {
776e6633
MT		 1433 if (is_large_pte(ent))
1434 --kvm->stat.lpages;
05da4558
MT		 1435 rmap_remove(kvm, &pt[i]);
1436 }
1437 }
c7addb90 1438 pt[i] = shadow_trap_nonpresent_pte;
697fe2e2 1439 }
a436036b
AK		 1440}
1441
4db35314 1442static void kvm_mmu_put_page(struct kvm_mmu_page *sp, u64 *parent_pte)
cea0f0e7 1443{
4db35314 1444 mmu_page_remove_parent_pte(sp, parent_pte);
a436036b
AK		 1445}
1446
12b7d28f
AK		 1447static void kvm_mmu_reset_last_pte_updated(struct kvm *kvm)
1448{
1449 int i;
988a2cae 1450 struct kvm_vcpu *vcpu;
12b7d28f 1451
988a2cae
GN		 1452 kvm_for_each_vcpu(i, vcpu, kvm)
1453 vcpu->arch.last_pte_updated = NULL;
12b7d28f
AK		 1454}
1455
31aa2b44 1456static void kvm_mmu_unlink_parents(struct kvm *kvm, struct kvm_mmu_page *sp)
a436036b
AK		 1457{
1458 u64 *parent_pte;
1459
4db35314
AK		 1460 while (sp->multimapped || sp->parent_pte) {
1461 if (!sp->multimapped)
1462 parent_pte = sp->parent_pte;
a436036b
AK		 1463 else {
1464 struct kvm_pte_chain *chain;
1465
4db35314 1466 chain = container_of(sp->parent_ptes.first,
a436036b
AK		 1467 struct kvm_pte_chain, link);
1468 parent_pte = chain->parent_ptes[0];
1469 }
697fe2e2 1470 BUG_ON(!parent_pte);
4db35314 1471 kvm_mmu_put_page(sp, parent_pte);
d555c333 1472 __set_spte(parent_pte, shadow_trap_nonpresent_pte);
a436036b 1473 }
31aa2b44
AK		 1474}
1475
60c8aec6
MT		 1476static int mmu_zap_unsync_children(struct kvm *kvm,
1477 struct kvm_mmu_page *parent)
4731d4c7 1478{
60c8aec6
MT		 1479 int i, zapped = 0;
1480 struct mmu_page_path parents;
1481 struct kvm_mmu_pages pages;
4731d4c7 1482
60c8aec6 1483 if (parent->role.level == PT_PAGE_TABLE_LEVEL)
4731d4c7 1484 return 0;
60c8aec6
MT		 1485
1486 kvm_mmu_pages_init(parent, &parents, &pages);
1487 while (mmu_unsync_walk(parent, &pages)) {
1488 struct kvm_mmu_page *sp;
1489
1490 for_each_sp(pages, sp, parents, i) {
1491 kvm_mmu_zap_page(kvm, sp);
1492 mmu_pages_clear_parents(&parents);
77662e00 1493 zapped++;
60c8aec6 1494 }
60c8aec6
MT		 1495 kvm_mmu_pages_init(parent, &parents, &pages);
1496 }
1497
1498 return zapped;
4731d4c7
MT		 1499}
1500
07385413 1501static int kvm_mmu_zap_page(struct kvm *kvm, struct kvm_mmu_page *sp)
31aa2b44 1502{
4731d4c7 1503 int ret;
f691fe1d
AK		 1504
1505 trace_kvm_mmu_zap_page(sp);
31aa2b44 1506 ++kvm->stat.mmu_shadow_zapped;
4731d4c7 1507 ret = mmu_zap_unsync_children(kvm, sp);
4db35314 1508 kvm_mmu_page_unlink_children(kvm, sp);
31aa2b44 1509 kvm_mmu_unlink_parents(kvm, sp);
5b5c6a5a 1510 kvm_flush_remote_tlbs(kvm);
f6e2c02b 1511 if (!sp->role.invalid && !sp->role.direct)
5b5c6a5a 1512 unaccount_shadowed(kvm, sp->gfn);
4731d4c7
MT		 1513 if (sp->unsync)
1514 kvm_unlink_unsync_page(kvm, sp);
4db35314
AK		 1515 if (!sp->root_count) {
1516 hlist_del(&sp->hash_link);
1517 kvm_mmu_free_page(kvm, sp);
2e53d63a 1518 } else {
2e53d63a 1519 sp->role.invalid = 1;
5b5c6a5a 1520 list_move(&sp->link, &kvm->arch.active_mmu_pages);
2e53d63a
MT		 1521 kvm_reload_remote_mmus(kvm);
1522 }
12b7d28f 1523 kvm_mmu_reset_last_pte_updated(kvm);
4731d4c7 1524 return ret;
a436036b
AK		 1525}
1526
82ce2c96
IE		 1527/*
1528 * Changing the number of mmu pages allocated to the vm
1529 * Note: if kvm_nr_mmu_pages is too small, you will get dead lock
1530 */
1531void kvm_mmu_change_mmu_pages(struct kvm *kvm, unsigned int kvm_nr_mmu_pages)
1532{
025dbbf3
MT		 1533 int used_pages;
1534
1535 used_pages = kvm->arch.n_alloc_mmu_pages - kvm->arch.n_free_mmu_pages;
1536 used_pages = max(0, used_pages);
1537
82ce2c96
IE		 1538 /*
1539 * If we set the number of mmu pages to be smaller be than the
1540 * number of actived pages , we must to free some mmu pages before we
1541 * change the value
1542 */
1543
025dbbf3 1544 if (used_pages > kvm_nr_mmu_pages) {
77662e00
XG		 1545 while (used_pages > kvm_nr_mmu_pages &&
1546 !list_empty(&kvm->arch.active_mmu_pages)) {
82ce2c96
IE		 1547 struct kvm_mmu_page *page;
1548
f05e70ac 1549 page = container_of(kvm->arch.active_mmu_pages.prev,
82ce2c96 1550 struct kvm_mmu_page, link);
77662e00 1551 used_pages -= kvm_mmu_zap_page(kvm, page);
025dbbf3 1552 used_pages--;
82ce2c96 1553 }
77662e00 1554 kvm_nr_mmu_pages = used_pages;
f05e70ac 1555 kvm->arch.n_free_mmu_pages = 0;
82ce2c96
IE		 1556 }
1557 else
f05e70ac
ZX		 1558 kvm->arch.n_free_mmu_pages += kvm_nr_mmu_pages
1559 - kvm->arch.n_alloc_mmu_pages;
82ce2c96 1560
f05e70ac 1561 kvm->arch.n_alloc_mmu_pages = kvm_nr_mmu_pages;
82ce2c96
IE		 1562}
1563
f67a46f4 1564static int kvm_mmu_unprotect_page(struct kvm *kvm, gfn_t gfn)
a436036b
AK		 1565{
1566 unsigned index;
1567 struct hlist_head *bucket;
4db35314 1568 struct kvm_mmu_page *sp;
a436036b
AK		 1569 struct hlist_node *node, *n;
1570 int r;
1571
b8688d51 1572 pgprintk("%s: looking for gfn %lx\n", __func__, gfn);
a436036b 1573 r = 0;
1ae0a13d 1574 index = kvm_page_table_hashfn(gfn);
f05e70ac 1575 bucket = &kvm->arch.mmu_page_hash[index];
4db35314 1576 hlist_for_each_entry_safe(sp, node, n, bucket, hash_link)
f6e2c02b 1577 if (sp->gfn == gfn && !sp->role.direct) {
b8688d51 1578 pgprintk("%s: gfn %lx role %x\n", __func__, gfn,
4db35314 1579 sp->role.word);
a436036b 1580 r = 1;
07385413
MT		 1581 if (kvm_mmu_zap_page(kvm, sp))
1582 n = bucket->first;
a436036b
AK		 1583 }
1584 return r;
cea0f0e7
AK		 1585}
1586
f67a46f4 1587static void mmu_unshadow(struct kvm *kvm, gfn_t gfn)
97a0a01e 1588{
4677a3b6
AK		 1589 unsigned index;
1590 struct hlist_head *bucket;
4db35314 1591 struct kvm_mmu_page *sp;
4677a3b6 1592 struct hlist_node *node, *nn;
97a0a01e 1593
4677a3b6
AK		 1594 index = kvm_page_table_hashfn(gfn);
1595 bucket = &kvm->arch.mmu_page_hash[index];
1596 hlist_for_each_entry_safe(sp, node, nn, bucket, hash_link) {
f6e2c02b 1597 if (sp->gfn == gfn && !sp->role.direct
4677a3b6
AK		 1598 && !sp->role.invalid) {
1599 pgprintk("%s: zap %lx %x\n",
1600 __func__, gfn, sp->role.word);
77662e00
XG		 1601 if (kvm_mmu_zap_page(kvm, sp))
1602 nn = bucket->first;
4677a3b6 1603 }
97a0a01e
AK		 1604 }
1605}
1606
38c335f1 1607static void page_header_update_slot(struct kvm *kvm, void *pte, gfn_t gfn)
6aa8b732 1608{
bc6678a3 1609 int slot = memslot_id(kvm, gfn);
4db35314 1610 struct kvm_mmu_page *sp = page_header(__pa(pte));
6aa8b732 1611
291f26bc 1612 __set_bit(slot, sp->slot_bitmap);
6aa8b732
AK		 1613}
1614
6844dec6
MT		 1615static void mmu_convert_notrap(struct kvm_mmu_page *sp)
1616{
1617 int i;
1618 u64 *pt = sp->spt;
1619
1620 if (shadow_trap_nonpresent_pte == shadow_notrap_nonpresent_pte)
1621 return;
1622
1623 for (i = 0; i < PT64_ENT_PER_PAGE; ++i) {
1624 if (pt[i] == shadow_notrap_nonpresent_pte)
d555c333 1625 __set_spte(&pt[i], shadow_trap_nonpresent_pte);
6844dec6
MT		 1626 }
1627}
1628
039576c0
AK		 1629struct page *gva_to_page(struct kvm_vcpu *vcpu, gva_t gva)
1630{
72dc67a6
IE		 1631 struct page *page;
1632
1871c602 1633 gpa_t gpa = kvm_mmu_gva_to_gpa_read(vcpu, gva, NULL);
039576c0
AK		 1634
1635 if (gpa == UNMAPPED_GVA)
1636 return NULL;
72dc67a6 1637
72dc67a6 1638 page = gfn_to_page(vcpu->kvm, gpa >> PAGE_SHIFT);
72dc67a6
IE		 1639
1640 return page;
039576c0
AK		 1641}
1642
74be52e3
SY		 1643/*
1644 * The function is based on mtrr_type_lookup() in
1645 * arch/x86/kernel/cpu/mtrr/generic.c
1646 */
1647static int get_mtrr_type(struct mtrr_state_type *mtrr_state,
1648 u64 start, u64 end)
1649{
1650 int i;
1651 u64 base, mask;
1652 u8 prev_match, curr_match;
1653 int num_var_ranges = KVM_NR_VAR_MTRR;
1654
1655 if (!mtrr_state->enabled)
1656 return 0xFF;
1657
1658 /* Make end inclusive end, instead of exclusive */
1659 end--;
1660
1661 /* Look in fixed ranges. Just return the type as per start */
1662 if (mtrr_state->have_fixed && (start < 0x100000)) {
1663 int idx;
1664
1665 if (start < 0x80000) {
1666 idx = 0;
1667 idx += (start >> 16);
1668 return mtrr_state->fixed_ranges[idx];
1669 } else if (start < 0xC0000) {
1670 idx = 1 * 8;
1671 idx += ((start - 0x80000) >> 14);
1672 return mtrr_state->fixed_ranges[idx];
1673 } else if (start < 0x1000000) {
1674 idx = 3 * 8;
1675 idx += ((start - 0xC0000) >> 12);
1676 return mtrr_state->fixed_ranges[idx];
1677 }
1678 }
1679
1680 /*
1681 * Look in variable ranges
1682 * Look of multiple ranges matching this address and pick type
1683 * as per MTRR precedence
1684 */
1685 if (!(mtrr_state->enabled & 2))
1686 return mtrr_state->def_type;
1687
1688 prev_match = 0xFF;
1689 for (i = 0; i < num_var_ranges; ++i) {
1690 unsigned short start_state, end_state;
1691
1692 if (!(mtrr_state->var_ranges[i].mask_lo & (1 << 11)))
1693 continue;
1694
1695 base = (((u64)mtrr_state->var_ranges[i].base_hi) << 32) +
1696 (mtrr_state->var_ranges[i].base_lo & PAGE_MASK);
1697 mask = (((u64)mtrr_state->var_ranges[i].mask_hi) << 32) +
1698 (mtrr_state->var_ranges[i].mask_lo & PAGE_MASK);
1699
1700 start_state = ((start & mask) == (base & mask));
1701 end_state = ((end & mask) == (base & mask));
1702 if (start_state != end_state)
1703 return 0xFE;
1704
1705 if ((start & mask) != (base & mask))
1706 continue;
1707
1708 curr_match = mtrr_state->var_ranges[i].base_lo & 0xff;
1709 if (prev_match == 0xFF) {
1710 prev_match = curr_match;
1711 continue;
1712 }
1713
1714 if (prev_match == MTRR_TYPE_UNCACHABLE ||
1715 curr_match == MTRR_TYPE_UNCACHABLE)
1716 return MTRR_TYPE_UNCACHABLE;
1717
1718 if ((prev_match == MTRR_TYPE_WRBACK &&
1719 curr_match == MTRR_TYPE_WRTHROUGH) ||
1720 (prev_match == MTRR_TYPE_WRTHROUGH &&
1721 curr_match == MTRR_TYPE_WRBACK)) {
1722 prev_match = MTRR_TYPE_WRTHROUGH;
1723 curr_match = MTRR_TYPE_WRTHROUGH;
1724 }
1725
1726 if (prev_match != curr_match)
1727 return MTRR_TYPE_UNCACHABLE;
1728 }
1729
1730 if (prev_match != 0xFF)
1731 return prev_match;
1732
1733 return mtrr_state->def_type;
1734}
1735
4b12f0de 1736u8 kvm_get_guest_memory_type(struct kvm_vcpu *vcpu, gfn_t gfn)
74be52e3
SY		 1737{
1738 u8 mtrr;
1739
1740 mtrr = get_mtrr_type(&vcpu->arch.mtrr_state, gfn << PAGE_SHIFT,
1741 (gfn << PAGE_SHIFT) + PAGE_SIZE);
1742 if (mtrr == 0xfe || mtrr == 0xff)
1743 mtrr = MTRR_TYPE_WRBACK;
1744 return mtrr;
1745}
4b12f0de 1746EXPORT_SYMBOL_GPL(kvm_get_guest_memory_type);
74be52e3 1747
4731d4c7
MT		 1748static int kvm_unsync_page(struct kvm_vcpu *vcpu, struct kvm_mmu_page *sp)
1749{
1750 unsigned index;
1751 struct hlist_head *bucket;
1752 struct kvm_mmu_page *s;
1753 struct hlist_node *node, *n;
1754
f691fe1d 1755 trace_kvm_mmu_unsync_page(sp);
4731d4c7
MT		 1756 index = kvm_page_table_hashfn(sp->gfn);
1757 bucket = &vcpu->kvm->arch.mmu_page_hash[index];
1758 /* don't unsync if pagetable is shadowed with multiple roles */
1759 hlist_for_each_entry_safe(s, node, n, bucket, hash_link) {
f6e2c02b 1760 if (s->gfn != sp->gfn || s->role.direct)
4731d4c7
MT		 1761 continue;
1762 if (s->role.word != sp->role.word)
1763 return 1;
1764 }
4731d4c7
MT		 1765 ++vcpu->kvm->stat.mmu_unsync;
1766 sp->unsync = 1;
6cffe8ca 1767
c2d0ee46 1768 kvm_mmu_mark_parents_unsync(vcpu, sp);
6cffe8ca 1769
4731d4c7
MT		 1770 mmu_convert_notrap(sp);
1771 return 0;
1772}
1773
1774static int mmu_need_write_protect(struct kvm_vcpu *vcpu, gfn_t gfn,
1775 bool can_unsync)
1776{
1777 struct kvm_mmu_page *shadow;
1778
1779 shadow = kvm_mmu_lookup_page(vcpu->kvm, gfn);
1780 if (shadow) {
1781 if (shadow->role.level != PT_PAGE_TABLE_LEVEL)
1782 return 1;
1783 if (shadow->unsync)
1784 return 0;
582801a9 1785 if (can_unsync && oos_shadow)
4731d4c7
MT		 1786 return kvm_unsync_page(vcpu, shadow);
1787 return 1;
1788 }
1789 return 0;
1790}
1791
d555c333 1792static int set_spte(struct kvm_vcpu *vcpu, u64 *sptep,
1e73f9dd 1793 unsigned pte_access, int user_fault,
852e3c19 1794 int write_fault, int dirty, int level,
c2d0ee46 1795 gfn_t gfn, pfn_t pfn, bool speculative,
1403283a 1796 bool can_unsync, bool reset_host_protection)
1c4f1fd6
AK		 1797{
1798 u64 spte;
1e73f9dd 1799 int ret = 0;
64d4d521 1800
1c4f1fd6
AK		 1801 /*
1802 * We don't set the accessed bit, since we sometimes want to see
1803 * whether the guest actually used the pte (in order to detect
1804 * demand paging).
1805 */
7b52345e 1806 spte = shadow_base_present_pte | shadow_dirty_mask;
947da538 1807 if (!speculative)
3201b5d9 1808 spte |= shadow_accessed_mask;
1c4f1fd6
AK		 1809 if (!dirty)
1810 pte_access &= ~ACC_WRITE_MASK;
7b52345e
SY		 1811 if (pte_access & ACC_EXEC_MASK)
1812 spte |= shadow_x_mask;
1813 else
1814 spte |= shadow_nx_mask;
1c4f1fd6 1815 if (pte_access & ACC_USER_MASK)
7b52345e 1816 spte |= shadow_user_mask;
852e3c19 1817 if (level > PT_PAGE_TABLE_LEVEL)
05da4558 1818 spte |= PT_PAGE_SIZE_MASK;
4b12f0de
SY		 1819 if (tdp_enabled)
1820 spte |= kvm_x86_ops->get_mt_mask(vcpu, gfn,
1821 kvm_is_mmio_pfn(pfn));
1c4f1fd6 1822
1403283a
IE		 1823 if (reset_host_protection)
1824 spte |= SPTE_HOST_WRITEABLE;
1825
35149e21 1826 spte |= (u64)pfn << PAGE_SHIFT;
1c4f1fd6
AK		 1827
1828 if ((pte_access & ACC_WRITE_MASK)
1829 || (write_fault && !is_write_protection(vcpu) && !user_fault)) {
1c4f1fd6 1830
852e3c19
JR		 1831 if (level > PT_PAGE_TABLE_LEVEL &&
1832 has_wrprotected_page(vcpu->kvm, gfn, level)) {
38187c83
MT		 1833 ret = 1;
1834 spte = shadow_trap_nonpresent_pte;
1835 goto set_pte;
1836 }
1837
1c4f1fd6 1838 spte |= PT_WRITABLE_MASK;
1c4f1fd6 1839
ecc5589f
MT		 1840 /*
1841 * Optimization: for pte sync, if spte was writable the hash
1842 * lookup is unnecessary (and expensive). Write protection
1843 * is responsibility of mmu_get_page / kvm_sync_page.
1844 * Same reasoning can be applied to dirty page accounting.
1845 */
8dae4445 1846 if (!can_unsync && is_writable_pte(*sptep))
ecc5589f
MT		 1847 goto set_pte;
1848
4731d4c7 1849 if (mmu_need_write_protect(vcpu, gfn, can_unsync)) {
1c4f1fd6 1850 pgprintk("%s: found shadow page for %lx, marking ro\n",
b8688d51 1851 __func__, gfn);
1e73f9dd 1852 ret = 1;
1c4f1fd6 1853 pte_access &= ~ACC_WRITE_MASK;
8dae4445 1854 if (is_writable_pte(spte))
1c4f1fd6 1855 spte &= ~PT_WRITABLE_MASK;
1c4f1fd6
AK		 1856 }
1857 }
1858
1c4f1fd6
AK		 1859 if (pte_access & ACC_WRITE_MASK)
1860 mark_page_dirty(vcpu->kvm, gfn);
1861
38187c83 1862set_pte:
d555c333 1863 __set_spte(sptep, spte);
1e73f9dd
MT		 1864 return ret;
1865}
1866
d555c333 1867static void mmu_set_spte(struct kvm_vcpu *vcpu, u64 *sptep,
1e73f9dd
MT		 1868 unsigned pt_access, unsigned pte_access,
1869 int user_fault, int write_fault, int dirty,
852e3c19 1870 int *ptwrite, int level, gfn_t gfn,
1403283a
IE		 1871 pfn_t pfn, bool speculative,
1872 bool reset_host_protection)
1e73f9dd
MT		 1873{
1874 int was_rmapped = 0;
8dae4445 1875 int was_writable = is_writable_pte(*sptep);
53a27b39 1876 int rmap_count;
1e73f9dd
MT		 1877
1878 pgprintk("%s: spte %llx access %x write_fault %d"
1879 " user_fault %d gfn %lx\n",
d555c333 1880 __func__, *sptep, pt_access,
1e73f9dd
MT		 1881 write_fault, user_fault, gfn);
1882
d555c333 1883 if (is_rmap_spte(*sptep)) {
1e73f9dd
MT		 1884 /*
1885 * If we overwrite a PTE page pointer with a 2MB PMD, unlink
1886 * the parent of the now unreachable PTE.
1887 */
852e3c19
JR		 1888 if (level > PT_PAGE_TABLE_LEVEL &&
1889 !is_large_pte(*sptep)) {
1e73f9dd 1890 struct kvm_mmu_page *child;
d555c333 1891 u64 pte = *sptep;
1e73f9dd
MT		 1892
1893 child = page_header(pte & PT64_BASE_ADDR_MASK);
d555c333
AK		 1894 mmu_page_remove_parent_pte(child, sptep);
1895 } else if (pfn != spte_to_pfn(*sptep)) {
1e73f9dd 1896 pgprintk("hfn old %lx new %lx\n",
d555c333
AK		 1897 spte_to_pfn(*sptep), pfn);
1898 rmap_remove(vcpu->kvm, sptep);
6bed6b9e
JR		 1899 } else
1900 was_rmapped = 1;
1e73f9dd 1901 }
852e3c19 1902
d555c333 1903 if (set_spte(vcpu, sptep, pte_access, user_fault, write_fault,
1403283a
IE		 1904 dirty, level, gfn, pfn, speculative, true,
1905 reset_host_protection)) {
1e73f9dd
MT		 1906 if (write_fault)
1907 *ptwrite = 1;
a378b4e6
MT		 1908 kvm_x86_ops->tlb_flush(vcpu);
1909 }
1e73f9dd 1910
d555c333 1911 pgprintk("%s: setting spte %llx\n", __func__, *sptep);
1e73f9dd 1912 pgprintk("instantiating %s PTE (%s) at %ld (%llx) addr %p\n",
d555c333 1913 is_large_pte(*sptep)? "2MB" : "4kB",
a205bc19
JR		 1914 *sptep & PT_PRESENT_MASK ?"RW":"R", gfn,
1915 *sptep, sptep);
d555c333 1916 if (!was_rmapped && is_large_pte(*sptep))
05da4558
MT		 1917 ++vcpu->kvm->stat.lpages;
1918
d555c333 1919 page_header_update_slot(vcpu->kvm, sptep, gfn);
1c4f1fd6 1920 if (!was_rmapped) {
44ad9944 1921 rmap_count = rmap_add(vcpu, sptep, gfn);
acb66dd0 1922 kvm_release_pfn_clean(pfn);
53a27b39 1923 if (rmap_count > RMAP_RECYCLE_THRESHOLD)
852e3c19 1924 rmap_recycle(vcpu, sptep, gfn);
75e68e60 1925 } else {
8dae4445 1926 if (was_writable)
35149e21 1927 kvm_release_pfn_dirty(pfn);
75e68e60 1928 else
35149e21 1929 kvm_release_pfn_clean(pfn);
1c4f1fd6 1930 }
1b7fcd32 1931 if (speculative) {
d555c333 1932 vcpu->arch.last_pte_updated = sptep;
1b7fcd32
AK		 1933 vcpu->arch.last_pte_gfn = gfn;
1934 }
1c4f1fd6
AK		 1935}
1936
6aa8b732
AK		 1937static void nonpaging_new_cr3(struct kvm_vcpu *vcpu)
1938{
1939}
1940
9f652d21 1941static int __direct_map(struct kvm_vcpu *vcpu, gpa_t v, int write,
852e3c19 1942 int level, gfn_t gfn, pfn_t pfn)
140754bc 1943{
9f652d21 1944 struct kvm_shadow_walk_iterator iterator;
140754bc 1945 struct kvm_mmu_page *sp;
9f652d21 1946 int pt_write = 0;
140754bc 1947 gfn_t pseudo_gfn;
6aa8b732 1948
9f652d21 1949 for_each_shadow_entry(vcpu, (u64)gfn << PAGE_SHIFT, iterator) {
852e3c19 1950 if (iterator.level == level) {
9f652d21
AK		 1951 mmu_set_spte(vcpu, iterator.sptep, ACC_ALL, ACC_ALL,
1952 0, write, 1, &pt_write,
1403283a 1953 level, gfn, pfn, false, true);
9f652d21
AK		 1954 ++vcpu->stat.pf_fixed;
1955 break;
6aa8b732
AK		 1956 }
1957
9f652d21
AK		 1958 if (*iterator.sptep == shadow_trap_nonpresent_pte) {
1959 pseudo_gfn = (iterator.addr & PT64_DIR_BASE_ADDR_MASK) >> PAGE_SHIFT;
1960 sp = kvm_mmu_get_page(vcpu, pseudo_gfn, iterator.addr,
1961 iterator.level - 1,
1962 1, ACC_ALL, iterator.sptep);
1963 if (!sp) {
1964 pgprintk("nonpaging_map: ENOMEM\n");
1965 kvm_release_pfn_clean(pfn);
1966 return -ENOMEM;
1967 }
140754bc 1968
d555c333
AK		 1969 __set_spte(iterator.sptep,
1970 __pa(sp->spt)
1971 | PT_PRESENT_MASK | PT_WRITABLE_MASK
1972 | shadow_user_mask | shadow_x_mask);
9f652d21
AK		 1973 }
1974 }
1975 return pt_write;
6aa8b732
AK		 1976}
1977
10589a46
MT		 1978static int nonpaging_map(struct kvm_vcpu *vcpu, gva_t v, int write, gfn_t gfn)
1979{
1980 int r;
852e3c19 1981 int level;
35149e21 1982 pfn_t pfn;
e930bffe 1983 unsigned long mmu_seq;
aaee2c94 1984
852e3c19
JR		 1985 level = mapping_level(vcpu, gfn);
1986
1987 /*
1988 * This path builds a PAE pagetable - so we can map 2mb pages at
1989 * maximum. Therefore check if the level is larger than that.
1990 */
1991 if (level > PT_DIRECTORY_LEVEL)
1992 level = PT_DIRECTORY_LEVEL;
1993
1994 gfn &= ~(KVM_PAGES_PER_HPAGE(level) - 1);
05da4558 1995
e930bffe 1996 mmu_seq = vcpu->kvm->mmu_notifier_seq;
4c2155ce 1997 smp_rmb();
35149e21 1998 pfn = gfn_to_pfn(vcpu->kvm, gfn);
aaee2c94 1999
d196e343 2000 /* mmio */
35149e21
AL		 2001 if (is_error_pfn(pfn)) {
2002 kvm_release_pfn_clean(pfn);
d196e343
AK		 2003 return 1;
2004 }
2005
aaee2c94 2006 spin_lock(&vcpu->kvm->mmu_lock);
e930bffe
AA		 2007 if (mmu_notifier_retry(vcpu, mmu_seq))
2008 goto out_unlock;
eb787d10 2009 kvm_mmu_free_some_pages(vcpu);
852e3c19 2010 r = __direct_map(vcpu, v, write, level, gfn, pfn);
aaee2c94
MT		 2011 spin_unlock(&vcpu->kvm->mmu_lock);
2012
aaee2c94 2013
10589a46 2014 return r;
e930bffe
AA		 2015
2016out_unlock:
2017 spin_unlock(&vcpu->kvm->mmu_lock);
2018 kvm_release_pfn_clean(pfn);
2019 return 0;
10589a46
MT		 2020}
2021
2022
17ac10ad
AK		 2023static void mmu_free_roots(struct kvm_vcpu *vcpu)
2024{
2025 int i;
4db35314 2026 struct kvm_mmu_page *sp;
17ac10ad 2027
ad312c7c 2028 if (!VALID_PAGE(vcpu->arch.mmu.root_hpa))
7b53aa56 2029 return;
aaee2c94 2030 spin_lock(&vcpu->kvm->mmu_lock);
ad312c7c
ZX		 2031 if (vcpu->arch.mmu.shadow_root_level == PT64_ROOT_LEVEL) {
2032 hpa_t root = vcpu->arch.mmu.root_hpa;
17ac10ad 2033
4db35314
AK		 2034 sp = page_header(root);
2035 --sp->root_count;
2e53d63a
MT		 2036 if (!sp->root_count && sp->role.invalid)
2037 kvm_mmu_zap_page(vcpu->kvm, sp);
ad312c7c 2038 vcpu->arch.mmu.root_hpa = INVALID_PAGE;
aaee2c94 2039 spin_unlock(&vcpu->kvm->mmu_lock);
17ac10ad
AK		 2040 return;
2041 }
17ac10ad 2042 for (i = 0; i < 4; ++i) {
ad312c7c 2043 hpa_t root = vcpu->arch.mmu.pae_root[i];
17ac10ad 2044
417726a3 2045 if (root) {
417726a3 2046 root &= PT64_BASE_ADDR_MASK;
4db35314
AK		 2047 sp = page_header(root);
2048 --sp->root_count;
2e53d63a
MT		 2049 if (!sp->root_count && sp->role.invalid)
2050 kvm_mmu_zap_page(vcpu->kvm, sp);
417726a3 2051 }
ad312c7c 2052 vcpu->arch.mmu.pae_root[i] = INVALID_PAGE;
17ac10ad 2053 }
aaee2c94 2054 spin_unlock(&vcpu->kvm->mmu_lock);
ad312c7c 2055 vcpu->arch.mmu.root_hpa = INVALID_PAGE;
17ac10ad
AK		 2056}
2057
8986ecc0
MT		 2058static int mmu_check_root(struct kvm_vcpu *vcpu, gfn_t root_gfn)
2059{
2060 int ret = 0;
2061
2062 if (!kvm_is_visible_gfn(vcpu->kvm, root_gfn)) {
2063 set_bit(KVM_REQ_TRIPLE_FAULT, &vcpu->requests);
2064 ret = 1;
2065 }
2066
2067 return ret;
2068}
2069
2070static int mmu_alloc_roots(struct kvm_vcpu *vcpu)
17ac10ad
AK		 2071{
2072 int i;
cea0f0e7 2073 gfn_t root_gfn;
4db35314 2074 struct kvm_mmu_page *sp;
f6e2c02b 2075 int direct = 0;
6de4f3ad 2076 u64 pdptr;
3bb65a22 2077
ad312c7c 2078 root_gfn = vcpu->arch.cr3 >> PAGE_SHIFT;
17ac10ad 2079
ad312c7c
ZX		 2080 if (vcpu->arch.mmu.shadow_root_level == PT64_ROOT_LEVEL) {
2081 hpa_t root = vcpu->arch.mmu.root_hpa;
17ac10ad
AK		 2082
2083 ASSERT(!VALID_PAGE(root));
fb72d167 2084 if (tdp_enabled)
f6e2c02b 2085 direct = 1;
8986ecc0
MT		 2086 if (mmu_check_root(vcpu, root_gfn))
2087 return 1;
4db35314 2088 sp = kvm_mmu_get_page(vcpu, root_gfn, 0,
f6e2c02b 2089 PT64_ROOT_LEVEL, direct,
fb72d167 2090 ACC_ALL, NULL);
4db35314
AK		 2091 root = __pa(sp->spt);
2092 ++sp->root_count;
ad312c7c 2093 vcpu->arch.mmu.root_hpa = root;
8986ecc0 2094 return 0;
17ac10ad 2095 }
f6e2c02b 2096 direct = !is_paging(vcpu);
fb72d167 2097 if (tdp_enabled)
f6e2c02b 2098 direct = 1;
17ac10ad 2099 for (i = 0; i < 4; ++i) {
ad312c7c 2100 hpa_t root = vcpu->arch.mmu.pae_root[i];
17ac10ad
AK		 2101
2102 ASSERT(!VALID_PAGE(root));
ad312c7c 2103 if (vcpu->arch.mmu.root_level == PT32E_ROOT_LEVEL) {
6de4f3ad 2104 pdptr = kvm_pdptr_read(vcpu, i);
43a3795a 2105 if (!is_present_gpte(pdptr)) {
ad312c7c 2106 vcpu->arch.mmu.pae_root[i] = 0;
417726a3
AK		 2107 continue;
2108 }
6de4f3ad 2109 root_gfn = pdptr >> PAGE_SHIFT;
ad312c7c 2110 } else if (vcpu->arch.mmu.root_level == 0)
cea0f0e7 2111 root_gfn = 0;
8986ecc0
MT		 2112 if (mmu_check_root(vcpu, root_gfn))
2113 return 1;
4db35314 2114 sp = kvm_mmu_get_page(vcpu, root_gfn, i << 30,
f6e2c02b 2115 PT32_ROOT_LEVEL, direct,
f7d9c7b7 2116 ACC_ALL, NULL);
4db35314
AK		 2117 root = __pa(sp->spt);
2118 ++sp->root_count;
ad312c7c 2119 vcpu->arch.mmu.pae_root[i] = root | PT_PRESENT_MASK;
17ac10ad 2120 }
ad312c7c 2121 vcpu->arch.mmu.root_hpa = __pa(vcpu->arch.mmu.pae_root);
8986ecc0 2122 return 0;
17ac10ad
AK		 2123}
2124
0ba73cda
MT		 2125static void mmu_sync_roots(struct kvm_vcpu *vcpu)
2126{
2127 int i;
2128 struct kvm_mmu_page *sp;
2129
2130 if (!VALID_PAGE(vcpu->arch.mmu.root_hpa))
2131 return;
2132 if (vcpu->arch.mmu.shadow_root_level == PT64_ROOT_LEVEL) {
2133 hpa_t root = vcpu->arch.mmu.root_hpa;
2134 sp = page_header(root);
2135 mmu_sync_children(vcpu, sp);
2136 return;
2137 }
2138 for (i = 0; i < 4; ++i) {
2139 hpa_t root = vcpu->arch.mmu.pae_root[i];
2140
8986ecc0 2141 if (root && VALID_PAGE(root)) {
0ba73cda
MT		 2142 root &= PT64_BASE_ADDR_MASK;
2143 sp = page_header(root);
2144 mmu_sync_children(vcpu, sp);
2145 }
2146 }
2147}
2148
2149void kvm_mmu_sync_roots(struct kvm_vcpu *vcpu)
2150{
2151 spin_lock(&vcpu->kvm->mmu_lock);
2152 mmu_sync_roots(vcpu);
6cffe8ca 2153 spin_unlock(&vcpu->kvm->mmu_lock);
0ba73cda
MT		 2154}
2155
1871c602
GN		 2156static gpa_t nonpaging_gva_to_gpa(struct kvm_vcpu *vcpu, gva_t vaddr,
2157 u32 access, u32 *error)
6aa8b732 2158{
1871c602
GN		 2159 if (error)
2160 *error = 0;
6aa8b732
AK		 2161 return vaddr;
2162}
2163
2164static int nonpaging_page_fault(struct kvm_vcpu *vcpu, gva_t gva,
3f3e7124 2165 u32 error_code)
6aa8b732 2166{
e833240f 2167 gfn_t gfn;
e2dec939 2168 int r;
6aa8b732 2169
b8688d51 2170 pgprintk("%s: gva %lx error %x\n", __func__, gva, error_code);
e2dec939
AK		 2171 r = mmu_topup_memory_caches(vcpu);
2172 if (r)
2173 return r;
714b93da 2174
6aa8b732 2175 ASSERT(vcpu);
ad312c7c 2176 ASSERT(VALID_PAGE(vcpu->arch.mmu.root_hpa));
6aa8b732 2177
e833240f 2178 gfn = gva >> PAGE_SHIFT;
6aa8b732 2179
e833240f
AK		 2180 return nonpaging_map(vcpu, gva & PAGE_MASK,
2181 error_code & PFERR_WRITE_MASK, gfn);
6aa8b732
AK		 2182}
2183
fb72d167
JR		 2184static int tdp_page_fault(struct kvm_vcpu *vcpu, gva_t gpa,
2185 u32 error_code)
2186{
35149e21 2187 pfn_t pfn;
fb72d167 2188 int r;
852e3c19 2189 int level;
05da4558 2190 gfn_t gfn = gpa >> PAGE_SHIFT;
e930bffe 2191 unsigned long mmu_seq;
fb72d167
JR		 2192
2193 ASSERT(vcpu);
2194 ASSERT(VALID_PAGE(vcpu->arch.mmu.root_hpa));
2195
2196 r = mmu_topup_memory_caches(vcpu);
2197 if (r)
2198 return r;
2199
852e3c19
JR		 2200 level = mapping_level(vcpu, gfn);
2201
2202 gfn &= ~(KVM_PAGES_PER_HPAGE(level) - 1);
2203
e930bffe 2204 mmu_seq = vcpu->kvm->mmu_notifier_seq;
4c2155ce 2205 smp_rmb();
35149e21 2206 pfn = gfn_to_pfn(vcpu->kvm, gfn);
35149e21
AL		 2207 if (is_error_pfn(pfn)) {
2208 kvm_release_pfn_clean(pfn);
fb72d167
JR		 2209 return 1;
2210 }
2211 spin_lock(&vcpu->kvm->mmu_lock);
e930bffe
AA		 2212 if (mmu_notifier_retry(vcpu, mmu_seq))
2213 goto out_unlock;
fb72d167
JR		 2214 kvm_mmu_free_some_pages(vcpu);
2215 r = __direct_map(vcpu, gpa, error_code & PFERR_WRITE_MASK,
852e3c19 2216 level, gfn, pfn);
fb72d167 2217 spin_unlock(&vcpu->kvm->mmu_lock);
fb72d167
JR		 2218
2219 return r;
e930bffe
AA		 2220
2221out_unlock:
2222 spin_unlock(&vcpu->kvm->mmu_lock);
2223 kvm_release_pfn_clean(pfn);
2224 return 0;
fb72d167
JR		 2225}
2226
6aa8b732
AK		 2227static void nonpaging_free(struct kvm_vcpu *vcpu)
2228{
17ac10ad 2229 mmu_free_roots(vcpu);
6aa8b732
AK		 2230}
2231
2232static int nonpaging_init_context(struct kvm_vcpu *vcpu)
2233{
ad312c7c 2234 struct kvm_mmu *context = &vcpu->arch.mmu;
6aa8b732
AK		 2235
2236 context->new_cr3 = nonpaging_new_cr3;
2237 context->page_fault = nonpaging_page_fault;
6aa8b732
AK		 2238 context->gva_to_gpa = nonpaging_gva_to_gpa;
2239 context->free = nonpaging_free;
c7addb90 2240 context->prefetch_page = nonpaging_prefetch_page;
e8bc217a 2241 context->sync_page = nonpaging_sync_page;
a7052897 2242 context->invlpg = nonpaging_invlpg;
cea0f0e7 2243 context->root_level = 0;
6aa8b732 2244 context->shadow_root_level = PT32E_ROOT_LEVEL;
17c3ba9d 2245 context->root_hpa = INVALID_PAGE;
6aa8b732
AK		 2246 return 0;
2247}
2248
d835dfec 2249void kvm_mmu_flush_tlb(struct kvm_vcpu *vcpu)
6aa8b732 2250{
1165f5fe 2251 ++vcpu->stat.tlb_flush;
cbdd1bea 2252 kvm_x86_ops->tlb_flush(vcpu);
6aa8b732
AK		 2253}
2254
2255static void paging_new_cr3(struct kvm_vcpu *vcpu)
2256{
b8688d51 2257 pgprintk("%s: cr3 %lx\n", __func__, vcpu->arch.cr3);
cea0f0e7 2258 mmu_free_roots(vcpu);
6aa8b732
AK		 2259}
2260
6aa8b732
AK		 2261static void inject_page_fault(struct kvm_vcpu *vcpu,
2262 u64 addr,
2263 u32 err_code)
2264{
c3c91fee 2265 kvm_inject_page_fault(vcpu, addr, err_code);
6aa8b732
AK		 2266}
2267
6aa8b732
AK		 2268static void paging_free(struct kvm_vcpu *vcpu)
2269{
2270 nonpaging_free(vcpu);
2271}
2272
82725b20
DE		 2273static bool is_rsvd_bits_set(struct kvm_vcpu *vcpu, u64 gpte, int level)
2274{
2275 int bit7;
2276
2277 bit7 = (gpte >> 7) & 1;
2278 return (gpte & vcpu->arch.mmu.rsvd_bits_mask[bit7][level-1]) != 0;
2279}
2280
6aa8b732
AK		 2281#define PTTYPE 64
2282#include "paging_tmpl.h"
2283#undef PTTYPE
2284
2285#define PTTYPE 32
2286#include "paging_tmpl.h"
2287#undef PTTYPE
2288
82725b20
DE		 2289static void reset_rsvds_bits_mask(struct kvm_vcpu *vcpu, int level)
2290{
2291 struct kvm_mmu *context = &vcpu->arch.mmu;
2292 int maxphyaddr = cpuid_maxphyaddr(vcpu);
2293 u64 exb_bit_rsvd = 0;
2294
2295 if (!is_nx(vcpu))
2296 exb_bit_rsvd = rsvd_bits(63, 63);
2297 switch (level) {
2298 case PT32_ROOT_LEVEL:
2299 /* no rsvd bits for 2 level 4K page table entries */
2300 context->rsvd_bits_mask[0][1] = 0;
2301 context->rsvd_bits_mask[0][0] = 0;
2302 if (is_cpuid_PSE36())
2303 /* 36bits PSE 4MB page */
2304 context->rsvd_bits_mask[1][1] = rsvd_bits(17, 21);
2305 else
2306 /* 32 bits PSE 4MB page */
2307 context->rsvd_bits_mask[1][1] = rsvd_bits(13, 21);
29a4b933 2308 context->rsvd_bits_mask[1][0] = context->rsvd_bits_mask[1][0];
82725b20
DE		 2309 break;
2310 case PT32E_ROOT_LEVEL:
20c466b5
DE		 2311 context->rsvd_bits_mask[0][2] =
2312 rsvd_bits(maxphyaddr, 63) |
2313 rsvd_bits(7, 8) | rsvd_bits(1, 2); /* PDPTE */
82725b20 2314 context->rsvd_bits_mask[0][1] = exb_bit_rsvd |
4c26b4cd 2315 rsvd_bits(maxphyaddr, 62); /* PDE */
82725b20
DE		 2316 context->rsvd_bits_mask[0][0] = exb_bit_rsvd |
2317 rsvd_bits(maxphyaddr, 62); /* PTE */
2318 context->rsvd_bits_mask[1][1] = exb_bit_rsvd |
2319 rsvd_bits(maxphyaddr, 62) |
2320 rsvd_bits(13, 20); /* large page */
29a4b933 2321 context->rsvd_bits_mask[1][0] = context->rsvd_bits_mask[1][0];
82725b20
DE		 2322 break;
2323 case PT64_ROOT_LEVEL:
2324 context->rsvd_bits_mask[0][3] = exb_bit_rsvd |
2325 rsvd_bits(maxphyaddr, 51) | rsvd_bits(7, 8);
2326 context->rsvd_bits_mask[0][2] = exb_bit_rsvd |
2327 rsvd_bits(maxphyaddr, 51) | rsvd_bits(7, 8);
2328 context->rsvd_bits_mask[0][1] = exb_bit_rsvd |
4c26b4cd 2329 rsvd_bits(maxphyaddr, 51);
82725b20
DE		 2330 context->rsvd_bits_mask[0][0] = exb_bit_rsvd |
2331 rsvd_bits(maxphyaddr, 51);
2332 context->rsvd_bits_mask[1][3] = context->rsvd_bits_mask[0][3];
e04da980
JR		 2333 context->rsvd_bits_mask[1][2] = exb_bit_rsvd |
2334 rsvd_bits(maxphyaddr, 51) |
2335 rsvd_bits(13, 29);
82725b20 2336 context->rsvd_bits_mask[1][1] = exb_bit_rsvd |
4c26b4cd
SY		 2337 rsvd_bits(maxphyaddr, 51) |
2338 rsvd_bits(13, 20); /* large page */
29a4b933 2339 context->rsvd_bits_mask[1][0] = context->rsvd_bits_mask[1][0];
82725b20
DE		 2340 break;
2341 }
2342}
2343
17ac10ad 2344static int paging64_init_context_common(struct kvm_vcpu *vcpu, int level)
6aa8b732 2345{
ad312c7c 2346 struct kvm_mmu *context = &vcpu->arch.mmu;
6aa8b732
AK		 2347
2348 ASSERT(is_pae(vcpu));
2349 context->new_cr3 = paging_new_cr3;
2350 context->page_fault = paging64_page_fault;
6aa8b732 2351 context->gva_to_gpa = paging64_gva_to_gpa;
c7addb90 2352 context->prefetch_page = paging64_prefetch_page;
e8bc217a 2353 context->sync_page = paging64_sync_page;
a7052897 2354 context->invlpg = paging64_invlpg;
6aa8b732 2355 context->free = paging_free;
17ac10ad
AK		 2356 context->root_level = level;
2357 context->shadow_root_level = level;
17c3ba9d 2358 context->root_hpa = INVALID_PAGE;
6aa8b732
AK		 2359 return 0;
2360}
2361
17ac10ad
AK		 2362static int paging64_init_context(struct kvm_vcpu *vcpu)
2363{
82725b20 2364 reset_rsvds_bits_mask(vcpu, PT64_ROOT_LEVEL);
17ac10ad
AK		 2365 return paging64_init_context_common(vcpu, PT64_ROOT_LEVEL);
2366}
2367
6aa8b732
AK		 2368static int paging32_init_context(struct kvm_vcpu *vcpu)
2369{
ad312c7c 2370 struct kvm_mmu *context = &vcpu->arch.mmu;
6aa8b732 2371
82725b20 2372 reset_rsvds_bits_mask(vcpu, PT32_ROOT_LEVEL);
6aa8b732
AK		 2373 context->new_cr3 = paging_new_cr3;
2374 context->page_fault = paging32_page_fault;
6aa8b732
AK		 2375 context->gva_to_gpa = paging32_gva_to_gpa;
2376 context->free = paging_free;
c7addb90 2377 context->prefetch_page = paging32_prefetch_page;
e8bc217a 2378 context->sync_page = paging32_sync_page;
a7052897 2379 context->invlpg = paging32_invlpg;
6aa8b732
AK		 2380 context->root_level = PT32_ROOT_LEVEL;
2381 context->shadow_root_level = PT32E_ROOT_LEVEL;
17c3ba9d 2382 context->root_hpa = INVALID_PAGE;
6aa8b732
AK		 2383 return 0;
2384}
2385
2386static int paging32E_init_context(struct kvm_vcpu *vcpu)
2387{
82725b20 2388 reset_rsvds_bits_mask(vcpu, PT32E_ROOT_LEVEL);
17ac10ad 2389 return paging64_init_context_common(vcpu, PT32E_ROOT_LEVEL);
6aa8b732
AK		 2390}
2391
fb72d167
JR		 2392static int init_kvm_tdp_mmu(struct kvm_vcpu *vcpu)
2393{
2394 struct kvm_mmu *context = &vcpu->arch.mmu;
2395
2396 context->new_cr3 = nonpaging_new_cr3;
2397 context->page_fault = tdp_page_fault;
2398 context->free = nonpaging_free;
2399 context->prefetch_page = nonpaging_prefetch_page;
e8bc217a 2400 context->sync_page = nonpaging_sync_page;
a7052897 2401 context->invlpg = nonpaging_invlpg;
67253af5 2402 context->shadow_root_level = kvm_x86_ops->get_tdp_level();
fb72d167
JR		 2403 context->root_hpa = INVALID_PAGE;
2404
2405 if (!is_paging(vcpu)) {
2406 context->gva_to_gpa = nonpaging_gva_to_gpa;
2407 context->root_level = 0;
2408 } else if (is_long_mode(vcpu)) {
82725b20 2409 reset_rsvds_bits_mask(vcpu, PT64_ROOT_LEVEL);
fb72d167
JR		 2410 context->gva_to_gpa = paging64_gva_to_gpa;
2411 context->root_level = PT64_ROOT_LEVEL;
2412 } else if (is_pae(vcpu)) {
82725b20 2413 reset_rsvds_bits_mask(vcpu, PT32E_ROOT_LEVEL);
fb72d167
JR		 2414 context->gva_to_gpa = paging64_gva_to_gpa;
2415 context->root_level = PT32E_ROOT_LEVEL;
2416 } else {
82725b20 2417 reset_rsvds_bits_mask(vcpu, PT32_ROOT_LEVEL);
fb72d167
JR		 2418 context->gva_to_gpa = paging32_gva_to_gpa;
2419 context->root_level = PT32_ROOT_LEVEL;
2420 }
2421
2422 return 0;
2423}
2424
2425static int init_kvm_softmmu(struct kvm_vcpu *vcpu)
6aa8b732 2426{
a770f6f2
AK		 2427 int r;
2428
6aa8b732 2429 ASSERT(vcpu);
ad312c7c 2430 ASSERT(!VALID_PAGE(vcpu->arch.mmu.root_hpa));
6aa8b732
AK		 2431
2432 if (!is_paging(vcpu))
a770f6f2 2433 r = nonpaging_init_context(vcpu);
a9058ecd 2434 else if (is_long_mode(vcpu))
a770f6f2 2435 r = paging64_init_context(vcpu);
6aa8b732 2436 else if (is_pae(vcpu))
a770f6f2 2437 r = paging32E_init_context(vcpu);
6aa8b732 2438 else
a770f6f2
AK		 2439 r = paging32_init_context(vcpu);
2440
2441 vcpu->arch.mmu.base_role.glevels = vcpu->arch.mmu.root_level;
2442
2443 return r;
6aa8b732
AK		 2444}
2445
fb72d167
JR		 2446static int init_kvm_mmu(struct kvm_vcpu *vcpu)
2447{
35149e21
AL		 2448 vcpu->arch.update_pte.pfn = bad_pfn;
2449
fb72d167
JR		 2450 if (tdp_enabled)
2451 return init_kvm_tdp_mmu(vcpu);
2452 else
2453 return init_kvm_softmmu(vcpu);
2454}
2455
6aa8b732
AK		 2456static void destroy_kvm_mmu(struct kvm_vcpu *vcpu)
2457{
2458 ASSERT(vcpu);
ad312c7c
ZX		 2459 if (VALID_PAGE(vcpu->arch.mmu.root_hpa)) {
2460 vcpu->arch.mmu.free(vcpu);
2461 vcpu->arch.mmu.root_hpa = INVALID_PAGE;
6aa8b732
AK		 2462 }
2463}
2464
2465int kvm_mmu_reset_context(struct kvm_vcpu *vcpu)
17c3ba9d
AK		 2466{
2467 destroy_kvm_mmu(vcpu);
2468 return init_kvm_mmu(vcpu);
2469}
8668a3c4 2470EXPORT_SYMBOL_GPL(kvm_mmu_reset_context);
17c3ba9d
AK		 2471
2472int kvm_mmu_load(struct kvm_vcpu *vcpu)
6aa8b732 2473{
714b93da
AK		 2474 int r;
2475
e2dec939 2476 r = mmu_topup_memory_caches(vcpu);
17c3ba9d
AK		 2477 if (r)
2478 goto out;
aaee2c94 2479 spin_lock(&vcpu->kvm->mmu_lock);
eb787d10 2480 kvm_mmu_free_some_pages(vcpu);
8986ecc0 2481 r = mmu_alloc_roots(vcpu);
0ba73cda 2482 mmu_sync_roots(vcpu);
aaee2c94 2483 spin_unlock(&vcpu->kvm->mmu_lock);
8986ecc0
MT		 2484 if (r)
2485 goto out;
3662cb1c 2486 /* set_cr3() should ensure TLB has been flushed */
ad312c7c 2487 kvm_x86_ops->set_cr3(vcpu, vcpu->arch.mmu.root_hpa);
714b93da
AK		 2488out:
2489 return r;
6aa8b732 2490}
17c3ba9d
AK		 2491EXPORT_SYMBOL_GPL(kvm_mmu_load);
2492
2493void kvm_mmu_unload(struct kvm_vcpu *vcpu)
2494{
2495 mmu_free_roots(vcpu);
2496}
6aa8b732 2497
09072daf 2498static void mmu_pte_write_zap_pte(struct kvm_vcpu *vcpu,
4db35314 2499 struct kvm_mmu_page *sp,
ac1b714e
AK		 2500 u64 *spte)
2501{
2502 u64 pte;
2503 struct kvm_mmu_page *child;
2504
2505 pte = *spte;
c7addb90 2506 if (is_shadow_present_pte(pte)) {
776e6633 2507 if (is_last_spte(pte, sp->role.level))
290fc38d 2508 rmap_remove(vcpu->kvm, spte);
ac1b714e
AK		 2509 else {
2510 child = page_header(pte & PT64_BASE_ADDR_MASK);
90cb0529 2511 mmu_page_remove_parent_pte(child, spte);
ac1b714e
AK		 2512 }
2513 }
d555c333 2514 __set_spte(spte, shadow_trap_nonpresent_pte);
05da4558
MT		 2515 if (is_large_pte(pte))
2516 --vcpu->kvm->stat.lpages;
ac1b714e
AK		 2517}
2518
0028425f 2519static void mmu_pte_write_new_pte(struct kvm_vcpu *vcpu,
4db35314 2520 struct kvm_mmu_page *sp,
0028425f 2521 u64 *spte,
489f1d65 2522 const void *new)
0028425f 2523{
30945387 2524 if (sp->role.level != PT_PAGE_TABLE_LEVEL) {
7e4e4056
JR		 2525 ++vcpu->kvm->stat.mmu_pde_zapped;
2526 return;
30945387 2527 }
0028425f 2528
4cee5764 2529 ++vcpu->kvm->stat.mmu_pte_updated;
4db35314 2530 if (sp->role.glevels == PT32_ROOT_LEVEL)
489f1d65 2531 paging32_update_pte(vcpu, sp, spte, new);
0028425f 2532 else
489f1d65 2533 paging64_update_pte(vcpu, sp, spte, new);
0028425f
AK		 2534}
2535
79539cec
AK		 2536static bool need_remote_flush(u64 old, u64 new)
2537{
2538 if (!is_shadow_present_pte(old))
2539 return false;
2540 if (!is_shadow_present_pte(new))
2541 return true;
2542 if ((old ^ new) & PT64_BASE_ADDR_MASK)
2543 return true;
2544 old ^= PT64_NX_MASK;
2545 new ^= PT64_NX_MASK;
2546 return (old & ~new & PT64_PERM_MASK) != 0;
2547}
2548
2549static void mmu_pte_write_flush_tlb(struct kvm_vcpu *vcpu, u64 old, u64 new)
2550{
2551 if (need_remote_flush(old, new))
2552 kvm_flush_remote_tlbs(vcpu->kvm);
2553 else
2554 kvm_mmu_flush_tlb(vcpu);
2555}
2556
12b7d28f
AK		 2557static bool last_updated_pte_accessed(struct kvm_vcpu *vcpu)
2558{
ad312c7c 2559 u64 *spte = vcpu->arch.last_pte_updated;
12b7d28f 2560
7b52345e 2561 return !!(spte && (*spte & shadow_accessed_mask));
12b7d28f
AK		 2562}
2563
d7824fff
AK		 2564static void mmu_guess_page_from_pte_write(struct kvm_vcpu *vcpu, gpa_t gpa,
2565 const u8 *new, int bytes)
2566{
2567 gfn_t gfn;
2568 int r;
2569 u64 gpte = 0;
35149e21 2570 pfn_t pfn;
d7824fff
AK		 2571
2572 if (bytes != 4 && bytes != 8)
2573 return;
2574
2575 /*
2576 * Assume that the pte write on a page table of the same type
2577 * as the current vcpu paging mode. This is nearly always true
2578 * (might be false while changing modes). Note it is verified later
2579 * by update_pte().
2580 */
2581 if (is_pae(vcpu)) {
2582 /* Handle a 32-bit guest writing two halves of a 64-bit gpte */
2583 if ((bytes == 4) && (gpa % 4 == 0)) {
2584 r = kvm_read_guest(vcpu->kvm, gpa & ~(u64)7, &gpte, 8);
2585 if (r)
2586 return;
2587 memcpy((void *)&gpte + (gpa % 8), new, 4);
2588 } else if ((bytes == 8) && (gpa % 8 == 0)) {
2589 memcpy((void *)&gpte, new, 8);
2590 }
2591 } else {
2592 if ((bytes == 4) && (gpa % 4 == 0))
2593 memcpy((void *)&gpte, new, 4);
2594 }
43a3795a 2595 if (!is_present_gpte(gpte))
d7824fff
AK		 2596 return;
2597 gfn = (gpte & PT64_BASE_ADDR_MASK) >> PAGE_SHIFT;
72dc67a6 2598
e930bffe 2599 vcpu->arch.update_pte.mmu_seq = vcpu->kvm->mmu_notifier_seq;
4c2155ce 2600 smp_rmb();
35149e21 2601 pfn = gfn_to_pfn(vcpu->kvm, gfn);
72dc67a6 2602
35149e21
AL		 2603 if (is_error_pfn(pfn)) {
2604 kvm_release_pfn_clean(pfn);
d196e343
AK		 2605 return;
2606 }
d7824fff 2607 vcpu->arch.update_pte.gfn = gfn;
35149e21 2608 vcpu->arch.update_pte.pfn = pfn;
d7824fff
AK		 2609}
2610
1b7fcd32
AK		 2611static void kvm_mmu_access_page(struct kvm_vcpu *vcpu, gfn_t gfn)
2612{
2613 u64 *spte = vcpu->arch.last_pte_updated;
2614
2615 if (spte
2616 && vcpu->arch.last_pte_gfn == gfn
2617 && shadow_accessed_mask
2618 && !(*spte & shadow_accessed_mask)
2619 && is_shadow_present_pte(*spte))
2620 set_bit(PT_ACCESSED_SHIFT, (unsigned long *)spte);
2621}
2622
09072daf 2623void kvm_mmu_pte_write(struct kvm_vcpu *vcpu, gpa_t gpa,
ad218f85
MT		 2624 const u8 *new, int bytes,
2625 bool guest_initiated)
da4a00f0 2626{
9b7a0325 2627 gfn_t gfn = gpa >> PAGE_SHIFT;
4db35314 2628 struct kvm_mmu_page *sp;
0e7bc4b9 2629 struct hlist_node *node, *n;
9b7a0325
AK		 2630 struct hlist_head *bucket;
2631 unsigned index;
489f1d65 2632 u64 entry, gentry;
9b7a0325 2633 u64 *spte;
9b7a0325 2634 unsigned offset = offset_in_page(gpa);
0e7bc4b9 2635 unsigned pte_size;
9b7a0325 2636 unsigned page_offset;
0e7bc4b9 2637 unsigned misaligned;
fce0657f 2638 unsigned quadrant;
9b7a0325 2639 int level;
86a5ba02 2640 int flooded = 0;
ac1b714e 2641 int npte;
489f1d65 2642 int r;
9b7a0325 2643
b8688d51 2644 pgprintk("%s: gpa %llx bytes %d\n", __func__, gpa, bytes);
d7824fff 2645 mmu_guess_page_from_pte_write(vcpu, gpa, new, bytes);
aaee2c94 2646 spin_lock(&vcpu->kvm->mmu_lock);
1b7fcd32 2647 kvm_mmu_access_page(vcpu, gfn);
eb787d10 2648 kvm_mmu_free_some_pages(vcpu);
4cee5764 2649 ++vcpu->kvm->stat.mmu_pte_write;
c7addb90 2650 kvm_mmu_audit(vcpu, "pre pte write");
ad218f85
MT		 2651 if (guest_initiated) {
2652 if (gfn == vcpu->arch.last_pt_write_gfn
2653 && !last_updated_pte_accessed(vcpu)) {
2654 ++vcpu->arch.last_pt_write_count;
2655 if (vcpu->arch.last_pt_write_count >= 3)
2656 flooded = 1;
2657 } else {
2658 vcpu->arch.last_pt_write_gfn = gfn;
2659 vcpu->arch.last_pt_write_count = 1;
2660 vcpu->arch.last_pte_updated = NULL;
2661 }
86a5ba02 2662 }
1ae0a13d 2663 index = kvm_page_table_hashfn(gfn);
f05e70ac 2664 bucket = &vcpu->kvm->arch.mmu_page_hash[index];
4db35314 2665 hlist_for_each_entry_safe(sp, node, n, bucket, hash_link) {
f6e2c02b 2666 if (sp->gfn != gfn || sp->role.direct || sp->role.invalid)
9b7a0325 2667 continue;
4db35314 2668 pte_size = sp->role.glevels == PT32_ROOT_LEVEL ? 4 : 8;
0e7bc4b9 2669 misaligned = (offset ^ (offset + bytes - 1)) & ~(pte_size - 1);
e925c5ba 2670 misaligned |= bytes < 4;
86a5ba02 2671 if (misaligned || flooded) {
0e7bc4b9
AK		 2672 /*
2673 * Misaligned accesses are too much trouble to fix
2674 * up; also, they usually indicate a page is not used
2675 * as a page table.
86a5ba02
AK		 2676 *
2677 * If we're seeing too many writes to a page,
2678 * it may no longer be a page table, or we may be
2679 * forking, in which case it is better to unmap the
2680 * page.
0e7bc4b9
AK		 2681 */
2682 pgprintk("misaligned: gpa %llx bytes %d role %x\n",
4db35314 2683 gpa, bytes, sp->role.word);
07385413
MT		 2684 if (kvm_mmu_zap_page(vcpu->kvm, sp))
2685 n = bucket->first;
4cee5764 2686 ++vcpu->kvm->stat.mmu_flooded;
0e7bc4b9
AK		 2687 continue;
2688 }
9b7a0325 2689 page_offset = offset;
4db35314 2690 level = sp->role.level;
ac1b714e 2691 npte = 1;
4db35314 2692 if (sp->role.glevels == PT32_ROOT_LEVEL) {
ac1b714e
AK		 2693 page_offset <<= 1; /* 32->64 */
2694 /*
2695 * A 32-bit pde maps 4MB while the shadow pdes map
2696 * only 2MB. So we need to double the offset again
2697 * and zap two pdes instead of one.
2698 */
2699 if (level == PT32_ROOT_LEVEL) {
6b8d0f9b 2700 page_offset &= ~7; /* kill rounding error */
ac1b714e
AK		 2701 page_offset <<= 1;
2702 npte = 2;
2703 }
fce0657f 2704 quadrant = page_offset >> PAGE_SHIFT;
9b7a0325 2705 page_offset &= ~PAGE_MASK;
4db35314 2706 if (quadrant != sp->role.quadrant)
fce0657f 2707 continue;
9b7a0325 2708 }
4db35314 2709 spte = &sp->spt[page_offset / sizeof(*spte)];
489f1d65
DE		 2710 if ((gpa & (pte_size - 1)) || (bytes < pte_size)) {
2711 gentry = 0;
2712 r = kvm_read_guest_atomic(vcpu->kvm,
2713 gpa & ~(u64)(pte_size - 1),
2714 &gentry, pte_size);
2715 new = (const void *)&gentry;
2716 if (r < 0)
2717 new = NULL;
2718 }
ac1b714e 2719 while (npte--) {
79539cec 2720 entry = *spte;
4db35314 2721 mmu_pte_write_zap_pte(vcpu, sp, spte);
489f1d65
DE		 2722 if (new)
2723 mmu_pte_write_new_pte(vcpu, sp, spte, new);
79539cec 2724 mmu_pte_write_flush_tlb(vcpu, entry, *spte);
ac1b714e 2725 ++spte;
9b7a0325 2726 }
9b7a0325 2727 }
c7addb90 2728 kvm_mmu_audit(vcpu, "post pte write");
aaee2c94 2729 spin_unlock(&vcpu->kvm->mmu_lock);
35149e21
AL		 2730 if (!is_error_pfn(vcpu->arch.update_pte.pfn)) {
2731 kvm_release_pfn_clean(vcpu->arch.update_pte.pfn);
2732 vcpu->arch.update_pte.pfn = bad_pfn;
d7824fff 2733 }
da4a00f0
AK		 2734}
2735
a436036b
AK		 2736int kvm_mmu_unprotect_page_virt(struct kvm_vcpu *vcpu, gva_t gva)
2737{
10589a46
MT		 2738 gpa_t gpa;
2739 int r;
a436036b 2740
60f24784
AK		 2741 if (tdp_enabled)
2742 return 0;
2743
1871c602 2744 gpa = kvm_mmu_gva_to_gpa_read(vcpu, gva, NULL);
10589a46 2745
aaee2c94 2746 spin_lock(&vcpu->kvm->mmu_lock);
10589a46 2747 r = kvm_mmu_unprotect_page(vcpu->kvm, gpa >> PAGE_SHIFT);
aaee2c94 2748 spin_unlock(&vcpu->kvm->mmu_lock);
10589a46 2749 return r;
a436036b 2750}
577bdc49 2751EXPORT_SYMBOL_GPL(kvm_mmu_unprotect_page_virt);
a436036b 2752
22d95b12 2753void __kvm_mmu_free_some_pages(struct kvm_vcpu *vcpu)
ebeace86 2754{
3b80fffe
IE		 2755 while (vcpu->kvm->arch.n_free_mmu_pages < KVM_REFILL_PAGES &&
2756 !list_empty(&vcpu->kvm->arch.active_mmu_pages)) {
4db35314 2757 struct kvm_mmu_page *sp;
ebeace86 2758
f05e70ac 2759 sp = container_of(vcpu->kvm->arch.active_mmu_pages.prev,
4db35314
AK		 2760 struct kvm_mmu_page, link);
2761 kvm_mmu_zap_page(vcpu->kvm, sp);
4cee5764 2762 ++vcpu->kvm->stat.mmu_recycled;
ebeace86
AK		 2763 }
2764}
ebeace86 2765
3067714c
AK		 2766int kvm_mmu_page_fault(struct kvm_vcpu *vcpu, gva_t cr2, u32 error_code)
2767{
2768 int r;
2769 enum emulation_result er;
2770
ad312c7c 2771 r = vcpu->arch.mmu.page_fault(vcpu, cr2, error_code);
3067714c
AK		 2772 if (r < 0)
2773 goto out;
2774
2775 if (!r) {
2776 r = 1;
2777 goto out;
2778 }
2779
b733bfb5
AK		 2780 r = mmu_topup_memory_caches(vcpu);
2781 if (r)
2782 goto out;
2783
851ba692 2784 er = emulate_instruction(vcpu, cr2, error_code, 0);
3067714c
AK		 2785
2786 switch (er) {
2787 case EMULATE_DONE:
2788 return 1;
2789 case EMULATE_DO_MMIO:
2790 ++vcpu->stat.mmio_exits;
2791 return 0;
2792 case EMULATE_FAIL:
3f5d18a9
AK		 2793 vcpu->run->exit_reason = KVM_EXIT_INTERNAL_ERROR;
2794 vcpu->run->internal.suberror = KVM_INTERNAL_ERROR_EMULATION;
a9c7399d 2795 vcpu->run->internal.ndata = 0;
3f5d18a9 2796 return 0;
3067714c
AK		 2797 default:
2798 BUG();
2799 }
2800out:
3067714c
AK		 2801 return r;
2802}
2803EXPORT_SYMBOL_GPL(kvm_mmu_page_fault);
2804
a7052897
MT		 2805void kvm_mmu_invlpg(struct kvm_vcpu *vcpu, gva_t gva)
2806{
a7052897 2807 vcpu->arch.mmu.invlpg(vcpu, gva);
a7052897
MT		 2808 kvm_mmu_flush_tlb(vcpu);
2809 ++vcpu->stat.invlpg;
2810}
2811EXPORT_SYMBOL_GPL(kvm_mmu_invlpg);
2812
18552672
JR		 2813void kvm_enable_tdp(void)
2814{
2815 tdp_enabled = true;
2816}
2817EXPORT_SYMBOL_GPL(kvm_enable_tdp);
2818
5f4cb662
JR		 2819void kvm_disable_tdp(void)
2820{
2821 tdp_enabled = false;
2822}
2823EXPORT_SYMBOL_GPL(kvm_disable_tdp);
2824
6aa8b732
AK		 2825static void free_mmu_pages(struct kvm_vcpu *vcpu)
2826{
ad312c7c 2827 free_page((unsigned long)vcpu->arch.mmu.pae_root);
6aa8b732
AK		 2828}
2829
2830static int alloc_mmu_pages(struct kvm_vcpu *vcpu)
2831{
17ac10ad 2832 struct page *page;
6aa8b732
AK		 2833 int i;
2834
2835 ASSERT(vcpu);
2836
17ac10ad
AK		 2837 /*
2838 * When emulating 32-bit mode, cr3 is only 32 bits even on x86_64.
2839 * Therefore we need to allocate shadow page tables in the first
2840 * 4GB of memory, which happens to fit the DMA32 zone.
2841 */
2842 page = alloc_page(GFP_KERNEL | __GFP_DMA32);
2843 if (!page)
d7fa6ab2
WY		 2844 return -ENOMEM;
2845
ad312c7c 2846 vcpu->arch.mmu.pae_root = page_address(page);
17ac10ad 2847 for (i = 0; i < 4; ++i)
ad312c7c 2848 vcpu->arch.mmu.pae_root[i] = INVALID_PAGE;
17ac10ad 2849
6aa8b732 2850 return 0;
6aa8b732
AK		 2851}
2852
8018c27b 2853int kvm_mmu_create(struct kvm_vcpu *vcpu)
6aa8b732 2854{
6aa8b732 2855 ASSERT(vcpu);
ad312c7c 2856 ASSERT(!VALID_PAGE(vcpu->arch.mmu.root_hpa));
6aa8b732 2857
8018c27b
IM		 2858 return alloc_mmu_pages(vcpu);
2859}
6aa8b732 2860
8018c27b
IM		 2861int kvm_mmu_setup(struct kvm_vcpu *vcpu)
2862{
2863 ASSERT(vcpu);
ad312c7c 2864 ASSERT(!VALID_PAGE(vcpu->arch.mmu.root_hpa));
2c264957 2865
8018c27b 2866 return init_kvm_mmu(vcpu);
6aa8b732
AK		 2867}
2868
2869void kvm_mmu_destroy(struct kvm_vcpu *vcpu)
2870{
2871 ASSERT(vcpu);
2872
2873 destroy_kvm_mmu(vcpu);
2874 free_mmu_pages(vcpu);
714b93da 2875 mmu_free_memory_caches(vcpu);
6aa8b732
AK		 2876}
2877
90cb0529 2878void kvm_mmu_slot_remove_write_access(struct kvm *kvm, int slot)
6aa8b732 2879{
4db35314 2880 struct kvm_mmu_page *sp;
6aa8b732 2881
f05e70ac 2882 list_for_each_entry(sp, &kvm->arch.active_mmu_pages, link) {
6aa8b732
AK		 2883 int i;
2884 u64 *pt;
2885
291f26bc 2886 if (!test_bit(slot, sp->slot_bitmap))
6aa8b732
AK		 2887 continue;
2888
4db35314 2889 pt = sp->spt;
6aa8b732
AK		 2890 for (i = 0; i < PT64_ENT_PER_PAGE; ++i)
2891 /* avoid RMW */
9647c14c 2892 if (pt[i] & PT_WRITABLE_MASK)
6aa8b732 2893 pt[i] &= ~PT_WRITABLE_MASK;
6aa8b732 2894 }
171d595d 2895 kvm_flush_remote_tlbs(kvm);
6aa8b732 2896}
37a7d8b0 2897
90cb0529 2898void kvm_mmu_zap_all(struct kvm *kvm)
e0fa826f 2899{
4db35314 2900 struct kvm_mmu_page *sp, *node;
e0fa826f 2901
aaee2c94 2902 spin_lock(&kvm->mmu_lock);
f05e70ac 2903 list_for_each_entry_safe(sp, node, &kvm->arch.active_mmu_pages, link)
07385413
MT		 2904 if (kvm_mmu_zap_page(kvm, sp))
2905 node = container_of(kvm->arch.active_mmu_pages.next,
2906 struct kvm_mmu_page, link);
aaee2c94 2907 spin_unlock(&kvm->mmu_lock);
e0fa826f 2908
90cb0529 2909 kvm_flush_remote_tlbs(kvm);
e0fa826f
DL		 2910}
2911
8b2cf73c 2912static void kvm_mmu_remove_one_alloc_mmu_page(struct kvm *kvm)
3ee16c81
IE		 2913{
2914 struct kvm_mmu_page *page;
2915
2916 page = container_of(kvm->arch.active_mmu_pages.prev,
2917 struct kvm_mmu_page, link);
2918 kvm_mmu_zap_page(kvm, page);
2919}
2920
2921static int mmu_shrink(int nr_to_scan, gfp_t gfp_mask)
2922{
2923 struct kvm *kvm;
2924 struct kvm *kvm_freed = NULL;
2925 int cache_count = 0;
2926
2927 spin_lock(&kvm_lock);
2928
2929 list_for_each_entry(kvm, &vm_list, vm_list) {
f656ce01 2930 int npages, idx;
3ee16c81 2931
f656ce01 2932 idx = srcu_read_lock(&kvm->srcu);
3ee16c81
IE		 2933 spin_lock(&kvm->mmu_lock);
2934 npages = kvm->arch.n_alloc_mmu_pages -
2935 kvm->arch.n_free_mmu_pages;
2936 cache_count += npages;
2937 if (!kvm_freed && nr_to_scan > 0 && npages > 0) {
2938 kvm_mmu_remove_one_alloc_mmu_page(kvm);
2939 cache_count--;
2940 kvm_freed = kvm;
2941 }
2942 nr_to_scan--;
2943
2944 spin_unlock(&kvm->mmu_lock);
f656ce01 2945 srcu_read_unlock(&kvm->srcu, idx);
3ee16c81
IE		 2946 }
2947 if (kvm_freed)
2948 list_move_tail(&kvm_freed->vm_list, &vm_list);
2949
2950 spin_unlock(&kvm_lock);
2951
2952 return cache_count;
2953}
2954
2955static struct shrinker mmu_shrinker = {
2956 .shrink = mmu_shrink,
2957 .seeks = DEFAULT_SEEKS * 10,
2958};
2959
2ddfd20e 2960static void mmu_destroy_caches(void)
b5a33a75
AK		 2961{
2962 if (pte_chain_cache)
2963 kmem_cache_destroy(pte_chain_cache);
2964 if (rmap_desc_cache)
2965 kmem_cache_destroy(rmap_desc_cache);
d3d25b04
AK		 2966 if (mmu_page_header_cache)
2967 kmem_cache_destroy(mmu_page_header_cache);
b5a33a75
AK		 2968}
2969
3ee16c81
IE		 2970void kvm_mmu_module_exit(void)
2971{
2972 mmu_destroy_caches();
2973 unregister_shrinker(&mmu_shrinker);
2974}
2975
b5a33a75
AK		 2976int kvm_mmu_module_init(void)
2977{
2978 pte_chain_cache = kmem_cache_create("kvm_pte_chain",
2979 sizeof(struct kvm_pte_chain),
20c2df83 2980 0, 0, NULL);
b5a33a75
AK		 2981 if (!pte_chain_cache)
2982 goto nomem;
2983 rmap_desc_cache = kmem_cache_create("kvm_rmap_desc",
2984 sizeof(struct kvm_rmap_desc),
20c2df83 2985 0, 0, NULL);
b5a33a75
AK		 2986 if (!rmap_desc_cache)
2987 goto nomem;
2988
d3d25b04
AK		 2989 mmu_page_header_cache = kmem_cache_create("kvm_mmu_page_header",
2990 sizeof(struct kvm_mmu_page),
20c2df83 2991 0, 0, NULL);
d3d25b04
AK		 2992 if (!mmu_page_header_cache)
2993 goto nomem;
2994
3ee16c81
IE		 2995 register_shrinker(&mmu_shrinker);
2996
b5a33a75
AK		 2997 return 0;
2998
2999nomem:
3ee16c81 3000 mmu_destroy_caches();
b5a33a75
AK		 3001 return -ENOMEM;
3002}
3003
3ad82a7e
ZX		 3004/*
3005 * Caculate mmu pages needed for kvm.
3006 */
3007unsigned int kvm_mmu_calculate_mmu_pages(struct kvm *kvm)
3008{
3009 int i;
3010 unsigned int nr_mmu_pages;
3011 unsigned int nr_pages = 0;
bc6678a3 3012 struct kvm_memslots *slots;
3ad82a7e 3013
bc6678a3
MT		 3014 slots = rcu_dereference(kvm->memslots);
3015 for (i = 0; i < slots->nmemslots; i++)
3016 nr_pages += slots->memslots[i].npages;
3ad82a7e
ZX		 3017
3018 nr_mmu_pages = nr_pages * KVM_PERMILLE_MMU_PAGES / 1000;
3019 nr_mmu_pages = max(nr_mmu_pages,
3020 (unsigned int) KVM_MIN_ALLOC_MMU_PAGES);
3021
3022 return nr_mmu_pages;
3023}
3024
2f333bcb
MT		 3025static void *pv_mmu_peek_buffer(struct kvm_pv_mmu_op_buffer *buffer,
3026 unsigned len)
3027{
3028 if (len > buffer->len)
3029 return NULL;
3030 return buffer->ptr;
3031}
3032
3033static void *pv_mmu_read_buffer(struct kvm_pv_mmu_op_buffer *buffer,
3034 unsigned len)
3035{
3036 void *ret;
3037
3038 ret = pv_mmu_peek_buffer(buffer, len);
3039 if (!ret)
3040 return ret;
3041 buffer->ptr += len;
3042 buffer->len -= len;
3043 buffer->processed += len;
3044 return ret;
3045}
3046
3047static int kvm_pv_mmu_write(struct kvm_vcpu *vcpu,
3048 gpa_t addr, gpa_t value)
3049{
3050 int bytes = 8;
3051 int r;
3052
3053 if (!is_long_mode(vcpu) && !is_pae(vcpu))
3054 bytes = 4;
3055
3056 r = mmu_topup_memory_caches(vcpu);
3057 if (r)
3058 return r;
3059
3200f405 3060 if (!emulator_write_phys(vcpu, addr, &value, bytes))
2f333bcb
MT		 3061 return -EFAULT;
3062
3063 return 1;
3064}
3065
3066static int kvm_pv_mmu_flush_tlb(struct kvm_vcpu *vcpu)
3067{
a8cd0244 3068 kvm_set_cr3(vcpu, vcpu->arch.cr3);
2f333bcb
MT		 3069 return 1;
3070}
3071
3072static int kvm_pv_mmu_release_pt(struct kvm_vcpu *vcpu, gpa_t addr)
3073{
3074 spin_lock(&vcpu->kvm->mmu_lock);
3075 mmu_unshadow(vcpu->kvm, addr >> PAGE_SHIFT);
3076 spin_unlock(&vcpu->kvm->mmu_lock);
3077 return 1;
3078}
3079
3080static int kvm_pv_mmu_op_one(struct kvm_vcpu *vcpu,
3081 struct kvm_pv_mmu_op_buffer *buffer)
3082{
3083 struct kvm_mmu_op_header *header;
3084
3085 header = pv_mmu_peek_buffer(buffer, sizeof *header);
3086 if (!header)
3087 return 0;
3088 switch (header->op) {
3089 case KVM_MMU_OP_WRITE_PTE: {
3090 struct kvm_mmu_op_write_pte *wpte;
3091
3092 wpte = pv_mmu_read_buffer(buffer, sizeof *wpte);
3093 if (!wpte)
3094 return 0;
3095 return kvm_pv_mmu_write(vcpu, wpte->pte_phys,
3096 wpte->pte_val);
3097 }
3098 case KVM_MMU_OP_FLUSH_TLB: {
3099 struct kvm_mmu_op_flush_tlb *ftlb;
3100
3101 ftlb = pv_mmu_read_buffer(buffer, sizeof *ftlb);
3102 if (!ftlb)
3103 return 0;
3104 return kvm_pv_mmu_flush_tlb(vcpu);
3105 }
3106 case KVM_MMU_OP_RELEASE_PT: {
3107 struct kvm_mmu_op_release_pt *rpt;
3108
3109 rpt = pv_mmu_read_buffer(buffer, sizeof *rpt);
3110 if (!rpt)
3111 return 0;
3112 return kvm_pv_mmu_release_pt(vcpu, rpt->pt_phys);
3113 }
3114 default: return 0;
3115 }
3116}
3117
3118int kvm_pv_mmu_op(struct kvm_vcpu *vcpu, unsigned long bytes,
3119 gpa_t addr, unsigned long *ret)
3120{
3121 int r;
6ad18fba 3122 struct kvm_pv_mmu_op_buffer *buffer = &vcpu->arch.mmu_op_buffer;
2f333bcb 3123
6ad18fba
DH		 3124 buffer->ptr = buffer->buf;
3125 buffer->len = min_t(unsigned long, bytes, sizeof buffer->buf);
3126 buffer->processed = 0;
2f333bcb 3127
6ad18fba 3128 r = kvm_read_guest(vcpu->kvm, addr, buffer->buf, buffer->len);
2f333bcb
MT		 3129 if (r)
3130 goto out;
3131
6ad18fba
DH		 3132 while (buffer->len) {
3133 r = kvm_pv_mmu_op_one(vcpu, buffer);
2f333bcb
MT		 3134 if (r < 0)
3135 goto out;
3136 if (r == 0)
3137 break;
3138 }
3139
3140 r = 1;
3141out:
6ad18fba 3142 *ret = buffer->processed;
2f333bcb
MT		 3143 return r;
3144}
3145
94d8b056
MT		 3146int kvm_mmu_get_spte_hierarchy(struct kvm_vcpu *vcpu, u64 addr, u64 sptes[4])
3147{
3148 struct kvm_shadow_walk_iterator iterator;
3149 int nr_sptes = 0;
3150
3151 spin_lock(&vcpu->kvm->mmu_lock);
3152 for_each_shadow_entry(vcpu, addr, iterator) {
3153 sptes[iterator.level-1] = *iterator.sptep;
3154 nr_sptes++;
3155 if (!is_shadow_present_pte(*iterator.sptep))
3156 break;
3157 }
3158 spin_unlock(&vcpu->kvm->mmu_lock);
3159
3160 return nr_sptes;
3161}
3162EXPORT_SYMBOL_GPL(kvm_mmu_get_spte_hierarchy);
3163
37a7d8b0
AK		 3164#ifdef AUDIT
3165
3166static const char *audit_msg;
3167
3168static gva_t canonicalize(gva_t gva)
3169{
3170#ifdef CONFIG_X86_64
3171 gva = (long long)(gva << 16) >> 16;
3172#endif
3173 return gva;
3174}
3175
08a3732b
MT		 3176
3177typedef void (*inspect_spte_fn) (struct kvm *kvm, struct kvm_mmu_page *sp,
3178 u64 *sptep);
3179
3180static void __mmu_spte_walk(struct kvm *kvm, struct kvm_mmu_page *sp,
3181 inspect_spte_fn fn)
3182{
3183 int i;
3184
3185 for (i = 0; i < PT64_ENT_PER_PAGE; ++i) {
3186 u64 ent = sp->spt[i];
3187
3188 if (is_shadow_present_pte(ent)) {
2920d728 3189 if (!is_last_spte(ent, sp->role.level)) {
08a3732b
MT		 3190 struct kvm_mmu_page *child;
3191 child = page_header(ent & PT64_BASE_ADDR_MASK);
3192 __mmu_spte_walk(kvm, child, fn);
2920d728 3193 } else
08a3732b
MT		 3194 fn(kvm, sp, &sp->spt[i]);
3195 }
3196 }
3197}
3198
3199static void mmu_spte_walk(struct kvm_vcpu *vcpu, inspect_spte_fn fn)
3200{
3201 int i;
3202 struct kvm_mmu_page *sp;
3203
3204 if (!VALID_PAGE(vcpu->arch.mmu.root_hpa))
3205 return;
3206 if (vcpu->arch.mmu.shadow_root_level == PT64_ROOT_LEVEL) {
3207 hpa_t root = vcpu->arch.mmu.root_hpa;
3208 sp = page_header(root);
3209 __mmu_spte_walk(vcpu->kvm, sp, fn);
3210 return;
3211 }
3212 for (i = 0; i < 4; ++i) {
3213 hpa_t root = vcpu->arch.mmu.pae_root[i];
3214
3215 if (root && VALID_PAGE(root)) {
3216 root &= PT64_BASE_ADDR_MASK;
3217 sp = page_header(root);
3218 __mmu_spte_walk(vcpu->kvm, sp, fn);
3219 }
3220 }
3221 return;
3222}
3223
37a7d8b0
AK		 3224static void audit_mappings_page(struct kvm_vcpu *vcpu, u64 page_pte,
3225 gva_t va, int level)
3226{
3227 u64 *pt = __va(page_pte & PT64_BASE_ADDR_MASK);
3228 int i;
3229 gva_t va_delta = 1ul << (PAGE_SHIFT + 9 * (level - 1));
3230
3231 for (i = 0; i < PT64_ENT_PER_PAGE; ++i, va += va_delta) {
3232 u64 ent = pt[i];
3233
c7addb90 3234 if (ent == shadow_trap_nonpresent_pte)
37a7d8b0
AK		 3235 continue;
3236
3237 va = canonicalize(va);
2920d728
MT		 3238 if (is_shadow_present_pte(ent) && !is_last_spte(ent, level))
3239 audit_mappings_page(vcpu, ent, va, level - 1);
3240 else {
1871c602 3241 gpa_t gpa = kvm_mmu_gva_to_gpa_read(vcpu, va, NULL);
34382539
JK		 3242 gfn_t gfn = gpa >> PAGE_SHIFT;
3243 pfn_t pfn = gfn_to_pfn(vcpu->kvm, gfn);
3244 hpa_t hpa = (hpa_t)pfn << PAGE_SHIFT;
37a7d8b0 3245
2aaf65e8
MT		 3246 if (is_error_pfn(pfn)) {
3247 kvm_release_pfn_clean(pfn);
3248 continue;
3249 }
3250
c7addb90 3251 if (is_shadow_present_pte(ent)
37a7d8b0 3252 && (ent & PT64_BASE_ADDR_MASK) != hpa)
c7addb90
AK		 3253 printk(KERN_ERR "xx audit error: (%s) levels %d"
3254 " gva %lx gpa %llx hpa %llx ent %llx %d\n",
ad312c7c 3255 audit_msg, vcpu->arch.mmu.root_level,
d77c26fc
MD		 3256 va, gpa, hpa, ent,
3257 is_shadow_present_pte(ent));
c7addb90
AK		 3258 else if (ent == shadow_notrap_nonpresent_pte
3259 && !is_error_hpa(hpa))
3260 printk(KERN_ERR "audit: (%s) notrap shadow,"
3261 " valid guest gva %lx\n", audit_msg, va);
35149e21 3262 kvm_release_pfn_clean(pfn);
c7addb90 3263
37a7d8b0
AK		 3264 }
3265 }
3266}
3267
3268static void audit_mappings(struct kvm_vcpu *vcpu)
3269{
1ea252af 3270 unsigned i;
37a7d8b0 3271
ad312c7c
ZX		 3272 if (vcpu->arch.mmu.root_level == 4)
3273 audit_mappings_page(vcpu, vcpu->arch.mmu.root_hpa, 0, 4);
37a7d8b0
AK		 3274 else
3275 for (i = 0; i < 4; ++i)
ad312c7c 3276 if (vcpu->arch.mmu.pae_root[i] & PT_PRESENT_MASK)
37a7d8b0 3277 audit_mappings_page(vcpu,
ad312c7c 3278 vcpu->arch.mmu.pae_root[i],
37a7d8b0
AK		 3279 i << 30,
3280 2);
3281}
3282
3283static int count_rmaps(struct kvm_vcpu *vcpu)
3284{
3285 int nmaps = 0;
bc6678a3 3286 int i, j, k, idx;
37a7d8b0 3287
bc6678a3
MT		 3288 idx = srcu_read_lock(&kvm->srcu);
3289 slots = rcu_dereference(kvm->memslots);
37a7d8b0 3290 for (i = 0; i < KVM_MEMORY_SLOTS; ++i) {
bc6678a3 3291 struct kvm_memory_slot *m = &slots->memslots[i];
37a7d8b0
AK		 3292 struct kvm_rmap_desc *d;
3293
3294 for (j = 0; j < m->npages; ++j) {
290fc38d 3295 unsigned long *rmapp = &m->rmap[j];
37a7d8b0 3296
290fc38d 3297 if (!*rmapp)
37a7d8b0 3298 continue;
290fc38d 3299 if (!(*rmapp & 1)) {
37a7d8b0
AK		 3300 ++nmaps;
3301 continue;
3302 }
290fc38d 3303 d = (struct kvm_rmap_desc *)(*rmapp & ~1ul);
37a7d8b0
AK		 3304 while (d) {
3305 for (k = 0; k < RMAP_EXT; ++k)
d555c333 3306 if (d->sptes[k])
37a7d8b0
AK		 3307 ++nmaps;
3308 else
3309 break;
3310 d = d->more;
3311 }
3312 }
3313 }
bc6678a3 3314 srcu_read_unlock(&kvm->srcu, idx);
37a7d8b0
AK		 3315 return nmaps;
3316}
3317
08a3732b
MT		 3318void inspect_spte_has_rmap(struct kvm *kvm, struct kvm_mmu_page *sp, u64 *sptep)
3319{
3320 unsigned long *rmapp;
3321 struct kvm_mmu_page *rev_sp;
3322 gfn_t gfn;
3323
3324 if (*sptep & PT_WRITABLE_MASK) {
3325 rev_sp = page_header(__pa(sptep));
3326 gfn = rev_sp->gfns[sptep - rev_sp->spt];
3327
3328 if (!gfn_to_memslot(kvm, gfn)) {
3329 if (!printk_ratelimit())
3330 return;
3331 printk(KERN_ERR "%s: no memslot for gfn %ld\n",
3332 audit_msg, gfn);
3333 printk(KERN_ERR "%s: index %ld of sp (gfn=%lx)\n",
3334 audit_msg, sptep - rev_sp->spt,
3335 rev_sp->gfn);
3336 dump_stack();
3337 return;
3338 }
3339
2920d728
MT		 3340 rmapp = gfn_to_rmap(kvm, rev_sp->gfns[sptep - rev_sp->spt],
3341 is_large_pte(*sptep));
08a3732b
MT		 3342 if (!*rmapp) {
3343 if (!printk_ratelimit())
3344 return;
3345 printk(KERN_ERR "%s: no rmap for writable spte %llx\n",
3346 audit_msg, *sptep);
3347 dump_stack();
3348 }
3349 }
3350
3351}
3352
3353void audit_writable_sptes_have_rmaps(struct kvm_vcpu *vcpu)
3354{
3355 mmu_spte_walk(vcpu, inspect_spte_has_rmap);
3356}
3357
3358static void check_writable_mappings_rmap(struct kvm_vcpu *vcpu)
37a7d8b0 3359{
4db35314 3360 struct kvm_mmu_page *sp;
37a7d8b0
AK		 3361 int i;
3362
f05e70ac 3363 list_for_each_entry(sp, &vcpu->kvm->arch.active_mmu_pages, link) {
4db35314 3364 u64 *pt = sp->spt;
37a7d8b0 3365
4db35314 3366 if (sp->role.level != PT_PAGE_TABLE_LEVEL)
37a7d8b0
AK		 3367 continue;
3368
3369 for (i = 0; i < PT64_ENT_PER_PAGE; ++i) {
3370 u64 ent = pt[i];
3371
3372 if (!(ent & PT_PRESENT_MASK))
3373 continue;
3374 if (!(ent & PT_WRITABLE_MASK))
3375 continue;
08a3732b 3376 inspect_spte_has_rmap(vcpu->kvm, sp, &pt[i]);
37a7d8b0
AK		 3377 }
3378 }
08a3732b 3379 return;
37a7d8b0
AK		 3380}
3381
3382static void audit_rmap(struct kvm_vcpu *vcpu)
3383{
08a3732b
MT		 3384 check_writable_mappings_rmap(vcpu);
3385 count_rmaps(vcpu);
37a7d8b0
AK		 3386}
3387
3388static void audit_write_protection(struct kvm_vcpu *vcpu)
3389{
4db35314 3390 struct kvm_mmu_page *sp;
290fc38d
IE		 3391 struct kvm_memory_slot *slot;
3392 unsigned long *rmapp;
e58b0f9e 3393 u64 *spte;
290fc38d 3394 gfn_t gfn;
37a7d8b0 3395
f05e70ac 3396 list_for_each_entry(sp, &vcpu->kvm->arch.active_mmu_pages, link) {
f6e2c02b 3397 if (sp->role.direct)
37a7d8b0 3398 continue;
e58b0f9e
MT		 3399 if (sp->unsync)
3400 continue;
37a7d8b0 3401
4db35314 3402 gfn = unalias_gfn(vcpu->kvm, sp->gfn);
2843099f 3403 slot = gfn_to_memslot_unaliased(vcpu->kvm, sp->gfn);
290fc38d 3404 rmapp = &slot->rmap[gfn - slot->base_gfn];
e58b0f9e
MT		 3405
3406 spte = rmap_next(vcpu->kvm, rmapp, NULL);
3407 while (spte) {
3408 if (*spte & PT_WRITABLE_MASK)
3409 printk(KERN_ERR "%s: (%s) shadow page has "
3410 "writable mappings: gfn %lx role %x\n",
b8688d51 3411 __func__, audit_msg, sp->gfn,
4db35314 3412 sp->role.word);
e58b0f9e
MT		 3413 spte = rmap_next(vcpu->kvm, rmapp, spte);
3414 }
37a7d8b0
AK		 3415 }
3416}
3417
3418static void kvm_mmu_audit(struct kvm_vcpu *vcpu, const char *msg)
3419{
3420 int olddbg = dbg;
3421
3422 dbg = 0;
3423 audit_msg = msg;
3424 audit_rmap(vcpu);
3425 audit_write_protection(vcpu);
2aaf65e8
MT		 3426 if (strcmp("pre pte write", audit_msg) != 0)
3427 audit_mappings(vcpu);
08a3732b 3428 audit_writable_sptes_have_rmaps(vcpu);
37a7d8b0
AK		 3429 dbg = olddbg;
3430}
3431
3432#endif
Linux 6.x block layer and io_uring tree(s)