KVM: Clean up kvm_x86_emulate.h
[linux-block.git] / arch / x86 / kvm / mmu.c
CommitLineData
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1/*
2 * Kernel-based Virtual Machine driver for Linux
3 *
4 * This module enables machines with Intel VT-x extensions to run virtual
5 * machines without emulation or binary translation.
6 *
7 * MMU support
8 *
9 * Copyright (C) 2006 Qumranet, Inc.
10 *
11 * Authors:
12 * Yaniv Kamay <yaniv@qumranet.com>
13 * Avi Kivity <avi@qumranet.com>
14 *
15 * This work is licensed under the terms of the GNU GPL, version 2. See
16 * the COPYING file in the top-level directory.
17 *
18 */
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19
20#include "vmx.h"
1d737c8a 21#include "mmu.h"
e495606d 22
edf88417 23#include <linux/kvm_host.h>
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24#include <linux/types.h>
25#include <linux/string.h>
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26#include <linux/mm.h>
27#include <linux/highmem.h>
28#include <linux/module.h>
448353ca 29#include <linux/swap.h>
05da4558 30#include <linux/hugetlb.h>
2f333bcb 31#include <linux/compiler.h>
6aa8b732 32
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33#include <asm/page.h>
34#include <asm/cmpxchg.h>
4e542370 35#include <asm/io.h>
6aa8b732 36
18552672
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37/*
38 * When setting this variable to true it enables Two-Dimensional-Paging
39 * where the hardware walks 2 page tables:
40 * 1. the guest-virtual to guest-physical
41 * 2. while doing 1. it walks guest-physical to host-physical
42 * If the hardware supports that we don't need to do shadow paging.
43 */
2f333bcb 44bool tdp_enabled = false;
18552672 45
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46#undef MMU_DEBUG
47
48#undef AUDIT
49
50#ifdef AUDIT
51static void kvm_mmu_audit(struct kvm_vcpu *vcpu, const char *msg);
52#else
53static void kvm_mmu_audit(struct kvm_vcpu *vcpu, const char *msg) {}
54#endif
55
56#ifdef MMU_DEBUG
57
58#define pgprintk(x...) do { if (dbg) printk(x); } while (0)
59#define rmap_printk(x...) do { if (dbg) printk(x); } while (0)
60
61#else
62
63#define pgprintk(x...) do { } while (0)
64#define rmap_printk(x...) do { } while (0)
65
66#endif
67
68#if defined(MMU_DEBUG) || defined(AUDIT)
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69static int dbg = 0;
70module_param(dbg, bool, 0644);
37a7d8b0 71#endif
6aa8b732 72
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73static int oos_shadow = 1;
74module_param(oos_shadow, bool, 0644);
75
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76#ifndef MMU_DEBUG
77#define ASSERT(x) do { } while (0)
78#else
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79#define ASSERT(x) \
80 if (!(x)) { \
81 printk(KERN_WARNING "assertion failed %s:%d: %s\n", \
82 __FILE__, __LINE__, #x); \
83 }
d6c69ee9 84#endif
6aa8b732 85
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86#define PT_FIRST_AVAIL_BITS_SHIFT 9
87#define PT64_SECOND_AVAIL_BITS_SHIFT 52
88
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89#define VALID_PAGE(x) ((x) != INVALID_PAGE)
90
91#define PT64_LEVEL_BITS 9
92
93#define PT64_LEVEL_SHIFT(level) \
d77c26fc 94 (PAGE_SHIFT + (level - 1) * PT64_LEVEL_BITS)
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95
96#define PT64_LEVEL_MASK(level) \
97 (((1ULL << PT64_LEVEL_BITS) - 1) << PT64_LEVEL_SHIFT(level))
98
99#define PT64_INDEX(address, level)\
100 (((address) >> PT64_LEVEL_SHIFT(level)) & ((1 << PT64_LEVEL_BITS) - 1))
101
102
103#define PT32_LEVEL_BITS 10
104
105#define PT32_LEVEL_SHIFT(level) \
d77c26fc 106 (PAGE_SHIFT + (level - 1) * PT32_LEVEL_BITS)
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107
108#define PT32_LEVEL_MASK(level) \
109 (((1ULL << PT32_LEVEL_BITS) - 1) << PT32_LEVEL_SHIFT(level))
110
111#define PT32_INDEX(address, level)\
112 (((address) >> PT32_LEVEL_SHIFT(level)) & ((1 << PT32_LEVEL_BITS) - 1))
113
114
27aba766 115#define PT64_BASE_ADDR_MASK (((1ULL << 52) - 1) & ~(u64)(PAGE_SIZE-1))
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116#define PT64_DIR_BASE_ADDR_MASK \
117 (PT64_BASE_ADDR_MASK & ~((1ULL << (PAGE_SHIFT + PT64_LEVEL_BITS)) - 1))
118
119#define PT32_BASE_ADDR_MASK PAGE_MASK
120#define PT32_DIR_BASE_ADDR_MASK \
121 (PAGE_MASK & ~((1ULL << (PAGE_SHIFT + PT32_LEVEL_BITS)) - 1))
122
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123#define PT64_PERM_MASK (PT_PRESENT_MASK | PT_WRITABLE_MASK | PT_USER_MASK \
124 | PT64_NX_MASK)
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125
126#define PFERR_PRESENT_MASK (1U << 0)
127#define PFERR_WRITE_MASK (1U << 1)
128#define PFERR_USER_MASK (1U << 2)
73b1087e 129#define PFERR_FETCH_MASK (1U << 4)
6aa8b732 130
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131#define PT_DIRECTORY_LEVEL 2
132#define PT_PAGE_TABLE_LEVEL 1
133
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134#define RMAP_EXT 4
135
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136#define ACC_EXEC_MASK 1
137#define ACC_WRITE_MASK PT_WRITABLE_MASK
138#define ACC_USER_MASK PT_USER_MASK
139#define ACC_ALL (ACC_EXEC_MASK | ACC_WRITE_MASK | ACC_USER_MASK)
140
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141#define SHADOW_PT_INDEX(addr, level) PT64_INDEX(addr, level)
142
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143struct kvm_rmap_desc {
144 u64 *shadow_ptes[RMAP_EXT];
145 struct kvm_rmap_desc *more;
146};
147
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148struct kvm_shadow_walk {
149 int (*entry)(struct kvm_shadow_walk *walk, struct kvm_vcpu *vcpu,
d40a1ee4 150 u64 addr, u64 *spte, int level);
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151};
152
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MT
153struct kvm_unsync_walk {
154 int (*entry) (struct kvm_mmu_page *sp, struct kvm_unsync_walk *walk);
155};
156
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157typedef int (*mmu_parent_walk_fn) (struct kvm_vcpu *vcpu, struct kvm_mmu_page *sp);
158
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159static struct kmem_cache *pte_chain_cache;
160static struct kmem_cache *rmap_desc_cache;
d3d25b04 161static struct kmem_cache *mmu_page_header_cache;
b5a33a75 162
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163static u64 __read_mostly shadow_trap_nonpresent_pte;
164static u64 __read_mostly shadow_notrap_nonpresent_pte;
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165static u64 __read_mostly shadow_base_present_pte;
166static u64 __read_mostly shadow_nx_mask;
167static u64 __read_mostly shadow_x_mask; /* mutual exclusive with nx_mask */
168static u64 __read_mostly shadow_user_mask;
169static u64 __read_mostly shadow_accessed_mask;
170static u64 __read_mostly shadow_dirty_mask;
64d4d521 171static u64 __read_mostly shadow_mt_mask;
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172
173void kvm_mmu_set_nonpresent_ptes(u64 trap_pte, u64 notrap_pte)
174{
175 shadow_trap_nonpresent_pte = trap_pte;
176 shadow_notrap_nonpresent_pte = notrap_pte;
177}
178EXPORT_SYMBOL_GPL(kvm_mmu_set_nonpresent_ptes);
179
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180void kvm_mmu_set_base_ptes(u64 base_pte)
181{
182 shadow_base_present_pte = base_pte;
183}
184EXPORT_SYMBOL_GPL(kvm_mmu_set_base_ptes);
185
186void kvm_mmu_set_mask_ptes(u64 user_mask, u64 accessed_mask,
64d4d521 187 u64 dirty_mask, u64 nx_mask, u64 x_mask, u64 mt_mask)
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SY
188{
189 shadow_user_mask = user_mask;
190 shadow_accessed_mask = accessed_mask;
191 shadow_dirty_mask = dirty_mask;
192 shadow_nx_mask = nx_mask;
193 shadow_x_mask = x_mask;
64d4d521 194 shadow_mt_mask = mt_mask;
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195}
196EXPORT_SYMBOL_GPL(kvm_mmu_set_mask_ptes);
197
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198static int is_write_protection(struct kvm_vcpu *vcpu)
199{
ad312c7c 200 return vcpu->arch.cr0 & X86_CR0_WP;
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201}
202
203static int is_cpuid_PSE36(void)
204{
205 return 1;
206}
207
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208static int is_nx(struct kvm_vcpu *vcpu)
209{
ad312c7c 210 return vcpu->arch.shadow_efer & EFER_NX;
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211}
212
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213static int is_present_pte(unsigned long pte)
214{
215 return pte & PT_PRESENT_MASK;
216}
217
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218static int is_shadow_present_pte(u64 pte)
219{
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220 return pte != shadow_trap_nonpresent_pte
221 && pte != shadow_notrap_nonpresent_pte;
222}
223
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224static int is_large_pte(u64 pte)
225{
226 return pte & PT_PAGE_SIZE_MASK;
227}
228
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229static int is_writeble_pte(unsigned long pte)
230{
231 return pte & PT_WRITABLE_MASK;
232}
233
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234static int is_dirty_pte(unsigned long pte)
235{
7b52345e 236 return pte & shadow_dirty_mask;
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237}
238
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239static int is_rmap_pte(u64 pte)
240{
4b1a80fa 241 return is_shadow_present_pte(pte);
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242}
243
35149e21 244static pfn_t spte_to_pfn(u64 pte)
0b49ea86 245{
35149e21 246 return (pte & PT64_BASE_ADDR_MASK) >> PAGE_SHIFT;
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247}
248
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249static gfn_t pse36_gfn_delta(u32 gpte)
250{
251 int shift = 32 - PT32_DIR_PSE36_SHIFT - PAGE_SHIFT;
252
253 return (gpte & PT32_DIR_PSE36_MASK) << shift;
254}
255
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256static void set_shadow_pte(u64 *sptep, u64 spte)
257{
258#ifdef CONFIG_X86_64
259 set_64bit((unsigned long *)sptep, spte);
260#else
261 set_64bit((unsigned long long *)sptep, spte);
262#endif
263}
264
e2dec939 265static int mmu_topup_memory_cache(struct kvm_mmu_memory_cache *cache,
2e3e5882 266 struct kmem_cache *base_cache, int min)
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267{
268 void *obj;
269
270 if (cache->nobjs >= min)
e2dec939 271 return 0;
714b93da 272 while (cache->nobjs < ARRAY_SIZE(cache->objects)) {
2e3e5882 273 obj = kmem_cache_zalloc(base_cache, GFP_KERNEL);
714b93da 274 if (!obj)
e2dec939 275 return -ENOMEM;
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276 cache->objects[cache->nobjs++] = obj;
277 }
e2dec939 278 return 0;
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279}
280
281static void mmu_free_memory_cache(struct kvm_mmu_memory_cache *mc)
282{
283 while (mc->nobjs)
284 kfree(mc->objects[--mc->nobjs]);
285}
286
c1158e63 287static int mmu_topup_memory_cache_page(struct kvm_mmu_memory_cache *cache,
2e3e5882 288 int min)
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289{
290 struct page *page;
291
292 if (cache->nobjs >= min)
293 return 0;
294 while (cache->nobjs < ARRAY_SIZE(cache->objects)) {
2e3e5882 295 page = alloc_page(GFP_KERNEL);
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296 if (!page)
297 return -ENOMEM;
298 set_page_private(page, 0);
299 cache->objects[cache->nobjs++] = page_address(page);
300 }
301 return 0;
302}
303
304static void mmu_free_memory_cache_page(struct kvm_mmu_memory_cache *mc)
305{
306 while (mc->nobjs)
c4d198d5 307 free_page((unsigned long)mc->objects[--mc->nobjs]);
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308}
309
2e3e5882 310static int mmu_topup_memory_caches(struct kvm_vcpu *vcpu)
714b93da 311{
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312 int r;
313
ad312c7c 314 r = mmu_topup_memory_cache(&vcpu->arch.mmu_pte_chain_cache,
2e3e5882 315 pte_chain_cache, 4);
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316 if (r)
317 goto out;
ad312c7c 318 r = mmu_topup_memory_cache(&vcpu->arch.mmu_rmap_desc_cache,
c41ef344 319 rmap_desc_cache, 4);
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320 if (r)
321 goto out;
ad312c7c 322 r = mmu_topup_memory_cache_page(&vcpu->arch.mmu_page_cache, 8);
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323 if (r)
324 goto out;
ad312c7c 325 r = mmu_topup_memory_cache(&vcpu->arch.mmu_page_header_cache,
2e3e5882 326 mmu_page_header_cache, 4);
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327out:
328 return r;
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329}
330
331static void mmu_free_memory_caches(struct kvm_vcpu *vcpu)
332{
ad312c7c
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333 mmu_free_memory_cache(&vcpu->arch.mmu_pte_chain_cache);
334 mmu_free_memory_cache(&vcpu->arch.mmu_rmap_desc_cache);
335 mmu_free_memory_cache_page(&vcpu->arch.mmu_page_cache);
336 mmu_free_memory_cache(&vcpu->arch.mmu_page_header_cache);
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337}
338
339static void *mmu_memory_cache_alloc(struct kvm_mmu_memory_cache *mc,
340 size_t size)
341{
342 void *p;
343
344 BUG_ON(!mc->nobjs);
345 p = mc->objects[--mc->nobjs];
346 memset(p, 0, size);
347 return p;
348}
349
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350static struct kvm_pte_chain *mmu_alloc_pte_chain(struct kvm_vcpu *vcpu)
351{
ad312c7c 352 return mmu_memory_cache_alloc(&vcpu->arch.mmu_pte_chain_cache,
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353 sizeof(struct kvm_pte_chain));
354}
355
90cb0529 356static void mmu_free_pte_chain(struct kvm_pte_chain *pc)
714b93da 357{
90cb0529 358 kfree(pc);
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359}
360
361static struct kvm_rmap_desc *mmu_alloc_rmap_desc(struct kvm_vcpu *vcpu)
362{
ad312c7c 363 return mmu_memory_cache_alloc(&vcpu->arch.mmu_rmap_desc_cache,
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364 sizeof(struct kvm_rmap_desc));
365}
366
90cb0529 367static void mmu_free_rmap_desc(struct kvm_rmap_desc *rd)
714b93da 368{
90cb0529 369 kfree(rd);
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370}
371
05da4558
MT
372/*
373 * Return the pointer to the largepage write count for a given
374 * gfn, handling slots that are not large page aligned.
375 */
376static int *slot_largepage_idx(gfn_t gfn, struct kvm_memory_slot *slot)
377{
378 unsigned long idx;
379
380 idx = (gfn / KVM_PAGES_PER_HPAGE) -
381 (slot->base_gfn / KVM_PAGES_PER_HPAGE);
382 return &slot->lpage_info[idx].write_count;
383}
384
385static void account_shadowed(struct kvm *kvm, gfn_t gfn)
386{
387 int *write_count;
388
389 write_count = slot_largepage_idx(gfn, gfn_to_memslot(kvm, gfn));
390 *write_count += 1;
05da4558
MT
391}
392
393static void unaccount_shadowed(struct kvm *kvm, gfn_t gfn)
394{
395 int *write_count;
396
397 write_count = slot_largepage_idx(gfn, gfn_to_memslot(kvm, gfn));
398 *write_count -= 1;
399 WARN_ON(*write_count < 0);
400}
401
402static int has_wrprotected_page(struct kvm *kvm, gfn_t gfn)
403{
404 struct kvm_memory_slot *slot = gfn_to_memslot(kvm, gfn);
405 int *largepage_idx;
406
407 if (slot) {
408 largepage_idx = slot_largepage_idx(gfn, slot);
409 return *largepage_idx;
410 }
411
412 return 1;
413}
414
415static int host_largepage_backed(struct kvm *kvm, gfn_t gfn)
416{
417 struct vm_area_struct *vma;
418 unsigned long addr;
4c2155ce 419 int ret = 0;
05da4558
MT
420
421 addr = gfn_to_hva(kvm, gfn);
422 if (kvm_is_error_hva(addr))
4c2155ce 423 return ret;
05da4558 424
4c2155ce 425 down_read(&current->mm->mmap_sem);
05da4558
MT
426 vma = find_vma(current->mm, addr);
427 if (vma && is_vm_hugetlb_page(vma))
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MT
428 ret = 1;
429 up_read(&current->mm->mmap_sem);
05da4558 430
4c2155ce 431 return ret;
05da4558
MT
432}
433
434static int is_largepage_backed(struct kvm_vcpu *vcpu, gfn_t large_gfn)
435{
436 struct kvm_memory_slot *slot;
437
438 if (has_wrprotected_page(vcpu->kvm, large_gfn))
439 return 0;
440
441 if (!host_largepage_backed(vcpu->kvm, large_gfn))
442 return 0;
443
444 slot = gfn_to_memslot(vcpu->kvm, large_gfn);
445 if (slot && slot->dirty_bitmap)
446 return 0;
447
448 return 1;
449}
450
290fc38d
IE
451/*
452 * Take gfn and return the reverse mapping to it.
453 * Note: gfn must be unaliased before this function get called
454 */
455
05da4558 456static unsigned long *gfn_to_rmap(struct kvm *kvm, gfn_t gfn, int lpage)
290fc38d
IE
457{
458 struct kvm_memory_slot *slot;
05da4558 459 unsigned long idx;
290fc38d
IE
460
461 slot = gfn_to_memslot(kvm, gfn);
05da4558
MT
462 if (!lpage)
463 return &slot->rmap[gfn - slot->base_gfn];
464
465 idx = (gfn / KVM_PAGES_PER_HPAGE) -
466 (slot->base_gfn / KVM_PAGES_PER_HPAGE);
467
468 return &slot->lpage_info[idx].rmap_pde;
290fc38d
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469}
470
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471/*
472 * Reverse mapping data structures:
473 *
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474 * If rmapp bit zero is zero, then rmapp point to the shadw page table entry
475 * that points to page_address(page).
cd4a4e53 476 *
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477 * If rmapp bit zero is one, (then rmap & ~1) points to a struct kvm_rmap_desc
478 * containing more mappings.
cd4a4e53 479 */
05da4558 480static void rmap_add(struct kvm_vcpu *vcpu, u64 *spte, gfn_t gfn, int lpage)
cd4a4e53 481{
4db35314 482 struct kvm_mmu_page *sp;
cd4a4e53 483 struct kvm_rmap_desc *desc;
290fc38d 484 unsigned long *rmapp;
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485 int i;
486
487 if (!is_rmap_pte(*spte))
488 return;
290fc38d 489 gfn = unalias_gfn(vcpu->kvm, gfn);
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490 sp = page_header(__pa(spte));
491 sp->gfns[spte - sp->spt] = gfn;
05da4558 492 rmapp = gfn_to_rmap(vcpu->kvm, gfn, lpage);
290fc38d 493 if (!*rmapp) {
cd4a4e53 494 rmap_printk("rmap_add: %p %llx 0->1\n", spte, *spte);
290fc38d
IE
495 *rmapp = (unsigned long)spte;
496 } else if (!(*rmapp & 1)) {
cd4a4e53 497 rmap_printk("rmap_add: %p %llx 1->many\n", spte, *spte);
714b93da 498 desc = mmu_alloc_rmap_desc(vcpu);
290fc38d 499 desc->shadow_ptes[0] = (u64 *)*rmapp;
cd4a4e53 500 desc->shadow_ptes[1] = spte;
290fc38d 501 *rmapp = (unsigned long)desc | 1;
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502 } else {
503 rmap_printk("rmap_add: %p %llx many->many\n", spte, *spte);
290fc38d 504 desc = (struct kvm_rmap_desc *)(*rmapp & ~1ul);
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505 while (desc->shadow_ptes[RMAP_EXT-1] && desc->more)
506 desc = desc->more;
507 if (desc->shadow_ptes[RMAP_EXT-1]) {
714b93da 508 desc->more = mmu_alloc_rmap_desc(vcpu);
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509 desc = desc->more;
510 }
511 for (i = 0; desc->shadow_ptes[i]; ++i)
512 ;
513 desc->shadow_ptes[i] = spte;
514 }
515}
516
290fc38d 517static void rmap_desc_remove_entry(unsigned long *rmapp,
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518 struct kvm_rmap_desc *desc,
519 int i,
520 struct kvm_rmap_desc *prev_desc)
521{
522 int j;
523
524 for (j = RMAP_EXT - 1; !desc->shadow_ptes[j] && j > i; --j)
525 ;
526 desc->shadow_ptes[i] = desc->shadow_ptes[j];
11718b4d 527 desc->shadow_ptes[j] = NULL;
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528 if (j != 0)
529 return;
530 if (!prev_desc && !desc->more)
290fc38d 531 *rmapp = (unsigned long)desc->shadow_ptes[0];
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532 else
533 if (prev_desc)
534 prev_desc->more = desc->more;
535 else
290fc38d 536 *rmapp = (unsigned long)desc->more | 1;
90cb0529 537 mmu_free_rmap_desc(desc);
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538}
539
290fc38d 540static void rmap_remove(struct kvm *kvm, u64 *spte)
cd4a4e53 541{
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542 struct kvm_rmap_desc *desc;
543 struct kvm_rmap_desc *prev_desc;
4db35314 544 struct kvm_mmu_page *sp;
35149e21 545 pfn_t pfn;
290fc38d 546 unsigned long *rmapp;
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547 int i;
548
549 if (!is_rmap_pte(*spte))
550 return;
4db35314 551 sp = page_header(__pa(spte));
35149e21 552 pfn = spte_to_pfn(*spte);
7b52345e 553 if (*spte & shadow_accessed_mask)
35149e21 554 kvm_set_pfn_accessed(pfn);
b4231d61 555 if (is_writeble_pte(*spte))
35149e21 556 kvm_release_pfn_dirty(pfn);
b4231d61 557 else
35149e21 558 kvm_release_pfn_clean(pfn);
05da4558 559 rmapp = gfn_to_rmap(kvm, sp->gfns[spte - sp->spt], is_large_pte(*spte));
290fc38d 560 if (!*rmapp) {
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561 printk(KERN_ERR "rmap_remove: %p %llx 0->BUG\n", spte, *spte);
562 BUG();
290fc38d 563 } else if (!(*rmapp & 1)) {
cd4a4e53 564 rmap_printk("rmap_remove: %p %llx 1->0\n", spte, *spte);
290fc38d 565 if ((u64 *)*rmapp != spte) {
cd4a4e53
AK
566 printk(KERN_ERR "rmap_remove: %p %llx 1->BUG\n",
567 spte, *spte);
568 BUG();
569 }
290fc38d 570 *rmapp = 0;
cd4a4e53
AK
571 } else {
572 rmap_printk("rmap_remove: %p %llx many->many\n", spte, *spte);
290fc38d 573 desc = (struct kvm_rmap_desc *)(*rmapp & ~1ul);
cd4a4e53
AK
574 prev_desc = NULL;
575 while (desc) {
576 for (i = 0; i < RMAP_EXT && desc->shadow_ptes[i]; ++i)
577 if (desc->shadow_ptes[i] == spte) {
290fc38d 578 rmap_desc_remove_entry(rmapp,
714b93da 579 desc, i,
cd4a4e53
AK
580 prev_desc);
581 return;
582 }
583 prev_desc = desc;
584 desc = desc->more;
585 }
586 BUG();
587 }
588}
589
98348e95 590static u64 *rmap_next(struct kvm *kvm, unsigned long *rmapp, u64 *spte)
374cbac0 591{
374cbac0 592 struct kvm_rmap_desc *desc;
98348e95
IE
593 struct kvm_rmap_desc *prev_desc;
594 u64 *prev_spte;
595 int i;
596
597 if (!*rmapp)
598 return NULL;
599 else if (!(*rmapp & 1)) {
600 if (!spte)
601 return (u64 *)*rmapp;
602 return NULL;
603 }
604 desc = (struct kvm_rmap_desc *)(*rmapp & ~1ul);
605 prev_desc = NULL;
606 prev_spte = NULL;
607 while (desc) {
608 for (i = 0; i < RMAP_EXT && desc->shadow_ptes[i]; ++i) {
609 if (prev_spte == spte)
610 return desc->shadow_ptes[i];
611 prev_spte = desc->shadow_ptes[i];
612 }
613 desc = desc->more;
614 }
615 return NULL;
616}
617
618static void rmap_write_protect(struct kvm *kvm, u64 gfn)
619{
290fc38d 620 unsigned long *rmapp;
374cbac0 621 u64 *spte;
caa5b8a5 622 int write_protected = 0;
374cbac0 623
4a4c9924 624 gfn = unalias_gfn(kvm, gfn);
05da4558 625 rmapp = gfn_to_rmap(kvm, gfn, 0);
374cbac0 626
98348e95
IE
627 spte = rmap_next(kvm, rmapp, NULL);
628 while (spte) {
374cbac0 629 BUG_ON(!spte);
374cbac0 630 BUG_ON(!(*spte & PT_PRESENT_MASK));
374cbac0 631 rmap_printk("rmap_write_protect: spte %p %llx\n", spte, *spte);
caa5b8a5 632 if (is_writeble_pte(*spte)) {
9647c14c 633 set_shadow_pte(spte, *spte & ~PT_WRITABLE_MASK);
caa5b8a5
ED
634 write_protected = 1;
635 }
9647c14c 636 spte = rmap_next(kvm, rmapp, spte);
374cbac0 637 }
855149aa 638 if (write_protected) {
35149e21 639 pfn_t pfn;
855149aa
IE
640
641 spte = rmap_next(kvm, rmapp, NULL);
35149e21
AL
642 pfn = spte_to_pfn(*spte);
643 kvm_set_pfn_dirty(pfn);
855149aa
IE
644 }
645
05da4558
MT
646 /* check for huge page mappings */
647 rmapp = gfn_to_rmap(kvm, gfn, 1);
648 spte = rmap_next(kvm, rmapp, NULL);
649 while (spte) {
650 BUG_ON(!spte);
651 BUG_ON(!(*spte & PT_PRESENT_MASK));
652 BUG_ON((*spte & (PT_PAGE_SIZE_MASK|PT_PRESENT_MASK)) != (PT_PAGE_SIZE_MASK|PT_PRESENT_MASK));
653 pgprintk("rmap_write_protect(large): spte %p %llx %lld\n", spte, *spte, gfn);
654 if (is_writeble_pte(*spte)) {
655 rmap_remove(kvm, spte);
656 --kvm->stat.lpages;
657 set_shadow_pte(spte, shadow_trap_nonpresent_pte);
6597ca09 658 spte = NULL;
05da4558
MT
659 write_protected = 1;
660 }
661 spte = rmap_next(kvm, rmapp, spte);
662 }
663
caa5b8a5
ED
664 if (write_protected)
665 kvm_flush_remote_tlbs(kvm);
374cbac0
AK
666}
667
e930bffe
AA
668static int kvm_unmap_rmapp(struct kvm *kvm, unsigned long *rmapp)
669{
670 u64 *spte;
671 int need_tlb_flush = 0;
672
673 while ((spte = rmap_next(kvm, rmapp, NULL))) {
674 BUG_ON(!(*spte & PT_PRESENT_MASK));
675 rmap_printk("kvm_rmap_unmap_hva: spte %p %llx\n", spte, *spte);
676 rmap_remove(kvm, spte);
677 set_shadow_pte(spte, shadow_trap_nonpresent_pte);
678 need_tlb_flush = 1;
679 }
680 return need_tlb_flush;
681}
682
683static int kvm_handle_hva(struct kvm *kvm, unsigned long hva,
684 int (*handler)(struct kvm *kvm, unsigned long *rmapp))
685{
686 int i;
687 int retval = 0;
688
689 /*
690 * If mmap_sem isn't taken, we can look the memslots with only
691 * the mmu_lock by skipping over the slots with userspace_addr == 0.
692 */
693 for (i = 0; i < kvm->nmemslots; i++) {
694 struct kvm_memory_slot *memslot = &kvm->memslots[i];
695 unsigned long start = memslot->userspace_addr;
696 unsigned long end;
697
698 /* mmu_lock protects userspace_addr */
699 if (!start)
700 continue;
701
702 end = start + (memslot->npages << PAGE_SHIFT);
703 if (hva >= start && hva < end) {
704 gfn_t gfn_offset = (hva - start) >> PAGE_SHIFT;
705 retval |= handler(kvm, &memslot->rmap[gfn_offset]);
706 retval |= handler(kvm,
707 &memslot->lpage_info[
708 gfn_offset /
709 KVM_PAGES_PER_HPAGE].rmap_pde);
710 }
711 }
712
713 return retval;
714}
715
716int kvm_unmap_hva(struct kvm *kvm, unsigned long hva)
717{
718 return kvm_handle_hva(kvm, hva, kvm_unmap_rmapp);
719}
720
721static int kvm_age_rmapp(struct kvm *kvm, unsigned long *rmapp)
722{
723 u64 *spte;
724 int young = 0;
725
534e38b4
SY
726 /* always return old for EPT */
727 if (!shadow_accessed_mask)
728 return 0;
729
e930bffe
AA
730 spte = rmap_next(kvm, rmapp, NULL);
731 while (spte) {
732 int _young;
733 u64 _spte = *spte;
734 BUG_ON(!(_spte & PT_PRESENT_MASK));
735 _young = _spte & PT_ACCESSED_MASK;
736 if (_young) {
737 young = 1;
738 clear_bit(PT_ACCESSED_SHIFT, (unsigned long *)spte);
739 }
740 spte = rmap_next(kvm, rmapp, spte);
741 }
742 return young;
743}
744
745int kvm_age_hva(struct kvm *kvm, unsigned long hva)
746{
747 return kvm_handle_hva(kvm, hva, kvm_age_rmapp);
748}
749
d6c69ee9 750#ifdef MMU_DEBUG
47ad8e68 751static int is_empty_shadow_page(u64 *spt)
6aa8b732 752{
139bdb2d
AK
753 u64 *pos;
754 u64 *end;
755
47ad8e68 756 for (pos = spt, end = pos + PAGE_SIZE / sizeof(u64); pos != end; pos++)
3c915510 757 if (is_shadow_present_pte(*pos)) {
b8688d51 758 printk(KERN_ERR "%s: %p %llx\n", __func__,
139bdb2d 759 pos, *pos);
6aa8b732 760 return 0;
139bdb2d 761 }
6aa8b732
AK
762 return 1;
763}
d6c69ee9 764#endif
6aa8b732 765
4db35314 766static void kvm_mmu_free_page(struct kvm *kvm, struct kvm_mmu_page *sp)
260746c0 767{
4db35314
AK
768 ASSERT(is_empty_shadow_page(sp->spt));
769 list_del(&sp->link);
770 __free_page(virt_to_page(sp->spt));
771 __free_page(virt_to_page(sp->gfns));
772 kfree(sp);
f05e70ac 773 ++kvm->arch.n_free_mmu_pages;
260746c0
AK
774}
775
cea0f0e7
AK
776static unsigned kvm_page_table_hashfn(gfn_t gfn)
777{
1ae0a13d 778 return gfn & ((1 << KVM_MMU_HASH_SHIFT) - 1);
cea0f0e7
AK
779}
780
25c0de2c
AK
781static struct kvm_mmu_page *kvm_mmu_alloc_page(struct kvm_vcpu *vcpu,
782 u64 *parent_pte)
6aa8b732 783{
4db35314 784 struct kvm_mmu_page *sp;
6aa8b732 785
ad312c7c
ZX
786 sp = mmu_memory_cache_alloc(&vcpu->arch.mmu_page_header_cache, sizeof *sp);
787 sp->spt = mmu_memory_cache_alloc(&vcpu->arch.mmu_page_cache, PAGE_SIZE);
788 sp->gfns = mmu_memory_cache_alloc(&vcpu->arch.mmu_page_cache, PAGE_SIZE);
4db35314 789 set_page_private(virt_to_page(sp->spt), (unsigned long)sp);
f05e70ac 790 list_add(&sp->link, &vcpu->kvm->arch.active_mmu_pages);
4db35314
AK
791 ASSERT(is_empty_shadow_page(sp->spt));
792 sp->slot_bitmap = 0;
793 sp->multimapped = 0;
794 sp->parent_pte = parent_pte;
f05e70ac 795 --vcpu->kvm->arch.n_free_mmu_pages;
4db35314 796 return sp;
6aa8b732
AK
797}
798
714b93da 799static void mmu_page_add_parent_pte(struct kvm_vcpu *vcpu,
4db35314 800 struct kvm_mmu_page *sp, u64 *parent_pte)
cea0f0e7
AK
801{
802 struct kvm_pte_chain *pte_chain;
803 struct hlist_node *node;
804 int i;
805
806 if (!parent_pte)
807 return;
4db35314
AK
808 if (!sp->multimapped) {
809 u64 *old = sp->parent_pte;
cea0f0e7
AK
810
811 if (!old) {
4db35314 812 sp->parent_pte = parent_pte;
cea0f0e7
AK
813 return;
814 }
4db35314 815 sp->multimapped = 1;
714b93da 816 pte_chain = mmu_alloc_pte_chain(vcpu);
4db35314
AK
817 INIT_HLIST_HEAD(&sp->parent_ptes);
818 hlist_add_head(&pte_chain->link, &sp->parent_ptes);
cea0f0e7
AK
819 pte_chain->parent_ptes[0] = old;
820 }
4db35314 821 hlist_for_each_entry(pte_chain, node, &sp->parent_ptes, link) {
cea0f0e7
AK
822 if (pte_chain->parent_ptes[NR_PTE_CHAIN_ENTRIES-1])
823 continue;
824 for (i = 0; i < NR_PTE_CHAIN_ENTRIES; ++i)
825 if (!pte_chain->parent_ptes[i]) {
826 pte_chain->parent_ptes[i] = parent_pte;
827 return;
828 }
829 }
714b93da 830 pte_chain = mmu_alloc_pte_chain(vcpu);
cea0f0e7 831 BUG_ON(!pte_chain);
4db35314 832 hlist_add_head(&pte_chain->link, &sp->parent_ptes);
cea0f0e7
AK
833 pte_chain->parent_ptes[0] = parent_pte;
834}
835
4db35314 836static void mmu_page_remove_parent_pte(struct kvm_mmu_page *sp,
cea0f0e7
AK
837 u64 *parent_pte)
838{
839 struct kvm_pte_chain *pte_chain;
840 struct hlist_node *node;
841 int i;
842
4db35314
AK
843 if (!sp->multimapped) {
844 BUG_ON(sp->parent_pte != parent_pte);
845 sp->parent_pte = NULL;
cea0f0e7
AK
846 return;
847 }
4db35314 848 hlist_for_each_entry(pte_chain, node, &sp->parent_ptes, link)
cea0f0e7
AK
849 for (i = 0; i < NR_PTE_CHAIN_ENTRIES; ++i) {
850 if (!pte_chain->parent_ptes[i])
851 break;
852 if (pte_chain->parent_ptes[i] != parent_pte)
853 continue;
697fe2e2
AK
854 while (i + 1 < NR_PTE_CHAIN_ENTRIES
855 && pte_chain->parent_ptes[i + 1]) {
cea0f0e7
AK
856 pte_chain->parent_ptes[i]
857 = pte_chain->parent_ptes[i + 1];
858 ++i;
859 }
860 pte_chain->parent_ptes[i] = NULL;
697fe2e2
AK
861 if (i == 0) {
862 hlist_del(&pte_chain->link);
90cb0529 863 mmu_free_pte_chain(pte_chain);
4db35314
AK
864 if (hlist_empty(&sp->parent_ptes)) {
865 sp->multimapped = 0;
866 sp->parent_pte = NULL;
697fe2e2
AK
867 }
868 }
cea0f0e7
AK
869 return;
870 }
871 BUG();
872}
873
ad8cfbe3
MT
874
875static void mmu_parent_walk(struct kvm_vcpu *vcpu, struct kvm_mmu_page *sp,
876 mmu_parent_walk_fn fn)
877{
878 struct kvm_pte_chain *pte_chain;
879 struct hlist_node *node;
880 struct kvm_mmu_page *parent_sp;
881 int i;
882
883 if (!sp->multimapped && sp->parent_pte) {
884 parent_sp = page_header(__pa(sp->parent_pte));
885 fn(vcpu, parent_sp);
886 mmu_parent_walk(vcpu, parent_sp, fn);
887 return;
888 }
889 hlist_for_each_entry(pte_chain, node, &sp->parent_ptes, link)
890 for (i = 0; i < NR_PTE_CHAIN_ENTRIES; ++i) {
891 if (!pte_chain->parent_ptes[i])
892 break;
893 parent_sp = page_header(__pa(pte_chain->parent_ptes[i]));
894 fn(vcpu, parent_sp);
895 mmu_parent_walk(vcpu, parent_sp, fn);
896 }
897}
898
0074ff63
MT
899static void kvm_mmu_update_unsync_bitmap(u64 *spte)
900{
901 unsigned int index;
902 struct kvm_mmu_page *sp = page_header(__pa(spte));
903
904 index = spte - sp->spt;
905 __set_bit(index, sp->unsync_child_bitmap);
906 sp->unsync_children = 1;
907}
908
909static void kvm_mmu_update_parents_unsync(struct kvm_mmu_page *sp)
910{
911 struct kvm_pte_chain *pte_chain;
912 struct hlist_node *node;
913 int i;
914
915 if (!sp->parent_pte)
916 return;
917
918 if (!sp->multimapped) {
919 kvm_mmu_update_unsync_bitmap(sp->parent_pte);
920 return;
921 }
922
923 hlist_for_each_entry(pte_chain, node, &sp->parent_ptes, link)
924 for (i = 0; i < NR_PTE_CHAIN_ENTRIES; ++i) {
925 if (!pte_chain->parent_ptes[i])
926 break;
927 kvm_mmu_update_unsync_bitmap(pte_chain->parent_ptes[i]);
928 }
929}
930
931static int unsync_walk_fn(struct kvm_vcpu *vcpu, struct kvm_mmu_page *sp)
932{
933 sp->unsync_children = 1;
934 kvm_mmu_update_parents_unsync(sp);
935 return 1;
936}
937
938static void kvm_mmu_mark_parents_unsync(struct kvm_vcpu *vcpu,
939 struct kvm_mmu_page *sp)
940{
941 mmu_parent_walk(vcpu, sp, unsync_walk_fn);
942 kvm_mmu_update_parents_unsync(sp);
943}
944
d761a501
AK
945static void nonpaging_prefetch_page(struct kvm_vcpu *vcpu,
946 struct kvm_mmu_page *sp)
947{
948 int i;
949
950 for (i = 0; i < PT64_ENT_PER_PAGE; ++i)
951 sp->spt[i] = shadow_trap_nonpresent_pte;
952}
953
e8bc217a
MT
954static int nonpaging_sync_page(struct kvm_vcpu *vcpu,
955 struct kvm_mmu_page *sp)
956{
957 return 1;
958}
959
a7052897
MT
960static void nonpaging_invlpg(struct kvm_vcpu *vcpu, gva_t gva)
961{
962}
963
0074ff63
MT
964#define for_each_unsync_children(bitmap, idx) \
965 for (idx = find_first_bit(bitmap, 512); \
966 idx < 512; \
967 idx = find_next_bit(bitmap, 512, idx+1))
968
4731d4c7
MT
969static int mmu_unsync_walk(struct kvm_mmu_page *sp,
970 struct kvm_unsync_walk *walker)
971{
972 int i, ret;
973
974 if (!sp->unsync_children)
975 return 0;
976
0074ff63 977 for_each_unsync_children(sp->unsync_child_bitmap, i) {
4731d4c7
MT
978 u64 ent = sp->spt[i];
979
980 if (is_shadow_present_pte(ent)) {
981 struct kvm_mmu_page *child;
982 child = page_header(ent & PT64_BASE_ADDR_MASK);
983
984 if (child->unsync_children) {
985 ret = mmu_unsync_walk(child, walker);
986 if (ret)
987 return ret;
0074ff63 988 __clear_bit(i, sp->unsync_child_bitmap);
4731d4c7
MT
989 }
990
991 if (child->unsync) {
992 ret = walker->entry(child, walker);
0074ff63 993 __clear_bit(i, sp->unsync_child_bitmap);
4731d4c7
MT
994 if (ret)
995 return ret;
996 }
997 }
998 }
999
0074ff63 1000 if (find_first_bit(sp->unsync_child_bitmap, 512) == 512)
4731d4c7
MT
1001 sp->unsync_children = 0;
1002
1003 return 0;
1004}
1005
4db35314 1006static struct kvm_mmu_page *kvm_mmu_lookup_page(struct kvm *kvm, gfn_t gfn)
cea0f0e7
AK
1007{
1008 unsigned index;
1009 struct hlist_head *bucket;
4db35314 1010 struct kvm_mmu_page *sp;
cea0f0e7
AK
1011 struct hlist_node *node;
1012
b8688d51 1013 pgprintk("%s: looking for gfn %lx\n", __func__, gfn);
1ae0a13d 1014 index = kvm_page_table_hashfn(gfn);
f05e70ac 1015 bucket = &kvm->arch.mmu_page_hash[index];
4db35314 1016 hlist_for_each_entry(sp, node, bucket, hash_link)
2e53d63a
MT
1017 if (sp->gfn == gfn && !sp->role.metaphysical
1018 && !sp->role.invalid) {
cea0f0e7 1019 pgprintk("%s: found role %x\n",
b8688d51 1020 __func__, sp->role.word);
4db35314 1021 return sp;
cea0f0e7
AK
1022 }
1023 return NULL;
1024}
1025
4731d4c7
MT
1026static void kvm_unlink_unsync_page(struct kvm *kvm, struct kvm_mmu_page *sp)
1027{
1028 WARN_ON(!sp->unsync);
1029 sp->unsync = 0;
1030 --kvm->stat.mmu_unsync;
1031}
1032
1033static int kvm_mmu_zap_page(struct kvm *kvm, struct kvm_mmu_page *sp);
1034
1035static int kvm_sync_page(struct kvm_vcpu *vcpu, struct kvm_mmu_page *sp)
1036{
1037 if (sp->role.glevels != vcpu->arch.mmu.root_level) {
1038 kvm_mmu_zap_page(vcpu->kvm, sp);
1039 return 1;
1040 }
1041
1042 rmap_write_protect(vcpu->kvm, sp->gfn);
0c0f40bd 1043 kvm_unlink_unsync_page(vcpu->kvm, sp);
4731d4c7
MT
1044 if (vcpu->arch.mmu.sync_page(vcpu, sp)) {
1045 kvm_mmu_zap_page(vcpu->kvm, sp);
1046 return 1;
1047 }
1048
1049 kvm_mmu_flush_tlb(vcpu);
4731d4c7
MT
1050 return 0;
1051}
1052
1053struct sync_walker {
1054 struct kvm_vcpu *vcpu;
1055 struct kvm_unsync_walk walker;
1056};
1057
1058static int mmu_sync_fn(struct kvm_mmu_page *sp, struct kvm_unsync_walk *walk)
1059{
1060 struct sync_walker *sync_walk = container_of(walk, struct sync_walker,
1061 walker);
1062 struct kvm_vcpu *vcpu = sync_walk->vcpu;
1063
1064 kvm_sync_page(vcpu, sp);
1065 return (need_resched() || spin_needbreak(&vcpu->kvm->mmu_lock));
1066}
1067
1068static void mmu_sync_children(struct kvm_vcpu *vcpu, struct kvm_mmu_page *sp)
1069{
1070 struct sync_walker walker = {
1071 .walker = { .entry = mmu_sync_fn, },
1072 .vcpu = vcpu,
1073 };
1074
1075 while (mmu_unsync_walk(sp, &walker.walker))
1076 cond_resched_lock(&vcpu->kvm->mmu_lock);
1077}
1078
cea0f0e7
AK
1079static struct kvm_mmu_page *kvm_mmu_get_page(struct kvm_vcpu *vcpu,
1080 gfn_t gfn,
1081 gva_t gaddr,
1082 unsigned level,
1083 int metaphysical,
41074d07 1084 unsigned access,
f7d9c7b7 1085 u64 *parent_pte)
cea0f0e7
AK
1086{
1087 union kvm_mmu_page_role role;
1088 unsigned index;
1089 unsigned quadrant;
1090 struct hlist_head *bucket;
4db35314 1091 struct kvm_mmu_page *sp;
4731d4c7 1092 struct hlist_node *node, *tmp;
cea0f0e7
AK
1093
1094 role.word = 0;
ad312c7c 1095 role.glevels = vcpu->arch.mmu.root_level;
cea0f0e7
AK
1096 role.level = level;
1097 role.metaphysical = metaphysical;
41074d07 1098 role.access = access;
ad312c7c 1099 if (vcpu->arch.mmu.root_level <= PT32_ROOT_LEVEL) {
cea0f0e7
AK
1100 quadrant = gaddr >> (PAGE_SHIFT + (PT64_PT_BITS * level));
1101 quadrant &= (1 << ((PT32_PT_BITS - PT64_PT_BITS) * level)) - 1;
1102 role.quadrant = quadrant;
1103 }
b8688d51 1104 pgprintk("%s: looking gfn %lx role %x\n", __func__,
cea0f0e7 1105 gfn, role.word);
1ae0a13d 1106 index = kvm_page_table_hashfn(gfn);
f05e70ac 1107 bucket = &vcpu->kvm->arch.mmu_page_hash[index];
4731d4c7
MT
1108 hlist_for_each_entry_safe(sp, node, tmp, bucket, hash_link)
1109 if (sp->gfn == gfn) {
1110 if (sp->unsync)
1111 if (kvm_sync_page(vcpu, sp))
1112 continue;
1113
1114 if (sp->role.word != role.word)
1115 continue;
1116
4db35314 1117 mmu_page_add_parent_pte(vcpu, sp, parent_pte);
0074ff63
MT
1118 if (sp->unsync_children) {
1119 set_bit(KVM_REQ_MMU_SYNC, &vcpu->requests);
1120 kvm_mmu_mark_parents_unsync(vcpu, sp);
1121 }
b8688d51 1122 pgprintk("%s: found\n", __func__);
4db35314 1123 return sp;
cea0f0e7 1124 }
dfc5aa00 1125 ++vcpu->kvm->stat.mmu_cache_miss;
4db35314
AK
1126 sp = kvm_mmu_alloc_page(vcpu, parent_pte);
1127 if (!sp)
1128 return sp;
b8688d51 1129 pgprintk("%s: adding gfn %lx role %x\n", __func__, gfn, role.word);
4db35314
AK
1130 sp->gfn = gfn;
1131 sp->role = role;
1132 hlist_add_head(&sp->hash_link, bucket);
4731d4c7 1133 if (!metaphysical) {
4a4c9924 1134 rmap_write_protect(vcpu->kvm, gfn);
4731d4c7
MT
1135 account_shadowed(vcpu->kvm, gfn);
1136 }
131d8279
AK
1137 if (shadow_trap_nonpresent_pte != shadow_notrap_nonpresent_pte)
1138 vcpu->arch.mmu.prefetch_page(vcpu, sp);
1139 else
1140 nonpaging_prefetch_page(vcpu, sp);
4db35314 1141 return sp;
cea0f0e7
AK
1142}
1143
3d000db5 1144static int walk_shadow(struct kvm_shadow_walk *walker,
d40a1ee4 1145 struct kvm_vcpu *vcpu, u64 addr)
3d000db5
AK
1146{
1147 hpa_t shadow_addr;
1148 int level;
1149 int r;
1150 u64 *sptep;
1151 unsigned index;
1152
1153 shadow_addr = vcpu->arch.mmu.root_hpa;
1154 level = vcpu->arch.mmu.shadow_root_level;
1155 if (level == PT32E_ROOT_LEVEL) {
1156 shadow_addr = vcpu->arch.mmu.pae_root[(addr >> 30) & 3];
1157 shadow_addr &= PT64_BASE_ADDR_MASK;
1158 --level;
1159 }
1160
1161 while (level >= PT_PAGE_TABLE_LEVEL) {
1162 index = SHADOW_PT_INDEX(addr, level);
1163 sptep = ((u64 *)__va(shadow_addr)) + index;
1164 r = walker->entry(walker, vcpu, addr, sptep, level);
1165 if (r)
1166 return r;
1167 shadow_addr = *sptep & PT64_BASE_ADDR_MASK;
1168 --level;
1169 }
1170 return 0;
1171}
1172
90cb0529 1173static void kvm_mmu_page_unlink_children(struct kvm *kvm,
4db35314 1174 struct kvm_mmu_page *sp)
a436036b 1175{
697fe2e2
AK
1176 unsigned i;
1177 u64 *pt;
1178 u64 ent;
1179
4db35314 1180 pt = sp->spt;
697fe2e2 1181
4db35314 1182 if (sp->role.level == PT_PAGE_TABLE_LEVEL) {
697fe2e2 1183 for (i = 0; i < PT64_ENT_PER_PAGE; ++i) {
c7addb90 1184 if (is_shadow_present_pte(pt[i]))
290fc38d 1185 rmap_remove(kvm, &pt[i]);
c7addb90 1186 pt[i] = shadow_trap_nonpresent_pte;
697fe2e2
AK
1187 }
1188 return;
1189 }
1190
1191 for (i = 0; i < PT64_ENT_PER_PAGE; ++i) {
1192 ent = pt[i];
1193
05da4558
MT
1194 if (is_shadow_present_pte(ent)) {
1195 if (!is_large_pte(ent)) {
1196 ent &= PT64_BASE_ADDR_MASK;
1197 mmu_page_remove_parent_pte(page_header(ent),
1198 &pt[i]);
1199 } else {
1200 --kvm->stat.lpages;
1201 rmap_remove(kvm, &pt[i]);
1202 }
1203 }
c7addb90 1204 pt[i] = shadow_trap_nonpresent_pte;
697fe2e2 1205 }
a436036b
AK
1206}
1207
4db35314 1208static void kvm_mmu_put_page(struct kvm_mmu_page *sp, u64 *parent_pte)
cea0f0e7 1209{
4db35314 1210 mmu_page_remove_parent_pte(sp, parent_pte);
a436036b
AK
1211}
1212
12b7d28f
AK
1213static void kvm_mmu_reset_last_pte_updated(struct kvm *kvm)
1214{
1215 int i;
1216
1217 for (i = 0; i < KVM_MAX_VCPUS; ++i)
1218 if (kvm->vcpus[i])
ad312c7c 1219 kvm->vcpus[i]->arch.last_pte_updated = NULL;
12b7d28f
AK
1220}
1221
31aa2b44 1222static void kvm_mmu_unlink_parents(struct kvm *kvm, struct kvm_mmu_page *sp)
a436036b
AK
1223{
1224 u64 *parent_pte;
1225
4db35314
AK
1226 while (sp->multimapped || sp->parent_pte) {
1227 if (!sp->multimapped)
1228 parent_pte = sp->parent_pte;
a436036b
AK
1229 else {
1230 struct kvm_pte_chain *chain;
1231
4db35314 1232 chain = container_of(sp->parent_ptes.first,
a436036b
AK
1233 struct kvm_pte_chain, link);
1234 parent_pte = chain->parent_ptes[0];
1235 }
697fe2e2 1236 BUG_ON(!parent_pte);
4db35314 1237 kvm_mmu_put_page(sp, parent_pte);
c7addb90 1238 set_shadow_pte(parent_pte, shadow_trap_nonpresent_pte);
a436036b 1239 }
31aa2b44
AK
1240}
1241
4731d4c7
MT
1242struct zap_walker {
1243 struct kvm_unsync_walk walker;
1244 struct kvm *kvm;
1245 int zapped;
1246};
1247
1248static int mmu_zap_fn(struct kvm_mmu_page *sp, struct kvm_unsync_walk *walk)
1249{
1250 struct zap_walker *zap_walk = container_of(walk, struct zap_walker,
1251 walker);
1252 kvm_mmu_zap_page(zap_walk->kvm, sp);
1253 zap_walk->zapped = 1;
1254 return 0;
1255}
1256
1257static int mmu_zap_unsync_children(struct kvm *kvm, struct kvm_mmu_page *sp)
1258{
1259 struct zap_walker walker = {
1260 .walker = { .entry = mmu_zap_fn, },
1261 .kvm = kvm,
1262 .zapped = 0,
1263 };
1264
1265 if (sp->role.level == PT_PAGE_TABLE_LEVEL)
1266 return 0;
1267 mmu_unsync_walk(sp, &walker.walker);
1268 return walker.zapped;
1269}
1270
07385413 1271static int kvm_mmu_zap_page(struct kvm *kvm, struct kvm_mmu_page *sp)
31aa2b44 1272{
4731d4c7 1273 int ret;
31aa2b44 1274 ++kvm->stat.mmu_shadow_zapped;
4731d4c7 1275 ret = mmu_zap_unsync_children(kvm, sp);
4db35314 1276 kvm_mmu_page_unlink_children(kvm, sp);
31aa2b44 1277 kvm_mmu_unlink_parents(kvm, sp);
5b5c6a5a
AK
1278 kvm_flush_remote_tlbs(kvm);
1279 if (!sp->role.invalid && !sp->role.metaphysical)
1280 unaccount_shadowed(kvm, sp->gfn);
4731d4c7
MT
1281 if (sp->unsync)
1282 kvm_unlink_unsync_page(kvm, sp);
4db35314
AK
1283 if (!sp->root_count) {
1284 hlist_del(&sp->hash_link);
1285 kvm_mmu_free_page(kvm, sp);
2e53d63a 1286 } else {
2e53d63a 1287 sp->role.invalid = 1;
5b5c6a5a 1288 list_move(&sp->link, &kvm->arch.active_mmu_pages);
2e53d63a
MT
1289 kvm_reload_remote_mmus(kvm);
1290 }
12b7d28f 1291 kvm_mmu_reset_last_pte_updated(kvm);
4731d4c7 1292 return ret;
a436036b
AK
1293}
1294
82ce2c96
IE
1295/*
1296 * Changing the number of mmu pages allocated to the vm
1297 * Note: if kvm_nr_mmu_pages is too small, you will get dead lock
1298 */
1299void kvm_mmu_change_mmu_pages(struct kvm *kvm, unsigned int kvm_nr_mmu_pages)
1300{
1301 /*
1302 * If we set the number of mmu pages to be smaller be than the
1303 * number of actived pages , we must to free some mmu pages before we
1304 * change the value
1305 */
1306
f05e70ac 1307 if ((kvm->arch.n_alloc_mmu_pages - kvm->arch.n_free_mmu_pages) >
82ce2c96 1308 kvm_nr_mmu_pages) {
f05e70ac
ZX
1309 int n_used_mmu_pages = kvm->arch.n_alloc_mmu_pages
1310 - kvm->arch.n_free_mmu_pages;
82ce2c96
IE
1311
1312 while (n_used_mmu_pages > kvm_nr_mmu_pages) {
1313 struct kvm_mmu_page *page;
1314
f05e70ac 1315 page = container_of(kvm->arch.active_mmu_pages.prev,
82ce2c96
IE
1316 struct kvm_mmu_page, link);
1317 kvm_mmu_zap_page(kvm, page);
1318 n_used_mmu_pages--;
1319 }
f05e70ac 1320 kvm->arch.n_free_mmu_pages = 0;
82ce2c96
IE
1321 }
1322 else
f05e70ac
ZX
1323 kvm->arch.n_free_mmu_pages += kvm_nr_mmu_pages
1324 - kvm->arch.n_alloc_mmu_pages;
82ce2c96 1325
f05e70ac 1326 kvm->arch.n_alloc_mmu_pages = kvm_nr_mmu_pages;
82ce2c96
IE
1327}
1328
f67a46f4 1329static int kvm_mmu_unprotect_page(struct kvm *kvm, gfn_t gfn)
a436036b
AK
1330{
1331 unsigned index;
1332 struct hlist_head *bucket;
4db35314 1333 struct kvm_mmu_page *sp;
a436036b
AK
1334 struct hlist_node *node, *n;
1335 int r;
1336
b8688d51 1337 pgprintk("%s: looking for gfn %lx\n", __func__, gfn);
a436036b 1338 r = 0;
1ae0a13d 1339 index = kvm_page_table_hashfn(gfn);
f05e70ac 1340 bucket = &kvm->arch.mmu_page_hash[index];
4db35314
AK
1341 hlist_for_each_entry_safe(sp, node, n, bucket, hash_link)
1342 if (sp->gfn == gfn && !sp->role.metaphysical) {
b8688d51 1343 pgprintk("%s: gfn %lx role %x\n", __func__, gfn,
4db35314 1344 sp->role.word);
a436036b 1345 r = 1;
07385413
MT
1346 if (kvm_mmu_zap_page(kvm, sp))
1347 n = bucket->first;
a436036b
AK
1348 }
1349 return r;
cea0f0e7
AK
1350}
1351
f67a46f4 1352static void mmu_unshadow(struct kvm *kvm, gfn_t gfn)
97a0a01e 1353{
4db35314 1354 struct kvm_mmu_page *sp;
97a0a01e 1355
4db35314 1356 while ((sp = kvm_mmu_lookup_page(kvm, gfn)) != NULL) {
b8688d51 1357 pgprintk("%s: zap %lx %x\n", __func__, gfn, sp->role.word);
4db35314 1358 kvm_mmu_zap_page(kvm, sp);
97a0a01e
AK
1359 }
1360}
1361
38c335f1 1362static void page_header_update_slot(struct kvm *kvm, void *pte, gfn_t gfn)
6aa8b732 1363{
38c335f1 1364 int slot = memslot_id(kvm, gfn_to_memslot(kvm, gfn));
4db35314 1365 struct kvm_mmu_page *sp = page_header(__pa(pte));
6aa8b732 1366
4db35314 1367 __set_bit(slot, &sp->slot_bitmap);
6aa8b732
AK
1368}
1369
6844dec6
MT
1370static void mmu_convert_notrap(struct kvm_mmu_page *sp)
1371{
1372 int i;
1373 u64 *pt = sp->spt;
1374
1375 if (shadow_trap_nonpresent_pte == shadow_notrap_nonpresent_pte)
1376 return;
1377
1378 for (i = 0; i < PT64_ENT_PER_PAGE; ++i) {
1379 if (pt[i] == shadow_notrap_nonpresent_pte)
1380 set_shadow_pte(&pt[i], shadow_trap_nonpresent_pte);
1381 }
1382}
1383
039576c0
AK
1384struct page *gva_to_page(struct kvm_vcpu *vcpu, gva_t gva)
1385{
72dc67a6
IE
1386 struct page *page;
1387
ad312c7c 1388 gpa_t gpa = vcpu->arch.mmu.gva_to_gpa(vcpu, gva);
039576c0
AK
1389
1390 if (gpa == UNMAPPED_GVA)
1391 return NULL;
72dc67a6 1392
72dc67a6 1393 page = gfn_to_page(vcpu->kvm, gpa >> PAGE_SHIFT);
72dc67a6
IE
1394
1395 return page;
039576c0
AK
1396}
1397
74be52e3
SY
1398/*
1399 * The function is based on mtrr_type_lookup() in
1400 * arch/x86/kernel/cpu/mtrr/generic.c
1401 */
1402static int get_mtrr_type(struct mtrr_state_type *mtrr_state,
1403 u64 start, u64 end)
1404{
1405 int i;
1406 u64 base, mask;
1407 u8 prev_match, curr_match;
1408 int num_var_ranges = KVM_NR_VAR_MTRR;
1409
1410 if (!mtrr_state->enabled)
1411 return 0xFF;
1412
1413 /* Make end inclusive end, instead of exclusive */
1414 end--;
1415
1416 /* Look in fixed ranges. Just return the type as per start */
1417 if (mtrr_state->have_fixed && (start < 0x100000)) {
1418 int idx;
1419
1420 if (start < 0x80000) {
1421 idx = 0;
1422 idx += (start >> 16);
1423 return mtrr_state->fixed_ranges[idx];
1424 } else if (start < 0xC0000) {
1425 idx = 1 * 8;
1426 idx += ((start - 0x80000) >> 14);
1427 return mtrr_state->fixed_ranges[idx];
1428 } else if (start < 0x1000000) {
1429 idx = 3 * 8;
1430 idx += ((start - 0xC0000) >> 12);
1431 return mtrr_state->fixed_ranges[idx];
1432 }
1433 }
1434
1435 /*
1436 * Look in variable ranges
1437 * Look of multiple ranges matching this address and pick type
1438 * as per MTRR precedence
1439 */
1440 if (!(mtrr_state->enabled & 2))
1441 return mtrr_state->def_type;
1442
1443 prev_match = 0xFF;
1444 for (i = 0; i < num_var_ranges; ++i) {
1445 unsigned short start_state, end_state;
1446
1447 if (!(mtrr_state->var_ranges[i].mask_lo & (1 << 11)))
1448 continue;
1449
1450 base = (((u64)mtrr_state->var_ranges[i].base_hi) << 32) +
1451 (mtrr_state->var_ranges[i].base_lo & PAGE_MASK);
1452 mask = (((u64)mtrr_state->var_ranges[i].mask_hi) << 32) +
1453 (mtrr_state->var_ranges[i].mask_lo & PAGE_MASK);
1454
1455 start_state = ((start & mask) == (base & mask));
1456 end_state = ((end & mask) == (base & mask));
1457 if (start_state != end_state)
1458 return 0xFE;
1459
1460 if ((start & mask) != (base & mask))
1461 continue;
1462
1463 curr_match = mtrr_state->var_ranges[i].base_lo & 0xff;
1464 if (prev_match == 0xFF) {
1465 prev_match = curr_match;
1466 continue;
1467 }
1468
1469 if (prev_match == MTRR_TYPE_UNCACHABLE ||
1470 curr_match == MTRR_TYPE_UNCACHABLE)
1471 return MTRR_TYPE_UNCACHABLE;
1472
1473 if ((prev_match == MTRR_TYPE_WRBACK &&
1474 curr_match == MTRR_TYPE_WRTHROUGH) ||
1475 (prev_match == MTRR_TYPE_WRTHROUGH &&
1476 curr_match == MTRR_TYPE_WRBACK)) {
1477 prev_match = MTRR_TYPE_WRTHROUGH;
1478 curr_match = MTRR_TYPE_WRTHROUGH;
1479 }
1480
1481 if (prev_match != curr_match)
1482 return MTRR_TYPE_UNCACHABLE;
1483 }
1484
1485 if (prev_match != 0xFF)
1486 return prev_match;
1487
1488 return mtrr_state->def_type;
1489}
1490
1491static u8 get_memory_type(struct kvm_vcpu *vcpu, gfn_t gfn)
1492{
1493 u8 mtrr;
1494
1495 mtrr = get_mtrr_type(&vcpu->arch.mtrr_state, gfn << PAGE_SHIFT,
1496 (gfn << PAGE_SHIFT) + PAGE_SIZE);
1497 if (mtrr == 0xfe || mtrr == 0xff)
1498 mtrr = MTRR_TYPE_WRBACK;
1499 return mtrr;
1500}
1501
4731d4c7
MT
1502static int kvm_unsync_page(struct kvm_vcpu *vcpu, struct kvm_mmu_page *sp)
1503{
1504 unsigned index;
1505 struct hlist_head *bucket;
1506 struct kvm_mmu_page *s;
1507 struct hlist_node *node, *n;
1508
1509 index = kvm_page_table_hashfn(sp->gfn);
1510 bucket = &vcpu->kvm->arch.mmu_page_hash[index];
1511 /* don't unsync if pagetable is shadowed with multiple roles */
1512 hlist_for_each_entry_safe(s, node, n, bucket, hash_link) {
1513 if (s->gfn != sp->gfn || s->role.metaphysical)
1514 continue;
1515 if (s->role.word != sp->role.word)
1516 return 1;
1517 }
0074ff63 1518 kvm_mmu_mark_parents_unsync(vcpu, sp);
4731d4c7
MT
1519 ++vcpu->kvm->stat.mmu_unsync;
1520 sp->unsync = 1;
1521 mmu_convert_notrap(sp);
1522 return 0;
1523}
1524
1525static int mmu_need_write_protect(struct kvm_vcpu *vcpu, gfn_t gfn,
1526 bool can_unsync)
1527{
1528 struct kvm_mmu_page *shadow;
1529
1530 shadow = kvm_mmu_lookup_page(vcpu->kvm, gfn);
1531 if (shadow) {
1532 if (shadow->role.level != PT_PAGE_TABLE_LEVEL)
1533 return 1;
1534 if (shadow->unsync)
1535 return 0;
582801a9 1536 if (can_unsync && oos_shadow)
4731d4c7
MT
1537 return kvm_unsync_page(vcpu, shadow);
1538 return 1;
1539 }
1540 return 0;
1541}
1542
1e73f9dd
MT
1543static int set_spte(struct kvm_vcpu *vcpu, u64 *shadow_pte,
1544 unsigned pte_access, int user_fault,
1545 int write_fault, int dirty, int largepage,
4731d4c7
MT
1546 gfn_t gfn, pfn_t pfn, bool speculative,
1547 bool can_unsync)
1c4f1fd6
AK
1548{
1549 u64 spte;
1e73f9dd 1550 int ret = 0;
64d4d521
SY
1551 u64 mt_mask = shadow_mt_mask;
1552
1c4f1fd6
AK
1553 /*
1554 * We don't set the accessed bit, since we sometimes want to see
1555 * whether the guest actually used the pte (in order to detect
1556 * demand paging).
1557 */
7b52345e 1558 spte = shadow_base_present_pte | shadow_dirty_mask;
947da538 1559 if (!speculative)
3201b5d9 1560 spte |= shadow_accessed_mask;
1c4f1fd6
AK
1561 if (!dirty)
1562 pte_access &= ~ACC_WRITE_MASK;
7b52345e
SY
1563 if (pte_access & ACC_EXEC_MASK)
1564 spte |= shadow_x_mask;
1565 else
1566 spte |= shadow_nx_mask;
1c4f1fd6 1567 if (pte_access & ACC_USER_MASK)
7b52345e 1568 spte |= shadow_user_mask;
05da4558
MT
1569 if (largepage)
1570 spte |= PT_PAGE_SIZE_MASK;
64d4d521
SY
1571 if (mt_mask) {
1572 mt_mask = get_memory_type(vcpu, gfn) <<
1573 kvm_x86_ops->get_mt_mask_shift();
1574 spte |= mt_mask;
1575 }
1c4f1fd6 1576
35149e21 1577 spte |= (u64)pfn << PAGE_SHIFT;
1c4f1fd6
AK
1578
1579 if ((pte_access & ACC_WRITE_MASK)
1580 || (write_fault && !is_write_protection(vcpu) && !user_fault)) {
1c4f1fd6 1581
38187c83
MT
1582 if (largepage && has_wrprotected_page(vcpu->kvm, gfn)) {
1583 ret = 1;
1584 spte = shadow_trap_nonpresent_pte;
1585 goto set_pte;
1586 }
1587
1c4f1fd6 1588 spte |= PT_WRITABLE_MASK;
1c4f1fd6 1589
4731d4c7 1590 if (mmu_need_write_protect(vcpu, gfn, can_unsync)) {
1c4f1fd6 1591 pgprintk("%s: found shadow page for %lx, marking ro\n",
b8688d51 1592 __func__, gfn);
1e73f9dd 1593 ret = 1;
1c4f1fd6 1594 pte_access &= ~ACC_WRITE_MASK;
a378b4e6 1595 if (is_writeble_pte(spte))
1c4f1fd6 1596 spte &= ~PT_WRITABLE_MASK;
1c4f1fd6
AK
1597 }
1598 }
1599
1c4f1fd6
AK
1600 if (pte_access & ACC_WRITE_MASK)
1601 mark_page_dirty(vcpu->kvm, gfn);
1602
38187c83 1603set_pte:
1c4f1fd6 1604 set_shadow_pte(shadow_pte, spte);
1e73f9dd
MT
1605 return ret;
1606}
1607
1e73f9dd
MT
1608static void mmu_set_spte(struct kvm_vcpu *vcpu, u64 *shadow_pte,
1609 unsigned pt_access, unsigned pte_access,
1610 int user_fault, int write_fault, int dirty,
1611 int *ptwrite, int largepage, gfn_t gfn,
1612 pfn_t pfn, bool speculative)
1613{
1614 int was_rmapped = 0;
1615 int was_writeble = is_writeble_pte(*shadow_pte);
1616
1617 pgprintk("%s: spte %llx access %x write_fault %d"
1618 " user_fault %d gfn %lx\n",
1619 __func__, *shadow_pte, pt_access,
1620 write_fault, user_fault, gfn);
1621
1622 if (is_rmap_pte(*shadow_pte)) {
1623 /*
1624 * If we overwrite a PTE page pointer with a 2MB PMD, unlink
1625 * the parent of the now unreachable PTE.
1626 */
1627 if (largepage && !is_large_pte(*shadow_pte)) {
1628 struct kvm_mmu_page *child;
1629 u64 pte = *shadow_pte;
1630
1631 child = page_header(pte & PT64_BASE_ADDR_MASK);
1632 mmu_page_remove_parent_pte(child, shadow_pte);
1633 } else if (pfn != spte_to_pfn(*shadow_pte)) {
1634 pgprintk("hfn old %lx new %lx\n",
1635 spte_to_pfn(*shadow_pte), pfn);
1636 rmap_remove(vcpu->kvm, shadow_pte);
1637 } else {
1638 if (largepage)
1639 was_rmapped = is_large_pte(*shadow_pte);
1640 else
1641 was_rmapped = 1;
1642 }
1643 }
1644 if (set_spte(vcpu, shadow_pte, pte_access, user_fault, write_fault,
4731d4c7 1645 dirty, largepage, gfn, pfn, speculative, true)) {
1e73f9dd
MT
1646 if (write_fault)
1647 *ptwrite = 1;
a378b4e6
MT
1648 kvm_x86_ops->tlb_flush(vcpu);
1649 }
1e73f9dd
MT
1650
1651 pgprintk("%s: setting spte %llx\n", __func__, *shadow_pte);
1652 pgprintk("instantiating %s PTE (%s) at %ld (%llx) addr %p\n",
1653 is_large_pte(*shadow_pte)? "2MB" : "4kB",
1654 is_present_pte(*shadow_pte)?"RW":"R", gfn,
1655 *shadow_pte, shadow_pte);
1656 if (!was_rmapped && is_large_pte(*shadow_pte))
05da4558
MT
1657 ++vcpu->kvm->stat.lpages;
1658
1c4f1fd6
AK
1659 page_header_update_slot(vcpu->kvm, shadow_pte, gfn);
1660 if (!was_rmapped) {
05da4558 1661 rmap_add(vcpu, shadow_pte, gfn, largepage);
1c4f1fd6 1662 if (!is_rmap_pte(*shadow_pte))
35149e21 1663 kvm_release_pfn_clean(pfn);
75e68e60
IE
1664 } else {
1665 if (was_writeble)
35149e21 1666 kvm_release_pfn_dirty(pfn);
75e68e60 1667 else
35149e21 1668 kvm_release_pfn_clean(pfn);
1c4f1fd6 1669 }
1b7fcd32 1670 if (speculative) {
ad312c7c 1671 vcpu->arch.last_pte_updated = shadow_pte;
1b7fcd32
AK
1672 vcpu->arch.last_pte_gfn = gfn;
1673 }
1c4f1fd6
AK
1674}
1675
6aa8b732
AK
1676static void nonpaging_new_cr3(struct kvm_vcpu *vcpu)
1677{
1678}
1679
140754bc
AK
1680struct direct_shadow_walk {
1681 struct kvm_shadow_walk walker;
1682 pfn_t pfn;
1683 int write;
1684 int largepage;
1685 int pt_write;
1686};
6aa8b732 1687
140754bc
AK
1688static int direct_map_entry(struct kvm_shadow_walk *_walk,
1689 struct kvm_vcpu *vcpu,
d40a1ee4 1690 u64 addr, u64 *sptep, int level)
140754bc
AK
1691{
1692 struct direct_shadow_walk *walk =
1693 container_of(_walk, struct direct_shadow_walk, walker);
1694 struct kvm_mmu_page *sp;
1695 gfn_t pseudo_gfn;
1696 gfn_t gfn = addr >> PAGE_SHIFT;
1697
1698 if (level == PT_PAGE_TABLE_LEVEL
1699 || (walk->largepage && level == PT_DIRECTORY_LEVEL)) {
1700 mmu_set_spte(vcpu, sptep, ACC_ALL, ACC_ALL,
1701 0, walk->write, 1, &walk->pt_write,
1702 walk->largepage, gfn, walk->pfn, false);
bc2d4299 1703 ++vcpu->stat.pf_fixed;
140754bc
AK
1704 return 1;
1705 }
6aa8b732 1706
140754bc
AK
1707 if (*sptep == shadow_trap_nonpresent_pte) {
1708 pseudo_gfn = (addr & PT64_DIR_BASE_ADDR_MASK) >> PAGE_SHIFT;
d40a1ee4 1709 sp = kvm_mmu_get_page(vcpu, pseudo_gfn, (gva_t)addr, level - 1,
140754bc
AK
1710 1, ACC_ALL, sptep);
1711 if (!sp) {
1712 pgprintk("nonpaging_map: ENOMEM\n");
1713 kvm_release_pfn_clean(walk->pfn);
1714 return -ENOMEM;
6aa8b732
AK
1715 }
1716
140754bc
AK
1717 set_shadow_pte(sptep,
1718 __pa(sp->spt)
1719 | PT_PRESENT_MASK | PT_WRITABLE_MASK
1720 | shadow_user_mask | shadow_x_mask);
6aa8b732 1721 }
140754bc
AK
1722 return 0;
1723}
1724
1725static int __direct_map(struct kvm_vcpu *vcpu, gpa_t v, int write,
1726 int largepage, gfn_t gfn, pfn_t pfn)
1727{
1728 int r;
1729 struct direct_shadow_walk walker = {
1730 .walker = { .entry = direct_map_entry, },
1731 .pfn = pfn,
1732 .largepage = largepage,
1733 .write = write,
1734 .pt_write = 0,
1735 };
1736
d40a1ee4 1737 r = walk_shadow(&walker.walker, vcpu, gfn << PAGE_SHIFT);
140754bc
AK
1738 if (r < 0)
1739 return r;
1740 return walker.pt_write;
6aa8b732
AK
1741}
1742
10589a46
MT
1743static int nonpaging_map(struct kvm_vcpu *vcpu, gva_t v, int write, gfn_t gfn)
1744{
1745 int r;
05da4558 1746 int largepage = 0;
35149e21 1747 pfn_t pfn;
e930bffe 1748 unsigned long mmu_seq;
aaee2c94 1749
05da4558
MT
1750 if (is_largepage_backed(vcpu, gfn & ~(KVM_PAGES_PER_HPAGE-1))) {
1751 gfn &= ~(KVM_PAGES_PER_HPAGE-1);
1752 largepage = 1;
1753 }
1754
e930bffe 1755 mmu_seq = vcpu->kvm->mmu_notifier_seq;
4c2155ce 1756 smp_rmb();
35149e21 1757 pfn = gfn_to_pfn(vcpu->kvm, gfn);
aaee2c94 1758
d196e343 1759 /* mmio */
35149e21
AL
1760 if (is_error_pfn(pfn)) {
1761 kvm_release_pfn_clean(pfn);
d196e343
AK
1762 return 1;
1763 }
1764
aaee2c94 1765 spin_lock(&vcpu->kvm->mmu_lock);
e930bffe
AA
1766 if (mmu_notifier_retry(vcpu, mmu_seq))
1767 goto out_unlock;
eb787d10 1768 kvm_mmu_free_some_pages(vcpu);
6c41f428 1769 r = __direct_map(vcpu, v, write, largepage, gfn, pfn);
aaee2c94
MT
1770 spin_unlock(&vcpu->kvm->mmu_lock);
1771
aaee2c94 1772
10589a46 1773 return r;
e930bffe
AA
1774
1775out_unlock:
1776 spin_unlock(&vcpu->kvm->mmu_lock);
1777 kvm_release_pfn_clean(pfn);
1778 return 0;
10589a46
MT
1779}
1780
1781
17ac10ad
AK
1782static void mmu_free_roots(struct kvm_vcpu *vcpu)
1783{
1784 int i;
4db35314 1785 struct kvm_mmu_page *sp;
17ac10ad 1786
ad312c7c 1787 if (!VALID_PAGE(vcpu->arch.mmu.root_hpa))
7b53aa56 1788 return;
aaee2c94 1789 spin_lock(&vcpu->kvm->mmu_lock);
ad312c7c
ZX
1790 if (vcpu->arch.mmu.shadow_root_level == PT64_ROOT_LEVEL) {
1791 hpa_t root = vcpu->arch.mmu.root_hpa;
17ac10ad 1792
4db35314
AK
1793 sp = page_header(root);
1794 --sp->root_count;
2e53d63a
MT
1795 if (!sp->root_count && sp->role.invalid)
1796 kvm_mmu_zap_page(vcpu->kvm, sp);
ad312c7c 1797 vcpu->arch.mmu.root_hpa = INVALID_PAGE;
aaee2c94 1798 spin_unlock(&vcpu->kvm->mmu_lock);
17ac10ad
AK
1799 return;
1800 }
17ac10ad 1801 for (i = 0; i < 4; ++i) {
ad312c7c 1802 hpa_t root = vcpu->arch.mmu.pae_root[i];
17ac10ad 1803
417726a3 1804 if (root) {
417726a3 1805 root &= PT64_BASE_ADDR_MASK;
4db35314
AK
1806 sp = page_header(root);
1807 --sp->root_count;
2e53d63a
MT
1808 if (!sp->root_count && sp->role.invalid)
1809 kvm_mmu_zap_page(vcpu->kvm, sp);
417726a3 1810 }
ad312c7c 1811 vcpu->arch.mmu.pae_root[i] = INVALID_PAGE;
17ac10ad 1812 }
aaee2c94 1813 spin_unlock(&vcpu->kvm->mmu_lock);
ad312c7c 1814 vcpu->arch.mmu.root_hpa = INVALID_PAGE;
17ac10ad
AK
1815}
1816
1817static void mmu_alloc_roots(struct kvm_vcpu *vcpu)
1818{
1819 int i;
cea0f0e7 1820 gfn_t root_gfn;
4db35314 1821 struct kvm_mmu_page *sp;
fb72d167 1822 int metaphysical = 0;
3bb65a22 1823
ad312c7c 1824 root_gfn = vcpu->arch.cr3 >> PAGE_SHIFT;
17ac10ad 1825
ad312c7c
ZX
1826 if (vcpu->arch.mmu.shadow_root_level == PT64_ROOT_LEVEL) {
1827 hpa_t root = vcpu->arch.mmu.root_hpa;
17ac10ad
AK
1828
1829 ASSERT(!VALID_PAGE(root));
fb72d167
JR
1830 if (tdp_enabled)
1831 metaphysical = 1;
4db35314 1832 sp = kvm_mmu_get_page(vcpu, root_gfn, 0,
fb72d167
JR
1833 PT64_ROOT_LEVEL, metaphysical,
1834 ACC_ALL, NULL);
4db35314
AK
1835 root = __pa(sp->spt);
1836 ++sp->root_count;
ad312c7c 1837 vcpu->arch.mmu.root_hpa = root;
17ac10ad
AK
1838 return;
1839 }
fb72d167
JR
1840 metaphysical = !is_paging(vcpu);
1841 if (tdp_enabled)
1842 metaphysical = 1;
17ac10ad 1843 for (i = 0; i < 4; ++i) {
ad312c7c 1844 hpa_t root = vcpu->arch.mmu.pae_root[i];
17ac10ad
AK
1845
1846 ASSERT(!VALID_PAGE(root));
ad312c7c
ZX
1847 if (vcpu->arch.mmu.root_level == PT32E_ROOT_LEVEL) {
1848 if (!is_present_pte(vcpu->arch.pdptrs[i])) {
1849 vcpu->arch.mmu.pae_root[i] = 0;
417726a3
AK
1850 continue;
1851 }
ad312c7c
ZX
1852 root_gfn = vcpu->arch.pdptrs[i] >> PAGE_SHIFT;
1853 } else if (vcpu->arch.mmu.root_level == 0)
cea0f0e7 1854 root_gfn = 0;
4db35314 1855 sp = kvm_mmu_get_page(vcpu, root_gfn, i << 30,
fb72d167 1856 PT32_ROOT_LEVEL, metaphysical,
f7d9c7b7 1857 ACC_ALL, NULL);
4db35314
AK
1858 root = __pa(sp->spt);
1859 ++sp->root_count;
ad312c7c 1860 vcpu->arch.mmu.pae_root[i] = root | PT_PRESENT_MASK;
17ac10ad 1861 }
ad312c7c 1862 vcpu->arch.mmu.root_hpa = __pa(vcpu->arch.mmu.pae_root);
17ac10ad
AK
1863}
1864
0ba73cda
MT
1865static void mmu_sync_roots(struct kvm_vcpu *vcpu)
1866{
1867 int i;
1868 struct kvm_mmu_page *sp;
1869
1870 if (!VALID_PAGE(vcpu->arch.mmu.root_hpa))
1871 return;
1872 if (vcpu->arch.mmu.shadow_root_level == PT64_ROOT_LEVEL) {
1873 hpa_t root = vcpu->arch.mmu.root_hpa;
1874 sp = page_header(root);
1875 mmu_sync_children(vcpu, sp);
1876 return;
1877 }
1878 for (i = 0; i < 4; ++i) {
1879 hpa_t root = vcpu->arch.mmu.pae_root[i];
1880
1881 if (root) {
1882 root &= PT64_BASE_ADDR_MASK;
1883 sp = page_header(root);
1884 mmu_sync_children(vcpu, sp);
1885 }
1886 }
1887}
1888
1889void kvm_mmu_sync_roots(struct kvm_vcpu *vcpu)
1890{
1891 spin_lock(&vcpu->kvm->mmu_lock);
1892 mmu_sync_roots(vcpu);
1893 spin_unlock(&vcpu->kvm->mmu_lock);
1894}
1895
6aa8b732
AK
1896static gpa_t nonpaging_gva_to_gpa(struct kvm_vcpu *vcpu, gva_t vaddr)
1897{
1898 return vaddr;
1899}
1900
1901static int nonpaging_page_fault(struct kvm_vcpu *vcpu, gva_t gva,
3f3e7124 1902 u32 error_code)
6aa8b732 1903{
e833240f 1904 gfn_t gfn;
e2dec939 1905 int r;
6aa8b732 1906
b8688d51 1907 pgprintk("%s: gva %lx error %x\n", __func__, gva, error_code);
e2dec939
AK
1908 r = mmu_topup_memory_caches(vcpu);
1909 if (r)
1910 return r;
714b93da 1911
6aa8b732 1912 ASSERT(vcpu);
ad312c7c 1913 ASSERT(VALID_PAGE(vcpu->arch.mmu.root_hpa));
6aa8b732 1914
e833240f 1915 gfn = gva >> PAGE_SHIFT;
6aa8b732 1916
e833240f
AK
1917 return nonpaging_map(vcpu, gva & PAGE_MASK,
1918 error_code & PFERR_WRITE_MASK, gfn);
6aa8b732
AK
1919}
1920
fb72d167
JR
1921static int tdp_page_fault(struct kvm_vcpu *vcpu, gva_t gpa,
1922 u32 error_code)
1923{
35149e21 1924 pfn_t pfn;
fb72d167 1925 int r;
05da4558
MT
1926 int largepage = 0;
1927 gfn_t gfn = gpa >> PAGE_SHIFT;
e930bffe 1928 unsigned long mmu_seq;
fb72d167
JR
1929
1930 ASSERT(vcpu);
1931 ASSERT(VALID_PAGE(vcpu->arch.mmu.root_hpa));
1932
1933 r = mmu_topup_memory_caches(vcpu);
1934 if (r)
1935 return r;
1936
05da4558
MT
1937 if (is_largepage_backed(vcpu, gfn & ~(KVM_PAGES_PER_HPAGE-1))) {
1938 gfn &= ~(KVM_PAGES_PER_HPAGE-1);
1939 largepage = 1;
1940 }
e930bffe 1941 mmu_seq = vcpu->kvm->mmu_notifier_seq;
4c2155ce 1942 smp_rmb();
35149e21 1943 pfn = gfn_to_pfn(vcpu->kvm, gfn);
35149e21
AL
1944 if (is_error_pfn(pfn)) {
1945 kvm_release_pfn_clean(pfn);
fb72d167
JR
1946 return 1;
1947 }
1948 spin_lock(&vcpu->kvm->mmu_lock);
e930bffe
AA
1949 if (mmu_notifier_retry(vcpu, mmu_seq))
1950 goto out_unlock;
fb72d167
JR
1951 kvm_mmu_free_some_pages(vcpu);
1952 r = __direct_map(vcpu, gpa, error_code & PFERR_WRITE_MASK,
6c41f428 1953 largepage, gfn, pfn);
fb72d167 1954 spin_unlock(&vcpu->kvm->mmu_lock);
fb72d167
JR
1955
1956 return r;
e930bffe
AA
1957
1958out_unlock:
1959 spin_unlock(&vcpu->kvm->mmu_lock);
1960 kvm_release_pfn_clean(pfn);
1961 return 0;
fb72d167
JR
1962}
1963
6aa8b732
AK
1964static void nonpaging_free(struct kvm_vcpu *vcpu)
1965{
17ac10ad 1966 mmu_free_roots(vcpu);
6aa8b732
AK
1967}
1968
1969static int nonpaging_init_context(struct kvm_vcpu *vcpu)
1970{
ad312c7c 1971 struct kvm_mmu *context = &vcpu->arch.mmu;
6aa8b732
AK
1972
1973 context->new_cr3 = nonpaging_new_cr3;
1974 context->page_fault = nonpaging_page_fault;
6aa8b732
AK
1975 context->gva_to_gpa = nonpaging_gva_to_gpa;
1976 context->free = nonpaging_free;
c7addb90 1977 context->prefetch_page = nonpaging_prefetch_page;
e8bc217a 1978 context->sync_page = nonpaging_sync_page;
a7052897 1979 context->invlpg = nonpaging_invlpg;
cea0f0e7 1980 context->root_level = 0;
6aa8b732 1981 context->shadow_root_level = PT32E_ROOT_LEVEL;
17c3ba9d 1982 context->root_hpa = INVALID_PAGE;
6aa8b732
AK
1983 return 0;
1984}
1985
d835dfec 1986void kvm_mmu_flush_tlb(struct kvm_vcpu *vcpu)
6aa8b732 1987{
1165f5fe 1988 ++vcpu->stat.tlb_flush;
cbdd1bea 1989 kvm_x86_ops->tlb_flush(vcpu);
6aa8b732
AK
1990}
1991
1992static void paging_new_cr3(struct kvm_vcpu *vcpu)
1993{
b8688d51 1994 pgprintk("%s: cr3 %lx\n", __func__, vcpu->arch.cr3);
cea0f0e7 1995 mmu_free_roots(vcpu);
6aa8b732
AK
1996}
1997
6aa8b732
AK
1998static void inject_page_fault(struct kvm_vcpu *vcpu,
1999 u64 addr,
2000 u32 err_code)
2001{
c3c91fee 2002 kvm_inject_page_fault(vcpu, addr, err_code);
6aa8b732
AK
2003}
2004
6aa8b732
AK
2005static void paging_free(struct kvm_vcpu *vcpu)
2006{
2007 nonpaging_free(vcpu);
2008}
2009
2010#define PTTYPE 64
2011#include "paging_tmpl.h"
2012#undef PTTYPE
2013
2014#define PTTYPE 32
2015#include "paging_tmpl.h"
2016#undef PTTYPE
2017
17ac10ad 2018static int paging64_init_context_common(struct kvm_vcpu *vcpu, int level)
6aa8b732 2019{
ad312c7c 2020 struct kvm_mmu *context = &vcpu->arch.mmu;
6aa8b732
AK
2021
2022 ASSERT(is_pae(vcpu));
2023 context->new_cr3 = paging_new_cr3;
2024 context->page_fault = paging64_page_fault;
6aa8b732 2025 context->gva_to_gpa = paging64_gva_to_gpa;
c7addb90 2026 context->prefetch_page = paging64_prefetch_page;
e8bc217a 2027 context->sync_page = paging64_sync_page;
a7052897 2028 context->invlpg = paging64_invlpg;
6aa8b732 2029 context->free = paging_free;
17ac10ad
AK
2030 context->root_level = level;
2031 context->shadow_root_level = level;
17c3ba9d 2032 context->root_hpa = INVALID_PAGE;
6aa8b732
AK
2033 return 0;
2034}
2035
17ac10ad
AK
2036static int paging64_init_context(struct kvm_vcpu *vcpu)
2037{
2038 return paging64_init_context_common(vcpu, PT64_ROOT_LEVEL);
2039}
2040
6aa8b732
AK
2041static int paging32_init_context(struct kvm_vcpu *vcpu)
2042{
ad312c7c 2043 struct kvm_mmu *context = &vcpu->arch.mmu;
6aa8b732
AK
2044
2045 context->new_cr3 = paging_new_cr3;
2046 context->page_fault = paging32_page_fault;
6aa8b732
AK
2047 context->gva_to_gpa = paging32_gva_to_gpa;
2048 context->free = paging_free;
c7addb90 2049 context->prefetch_page = paging32_prefetch_page;
e8bc217a 2050 context->sync_page = paging32_sync_page;
a7052897 2051 context->invlpg = paging32_invlpg;
6aa8b732
AK
2052 context->root_level = PT32_ROOT_LEVEL;
2053 context->shadow_root_level = PT32E_ROOT_LEVEL;
17c3ba9d 2054 context->root_hpa = INVALID_PAGE;
6aa8b732
AK
2055 return 0;
2056}
2057
2058static int paging32E_init_context(struct kvm_vcpu *vcpu)
2059{
17ac10ad 2060 return paging64_init_context_common(vcpu, PT32E_ROOT_LEVEL);
6aa8b732
AK
2061}
2062
fb72d167
JR
2063static int init_kvm_tdp_mmu(struct kvm_vcpu *vcpu)
2064{
2065 struct kvm_mmu *context = &vcpu->arch.mmu;
2066
2067 context->new_cr3 = nonpaging_new_cr3;
2068 context->page_fault = tdp_page_fault;
2069 context->free = nonpaging_free;
2070 context->prefetch_page = nonpaging_prefetch_page;
e8bc217a 2071 context->sync_page = nonpaging_sync_page;
a7052897 2072 context->invlpg = nonpaging_invlpg;
67253af5 2073 context->shadow_root_level = kvm_x86_ops->get_tdp_level();
fb72d167
JR
2074 context->root_hpa = INVALID_PAGE;
2075
2076 if (!is_paging(vcpu)) {
2077 context->gva_to_gpa = nonpaging_gva_to_gpa;
2078 context->root_level = 0;
2079 } else if (is_long_mode(vcpu)) {
2080 context->gva_to_gpa = paging64_gva_to_gpa;
2081 context->root_level = PT64_ROOT_LEVEL;
2082 } else if (is_pae(vcpu)) {
2083 context->gva_to_gpa = paging64_gva_to_gpa;
2084 context->root_level = PT32E_ROOT_LEVEL;
2085 } else {
2086 context->gva_to_gpa = paging32_gva_to_gpa;
2087 context->root_level = PT32_ROOT_LEVEL;
2088 }
2089
2090 return 0;
2091}
2092
2093static int init_kvm_softmmu(struct kvm_vcpu *vcpu)
6aa8b732
AK
2094{
2095 ASSERT(vcpu);
ad312c7c 2096 ASSERT(!VALID_PAGE(vcpu->arch.mmu.root_hpa));
6aa8b732
AK
2097
2098 if (!is_paging(vcpu))
2099 return nonpaging_init_context(vcpu);
a9058ecd 2100 else if (is_long_mode(vcpu))
6aa8b732
AK
2101 return paging64_init_context(vcpu);
2102 else if (is_pae(vcpu))
2103 return paging32E_init_context(vcpu);
2104 else
2105 return paging32_init_context(vcpu);
2106}
2107
fb72d167
JR
2108static int init_kvm_mmu(struct kvm_vcpu *vcpu)
2109{
35149e21
AL
2110 vcpu->arch.update_pte.pfn = bad_pfn;
2111
fb72d167
JR
2112 if (tdp_enabled)
2113 return init_kvm_tdp_mmu(vcpu);
2114 else
2115 return init_kvm_softmmu(vcpu);
2116}
2117
6aa8b732
AK
2118static void destroy_kvm_mmu(struct kvm_vcpu *vcpu)
2119{
2120 ASSERT(vcpu);
ad312c7c
ZX
2121 if (VALID_PAGE(vcpu->arch.mmu.root_hpa)) {
2122 vcpu->arch.mmu.free(vcpu);
2123 vcpu->arch.mmu.root_hpa = INVALID_PAGE;
6aa8b732
AK
2124 }
2125}
2126
2127int kvm_mmu_reset_context(struct kvm_vcpu *vcpu)
17c3ba9d
AK
2128{
2129 destroy_kvm_mmu(vcpu);
2130 return init_kvm_mmu(vcpu);
2131}
8668a3c4 2132EXPORT_SYMBOL_GPL(kvm_mmu_reset_context);
17c3ba9d
AK
2133
2134int kvm_mmu_load(struct kvm_vcpu *vcpu)
6aa8b732 2135{
714b93da
AK
2136 int r;
2137
e2dec939 2138 r = mmu_topup_memory_caches(vcpu);
17c3ba9d
AK
2139 if (r)
2140 goto out;
aaee2c94 2141 spin_lock(&vcpu->kvm->mmu_lock);
eb787d10 2142 kvm_mmu_free_some_pages(vcpu);
17c3ba9d 2143 mmu_alloc_roots(vcpu);
0ba73cda 2144 mmu_sync_roots(vcpu);
aaee2c94 2145 spin_unlock(&vcpu->kvm->mmu_lock);
ad312c7c 2146 kvm_x86_ops->set_cr3(vcpu, vcpu->arch.mmu.root_hpa);
17c3ba9d 2147 kvm_mmu_flush_tlb(vcpu);
714b93da
AK
2148out:
2149 return r;
6aa8b732 2150}
17c3ba9d
AK
2151EXPORT_SYMBOL_GPL(kvm_mmu_load);
2152
2153void kvm_mmu_unload(struct kvm_vcpu *vcpu)
2154{
2155 mmu_free_roots(vcpu);
2156}
6aa8b732 2157
09072daf 2158static void mmu_pte_write_zap_pte(struct kvm_vcpu *vcpu,
4db35314 2159 struct kvm_mmu_page *sp,
ac1b714e
AK
2160 u64 *spte)
2161{
2162 u64 pte;
2163 struct kvm_mmu_page *child;
2164
2165 pte = *spte;
c7addb90 2166 if (is_shadow_present_pte(pte)) {
05da4558
MT
2167 if (sp->role.level == PT_PAGE_TABLE_LEVEL ||
2168 is_large_pte(pte))
290fc38d 2169 rmap_remove(vcpu->kvm, spte);
ac1b714e
AK
2170 else {
2171 child = page_header(pte & PT64_BASE_ADDR_MASK);
90cb0529 2172 mmu_page_remove_parent_pte(child, spte);
ac1b714e
AK
2173 }
2174 }
c7addb90 2175 set_shadow_pte(spte, shadow_trap_nonpresent_pte);
05da4558
MT
2176 if (is_large_pte(pte))
2177 --vcpu->kvm->stat.lpages;
ac1b714e
AK
2178}
2179
0028425f 2180static void mmu_pte_write_new_pte(struct kvm_vcpu *vcpu,
4db35314 2181 struct kvm_mmu_page *sp,
0028425f 2182 u64 *spte,
489f1d65 2183 const void *new)
0028425f 2184{
30945387
MT
2185 if (sp->role.level != PT_PAGE_TABLE_LEVEL) {
2186 if (!vcpu->arch.update_pte.largepage ||
2187 sp->role.glevels == PT32_ROOT_LEVEL) {
2188 ++vcpu->kvm->stat.mmu_pde_zapped;
2189 return;
2190 }
2191 }
0028425f 2192
4cee5764 2193 ++vcpu->kvm->stat.mmu_pte_updated;
4db35314 2194 if (sp->role.glevels == PT32_ROOT_LEVEL)
489f1d65 2195 paging32_update_pte(vcpu, sp, spte, new);
0028425f 2196 else
489f1d65 2197 paging64_update_pte(vcpu, sp, spte, new);
0028425f
AK
2198}
2199
79539cec
AK
2200static bool need_remote_flush(u64 old, u64 new)
2201{
2202 if (!is_shadow_present_pte(old))
2203 return false;
2204 if (!is_shadow_present_pte(new))
2205 return true;
2206 if ((old ^ new) & PT64_BASE_ADDR_MASK)
2207 return true;
2208 old ^= PT64_NX_MASK;
2209 new ^= PT64_NX_MASK;
2210 return (old & ~new & PT64_PERM_MASK) != 0;
2211}
2212
2213static void mmu_pte_write_flush_tlb(struct kvm_vcpu *vcpu, u64 old, u64 new)
2214{
2215 if (need_remote_flush(old, new))
2216 kvm_flush_remote_tlbs(vcpu->kvm);
2217 else
2218 kvm_mmu_flush_tlb(vcpu);
2219}
2220
12b7d28f
AK
2221static bool last_updated_pte_accessed(struct kvm_vcpu *vcpu)
2222{
ad312c7c 2223 u64 *spte = vcpu->arch.last_pte_updated;
12b7d28f 2224
7b52345e 2225 return !!(spte && (*spte & shadow_accessed_mask));
12b7d28f
AK
2226}
2227
d7824fff
AK
2228static void mmu_guess_page_from_pte_write(struct kvm_vcpu *vcpu, gpa_t gpa,
2229 const u8 *new, int bytes)
2230{
2231 gfn_t gfn;
2232 int r;
2233 u64 gpte = 0;
35149e21 2234 pfn_t pfn;
d7824fff 2235
05da4558
MT
2236 vcpu->arch.update_pte.largepage = 0;
2237
d7824fff
AK
2238 if (bytes != 4 && bytes != 8)
2239 return;
2240
2241 /*
2242 * Assume that the pte write on a page table of the same type
2243 * as the current vcpu paging mode. This is nearly always true
2244 * (might be false while changing modes). Note it is verified later
2245 * by update_pte().
2246 */
2247 if (is_pae(vcpu)) {
2248 /* Handle a 32-bit guest writing two halves of a 64-bit gpte */
2249 if ((bytes == 4) && (gpa % 4 == 0)) {
2250 r = kvm_read_guest(vcpu->kvm, gpa & ~(u64)7, &gpte, 8);
2251 if (r)
2252 return;
2253 memcpy((void *)&gpte + (gpa % 8), new, 4);
2254 } else if ((bytes == 8) && (gpa % 8 == 0)) {
2255 memcpy((void *)&gpte, new, 8);
2256 }
2257 } else {
2258 if ((bytes == 4) && (gpa % 4 == 0))
2259 memcpy((void *)&gpte, new, 4);
2260 }
2261 if (!is_present_pte(gpte))
2262 return;
2263 gfn = (gpte & PT64_BASE_ADDR_MASK) >> PAGE_SHIFT;
72dc67a6 2264
05da4558
MT
2265 if (is_large_pte(gpte) && is_largepage_backed(vcpu, gfn)) {
2266 gfn &= ~(KVM_PAGES_PER_HPAGE-1);
2267 vcpu->arch.update_pte.largepage = 1;
2268 }
e930bffe 2269 vcpu->arch.update_pte.mmu_seq = vcpu->kvm->mmu_notifier_seq;
4c2155ce 2270 smp_rmb();
35149e21 2271 pfn = gfn_to_pfn(vcpu->kvm, gfn);
72dc67a6 2272
35149e21
AL
2273 if (is_error_pfn(pfn)) {
2274 kvm_release_pfn_clean(pfn);
d196e343
AK
2275 return;
2276 }
d7824fff 2277 vcpu->arch.update_pte.gfn = gfn;
35149e21 2278 vcpu->arch.update_pte.pfn = pfn;
d7824fff
AK
2279}
2280
1b7fcd32
AK
2281static void kvm_mmu_access_page(struct kvm_vcpu *vcpu, gfn_t gfn)
2282{
2283 u64 *spte = vcpu->arch.last_pte_updated;
2284
2285 if (spte
2286 && vcpu->arch.last_pte_gfn == gfn
2287 && shadow_accessed_mask
2288 && !(*spte & shadow_accessed_mask)
2289 && is_shadow_present_pte(*spte))
2290 set_bit(PT_ACCESSED_SHIFT, (unsigned long *)spte);
2291}
2292
09072daf 2293void kvm_mmu_pte_write(struct kvm_vcpu *vcpu, gpa_t gpa,
fe551881 2294 const u8 *new, int bytes)
da4a00f0 2295{
9b7a0325 2296 gfn_t gfn = gpa >> PAGE_SHIFT;
4db35314 2297 struct kvm_mmu_page *sp;
0e7bc4b9 2298 struct hlist_node *node, *n;
9b7a0325
AK
2299 struct hlist_head *bucket;
2300 unsigned index;
489f1d65 2301 u64 entry, gentry;
9b7a0325 2302 u64 *spte;
9b7a0325 2303 unsigned offset = offset_in_page(gpa);
0e7bc4b9 2304 unsigned pte_size;
9b7a0325 2305 unsigned page_offset;
0e7bc4b9 2306 unsigned misaligned;
fce0657f 2307 unsigned quadrant;
9b7a0325 2308 int level;
86a5ba02 2309 int flooded = 0;
ac1b714e 2310 int npte;
489f1d65 2311 int r;
9b7a0325 2312
b8688d51 2313 pgprintk("%s: gpa %llx bytes %d\n", __func__, gpa, bytes);
d7824fff 2314 mmu_guess_page_from_pte_write(vcpu, gpa, new, bytes);
aaee2c94 2315 spin_lock(&vcpu->kvm->mmu_lock);
1b7fcd32 2316 kvm_mmu_access_page(vcpu, gfn);
eb787d10 2317 kvm_mmu_free_some_pages(vcpu);
4cee5764 2318 ++vcpu->kvm->stat.mmu_pte_write;
c7addb90 2319 kvm_mmu_audit(vcpu, "pre pte write");
ad312c7c 2320 if (gfn == vcpu->arch.last_pt_write_gfn
12b7d28f 2321 && !last_updated_pte_accessed(vcpu)) {
ad312c7c
ZX
2322 ++vcpu->arch.last_pt_write_count;
2323 if (vcpu->arch.last_pt_write_count >= 3)
86a5ba02
AK
2324 flooded = 1;
2325 } else {
ad312c7c
ZX
2326 vcpu->arch.last_pt_write_gfn = gfn;
2327 vcpu->arch.last_pt_write_count = 1;
2328 vcpu->arch.last_pte_updated = NULL;
86a5ba02 2329 }
1ae0a13d 2330 index = kvm_page_table_hashfn(gfn);
f05e70ac 2331 bucket = &vcpu->kvm->arch.mmu_page_hash[index];
4db35314 2332 hlist_for_each_entry_safe(sp, node, n, bucket, hash_link) {
5b5c6a5a 2333 if (sp->gfn != gfn || sp->role.metaphysical || sp->role.invalid)
9b7a0325 2334 continue;
4db35314 2335 pte_size = sp->role.glevels == PT32_ROOT_LEVEL ? 4 : 8;
0e7bc4b9 2336 misaligned = (offset ^ (offset + bytes - 1)) & ~(pte_size - 1);
e925c5ba 2337 misaligned |= bytes < 4;
86a5ba02 2338 if (misaligned || flooded) {
0e7bc4b9
AK
2339 /*
2340 * Misaligned accesses are too much trouble to fix
2341 * up; also, they usually indicate a page is not used
2342 * as a page table.
86a5ba02
AK
2343 *
2344 * If we're seeing too many writes to a page,
2345 * it may no longer be a page table, or we may be
2346 * forking, in which case it is better to unmap the
2347 * page.
0e7bc4b9
AK
2348 */
2349 pgprintk("misaligned: gpa %llx bytes %d role %x\n",
4db35314 2350 gpa, bytes, sp->role.word);
07385413
MT
2351 if (kvm_mmu_zap_page(vcpu->kvm, sp))
2352 n = bucket->first;
4cee5764 2353 ++vcpu->kvm->stat.mmu_flooded;
0e7bc4b9
AK
2354 continue;
2355 }
9b7a0325 2356 page_offset = offset;
4db35314 2357 level = sp->role.level;
ac1b714e 2358 npte = 1;
4db35314 2359 if (sp->role.glevels == PT32_ROOT_LEVEL) {
ac1b714e
AK
2360 page_offset <<= 1; /* 32->64 */
2361 /*
2362 * A 32-bit pde maps 4MB while the shadow pdes map
2363 * only 2MB. So we need to double the offset again
2364 * and zap two pdes instead of one.
2365 */
2366 if (level == PT32_ROOT_LEVEL) {
6b8d0f9b 2367 page_offset &= ~7; /* kill rounding error */
ac1b714e
AK
2368 page_offset <<= 1;
2369 npte = 2;
2370 }
fce0657f 2371 quadrant = page_offset >> PAGE_SHIFT;
9b7a0325 2372 page_offset &= ~PAGE_MASK;
4db35314 2373 if (quadrant != sp->role.quadrant)
fce0657f 2374 continue;
9b7a0325 2375 }
4db35314 2376 spte = &sp->spt[page_offset / sizeof(*spte)];
489f1d65
DE
2377 if ((gpa & (pte_size - 1)) || (bytes < pte_size)) {
2378 gentry = 0;
2379 r = kvm_read_guest_atomic(vcpu->kvm,
2380 gpa & ~(u64)(pte_size - 1),
2381 &gentry, pte_size);
2382 new = (const void *)&gentry;
2383 if (r < 0)
2384 new = NULL;
2385 }
ac1b714e 2386 while (npte--) {
79539cec 2387 entry = *spte;
4db35314 2388 mmu_pte_write_zap_pte(vcpu, sp, spte);
489f1d65
DE
2389 if (new)
2390 mmu_pte_write_new_pte(vcpu, sp, spte, new);
79539cec 2391 mmu_pte_write_flush_tlb(vcpu, entry, *spte);
ac1b714e 2392 ++spte;
9b7a0325 2393 }
9b7a0325 2394 }
c7addb90 2395 kvm_mmu_audit(vcpu, "post pte write");
aaee2c94 2396 spin_unlock(&vcpu->kvm->mmu_lock);
35149e21
AL
2397 if (!is_error_pfn(vcpu->arch.update_pte.pfn)) {
2398 kvm_release_pfn_clean(vcpu->arch.update_pte.pfn);
2399 vcpu->arch.update_pte.pfn = bad_pfn;
d7824fff 2400 }
da4a00f0
AK
2401}
2402
a436036b
AK
2403int kvm_mmu_unprotect_page_virt(struct kvm_vcpu *vcpu, gva_t gva)
2404{
10589a46
MT
2405 gpa_t gpa;
2406 int r;
a436036b 2407
10589a46 2408 gpa = vcpu->arch.mmu.gva_to_gpa(vcpu, gva);
10589a46 2409
aaee2c94 2410 spin_lock(&vcpu->kvm->mmu_lock);
10589a46 2411 r = kvm_mmu_unprotect_page(vcpu->kvm, gpa >> PAGE_SHIFT);
aaee2c94 2412 spin_unlock(&vcpu->kvm->mmu_lock);
10589a46 2413 return r;
a436036b 2414}
577bdc49 2415EXPORT_SYMBOL_GPL(kvm_mmu_unprotect_page_virt);
a436036b 2416
22d95b12 2417void __kvm_mmu_free_some_pages(struct kvm_vcpu *vcpu)
ebeace86 2418{
f05e70ac 2419 while (vcpu->kvm->arch.n_free_mmu_pages < KVM_REFILL_PAGES) {
4db35314 2420 struct kvm_mmu_page *sp;
ebeace86 2421
f05e70ac 2422 sp = container_of(vcpu->kvm->arch.active_mmu_pages.prev,
4db35314
AK
2423 struct kvm_mmu_page, link);
2424 kvm_mmu_zap_page(vcpu->kvm, sp);
4cee5764 2425 ++vcpu->kvm->stat.mmu_recycled;
ebeace86
AK
2426 }
2427}
ebeace86 2428
3067714c
AK
2429int kvm_mmu_page_fault(struct kvm_vcpu *vcpu, gva_t cr2, u32 error_code)
2430{
2431 int r;
2432 enum emulation_result er;
2433
ad312c7c 2434 r = vcpu->arch.mmu.page_fault(vcpu, cr2, error_code);
3067714c
AK
2435 if (r < 0)
2436 goto out;
2437
2438 if (!r) {
2439 r = 1;
2440 goto out;
2441 }
2442
b733bfb5
AK
2443 r = mmu_topup_memory_caches(vcpu);
2444 if (r)
2445 goto out;
2446
3067714c 2447 er = emulate_instruction(vcpu, vcpu->run, cr2, error_code, 0);
3067714c
AK
2448
2449 switch (er) {
2450 case EMULATE_DONE:
2451 return 1;
2452 case EMULATE_DO_MMIO:
2453 ++vcpu->stat.mmio_exits;
2454 return 0;
2455 case EMULATE_FAIL:
2456 kvm_report_emulation_failure(vcpu, "pagetable");
2457 return 1;
2458 default:
2459 BUG();
2460 }
2461out:
3067714c
AK
2462 return r;
2463}
2464EXPORT_SYMBOL_GPL(kvm_mmu_page_fault);
2465
a7052897
MT
2466void kvm_mmu_invlpg(struct kvm_vcpu *vcpu, gva_t gva)
2467{
2468 spin_lock(&vcpu->kvm->mmu_lock);
2469 vcpu->arch.mmu.invlpg(vcpu, gva);
2470 spin_unlock(&vcpu->kvm->mmu_lock);
2471 kvm_mmu_flush_tlb(vcpu);
2472 ++vcpu->stat.invlpg;
2473}
2474EXPORT_SYMBOL_GPL(kvm_mmu_invlpg);
2475
18552672
JR
2476void kvm_enable_tdp(void)
2477{
2478 tdp_enabled = true;
2479}
2480EXPORT_SYMBOL_GPL(kvm_enable_tdp);
2481
5f4cb662
JR
2482void kvm_disable_tdp(void)
2483{
2484 tdp_enabled = false;
2485}
2486EXPORT_SYMBOL_GPL(kvm_disable_tdp);
2487
6aa8b732
AK
2488static void free_mmu_pages(struct kvm_vcpu *vcpu)
2489{
4db35314 2490 struct kvm_mmu_page *sp;
6aa8b732 2491
f05e70ac
ZX
2492 while (!list_empty(&vcpu->kvm->arch.active_mmu_pages)) {
2493 sp = container_of(vcpu->kvm->arch.active_mmu_pages.next,
4db35314
AK
2494 struct kvm_mmu_page, link);
2495 kvm_mmu_zap_page(vcpu->kvm, sp);
8d2d73b9 2496 cond_resched();
f51234c2 2497 }
ad312c7c 2498 free_page((unsigned long)vcpu->arch.mmu.pae_root);
6aa8b732
AK
2499}
2500
2501static int alloc_mmu_pages(struct kvm_vcpu *vcpu)
2502{
17ac10ad 2503 struct page *page;
6aa8b732
AK
2504 int i;
2505
2506 ASSERT(vcpu);
2507
f05e70ac
ZX
2508 if (vcpu->kvm->arch.n_requested_mmu_pages)
2509 vcpu->kvm->arch.n_free_mmu_pages =
2510 vcpu->kvm->arch.n_requested_mmu_pages;
82ce2c96 2511 else
f05e70ac
ZX
2512 vcpu->kvm->arch.n_free_mmu_pages =
2513 vcpu->kvm->arch.n_alloc_mmu_pages;
17ac10ad
AK
2514 /*
2515 * When emulating 32-bit mode, cr3 is only 32 bits even on x86_64.
2516 * Therefore we need to allocate shadow page tables in the first
2517 * 4GB of memory, which happens to fit the DMA32 zone.
2518 */
2519 page = alloc_page(GFP_KERNEL | __GFP_DMA32);
2520 if (!page)
2521 goto error_1;
ad312c7c 2522 vcpu->arch.mmu.pae_root = page_address(page);
17ac10ad 2523 for (i = 0; i < 4; ++i)
ad312c7c 2524 vcpu->arch.mmu.pae_root[i] = INVALID_PAGE;
17ac10ad 2525
6aa8b732
AK
2526 return 0;
2527
2528error_1:
2529 free_mmu_pages(vcpu);
2530 return -ENOMEM;
2531}
2532
8018c27b 2533int kvm_mmu_create(struct kvm_vcpu *vcpu)
6aa8b732 2534{
6aa8b732 2535 ASSERT(vcpu);
ad312c7c 2536 ASSERT(!VALID_PAGE(vcpu->arch.mmu.root_hpa));
6aa8b732 2537
8018c27b
IM
2538 return alloc_mmu_pages(vcpu);
2539}
6aa8b732 2540
8018c27b
IM
2541int kvm_mmu_setup(struct kvm_vcpu *vcpu)
2542{
2543 ASSERT(vcpu);
ad312c7c 2544 ASSERT(!VALID_PAGE(vcpu->arch.mmu.root_hpa));
2c264957 2545
8018c27b 2546 return init_kvm_mmu(vcpu);
6aa8b732
AK
2547}
2548
2549void kvm_mmu_destroy(struct kvm_vcpu *vcpu)
2550{
2551 ASSERT(vcpu);
2552
2553 destroy_kvm_mmu(vcpu);
2554 free_mmu_pages(vcpu);
714b93da 2555 mmu_free_memory_caches(vcpu);
6aa8b732
AK
2556}
2557
90cb0529 2558void kvm_mmu_slot_remove_write_access(struct kvm *kvm, int slot)
6aa8b732 2559{
4db35314 2560 struct kvm_mmu_page *sp;
6aa8b732 2561
2245a28f 2562 spin_lock(&kvm->mmu_lock);
f05e70ac 2563 list_for_each_entry(sp, &kvm->arch.active_mmu_pages, link) {
6aa8b732
AK
2564 int i;
2565 u64 *pt;
2566
4db35314 2567 if (!test_bit(slot, &sp->slot_bitmap))
6aa8b732
AK
2568 continue;
2569
4db35314 2570 pt = sp->spt;
6aa8b732
AK
2571 for (i = 0; i < PT64_ENT_PER_PAGE; ++i)
2572 /* avoid RMW */
9647c14c 2573 if (pt[i] & PT_WRITABLE_MASK)
6aa8b732 2574 pt[i] &= ~PT_WRITABLE_MASK;
6aa8b732 2575 }
171d595d 2576 kvm_flush_remote_tlbs(kvm);
2245a28f 2577 spin_unlock(&kvm->mmu_lock);
6aa8b732 2578}
37a7d8b0 2579
90cb0529 2580void kvm_mmu_zap_all(struct kvm *kvm)
e0fa826f 2581{
4db35314 2582 struct kvm_mmu_page *sp, *node;
e0fa826f 2583
aaee2c94 2584 spin_lock(&kvm->mmu_lock);
f05e70ac 2585 list_for_each_entry_safe(sp, node, &kvm->arch.active_mmu_pages, link)
07385413
MT
2586 if (kvm_mmu_zap_page(kvm, sp))
2587 node = container_of(kvm->arch.active_mmu_pages.next,
2588 struct kvm_mmu_page, link);
aaee2c94 2589 spin_unlock(&kvm->mmu_lock);
e0fa826f 2590
90cb0529 2591 kvm_flush_remote_tlbs(kvm);
e0fa826f
DL
2592}
2593
8b2cf73c 2594static void kvm_mmu_remove_one_alloc_mmu_page(struct kvm *kvm)
3ee16c81
IE
2595{
2596 struct kvm_mmu_page *page;
2597
2598 page = container_of(kvm->arch.active_mmu_pages.prev,
2599 struct kvm_mmu_page, link);
2600 kvm_mmu_zap_page(kvm, page);
2601}
2602
2603static int mmu_shrink(int nr_to_scan, gfp_t gfp_mask)
2604{
2605 struct kvm *kvm;
2606 struct kvm *kvm_freed = NULL;
2607 int cache_count = 0;
2608
2609 spin_lock(&kvm_lock);
2610
2611 list_for_each_entry(kvm, &vm_list, vm_list) {
2612 int npages;
2613
5a4c9288
MT
2614 if (!down_read_trylock(&kvm->slots_lock))
2615 continue;
3ee16c81
IE
2616 spin_lock(&kvm->mmu_lock);
2617 npages = kvm->arch.n_alloc_mmu_pages -
2618 kvm->arch.n_free_mmu_pages;
2619 cache_count += npages;
2620 if (!kvm_freed && nr_to_scan > 0 && npages > 0) {
2621 kvm_mmu_remove_one_alloc_mmu_page(kvm);
2622 cache_count--;
2623 kvm_freed = kvm;
2624 }
2625 nr_to_scan--;
2626
2627 spin_unlock(&kvm->mmu_lock);
5a4c9288 2628 up_read(&kvm->slots_lock);
3ee16c81
IE
2629 }
2630 if (kvm_freed)
2631 list_move_tail(&kvm_freed->vm_list, &vm_list);
2632
2633 spin_unlock(&kvm_lock);
2634
2635 return cache_count;
2636}
2637
2638static struct shrinker mmu_shrinker = {
2639 .shrink = mmu_shrink,
2640 .seeks = DEFAULT_SEEKS * 10,
2641};
2642
2ddfd20e 2643static void mmu_destroy_caches(void)
b5a33a75
AK
2644{
2645 if (pte_chain_cache)
2646 kmem_cache_destroy(pte_chain_cache);
2647 if (rmap_desc_cache)
2648 kmem_cache_destroy(rmap_desc_cache);
d3d25b04
AK
2649 if (mmu_page_header_cache)
2650 kmem_cache_destroy(mmu_page_header_cache);
b5a33a75
AK
2651}
2652
3ee16c81
IE
2653void kvm_mmu_module_exit(void)
2654{
2655 mmu_destroy_caches();
2656 unregister_shrinker(&mmu_shrinker);
2657}
2658
b5a33a75
AK
2659int kvm_mmu_module_init(void)
2660{
2661 pte_chain_cache = kmem_cache_create("kvm_pte_chain",
2662 sizeof(struct kvm_pte_chain),
20c2df83 2663 0, 0, NULL);
b5a33a75
AK
2664 if (!pte_chain_cache)
2665 goto nomem;
2666 rmap_desc_cache = kmem_cache_create("kvm_rmap_desc",
2667 sizeof(struct kvm_rmap_desc),
20c2df83 2668 0, 0, NULL);
b5a33a75
AK
2669 if (!rmap_desc_cache)
2670 goto nomem;
2671
d3d25b04
AK
2672 mmu_page_header_cache = kmem_cache_create("kvm_mmu_page_header",
2673 sizeof(struct kvm_mmu_page),
20c2df83 2674 0, 0, NULL);
d3d25b04
AK
2675 if (!mmu_page_header_cache)
2676 goto nomem;
2677
3ee16c81
IE
2678 register_shrinker(&mmu_shrinker);
2679
b5a33a75
AK
2680 return 0;
2681
2682nomem:
3ee16c81 2683 mmu_destroy_caches();
b5a33a75
AK
2684 return -ENOMEM;
2685}
2686
3ad82a7e
ZX
2687/*
2688 * Caculate mmu pages needed for kvm.
2689 */
2690unsigned int kvm_mmu_calculate_mmu_pages(struct kvm *kvm)
2691{
2692 int i;
2693 unsigned int nr_mmu_pages;
2694 unsigned int nr_pages = 0;
2695
2696 for (i = 0; i < kvm->nmemslots; i++)
2697 nr_pages += kvm->memslots[i].npages;
2698
2699 nr_mmu_pages = nr_pages * KVM_PERMILLE_MMU_PAGES / 1000;
2700 nr_mmu_pages = max(nr_mmu_pages,
2701 (unsigned int) KVM_MIN_ALLOC_MMU_PAGES);
2702
2703 return nr_mmu_pages;
2704}
2705
2f333bcb
MT
2706static void *pv_mmu_peek_buffer(struct kvm_pv_mmu_op_buffer *buffer,
2707 unsigned len)
2708{
2709 if (len > buffer->len)
2710 return NULL;
2711 return buffer->ptr;
2712}
2713
2714static void *pv_mmu_read_buffer(struct kvm_pv_mmu_op_buffer *buffer,
2715 unsigned len)
2716{
2717 void *ret;
2718
2719 ret = pv_mmu_peek_buffer(buffer, len);
2720 if (!ret)
2721 return ret;
2722 buffer->ptr += len;
2723 buffer->len -= len;
2724 buffer->processed += len;
2725 return ret;
2726}
2727
2728static int kvm_pv_mmu_write(struct kvm_vcpu *vcpu,
2729 gpa_t addr, gpa_t value)
2730{
2731 int bytes = 8;
2732 int r;
2733
2734 if (!is_long_mode(vcpu) && !is_pae(vcpu))
2735 bytes = 4;
2736
2737 r = mmu_topup_memory_caches(vcpu);
2738 if (r)
2739 return r;
2740
3200f405 2741 if (!emulator_write_phys(vcpu, addr, &value, bytes))
2f333bcb
MT
2742 return -EFAULT;
2743
2744 return 1;
2745}
2746
2747static int kvm_pv_mmu_flush_tlb(struct kvm_vcpu *vcpu)
2748{
2749 kvm_x86_ops->tlb_flush(vcpu);
6ad9f15c 2750 set_bit(KVM_REQ_MMU_SYNC, &vcpu->requests);
2f333bcb
MT
2751 return 1;
2752}
2753
2754static int kvm_pv_mmu_release_pt(struct kvm_vcpu *vcpu, gpa_t addr)
2755{
2756 spin_lock(&vcpu->kvm->mmu_lock);
2757 mmu_unshadow(vcpu->kvm, addr >> PAGE_SHIFT);
2758 spin_unlock(&vcpu->kvm->mmu_lock);
2759 return 1;
2760}
2761
2762static int kvm_pv_mmu_op_one(struct kvm_vcpu *vcpu,
2763 struct kvm_pv_mmu_op_buffer *buffer)
2764{
2765 struct kvm_mmu_op_header *header;
2766
2767 header = pv_mmu_peek_buffer(buffer, sizeof *header);
2768 if (!header)
2769 return 0;
2770 switch (header->op) {
2771 case KVM_MMU_OP_WRITE_PTE: {
2772 struct kvm_mmu_op_write_pte *wpte;
2773
2774 wpte = pv_mmu_read_buffer(buffer, sizeof *wpte);
2775 if (!wpte)
2776 return 0;
2777 return kvm_pv_mmu_write(vcpu, wpte->pte_phys,
2778 wpte->pte_val);
2779 }
2780 case KVM_MMU_OP_FLUSH_TLB: {
2781 struct kvm_mmu_op_flush_tlb *ftlb;
2782
2783 ftlb = pv_mmu_read_buffer(buffer, sizeof *ftlb);
2784 if (!ftlb)
2785 return 0;
2786 return kvm_pv_mmu_flush_tlb(vcpu);
2787 }
2788 case KVM_MMU_OP_RELEASE_PT: {
2789 struct kvm_mmu_op_release_pt *rpt;
2790
2791 rpt = pv_mmu_read_buffer(buffer, sizeof *rpt);
2792 if (!rpt)
2793 return 0;
2794 return kvm_pv_mmu_release_pt(vcpu, rpt->pt_phys);
2795 }
2796 default: return 0;
2797 }
2798}
2799
2800int kvm_pv_mmu_op(struct kvm_vcpu *vcpu, unsigned long bytes,
2801 gpa_t addr, unsigned long *ret)
2802{
2803 int r;
6ad18fba 2804 struct kvm_pv_mmu_op_buffer *buffer = &vcpu->arch.mmu_op_buffer;
2f333bcb 2805
6ad18fba
DH
2806 buffer->ptr = buffer->buf;
2807 buffer->len = min_t(unsigned long, bytes, sizeof buffer->buf);
2808 buffer->processed = 0;
2f333bcb 2809
6ad18fba 2810 r = kvm_read_guest(vcpu->kvm, addr, buffer->buf, buffer->len);
2f333bcb
MT
2811 if (r)
2812 goto out;
2813
6ad18fba
DH
2814 while (buffer->len) {
2815 r = kvm_pv_mmu_op_one(vcpu, buffer);
2f333bcb
MT
2816 if (r < 0)
2817 goto out;
2818 if (r == 0)
2819 break;
2820 }
2821
2822 r = 1;
2823out:
6ad18fba 2824 *ret = buffer->processed;
2f333bcb
MT
2825 return r;
2826}
2827
37a7d8b0
AK
2828#ifdef AUDIT
2829
2830static const char *audit_msg;
2831
2832static gva_t canonicalize(gva_t gva)
2833{
2834#ifdef CONFIG_X86_64
2835 gva = (long long)(gva << 16) >> 16;
2836#endif
2837 return gva;
2838}
2839
2840static void audit_mappings_page(struct kvm_vcpu *vcpu, u64 page_pte,
2841 gva_t va, int level)
2842{
2843 u64 *pt = __va(page_pte & PT64_BASE_ADDR_MASK);
2844 int i;
2845 gva_t va_delta = 1ul << (PAGE_SHIFT + 9 * (level - 1));
2846
2847 for (i = 0; i < PT64_ENT_PER_PAGE; ++i, va += va_delta) {
2848 u64 ent = pt[i];
2849
c7addb90 2850 if (ent == shadow_trap_nonpresent_pte)
37a7d8b0
AK
2851 continue;
2852
2853 va = canonicalize(va);
c7addb90
AK
2854 if (level > 1) {
2855 if (ent == shadow_notrap_nonpresent_pte)
2856 printk(KERN_ERR "audit: (%s) nontrapping pte"
2857 " in nonleaf level: levels %d gva %lx"
2858 " level %d pte %llx\n", audit_msg,
ad312c7c 2859 vcpu->arch.mmu.root_level, va, level, ent);
c7addb90 2860
37a7d8b0 2861 audit_mappings_page(vcpu, ent, va, level - 1);
c7addb90 2862 } else {
ad312c7c 2863 gpa_t gpa = vcpu->arch.mmu.gva_to_gpa(vcpu, va);
35149e21 2864 hpa_t hpa = (hpa_t)gpa_to_pfn(vcpu, gpa) << PAGE_SHIFT;
37a7d8b0 2865
c7addb90 2866 if (is_shadow_present_pte(ent)
37a7d8b0 2867 && (ent & PT64_BASE_ADDR_MASK) != hpa)
c7addb90
AK
2868 printk(KERN_ERR "xx audit error: (%s) levels %d"
2869 " gva %lx gpa %llx hpa %llx ent %llx %d\n",
ad312c7c 2870 audit_msg, vcpu->arch.mmu.root_level,
d77c26fc
MD
2871 va, gpa, hpa, ent,
2872 is_shadow_present_pte(ent));
c7addb90
AK
2873 else if (ent == shadow_notrap_nonpresent_pte
2874 && !is_error_hpa(hpa))
2875 printk(KERN_ERR "audit: (%s) notrap shadow,"
2876 " valid guest gva %lx\n", audit_msg, va);
35149e21 2877 kvm_release_pfn_clean(pfn);
c7addb90 2878
37a7d8b0
AK
2879 }
2880 }
2881}
2882
2883static void audit_mappings(struct kvm_vcpu *vcpu)
2884{
1ea252af 2885 unsigned i;
37a7d8b0 2886
ad312c7c
ZX
2887 if (vcpu->arch.mmu.root_level == 4)
2888 audit_mappings_page(vcpu, vcpu->arch.mmu.root_hpa, 0, 4);
37a7d8b0
AK
2889 else
2890 for (i = 0; i < 4; ++i)
ad312c7c 2891 if (vcpu->arch.mmu.pae_root[i] & PT_PRESENT_MASK)
37a7d8b0 2892 audit_mappings_page(vcpu,
ad312c7c 2893 vcpu->arch.mmu.pae_root[i],
37a7d8b0
AK
2894 i << 30,
2895 2);
2896}
2897
2898static int count_rmaps(struct kvm_vcpu *vcpu)
2899{
2900 int nmaps = 0;
2901 int i, j, k;
2902
2903 for (i = 0; i < KVM_MEMORY_SLOTS; ++i) {
2904 struct kvm_memory_slot *m = &vcpu->kvm->memslots[i];
2905 struct kvm_rmap_desc *d;
2906
2907 for (j = 0; j < m->npages; ++j) {
290fc38d 2908 unsigned long *rmapp = &m->rmap[j];
37a7d8b0 2909
290fc38d 2910 if (!*rmapp)
37a7d8b0 2911 continue;
290fc38d 2912 if (!(*rmapp & 1)) {
37a7d8b0
AK
2913 ++nmaps;
2914 continue;
2915 }
290fc38d 2916 d = (struct kvm_rmap_desc *)(*rmapp & ~1ul);
37a7d8b0
AK
2917 while (d) {
2918 for (k = 0; k < RMAP_EXT; ++k)
2919 if (d->shadow_ptes[k])
2920 ++nmaps;
2921 else
2922 break;
2923 d = d->more;
2924 }
2925 }
2926 }
2927 return nmaps;
2928}
2929
2930static int count_writable_mappings(struct kvm_vcpu *vcpu)
2931{
2932 int nmaps = 0;
4db35314 2933 struct kvm_mmu_page *sp;
37a7d8b0
AK
2934 int i;
2935
f05e70ac 2936 list_for_each_entry(sp, &vcpu->kvm->arch.active_mmu_pages, link) {
4db35314 2937 u64 *pt = sp->spt;
37a7d8b0 2938
4db35314 2939 if (sp->role.level != PT_PAGE_TABLE_LEVEL)
37a7d8b0
AK
2940 continue;
2941
2942 for (i = 0; i < PT64_ENT_PER_PAGE; ++i) {
2943 u64 ent = pt[i];
2944
2945 if (!(ent & PT_PRESENT_MASK))
2946 continue;
2947 if (!(ent & PT_WRITABLE_MASK))
2948 continue;
2949 ++nmaps;
2950 }
2951 }
2952 return nmaps;
2953}
2954
2955static void audit_rmap(struct kvm_vcpu *vcpu)
2956{
2957 int n_rmap = count_rmaps(vcpu);
2958 int n_actual = count_writable_mappings(vcpu);
2959
2960 if (n_rmap != n_actual)
2961 printk(KERN_ERR "%s: (%s) rmap %d actual %d\n",
b8688d51 2962 __func__, audit_msg, n_rmap, n_actual);
37a7d8b0
AK
2963}
2964
2965static void audit_write_protection(struct kvm_vcpu *vcpu)
2966{
4db35314 2967 struct kvm_mmu_page *sp;
290fc38d
IE
2968 struct kvm_memory_slot *slot;
2969 unsigned long *rmapp;
2970 gfn_t gfn;
37a7d8b0 2971
f05e70ac 2972 list_for_each_entry(sp, &vcpu->kvm->arch.active_mmu_pages, link) {
4db35314 2973 if (sp->role.metaphysical)
37a7d8b0
AK
2974 continue;
2975
4db35314
AK
2976 slot = gfn_to_memslot(vcpu->kvm, sp->gfn);
2977 gfn = unalias_gfn(vcpu->kvm, sp->gfn);
290fc38d
IE
2978 rmapp = &slot->rmap[gfn - slot->base_gfn];
2979 if (*rmapp)
37a7d8b0
AK
2980 printk(KERN_ERR "%s: (%s) shadow page has writable"
2981 " mappings: gfn %lx role %x\n",
b8688d51 2982 __func__, audit_msg, sp->gfn,
4db35314 2983 sp->role.word);
37a7d8b0
AK
2984 }
2985}
2986
2987static void kvm_mmu_audit(struct kvm_vcpu *vcpu, const char *msg)
2988{
2989 int olddbg = dbg;
2990
2991 dbg = 0;
2992 audit_msg = msg;
2993 audit_rmap(vcpu);
2994 audit_write_protection(vcpu);
2995 audit_mappings(vcpu);
2996 dbg = olddbg;
2997}
2998
2999#endif