KVM: MMU: collapse remote TLB flushes on root sync
[linux-block.git] / arch / x86 / kvm / mmu.c
CommitLineData
6aa8b732
AK
1/*
2 * Kernel-based Virtual Machine driver for Linux
3 *
4 * This module enables machines with Intel VT-x extensions to run virtual
5 * machines without emulation or binary translation.
6 *
7 * MMU support
8 *
9 * Copyright (C) 2006 Qumranet, Inc.
10 *
11 * Authors:
12 * Yaniv Kamay <yaniv@qumranet.com>
13 * Avi Kivity <avi@qumranet.com>
14 *
15 * This work is licensed under the terms of the GNU GPL, version 2. See
16 * the COPYING file in the top-level directory.
17 *
18 */
e495606d 19
1d737c8a 20#include "mmu.h"
e495606d 21
edf88417 22#include <linux/kvm_host.h>
6aa8b732
AK
23#include <linux/types.h>
24#include <linux/string.h>
6aa8b732
AK
25#include <linux/mm.h>
26#include <linux/highmem.h>
27#include <linux/module.h>
448353ca 28#include <linux/swap.h>
05da4558 29#include <linux/hugetlb.h>
2f333bcb 30#include <linux/compiler.h>
6aa8b732 31
e495606d
AK
32#include <asm/page.h>
33#include <asm/cmpxchg.h>
4e542370 34#include <asm/io.h>
13673a90 35#include <asm/vmx.h>
6aa8b732 36
18552672
JR
37/*
38 * When setting this variable to true it enables Two-Dimensional-Paging
39 * where the hardware walks 2 page tables:
40 * 1. the guest-virtual to guest-physical
41 * 2. while doing 1. it walks guest-physical to host-physical
42 * If the hardware supports that we don't need to do shadow paging.
43 */
2f333bcb 44bool tdp_enabled = false;
18552672 45
37a7d8b0
AK
46#undef MMU_DEBUG
47
48#undef AUDIT
49
50#ifdef AUDIT
51static void kvm_mmu_audit(struct kvm_vcpu *vcpu, const char *msg);
52#else
53static void kvm_mmu_audit(struct kvm_vcpu *vcpu, const char *msg) {}
54#endif
55
56#ifdef MMU_DEBUG
57
58#define pgprintk(x...) do { if (dbg) printk(x); } while (0)
59#define rmap_printk(x...) do { if (dbg) printk(x); } while (0)
60
61#else
62
63#define pgprintk(x...) do { } while (0)
64#define rmap_printk(x...) do { } while (0)
65
66#endif
67
68#if defined(MMU_DEBUG) || defined(AUDIT)
6ada8cca
AK
69static int dbg = 0;
70module_param(dbg, bool, 0644);
37a7d8b0 71#endif
6aa8b732 72
582801a9
MT
73static int oos_shadow = 1;
74module_param(oos_shadow, bool, 0644);
75
d6c69ee9
YD
76#ifndef MMU_DEBUG
77#define ASSERT(x) do { } while (0)
78#else
6aa8b732
AK
79#define ASSERT(x) \
80 if (!(x)) { \
81 printk(KERN_WARNING "assertion failed %s:%d: %s\n", \
82 __FILE__, __LINE__, #x); \
83 }
d6c69ee9 84#endif
6aa8b732 85
6aa8b732
AK
86#define PT_FIRST_AVAIL_BITS_SHIFT 9
87#define PT64_SECOND_AVAIL_BITS_SHIFT 52
88
6aa8b732
AK
89#define VALID_PAGE(x) ((x) != INVALID_PAGE)
90
91#define PT64_LEVEL_BITS 9
92
93#define PT64_LEVEL_SHIFT(level) \
d77c26fc 94 (PAGE_SHIFT + (level - 1) * PT64_LEVEL_BITS)
6aa8b732
AK
95
96#define PT64_LEVEL_MASK(level) \
97 (((1ULL << PT64_LEVEL_BITS) - 1) << PT64_LEVEL_SHIFT(level))
98
99#define PT64_INDEX(address, level)\
100 (((address) >> PT64_LEVEL_SHIFT(level)) & ((1 << PT64_LEVEL_BITS) - 1))
101
102
103#define PT32_LEVEL_BITS 10
104
105#define PT32_LEVEL_SHIFT(level) \
d77c26fc 106 (PAGE_SHIFT + (level - 1) * PT32_LEVEL_BITS)
6aa8b732
AK
107
108#define PT32_LEVEL_MASK(level) \
109 (((1ULL << PT32_LEVEL_BITS) - 1) << PT32_LEVEL_SHIFT(level))
110
111#define PT32_INDEX(address, level)\
112 (((address) >> PT32_LEVEL_SHIFT(level)) & ((1 << PT32_LEVEL_BITS) - 1))
113
114
27aba766 115#define PT64_BASE_ADDR_MASK (((1ULL << 52) - 1) & ~(u64)(PAGE_SIZE-1))
6aa8b732
AK
116#define PT64_DIR_BASE_ADDR_MASK \
117 (PT64_BASE_ADDR_MASK & ~((1ULL << (PAGE_SHIFT + PT64_LEVEL_BITS)) - 1))
118
119#define PT32_BASE_ADDR_MASK PAGE_MASK
120#define PT32_DIR_BASE_ADDR_MASK \
121 (PAGE_MASK & ~((1ULL << (PAGE_SHIFT + PT32_LEVEL_BITS)) - 1))
122
79539cec
AK
123#define PT64_PERM_MASK (PT_PRESENT_MASK | PT_WRITABLE_MASK | PT_USER_MASK \
124 | PT64_NX_MASK)
6aa8b732
AK
125
126#define PFERR_PRESENT_MASK (1U << 0)
127#define PFERR_WRITE_MASK (1U << 1)
128#define PFERR_USER_MASK (1U << 2)
73b1087e 129#define PFERR_FETCH_MASK (1U << 4)
6aa8b732 130
6aa8b732
AK
131#define PT_DIRECTORY_LEVEL 2
132#define PT_PAGE_TABLE_LEVEL 1
133
cd4a4e53
AK
134#define RMAP_EXT 4
135
fe135d2c
AK
136#define ACC_EXEC_MASK 1
137#define ACC_WRITE_MASK PT_WRITABLE_MASK
138#define ACC_USER_MASK PT_USER_MASK
139#define ACC_ALL (ACC_EXEC_MASK | ACC_WRITE_MASK | ACC_USER_MASK)
140
135f8c2b
AK
141#define SHADOW_PT_INDEX(addr, level) PT64_INDEX(addr, level)
142
cd4a4e53
AK
143struct kvm_rmap_desc {
144 u64 *shadow_ptes[RMAP_EXT];
145 struct kvm_rmap_desc *more;
146};
147
3d000db5
AK
148struct kvm_shadow_walk {
149 int (*entry)(struct kvm_shadow_walk *walk, struct kvm_vcpu *vcpu,
d40a1ee4 150 u64 addr, u64 *spte, int level);
3d000db5
AK
151};
152
4731d4c7
MT
153struct kvm_unsync_walk {
154 int (*entry) (struct kvm_mmu_page *sp, struct kvm_unsync_walk *walk);
155};
156
ad8cfbe3
MT
157typedef int (*mmu_parent_walk_fn) (struct kvm_vcpu *vcpu, struct kvm_mmu_page *sp);
158
b5a33a75
AK
159static struct kmem_cache *pte_chain_cache;
160static struct kmem_cache *rmap_desc_cache;
d3d25b04 161static struct kmem_cache *mmu_page_header_cache;
b5a33a75 162
c7addb90
AK
163static u64 __read_mostly shadow_trap_nonpresent_pte;
164static u64 __read_mostly shadow_notrap_nonpresent_pte;
7b52345e
SY
165static u64 __read_mostly shadow_base_present_pte;
166static u64 __read_mostly shadow_nx_mask;
167static u64 __read_mostly shadow_x_mask; /* mutual exclusive with nx_mask */
168static u64 __read_mostly shadow_user_mask;
169static u64 __read_mostly shadow_accessed_mask;
170static u64 __read_mostly shadow_dirty_mask;
64d4d521 171static u64 __read_mostly shadow_mt_mask;
c7addb90
AK
172
173void kvm_mmu_set_nonpresent_ptes(u64 trap_pte, u64 notrap_pte)
174{
175 shadow_trap_nonpresent_pte = trap_pte;
176 shadow_notrap_nonpresent_pte = notrap_pte;
177}
178EXPORT_SYMBOL_GPL(kvm_mmu_set_nonpresent_ptes);
179
7b52345e
SY
180void kvm_mmu_set_base_ptes(u64 base_pte)
181{
182 shadow_base_present_pte = base_pte;
183}
184EXPORT_SYMBOL_GPL(kvm_mmu_set_base_ptes);
185
186void kvm_mmu_set_mask_ptes(u64 user_mask, u64 accessed_mask,
64d4d521 187 u64 dirty_mask, u64 nx_mask, u64 x_mask, u64 mt_mask)
7b52345e
SY
188{
189 shadow_user_mask = user_mask;
190 shadow_accessed_mask = accessed_mask;
191 shadow_dirty_mask = dirty_mask;
192 shadow_nx_mask = nx_mask;
193 shadow_x_mask = x_mask;
64d4d521 194 shadow_mt_mask = mt_mask;
7b52345e
SY
195}
196EXPORT_SYMBOL_GPL(kvm_mmu_set_mask_ptes);
197
6aa8b732
AK
198static int is_write_protection(struct kvm_vcpu *vcpu)
199{
ad312c7c 200 return vcpu->arch.cr0 & X86_CR0_WP;
6aa8b732
AK
201}
202
203static int is_cpuid_PSE36(void)
204{
205 return 1;
206}
207
73b1087e
AK
208static int is_nx(struct kvm_vcpu *vcpu)
209{
ad312c7c 210 return vcpu->arch.shadow_efer & EFER_NX;
73b1087e
AK
211}
212
6aa8b732
AK
213static int is_present_pte(unsigned long pte)
214{
215 return pte & PT_PRESENT_MASK;
216}
217
c7addb90
AK
218static int is_shadow_present_pte(u64 pte)
219{
c7addb90
AK
220 return pte != shadow_trap_nonpresent_pte
221 && pte != shadow_notrap_nonpresent_pte;
222}
223
05da4558
MT
224static int is_large_pte(u64 pte)
225{
226 return pte & PT_PAGE_SIZE_MASK;
227}
228
6aa8b732
AK
229static int is_writeble_pte(unsigned long pte)
230{
231 return pte & PT_WRITABLE_MASK;
232}
233
e3c5e7ec
AK
234static int is_dirty_pte(unsigned long pte)
235{
7b52345e 236 return pte & shadow_dirty_mask;
e3c5e7ec
AK
237}
238
cd4a4e53
AK
239static int is_rmap_pte(u64 pte)
240{
4b1a80fa 241 return is_shadow_present_pte(pte);
cd4a4e53
AK
242}
243
35149e21 244static pfn_t spte_to_pfn(u64 pte)
0b49ea86 245{
35149e21 246 return (pte & PT64_BASE_ADDR_MASK) >> PAGE_SHIFT;
0b49ea86
AK
247}
248
da928521
AK
249static gfn_t pse36_gfn_delta(u32 gpte)
250{
251 int shift = 32 - PT32_DIR_PSE36_SHIFT - PAGE_SHIFT;
252
253 return (gpte & PT32_DIR_PSE36_MASK) << shift;
254}
255
e663ee64
AK
256static void set_shadow_pte(u64 *sptep, u64 spte)
257{
258#ifdef CONFIG_X86_64
259 set_64bit((unsigned long *)sptep, spte);
260#else
261 set_64bit((unsigned long long *)sptep, spte);
262#endif
263}
264
e2dec939 265static int mmu_topup_memory_cache(struct kvm_mmu_memory_cache *cache,
2e3e5882 266 struct kmem_cache *base_cache, int min)
714b93da
AK
267{
268 void *obj;
269
270 if (cache->nobjs >= min)
e2dec939 271 return 0;
714b93da 272 while (cache->nobjs < ARRAY_SIZE(cache->objects)) {
2e3e5882 273 obj = kmem_cache_zalloc(base_cache, GFP_KERNEL);
714b93da 274 if (!obj)
e2dec939 275 return -ENOMEM;
714b93da
AK
276 cache->objects[cache->nobjs++] = obj;
277 }
e2dec939 278 return 0;
714b93da
AK
279}
280
281static void mmu_free_memory_cache(struct kvm_mmu_memory_cache *mc)
282{
283 while (mc->nobjs)
284 kfree(mc->objects[--mc->nobjs]);
285}
286
c1158e63 287static int mmu_topup_memory_cache_page(struct kvm_mmu_memory_cache *cache,
2e3e5882 288 int min)
c1158e63
AK
289{
290 struct page *page;
291
292 if (cache->nobjs >= min)
293 return 0;
294 while (cache->nobjs < ARRAY_SIZE(cache->objects)) {
2e3e5882 295 page = alloc_page(GFP_KERNEL);
c1158e63
AK
296 if (!page)
297 return -ENOMEM;
298 set_page_private(page, 0);
299 cache->objects[cache->nobjs++] = page_address(page);
300 }
301 return 0;
302}
303
304static void mmu_free_memory_cache_page(struct kvm_mmu_memory_cache *mc)
305{
306 while (mc->nobjs)
c4d198d5 307 free_page((unsigned long)mc->objects[--mc->nobjs]);
c1158e63
AK
308}
309
2e3e5882 310static int mmu_topup_memory_caches(struct kvm_vcpu *vcpu)
714b93da 311{
e2dec939
AK
312 int r;
313
ad312c7c 314 r = mmu_topup_memory_cache(&vcpu->arch.mmu_pte_chain_cache,
2e3e5882 315 pte_chain_cache, 4);
e2dec939
AK
316 if (r)
317 goto out;
ad312c7c 318 r = mmu_topup_memory_cache(&vcpu->arch.mmu_rmap_desc_cache,
c41ef344 319 rmap_desc_cache, 4);
d3d25b04
AK
320 if (r)
321 goto out;
ad312c7c 322 r = mmu_topup_memory_cache_page(&vcpu->arch.mmu_page_cache, 8);
d3d25b04
AK
323 if (r)
324 goto out;
ad312c7c 325 r = mmu_topup_memory_cache(&vcpu->arch.mmu_page_header_cache,
2e3e5882 326 mmu_page_header_cache, 4);
e2dec939
AK
327out:
328 return r;
714b93da
AK
329}
330
331static void mmu_free_memory_caches(struct kvm_vcpu *vcpu)
332{
ad312c7c
ZX
333 mmu_free_memory_cache(&vcpu->arch.mmu_pte_chain_cache);
334 mmu_free_memory_cache(&vcpu->arch.mmu_rmap_desc_cache);
335 mmu_free_memory_cache_page(&vcpu->arch.mmu_page_cache);
336 mmu_free_memory_cache(&vcpu->arch.mmu_page_header_cache);
714b93da
AK
337}
338
339static void *mmu_memory_cache_alloc(struct kvm_mmu_memory_cache *mc,
340 size_t size)
341{
342 void *p;
343
344 BUG_ON(!mc->nobjs);
345 p = mc->objects[--mc->nobjs];
346 memset(p, 0, size);
347 return p;
348}
349
714b93da
AK
350static struct kvm_pte_chain *mmu_alloc_pte_chain(struct kvm_vcpu *vcpu)
351{
ad312c7c 352 return mmu_memory_cache_alloc(&vcpu->arch.mmu_pte_chain_cache,
714b93da
AK
353 sizeof(struct kvm_pte_chain));
354}
355
90cb0529 356static void mmu_free_pte_chain(struct kvm_pte_chain *pc)
714b93da 357{
90cb0529 358 kfree(pc);
714b93da
AK
359}
360
361static struct kvm_rmap_desc *mmu_alloc_rmap_desc(struct kvm_vcpu *vcpu)
362{
ad312c7c 363 return mmu_memory_cache_alloc(&vcpu->arch.mmu_rmap_desc_cache,
714b93da
AK
364 sizeof(struct kvm_rmap_desc));
365}
366
90cb0529 367static void mmu_free_rmap_desc(struct kvm_rmap_desc *rd)
714b93da 368{
90cb0529 369 kfree(rd);
714b93da
AK
370}
371
05da4558
MT
372/*
373 * Return the pointer to the largepage write count for a given
374 * gfn, handling slots that are not large page aligned.
375 */
376static int *slot_largepage_idx(gfn_t gfn, struct kvm_memory_slot *slot)
377{
378 unsigned long idx;
379
380 idx = (gfn / KVM_PAGES_PER_HPAGE) -
381 (slot->base_gfn / KVM_PAGES_PER_HPAGE);
382 return &slot->lpage_info[idx].write_count;
383}
384
385static void account_shadowed(struct kvm *kvm, gfn_t gfn)
386{
387 int *write_count;
388
2843099f
IE
389 gfn = unalias_gfn(kvm, gfn);
390 write_count = slot_largepage_idx(gfn,
391 gfn_to_memslot_unaliased(kvm, gfn));
05da4558 392 *write_count += 1;
05da4558
MT
393}
394
395static void unaccount_shadowed(struct kvm *kvm, gfn_t gfn)
396{
397 int *write_count;
398
2843099f
IE
399 gfn = unalias_gfn(kvm, gfn);
400 write_count = slot_largepage_idx(gfn,
401 gfn_to_memslot_unaliased(kvm, gfn));
05da4558
MT
402 *write_count -= 1;
403 WARN_ON(*write_count < 0);
404}
405
406static int has_wrprotected_page(struct kvm *kvm, gfn_t gfn)
407{
2843099f 408 struct kvm_memory_slot *slot;
05da4558
MT
409 int *largepage_idx;
410
2843099f
IE
411 gfn = unalias_gfn(kvm, gfn);
412 slot = gfn_to_memslot_unaliased(kvm, gfn);
05da4558
MT
413 if (slot) {
414 largepage_idx = slot_largepage_idx(gfn, slot);
415 return *largepage_idx;
416 }
417
418 return 1;
419}
420
421static int host_largepage_backed(struct kvm *kvm, gfn_t gfn)
422{
423 struct vm_area_struct *vma;
424 unsigned long addr;
4c2155ce 425 int ret = 0;
05da4558
MT
426
427 addr = gfn_to_hva(kvm, gfn);
428 if (kvm_is_error_hva(addr))
4c2155ce 429 return ret;
05da4558 430
4c2155ce 431 down_read(&current->mm->mmap_sem);
05da4558
MT
432 vma = find_vma(current->mm, addr);
433 if (vma && is_vm_hugetlb_page(vma))
4c2155ce
MT
434 ret = 1;
435 up_read(&current->mm->mmap_sem);
05da4558 436
4c2155ce 437 return ret;
05da4558
MT
438}
439
440static int is_largepage_backed(struct kvm_vcpu *vcpu, gfn_t large_gfn)
441{
442 struct kvm_memory_slot *slot;
443
444 if (has_wrprotected_page(vcpu->kvm, large_gfn))
445 return 0;
446
447 if (!host_largepage_backed(vcpu->kvm, large_gfn))
448 return 0;
449
450 slot = gfn_to_memslot(vcpu->kvm, large_gfn);
451 if (slot && slot->dirty_bitmap)
452 return 0;
453
454 return 1;
455}
456
290fc38d
IE
457/*
458 * Take gfn and return the reverse mapping to it.
459 * Note: gfn must be unaliased before this function get called
460 */
461
05da4558 462static unsigned long *gfn_to_rmap(struct kvm *kvm, gfn_t gfn, int lpage)
290fc38d
IE
463{
464 struct kvm_memory_slot *slot;
05da4558 465 unsigned long idx;
290fc38d
IE
466
467 slot = gfn_to_memslot(kvm, gfn);
05da4558
MT
468 if (!lpage)
469 return &slot->rmap[gfn - slot->base_gfn];
470
471 idx = (gfn / KVM_PAGES_PER_HPAGE) -
472 (slot->base_gfn / KVM_PAGES_PER_HPAGE);
473
474 return &slot->lpage_info[idx].rmap_pde;
290fc38d
IE
475}
476
cd4a4e53
AK
477/*
478 * Reverse mapping data structures:
479 *
290fc38d
IE
480 * If rmapp bit zero is zero, then rmapp point to the shadw page table entry
481 * that points to page_address(page).
cd4a4e53 482 *
290fc38d
IE
483 * If rmapp bit zero is one, (then rmap & ~1) points to a struct kvm_rmap_desc
484 * containing more mappings.
cd4a4e53 485 */
05da4558 486static void rmap_add(struct kvm_vcpu *vcpu, u64 *spte, gfn_t gfn, int lpage)
cd4a4e53 487{
4db35314 488 struct kvm_mmu_page *sp;
cd4a4e53 489 struct kvm_rmap_desc *desc;
290fc38d 490 unsigned long *rmapp;
cd4a4e53
AK
491 int i;
492
493 if (!is_rmap_pte(*spte))
494 return;
290fc38d 495 gfn = unalias_gfn(vcpu->kvm, gfn);
4db35314
AK
496 sp = page_header(__pa(spte));
497 sp->gfns[spte - sp->spt] = gfn;
05da4558 498 rmapp = gfn_to_rmap(vcpu->kvm, gfn, lpage);
290fc38d 499 if (!*rmapp) {
cd4a4e53 500 rmap_printk("rmap_add: %p %llx 0->1\n", spte, *spte);
290fc38d
IE
501 *rmapp = (unsigned long)spte;
502 } else if (!(*rmapp & 1)) {
cd4a4e53 503 rmap_printk("rmap_add: %p %llx 1->many\n", spte, *spte);
714b93da 504 desc = mmu_alloc_rmap_desc(vcpu);
290fc38d 505 desc->shadow_ptes[0] = (u64 *)*rmapp;
cd4a4e53 506 desc->shadow_ptes[1] = spte;
290fc38d 507 *rmapp = (unsigned long)desc | 1;
cd4a4e53
AK
508 } else {
509 rmap_printk("rmap_add: %p %llx many->many\n", spte, *spte);
290fc38d 510 desc = (struct kvm_rmap_desc *)(*rmapp & ~1ul);
cd4a4e53
AK
511 while (desc->shadow_ptes[RMAP_EXT-1] && desc->more)
512 desc = desc->more;
513 if (desc->shadow_ptes[RMAP_EXT-1]) {
714b93da 514 desc->more = mmu_alloc_rmap_desc(vcpu);
cd4a4e53
AK
515 desc = desc->more;
516 }
517 for (i = 0; desc->shadow_ptes[i]; ++i)
518 ;
519 desc->shadow_ptes[i] = spte;
520 }
521}
522
290fc38d 523static void rmap_desc_remove_entry(unsigned long *rmapp,
cd4a4e53
AK
524 struct kvm_rmap_desc *desc,
525 int i,
526 struct kvm_rmap_desc *prev_desc)
527{
528 int j;
529
530 for (j = RMAP_EXT - 1; !desc->shadow_ptes[j] && j > i; --j)
531 ;
532 desc->shadow_ptes[i] = desc->shadow_ptes[j];
11718b4d 533 desc->shadow_ptes[j] = NULL;
cd4a4e53
AK
534 if (j != 0)
535 return;
536 if (!prev_desc && !desc->more)
290fc38d 537 *rmapp = (unsigned long)desc->shadow_ptes[0];
cd4a4e53
AK
538 else
539 if (prev_desc)
540 prev_desc->more = desc->more;
541 else
290fc38d 542 *rmapp = (unsigned long)desc->more | 1;
90cb0529 543 mmu_free_rmap_desc(desc);
cd4a4e53
AK
544}
545
290fc38d 546static void rmap_remove(struct kvm *kvm, u64 *spte)
cd4a4e53 547{
cd4a4e53
AK
548 struct kvm_rmap_desc *desc;
549 struct kvm_rmap_desc *prev_desc;
4db35314 550 struct kvm_mmu_page *sp;
35149e21 551 pfn_t pfn;
290fc38d 552 unsigned long *rmapp;
cd4a4e53
AK
553 int i;
554
555 if (!is_rmap_pte(*spte))
556 return;
4db35314 557 sp = page_header(__pa(spte));
35149e21 558 pfn = spte_to_pfn(*spte);
7b52345e 559 if (*spte & shadow_accessed_mask)
35149e21 560 kvm_set_pfn_accessed(pfn);
b4231d61 561 if (is_writeble_pte(*spte))
35149e21 562 kvm_release_pfn_dirty(pfn);
b4231d61 563 else
35149e21 564 kvm_release_pfn_clean(pfn);
05da4558 565 rmapp = gfn_to_rmap(kvm, sp->gfns[spte - sp->spt], is_large_pte(*spte));
290fc38d 566 if (!*rmapp) {
cd4a4e53
AK
567 printk(KERN_ERR "rmap_remove: %p %llx 0->BUG\n", spte, *spte);
568 BUG();
290fc38d 569 } else if (!(*rmapp & 1)) {
cd4a4e53 570 rmap_printk("rmap_remove: %p %llx 1->0\n", spte, *spte);
290fc38d 571 if ((u64 *)*rmapp != spte) {
cd4a4e53
AK
572 printk(KERN_ERR "rmap_remove: %p %llx 1->BUG\n",
573 spte, *spte);
574 BUG();
575 }
290fc38d 576 *rmapp = 0;
cd4a4e53
AK
577 } else {
578 rmap_printk("rmap_remove: %p %llx many->many\n", spte, *spte);
290fc38d 579 desc = (struct kvm_rmap_desc *)(*rmapp & ~1ul);
cd4a4e53
AK
580 prev_desc = NULL;
581 while (desc) {
582 for (i = 0; i < RMAP_EXT && desc->shadow_ptes[i]; ++i)
583 if (desc->shadow_ptes[i] == spte) {
290fc38d 584 rmap_desc_remove_entry(rmapp,
714b93da 585 desc, i,
cd4a4e53
AK
586 prev_desc);
587 return;
588 }
589 prev_desc = desc;
590 desc = desc->more;
591 }
592 BUG();
593 }
594}
595
98348e95 596static u64 *rmap_next(struct kvm *kvm, unsigned long *rmapp, u64 *spte)
374cbac0 597{
374cbac0 598 struct kvm_rmap_desc *desc;
98348e95
IE
599 struct kvm_rmap_desc *prev_desc;
600 u64 *prev_spte;
601 int i;
602
603 if (!*rmapp)
604 return NULL;
605 else if (!(*rmapp & 1)) {
606 if (!spte)
607 return (u64 *)*rmapp;
608 return NULL;
609 }
610 desc = (struct kvm_rmap_desc *)(*rmapp & ~1ul);
611 prev_desc = NULL;
612 prev_spte = NULL;
613 while (desc) {
614 for (i = 0; i < RMAP_EXT && desc->shadow_ptes[i]; ++i) {
615 if (prev_spte == spte)
616 return desc->shadow_ptes[i];
617 prev_spte = desc->shadow_ptes[i];
618 }
619 desc = desc->more;
620 }
621 return NULL;
622}
623
b1a36821 624static int rmap_write_protect(struct kvm *kvm, u64 gfn)
98348e95 625{
290fc38d 626 unsigned long *rmapp;
374cbac0 627 u64 *spte;
caa5b8a5 628 int write_protected = 0;
374cbac0 629
4a4c9924 630 gfn = unalias_gfn(kvm, gfn);
05da4558 631 rmapp = gfn_to_rmap(kvm, gfn, 0);
374cbac0 632
98348e95
IE
633 spte = rmap_next(kvm, rmapp, NULL);
634 while (spte) {
374cbac0 635 BUG_ON(!spte);
374cbac0 636 BUG_ON(!(*spte & PT_PRESENT_MASK));
374cbac0 637 rmap_printk("rmap_write_protect: spte %p %llx\n", spte, *spte);
caa5b8a5 638 if (is_writeble_pte(*spte)) {
9647c14c 639 set_shadow_pte(spte, *spte & ~PT_WRITABLE_MASK);
caa5b8a5
ED
640 write_protected = 1;
641 }
9647c14c 642 spte = rmap_next(kvm, rmapp, spte);
374cbac0 643 }
855149aa 644 if (write_protected) {
35149e21 645 pfn_t pfn;
855149aa
IE
646
647 spte = rmap_next(kvm, rmapp, NULL);
35149e21
AL
648 pfn = spte_to_pfn(*spte);
649 kvm_set_pfn_dirty(pfn);
855149aa
IE
650 }
651
05da4558
MT
652 /* check for huge page mappings */
653 rmapp = gfn_to_rmap(kvm, gfn, 1);
654 spte = rmap_next(kvm, rmapp, NULL);
655 while (spte) {
656 BUG_ON(!spte);
657 BUG_ON(!(*spte & PT_PRESENT_MASK));
658 BUG_ON((*spte & (PT_PAGE_SIZE_MASK|PT_PRESENT_MASK)) != (PT_PAGE_SIZE_MASK|PT_PRESENT_MASK));
659 pgprintk("rmap_write_protect(large): spte %p %llx %lld\n", spte, *spte, gfn);
660 if (is_writeble_pte(*spte)) {
661 rmap_remove(kvm, spte);
662 --kvm->stat.lpages;
663 set_shadow_pte(spte, shadow_trap_nonpresent_pte);
6597ca09 664 spte = NULL;
05da4558
MT
665 write_protected = 1;
666 }
667 spte = rmap_next(kvm, rmapp, spte);
668 }
669
b1a36821 670 return write_protected;
374cbac0
AK
671}
672
e930bffe
AA
673static int kvm_unmap_rmapp(struct kvm *kvm, unsigned long *rmapp)
674{
675 u64 *spte;
676 int need_tlb_flush = 0;
677
678 while ((spte = rmap_next(kvm, rmapp, NULL))) {
679 BUG_ON(!(*spte & PT_PRESENT_MASK));
680 rmap_printk("kvm_rmap_unmap_hva: spte %p %llx\n", spte, *spte);
681 rmap_remove(kvm, spte);
682 set_shadow_pte(spte, shadow_trap_nonpresent_pte);
683 need_tlb_flush = 1;
684 }
685 return need_tlb_flush;
686}
687
688static int kvm_handle_hva(struct kvm *kvm, unsigned long hva,
689 int (*handler)(struct kvm *kvm, unsigned long *rmapp))
690{
691 int i;
692 int retval = 0;
693
694 /*
695 * If mmap_sem isn't taken, we can look the memslots with only
696 * the mmu_lock by skipping over the slots with userspace_addr == 0.
697 */
698 for (i = 0; i < kvm->nmemslots; i++) {
699 struct kvm_memory_slot *memslot = &kvm->memslots[i];
700 unsigned long start = memslot->userspace_addr;
701 unsigned long end;
702
703 /* mmu_lock protects userspace_addr */
704 if (!start)
705 continue;
706
707 end = start + (memslot->npages << PAGE_SHIFT);
708 if (hva >= start && hva < end) {
709 gfn_t gfn_offset = (hva - start) >> PAGE_SHIFT;
710 retval |= handler(kvm, &memslot->rmap[gfn_offset]);
711 retval |= handler(kvm,
712 &memslot->lpage_info[
713 gfn_offset /
714 KVM_PAGES_PER_HPAGE].rmap_pde);
715 }
716 }
717
718 return retval;
719}
720
721int kvm_unmap_hva(struct kvm *kvm, unsigned long hva)
722{
723 return kvm_handle_hva(kvm, hva, kvm_unmap_rmapp);
724}
725
726static int kvm_age_rmapp(struct kvm *kvm, unsigned long *rmapp)
727{
728 u64 *spte;
729 int young = 0;
730
534e38b4
SY
731 /* always return old for EPT */
732 if (!shadow_accessed_mask)
733 return 0;
734
e930bffe
AA
735 spte = rmap_next(kvm, rmapp, NULL);
736 while (spte) {
737 int _young;
738 u64 _spte = *spte;
739 BUG_ON(!(_spte & PT_PRESENT_MASK));
740 _young = _spte & PT_ACCESSED_MASK;
741 if (_young) {
742 young = 1;
743 clear_bit(PT_ACCESSED_SHIFT, (unsigned long *)spte);
744 }
745 spte = rmap_next(kvm, rmapp, spte);
746 }
747 return young;
748}
749
750int kvm_age_hva(struct kvm *kvm, unsigned long hva)
751{
752 return kvm_handle_hva(kvm, hva, kvm_age_rmapp);
753}
754
d6c69ee9 755#ifdef MMU_DEBUG
47ad8e68 756static int is_empty_shadow_page(u64 *spt)
6aa8b732 757{
139bdb2d
AK
758 u64 *pos;
759 u64 *end;
760
47ad8e68 761 for (pos = spt, end = pos + PAGE_SIZE / sizeof(u64); pos != end; pos++)
3c915510 762 if (is_shadow_present_pte(*pos)) {
b8688d51 763 printk(KERN_ERR "%s: %p %llx\n", __func__,
139bdb2d 764 pos, *pos);
6aa8b732 765 return 0;
139bdb2d 766 }
6aa8b732
AK
767 return 1;
768}
d6c69ee9 769#endif
6aa8b732 770
4db35314 771static void kvm_mmu_free_page(struct kvm *kvm, struct kvm_mmu_page *sp)
260746c0 772{
4db35314
AK
773 ASSERT(is_empty_shadow_page(sp->spt));
774 list_del(&sp->link);
775 __free_page(virt_to_page(sp->spt));
776 __free_page(virt_to_page(sp->gfns));
777 kfree(sp);
f05e70ac 778 ++kvm->arch.n_free_mmu_pages;
260746c0
AK
779}
780
cea0f0e7
AK
781static unsigned kvm_page_table_hashfn(gfn_t gfn)
782{
1ae0a13d 783 return gfn & ((1 << KVM_MMU_HASH_SHIFT) - 1);
cea0f0e7
AK
784}
785
25c0de2c
AK
786static struct kvm_mmu_page *kvm_mmu_alloc_page(struct kvm_vcpu *vcpu,
787 u64 *parent_pte)
6aa8b732 788{
4db35314 789 struct kvm_mmu_page *sp;
6aa8b732 790
ad312c7c
ZX
791 sp = mmu_memory_cache_alloc(&vcpu->arch.mmu_page_header_cache, sizeof *sp);
792 sp->spt = mmu_memory_cache_alloc(&vcpu->arch.mmu_page_cache, PAGE_SIZE);
793 sp->gfns = mmu_memory_cache_alloc(&vcpu->arch.mmu_page_cache, PAGE_SIZE);
4db35314 794 set_page_private(virt_to_page(sp->spt), (unsigned long)sp);
f05e70ac 795 list_add(&sp->link, &vcpu->kvm->arch.active_mmu_pages);
4db35314 796 ASSERT(is_empty_shadow_page(sp->spt));
291f26bc 797 bitmap_zero(sp->slot_bitmap, KVM_MEMORY_SLOTS + KVM_PRIVATE_MEM_SLOTS);
4db35314
AK
798 sp->multimapped = 0;
799 sp->parent_pte = parent_pte;
f05e70ac 800 --vcpu->kvm->arch.n_free_mmu_pages;
4db35314 801 return sp;
6aa8b732
AK
802}
803
714b93da 804static void mmu_page_add_parent_pte(struct kvm_vcpu *vcpu,
4db35314 805 struct kvm_mmu_page *sp, u64 *parent_pte)
cea0f0e7
AK
806{
807 struct kvm_pte_chain *pte_chain;
808 struct hlist_node *node;
809 int i;
810
811 if (!parent_pte)
812 return;
4db35314
AK
813 if (!sp->multimapped) {
814 u64 *old = sp->parent_pte;
cea0f0e7
AK
815
816 if (!old) {
4db35314 817 sp->parent_pte = parent_pte;
cea0f0e7
AK
818 return;
819 }
4db35314 820 sp->multimapped = 1;
714b93da 821 pte_chain = mmu_alloc_pte_chain(vcpu);
4db35314
AK
822 INIT_HLIST_HEAD(&sp->parent_ptes);
823 hlist_add_head(&pte_chain->link, &sp->parent_ptes);
cea0f0e7
AK
824 pte_chain->parent_ptes[0] = old;
825 }
4db35314 826 hlist_for_each_entry(pte_chain, node, &sp->parent_ptes, link) {
cea0f0e7
AK
827 if (pte_chain->parent_ptes[NR_PTE_CHAIN_ENTRIES-1])
828 continue;
829 for (i = 0; i < NR_PTE_CHAIN_ENTRIES; ++i)
830 if (!pte_chain->parent_ptes[i]) {
831 pte_chain->parent_ptes[i] = parent_pte;
832 return;
833 }
834 }
714b93da 835 pte_chain = mmu_alloc_pte_chain(vcpu);
cea0f0e7 836 BUG_ON(!pte_chain);
4db35314 837 hlist_add_head(&pte_chain->link, &sp->parent_ptes);
cea0f0e7
AK
838 pte_chain->parent_ptes[0] = parent_pte;
839}
840
4db35314 841static void mmu_page_remove_parent_pte(struct kvm_mmu_page *sp,
cea0f0e7
AK
842 u64 *parent_pte)
843{
844 struct kvm_pte_chain *pte_chain;
845 struct hlist_node *node;
846 int i;
847
4db35314
AK
848 if (!sp->multimapped) {
849 BUG_ON(sp->parent_pte != parent_pte);
850 sp->parent_pte = NULL;
cea0f0e7
AK
851 return;
852 }
4db35314 853 hlist_for_each_entry(pte_chain, node, &sp->parent_ptes, link)
cea0f0e7
AK
854 for (i = 0; i < NR_PTE_CHAIN_ENTRIES; ++i) {
855 if (!pte_chain->parent_ptes[i])
856 break;
857 if (pte_chain->parent_ptes[i] != parent_pte)
858 continue;
697fe2e2
AK
859 while (i + 1 < NR_PTE_CHAIN_ENTRIES
860 && pte_chain->parent_ptes[i + 1]) {
cea0f0e7
AK
861 pte_chain->parent_ptes[i]
862 = pte_chain->parent_ptes[i + 1];
863 ++i;
864 }
865 pte_chain->parent_ptes[i] = NULL;
697fe2e2
AK
866 if (i == 0) {
867 hlist_del(&pte_chain->link);
90cb0529 868 mmu_free_pte_chain(pte_chain);
4db35314
AK
869 if (hlist_empty(&sp->parent_ptes)) {
870 sp->multimapped = 0;
871 sp->parent_pte = NULL;
697fe2e2
AK
872 }
873 }
cea0f0e7
AK
874 return;
875 }
876 BUG();
877}
878
ad8cfbe3
MT
879
880static void mmu_parent_walk(struct kvm_vcpu *vcpu, struct kvm_mmu_page *sp,
881 mmu_parent_walk_fn fn)
882{
883 struct kvm_pte_chain *pte_chain;
884 struct hlist_node *node;
885 struct kvm_mmu_page *parent_sp;
886 int i;
887
888 if (!sp->multimapped && sp->parent_pte) {
889 parent_sp = page_header(__pa(sp->parent_pte));
890 fn(vcpu, parent_sp);
891 mmu_parent_walk(vcpu, parent_sp, fn);
892 return;
893 }
894 hlist_for_each_entry(pte_chain, node, &sp->parent_ptes, link)
895 for (i = 0; i < NR_PTE_CHAIN_ENTRIES; ++i) {
896 if (!pte_chain->parent_ptes[i])
897 break;
898 parent_sp = page_header(__pa(pte_chain->parent_ptes[i]));
899 fn(vcpu, parent_sp);
900 mmu_parent_walk(vcpu, parent_sp, fn);
901 }
902}
903
0074ff63
MT
904static void kvm_mmu_update_unsync_bitmap(u64 *spte)
905{
906 unsigned int index;
907 struct kvm_mmu_page *sp = page_header(__pa(spte));
908
909 index = spte - sp->spt;
60c8aec6
MT
910 if (!__test_and_set_bit(index, sp->unsync_child_bitmap))
911 sp->unsync_children++;
912 WARN_ON(!sp->unsync_children);
0074ff63
MT
913}
914
915static void kvm_mmu_update_parents_unsync(struct kvm_mmu_page *sp)
916{
917 struct kvm_pte_chain *pte_chain;
918 struct hlist_node *node;
919 int i;
920
921 if (!sp->parent_pte)
922 return;
923
924 if (!sp->multimapped) {
925 kvm_mmu_update_unsync_bitmap(sp->parent_pte);
926 return;
927 }
928
929 hlist_for_each_entry(pte_chain, node, &sp->parent_ptes, link)
930 for (i = 0; i < NR_PTE_CHAIN_ENTRIES; ++i) {
931 if (!pte_chain->parent_ptes[i])
932 break;
933 kvm_mmu_update_unsync_bitmap(pte_chain->parent_ptes[i]);
934 }
935}
936
937static int unsync_walk_fn(struct kvm_vcpu *vcpu, struct kvm_mmu_page *sp)
938{
0074ff63
MT
939 kvm_mmu_update_parents_unsync(sp);
940 return 1;
941}
942
943static void kvm_mmu_mark_parents_unsync(struct kvm_vcpu *vcpu,
944 struct kvm_mmu_page *sp)
945{
946 mmu_parent_walk(vcpu, sp, unsync_walk_fn);
947 kvm_mmu_update_parents_unsync(sp);
948}
949
d761a501
AK
950static void nonpaging_prefetch_page(struct kvm_vcpu *vcpu,
951 struct kvm_mmu_page *sp)
952{
953 int i;
954
955 for (i = 0; i < PT64_ENT_PER_PAGE; ++i)
956 sp->spt[i] = shadow_trap_nonpresent_pte;
957}
958
e8bc217a
MT
959static int nonpaging_sync_page(struct kvm_vcpu *vcpu,
960 struct kvm_mmu_page *sp)
961{
962 return 1;
963}
964
a7052897
MT
965static void nonpaging_invlpg(struct kvm_vcpu *vcpu, gva_t gva)
966{
967}
968
60c8aec6
MT
969#define KVM_PAGE_ARRAY_NR 16
970
971struct kvm_mmu_pages {
972 struct mmu_page_and_offset {
973 struct kvm_mmu_page *sp;
974 unsigned int idx;
975 } page[KVM_PAGE_ARRAY_NR];
976 unsigned int nr;
977};
978
0074ff63
MT
979#define for_each_unsync_children(bitmap, idx) \
980 for (idx = find_first_bit(bitmap, 512); \
981 idx < 512; \
982 idx = find_next_bit(bitmap, 512, idx+1))
983
60c8aec6
MT
984int mmu_pages_add(struct kvm_mmu_pages *pvec, struct kvm_mmu_page *sp,
985 int idx)
4731d4c7 986{
60c8aec6 987 int i;
4731d4c7 988
60c8aec6
MT
989 if (sp->unsync)
990 for (i=0; i < pvec->nr; i++)
991 if (pvec->page[i].sp == sp)
992 return 0;
993
994 pvec->page[pvec->nr].sp = sp;
995 pvec->page[pvec->nr].idx = idx;
996 pvec->nr++;
997 return (pvec->nr == KVM_PAGE_ARRAY_NR);
998}
999
1000static int __mmu_unsync_walk(struct kvm_mmu_page *sp,
1001 struct kvm_mmu_pages *pvec)
1002{
1003 int i, ret, nr_unsync_leaf = 0;
4731d4c7 1004
0074ff63 1005 for_each_unsync_children(sp->unsync_child_bitmap, i) {
4731d4c7
MT
1006 u64 ent = sp->spt[i];
1007
1008 if (is_shadow_present_pte(ent)) {
1009 struct kvm_mmu_page *child;
1010 child = page_header(ent & PT64_BASE_ADDR_MASK);
1011
1012 if (child->unsync_children) {
60c8aec6
MT
1013 if (mmu_pages_add(pvec, child, i))
1014 return -ENOSPC;
1015
1016 ret = __mmu_unsync_walk(child, pvec);
1017 if (!ret)
1018 __clear_bit(i, sp->unsync_child_bitmap);
1019 else if (ret > 0)
1020 nr_unsync_leaf += ret;
1021 else
4731d4c7
MT
1022 return ret;
1023 }
1024
1025 if (child->unsync) {
60c8aec6
MT
1026 nr_unsync_leaf++;
1027 if (mmu_pages_add(pvec, child, i))
1028 return -ENOSPC;
4731d4c7
MT
1029 }
1030 }
1031 }
1032
0074ff63 1033 if (find_first_bit(sp->unsync_child_bitmap, 512) == 512)
4731d4c7
MT
1034 sp->unsync_children = 0;
1035
60c8aec6
MT
1036 return nr_unsync_leaf;
1037}
1038
1039static int mmu_unsync_walk(struct kvm_mmu_page *sp,
1040 struct kvm_mmu_pages *pvec)
1041{
1042 if (!sp->unsync_children)
1043 return 0;
1044
1045 mmu_pages_add(pvec, sp, 0);
1046 return __mmu_unsync_walk(sp, pvec);
4731d4c7
MT
1047}
1048
4db35314 1049static struct kvm_mmu_page *kvm_mmu_lookup_page(struct kvm *kvm, gfn_t gfn)
cea0f0e7
AK
1050{
1051 unsigned index;
1052 struct hlist_head *bucket;
4db35314 1053 struct kvm_mmu_page *sp;
cea0f0e7
AK
1054 struct hlist_node *node;
1055
b8688d51 1056 pgprintk("%s: looking for gfn %lx\n", __func__, gfn);
1ae0a13d 1057 index = kvm_page_table_hashfn(gfn);
f05e70ac 1058 bucket = &kvm->arch.mmu_page_hash[index];
4db35314 1059 hlist_for_each_entry(sp, node, bucket, hash_link)
2e53d63a
MT
1060 if (sp->gfn == gfn && !sp->role.metaphysical
1061 && !sp->role.invalid) {
cea0f0e7 1062 pgprintk("%s: found role %x\n",
b8688d51 1063 __func__, sp->role.word);
4db35314 1064 return sp;
cea0f0e7
AK
1065 }
1066 return NULL;
1067}
1068
4731d4c7
MT
1069static void kvm_unlink_unsync_page(struct kvm *kvm, struct kvm_mmu_page *sp)
1070{
1071 WARN_ON(!sp->unsync);
1072 sp->unsync = 0;
1073 --kvm->stat.mmu_unsync;
1074}
1075
1076static int kvm_mmu_zap_page(struct kvm *kvm, struct kvm_mmu_page *sp);
1077
1078static int kvm_sync_page(struct kvm_vcpu *vcpu, struct kvm_mmu_page *sp)
1079{
1080 if (sp->role.glevels != vcpu->arch.mmu.root_level) {
1081 kvm_mmu_zap_page(vcpu->kvm, sp);
1082 return 1;
1083 }
1084
b1a36821
MT
1085 if (rmap_write_protect(vcpu->kvm, sp->gfn))
1086 kvm_flush_remote_tlbs(vcpu->kvm);
0c0f40bd 1087 kvm_unlink_unsync_page(vcpu->kvm, sp);
4731d4c7
MT
1088 if (vcpu->arch.mmu.sync_page(vcpu, sp)) {
1089 kvm_mmu_zap_page(vcpu->kvm, sp);
1090 return 1;
1091 }
1092
1093 kvm_mmu_flush_tlb(vcpu);
4731d4c7
MT
1094 return 0;
1095}
1096
60c8aec6
MT
1097struct mmu_page_path {
1098 struct kvm_mmu_page *parent[PT64_ROOT_LEVEL-1];
1099 unsigned int idx[PT64_ROOT_LEVEL-1];
4731d4c7
MT
1100};
1101
60c8aec6
MT
1102#define for_each_sp(pvec, sp, parents, i) \
1103 for (i = mmu_pages_next(&pvec, &parents, -1), \
1104 sp = pvec.page[i].sp; \
1105 i < pvec.nr && ({ sp = pvec.page[i].sp; 1;}); \
1106 i = mmu_pages_next(&pvec, &parents, i))
1107
1108int mmu_pages_next(struct kvm_mmu_pages *pvec, struct mmu_page_path *parents,
1109 int i)
1110{
1111 int n;
1112
1113 for (n = i+1; n < pvec->nr; n++) {
1114 struct kvm_mmu_page *sp = pvec->page[n].sp;
1115
1116 if (sp->role.level == PT_PAGE_TABLE_LEVEL) {
1117 parents->idx[0] = pvec->page[n].idx;
1118 return n;
1119 }
1120
1121 parents->parent[sp->role.level-2] = sp;
1122 parents->idx[sp->role.level-1] = pvec->page[n].idx;
1123 }
1124
1125 return n;
1126}
1127
1128void mmu_pages_clear_parents(struct mmu_page_path *parents)
4731d4c7 1129{
60c8aec6
MT
1130 struct kvm_mmu_page *sp;
1131 unsigned int level = 0;
1132
1133 do {
1134 unsigned int idx = parents->idx[level];
4731d4c7 1135
60c8aec6
MT
1136 sp = parents->parent[level];
1137 if (!sp)
1138 return;
1139
1140 --sp->unsync_children;
1141 WARN_ON((int)sp->unsync_children < 0);
1142 __clear_bit(idx, sp->unsync_child_bitmap);
1143 level++;
1144 } while (level < PT64_ROOT_LEVEL-1 && !sp->unsync_children);
4731d4c7
MT
1145}
1146
60c8aec6
MT
1147static void kvm_mmu_pages_init(struct kvm_mmu_page *parent,
1148 struct mmu_page_path *parents,
1149 struct kvm_mmu_pages *pvec)
4731d4c7 1150{
60c8aec6
MT
1151 parents->parent[parent->role.level-1] = NULL;
1152 pvec->nr = 0;
1153}
4731d4c7 1154
60c8aec6
MT
1155static void mmu_sync_children(struct kvm_vcpu *vcpu,
1156 struct kvm_mmu_page *parent)
1157{
1158 int i;
1159 struct kvm_mmu_page *sp;
1160 struct mmu_page_path parents;
1161 struct kvm_mmu_pages pages;
1162
1163 kvm_mmu_pages_init(parent, &parents, &pages);
1164 while (mmu_unsync_walk(parent, &pages)) {
b1a36821
MT
1165 int protected = 0;
1166
1167 for_each_sp(pages, sp, parents, i)
1168 protected |= rmap_write_protect(vcpu->kvm, sp->gfn);
1169
1170 if (protected)
1171 kvm_flush_remote_tlbs(vcpu->kvm);
1172
60c8aec6
MT
1173 for_each_sp(pages, sp, parents, i) {
1174 kvm_sync_page(vcpu, sp);
1175 mmu_pages_clear_parents(&parents);
1176 }
4731d4c7 1177 cond_resched_lock(&vcpu->kvm->mmu_lock);
60c8aec6
MT
1178 kvm_mmu_pages_init(parent, &parents, &pages);
1179 }
4731d4c7
MT
1180}
1181
cea0f0e7
AK
1182static struct kvm_mmu_page *kvm_mmu_get_page(struct kvm_vcpu *vcpu,
1183 gfn_t gfn,
1184 gva_t gaddr,
1185 unsigned level,
1186 int metaphysical,
41074d07 1187 unsigned access,
f7d9c7b7 1188 u64 *parent_pte)
cea0f0e7
AK
1189{
1190 union kvm_mmu_page_role role;
1191 unsigned index;
1192 unsigned quadrant;
1193 struct hlist_head *bucket;
4db35314 1194 struct kvm_mmu_page *sp;
4731d4c7 1195 struct hlist_node *node, *tmp;
cea0f0e7
AK
1196
1197 role.word = 0;
ad312c7c 1198 role.glevels = vcpu->arch.mmu.root_level;
cea0f0e7
AK
1199 role.level = level;
1200 role.metaphysical = metaphysical;
41074d07 1201 role.access = access;
ad312c7c 1202 if (vcpu->arch.mmu.root_level <= PT32_ROOT_LEVEL) {
cea0f0e7
AK
1203 quadrant = gaddr >> (PAGE_SHIFT + (PT64_PT_BITS * level));
1204 quadrant &= (1 << ((PT32_PT_BITS - PT64_PT_BITS) * level)) - 1;
1205 role.quadrant = quadrant;
1206 }
b8688d51 1207 pgprintk("%s: looking gfn %lx role %x\n", __func__,
cea0f0e7 1208 gfn, role.word);
1ae0a13d 1209 index = kvm_page_table_hashfn(gfn);
f05e70ac 1210 bucket = &vcpu->kvm->arch.mmu_page_hash[index];
4731d4c7
MT
1211 hlist_for_each_entry_safe(sp, node, tmp, bucket, hash_link)
1212 if (sp->gfn == gfn) {
1213 if (sp->unsync)
1214 if (kvm_sync_page(vcpu, sp))
1215 continue;
1216
1217 if (sp->role.word != role.word)
1218 continue;
1219
4db35314 1220 mmu_page_add_parent_pte(vcpu, sp, parent_pte);
0074ff63
MT
1221 if (sp->unsync_children) {
1222 set_bit(KVM_REQ_MMU_SYNC, &vcpu->requests);
1223 kvm_mmu_mark_parents_unsync(vcpu, sp);
1224 }
b8688d51 1225 pgprintk("%s: found\n", __func__);
4db35314 1226 return sp;
cea0f0e7 1227 }
dfc5aa00 1228 ++vcpu->kvm->stat.mmu_cache_miss;
4db35314
AK
1229 sp = kvm_mmu_alloc_page(vcpu, parent_pte);
1230 if (!sp)
1231 return sp;
b8688d51 1232 pgprintk("%s: adding gfn %lx role %x\n", __func__, gfn, role.word);
4db35314
AK
1233 sp->gfn = gfn;
1234 sp->role = role;
1235 hlist_add_head(&sp->hash_link, bucket);
4731d4c7 1236 if (!metaphysical) {
b1a36821
MT
1237 if (rmap_write_protect(vcpu->kvm, gfn))
1238 kvm_flush_remote_tlbs(vcpu->kvm);
4731d4c7
MT
1239 account_shadowed(vcpu->kvm, gfn);
1240 }
131d8279
AK
1241 if (shadow_trap_nonpresent_pte != shadow_notrap_nonpresent_pte)
1242 vcpu->arch.mmu.prefetch_page(vcpu, sp);
1243 else
1244 nonpaging_prefetch_page(vcpu, sp);
4db35314 1245 return sp;
cea0f0e7
AK
1246}
1247
3d000db5 1248static int walk_shadow(struct kvm_shadow_walk *walker,
d40a1ee4 1249 struct kvm_vcpu *vcpu, u64 addr)
3d000db5
AK
1250{
1251 hpa_t shadow_addr;
1252 int level;
1253 int r;
1254 u64 *sptep;
1255 unsigned index;
1256
1257 shadow_addr = vcpu->arch.mmu.root_hpa;
1258 level = vcpu->arch.mmu.shadow_root_level;
1259 if (level == PT32E_ROOT_LEVEL) {
1260 shadow_addr = vcpu->arch.mmu.pae_root[(addr >> 30) & 3];
1261 shadow_addr &= PT64_BASE_ADDR_MASK;
1262 --level;
1263 }
1264
1265 while (level >= PT_PAGE_TABLE_LEVEL) {
1266 index = SHADOW_PT_INDEX(addr, level);
1267 sptep = ((u64 *)__va(shadow_addr)) + index;
1268 r = walker->entry(walker, vcpu, addr, sptep, level);
1269 if (r)
1270 return r;
1271 shadow_addr = *sptep & PT64_BASE_ADDR_MASK;
1272 --level;
1273 }
1274 return 0;
1275}
1276
90cb0529 1277static void kvm_mmu_page_unlink_children(struct kvm *kvm,
4db35314 1278 struct kvm_mmu_page *sp)
a436036b 1279{
697fe2e2
AK
1280 unsigned i;
1281 u64 *pt;
1282 u64 ent;
1283
4db35314 1284 pt = sp->spt;
697fe2e2 1285
4db35314 1286 if (sp->role.level == PT_PAGE_TABLE_LEVEL) {
697fe2e2 1287 for (i = 0; i < PT64_ENT_PER_PAGE; ++i) {
c7addb90 1288 if (is_shadow_present_pte(pt[i]))
290fc38d 1289 rmap_remove(kvm, &pt[i]);
c7addb90 1290 pt[i] = shadow_trap_nonpresent_pte;
697fe2e2
AK
1291 }
1292 return;
1293 }
1294
1295 for (i = 0; i < PT64_ENT_PER_PAGE; ++i) {
1296 ent = pt[i];
1297
05da4558
MT
1298 if (is_shadow_present_pte(ent)) {
1299 if (!is_large_pte(ent)) {
1300 ent &= PT64_BASE_ADDR_MASK;
1301 mmu_page_remove_parent_pte(page_header(ent),
1302 &pt[i]);
1303 } else {
1304 --kvm->stat.lpages;
1305 rmap_remove(kvm, &pt[i]);
1306 }
1307 }
c7addb90 1308 pt[i] = shadow_trap_nonpresent_pte;
697fe2e2 1309 }
a436036b
AK
1310}
1311
4db35314 1312static void kvm_mmu_put_page(struct kvm_mmu_page *sp, u64 *parent_pte)
cea0f0e7 1313{
4db35314 1314 mmu_page_remove_parent_pte(sp, parent_pte);
a436036b
AK
1315}
1316
12b7d28f
AK
1317static void kvm_mmu_reset_last_pte_updated(struct kvm *kvm)
1318{
1319 int i;
1320
1321 for (i = 0; i < KVM_MAX_VCPUS; ++i)
1322 if (kvm->vcpus[i])
ad312c7c 1323 kvm->vcpus[i]->arch.last_pte_updated = NULL;
12b7d28f
AK
1324}
1325
31aa2b44 1326static void kvm_mmu_unlink_parents(struct kvm *kvm, struct kvm_mmu_page *sp)
a436036b
AK
1327{
1328 u64 *parent_pte;
1329
4db35314
AK
1330 while (sp->multimapped || sp->parent_pte) {
1331 if (!sp->multimapped)
1332 parent_pte = sp->parent_pte;
a436036b
AK
1333 else {
1334 struct kvm_pte_chain *chain;
1335
4db35314 1336 chain = container_of(sp->parent_ptes.first,
a436036b
AK
1337 struct kvm_pte_chain, link);
1338 parent_pte = chain->parent_ptes[0];
1339 }
697fe2e2 1340 BUG_ON(!parent_pte);
4db35314 1341 kvm_mmu_put_page(sp, parent_pte);
c7addb90 1342 set_shadow_pte(parent_pte, shadow_trap_nonpresent_pte);
a436036b 1343 }
31aa2b44
AK
1344}
1345
60c8aec6
MT
1346static int mmu_zap_unsync_children(struct kvm *kvm,
1347 struct kvm_mmu_page *parent)
4731d4c7 1348{
60c8aec6
MT
1349 int i, zapped = 0;
1350 struct mmu_page_path parents;
1351 struct kvm_mmu_pages pages;
4731d4c7 1352
60c8aec6 1353 if (parent->role.level == PT_PAGE_TABLE_LEVEL)
4731d4c7 1354 return 0;
60c8aec6
MT
1355
1356 kvm_mmu_pages_init(parent, &parents, &pages);
1357 while (mmu_unsync_walk(parent, &pages)) {
1358 struct kvm_mmu_page *sp;
1359
1360 for_each_sp(pages, sp, parents, i) {
1361 kvm_mmu_zap_page(kvm, sp);
1362 mmu_pages_clear_parents(&parents);
1363 }
1364 zapped += pages.nr;
1365 kvm_mmu_pages_init(parent, &parents, &pages);
1366 }
1367
1368 return zapped;
4731d4c7
MT
1369}
1370
07385413 1371static int kvm_mmu_zap_page(struct kvm *kvm, struct kvm_mmu_page *sp)
31aa2b44 1372{
4731d4c7 1373 int ret;
31aa2b44 1374 ++kvm->stat.mmu_shadow_zapped;
4731d4c7 1375 ret = mmu_zap_unsync_children(kvm, sp);
4db35314 1376 kvm_mmu_page_unlink_children(kvm, sp);
31aa2b44 1377 kvm_mmu_unlink_parents(kvm, sp);
5b5c6a5a
AK
1378 kvm_flush_remote_tlbs(kvm);
1379 if (!sp->role.invalid && !sp->role.metaphysical)
1380 unaccount_shadowed(kvm, sp->gfn);
4731d4c7
MT
1381 if (sp->unsync)
1382 kvm_unlink_unsync_page(kvm, sp);
4db35314
AK
1383 if (!sp->root_count) {
1384 hlist_del(&sp->hash_link);
1385 kvm_mmu_free_page(kvm, sp);
2e53d63a 1386 } else {
2e53d63a 1387 sp->role.invalid = 1;
5b5c6a5a 1388 list_move(&sp->link, &kvm->arch.active_mmu_pages);
2e53d63a
MT
1389 kvm_reload_remote_mmus(kvm);
1390 }
12b7d28f 1391 kvm_mmu_reset_last_pte_updated(kvm);
4731d4c7 1392 return ret;
a436036b
AK
1393}
1394
82ce2c96
IE
1395/*
1396 * Changing the number of mmu pages allocated to the vm
1397 * Note: if kvm_nr_mmu_pages is too small, you will get dead lock
1398 */
1399void kvm_mmu_change_mmu_pages(struct kvm *kvm, unsigned int kvm_nr_mmu_pages)
1400{
1401 /*
1402 * If we set the number of mmu pages to be smaller be than the
1403 * number of actived pages , we must to free some mmu pages before we
1404 * change the value
1405 */
1406
f05e70ac 1407 if ((kvm->arch.n_alloc_mmu_pages - kvm->arch.n_free_mmu_pages) >
82ce2c96 1408 kvm_nr_mmu_pages) {
f05e70ac
ZX
1409 int n_used_mmu_pages = kvm->arch.n_alloc_mmu_pages
1410 - kvm->arch.n_free_mmu_pages;
82ce2c96
IE
1411
1412 while (n_used_mmu_pages > kvm_nr_mmu_pages) {
1413 struct kvm_mmu_page *page;
1414
f05e70ac 1415 page = container_of(kvm->arch.active_mmu_pages.prev,
82ce2c96
IE
1416 struct kvm_mmu_page, link);
1417 kvm_mmu_zap_page(kvm, page);
1418 n_used_mmu_pages--;
1419 }
f05e70ac 1420 kvm->arch.n_free_mmu_pages = 0;
82ce2c96
IE
1421 }
1422 else
f05e70ac
ZX
1423 kvm->arch.n_free_mmu_pages += kvm_nr_mmu_pages
1424 - kvm->arch.n_alloc_mmu_pages;
82ce2c96 1425
f05e70ac 1426 kvm->arch.n_alloc_mmu_pages = kvm_nr_mmu_pages;
82ce2c96
IE
1427}
1428
f67a46f4 1429static int kvm_mmu_unprotect_page(struct kvm *kvm, gfn_t gfn)
a436036b
AK
1430{
1431 unsigned index;
1432 struct hlist_head *bucket;
4db35314 1433 struct kvm_mmu_page *sp;
a436036b
AK
1434 struct hlist_node *node, *n;
1435 int r;
1436
b8688d51 1437 pgprintk("%s: looking for gfn %lx\n", __func__, gfn);
a436036b 1438 r = 0;
1ae0a13d 1439 index = kvm_page_table_hashfn(gfn);
f05e70ac 1440 bucket = &kvm->arch.mmu_page_hash[index];
4db35314
AK
1441 hlist_for_each_entry_safe(sp, node, n, bucket, hash_link)
1442 if (sp->gfn == gfn && !sp->role.metaphysical) {
b8688d51 1443 pgprintk("%s: gfn %lx role %x\n", __func__, gfn,
4db35314 1444 sp->role.word);
a436036b 1445 r = 1;
07385413
MT
1446 if (kvm_mmu_zap_page(kvm, sp))
1447 n = bucket->first;
a436036b
AK
1448 }
1449 return r;
cea0f0e7
AK
1450}
1451
f67a46f4 1452static void mmu_unshadow(struct kvm *kvm, gfn_t gfn)
97a0a01e 1453{
4db35314 1454 struct kvm_mmu_page *sp;
97a0a01e 1455
4db35314 1456 while ((sp = kvm_mmu_lookup_page(kvm, gfn)) != NULL) {
b8688d51 1457 pgprintk("%s: zap %lx %x\n", __func__, gfn, sp->role.word);
4db35314 1458 kvm_mmu_zap_page(kvm, sp);
97a0a01e
AK
1459 }
1460}
1461
38c335f1 1462static void page_header_update_slot(struct kvm *kvm, void *pte, gfn_t gfn)
6aa8b732 1463{
38c335f1 1464 int slot = memslot_id(kvm, gfn_to_memslot(kvm, gfn));
4db35314 1465 struct kvm_mmu_page *sp = page_header(__pa(pte));
6aa8b732 1466
291f26bc 1467 __set_bit(slot, sp->slot_bitmap);
6aa8b732
AK
1468}
1469
6844dec6
MT
1470static void mmu_convert_notrap(struct kvm_mmu_page *sp)
1471{
1472 int i;
1473 u64 *pt = sp->spt;
1474
1475 if (shadow_trap_nonpresent_pte == shadow_notrap_nonpresent_pte)
1476 return;
1477
1478 for (i = 0; i < PT64_ENT_PER_PAGE; ++i) {
1479 if (pt[i] == shadow_notrap_nonpresent_pte)
1480 set_shadow_pte(&pt[i], shadow_trap_nonpresent_pte);
1481 }
1482}
1483
039576c0
AK
1484struct page *gva_to_page(struct kvm_vcpu *vcpu, gva_t gva)
1485{
72dc67a6
IE
1486 struct page *page;
1487
ad312c7c 1488 gpa_t gpa = vcpu->arch.mmu.gva_to_gpa(vcpu, gva);
039576c0
AK
1489
1490 if (gpa == UNMAPPED_GVA)
1491 return NULL;
72dc67a6 1492
72dc67a6 1493 page = gfn_to_page(vcpu->kvm, gpa >> PAGE_SHIFT);
72dc67a6
IE
1494
1495 return page;
039576c0
AK
1496}
1497
74be52e3
SY
1498/*
1499 * The function is based on mtrr_type_lookup() in
1500 * arch/x86/kernel/cpu/mtrr/generic.c
1501 */
1502static int get_mtrr_type(struct mtrr_state_type *mtrr_state,
1503 u64 start, u64 end)
1504{
1505 int i;
1506 u64 base, mask;
1507 u8 prev_match, curr_match;
1508 int num_var_ranges = KVM_NR_VAR_MTRR;
1509
1510 if (!mtrr_state->enabled)
1511 return 0xFF;
1512
1513 /* Make end inclusive end, instead of exclusive */
1514 end--;
1515
1516 /* Look in fixed ranges. Just return the type as per start */
1517 if (mtrr_state->have_fixed && (start < 0x100000)) {
1518 int idx;
1519
1520 if (start < 0x80000) {
1521 idx = 0;
1522 idx += (start >> 16);
1523 return mtrr_state->fixed_ranges[idx];
1524 } else if (start < 0xC0000) {
1525 idx = 1 * 8;
1526 idx += ((start - 0x80000) >> 14);
1527 return mtrr_state->fixed_ranges[idx];
1528 } else if (start < 0x1000000) {
1529 idx = 3 * 8;
1530 idx += ((start - 0xC0000) >> 12);
1531 return mtrr_state->fixed_ranges[idx];
1532 }
1533 }
1534
1535 /*
1536 * Look in variable ranges
1537 * Look of multiple ranges matching this address and pick type
1538 * as per MTRR precedence
1539 */
1540 if (!(mtrr_state->enabled & 2))
1541 return mtrr_state->def_type;
1542
1543 prev_match = 0xFF;
1544 for (i = 0; i < num_var_ranges; ++i) {
1545 unsigned short start_state, end_state;
1546
1547 if (!(mtrr_state->var_ranges[i].mask_lo & (1 << 11)))
1548 continue;
1549
1550 base = (((u64)mtrr_state->var_ranges[i].base_hi) << 32) +
1551 (mtrr_state->var_ranges[i].base_lo & PAGE_MASK);
1552 mask = (((u64)mtrr_state->var_ranges[i].mask_hi) << 32) +
1553 (mtrr_state->var_ranges[i].mask_lo & PAGE_MASK);
1554
1555 start_state = ((start & mask) == (base & mask));
1556 end_state = ((end & mask) == (base & mask));
1557 if (start_state != end_state)
1558 return 0xFE;
1559
1560 if ((start & mask) != (base & mask))
1561 continue;
1562
1563 curr_match = mtrr_state->var_ranges[i].base_lo & 0xff;
1564 if (prev_match == 0xFF) {
1565 prev_match = curr_match;
1566 continue;
1567 }
1568
1569 if (prev_match == MTRR_TYPE_UNCACHABLE ||
1570 curr_match == MTRR_TYPE_UNCACHABLE)
1571 return MTRR_TYPE_UNCACHABLE;
1572
1573 if ((prev_match == MTRR_TYPE_WRBACK &&
1574 curr_match == MTRR_TYPE_WRTHROUGH) ||
1575 (prev_match == MTRR_TYPE_WRTHROUGH &&
1576 curr_match == MTRR_TYPE_WRBACK)) {
1577 prev_match = MTRR_TYPE_WRTHROUGH;
1578 curr_match = MTRR_TYPE_WRTHROUGH;
1579 }
1580
1581 if (prev_match != curr_match)
1582 return MTRR_TYPE_UNCACHABLE;
1583 }
1584
1585 if (prev_match != 0xFF)
1586 return prev_match;
1587
1588 return mtrr_state->def_type;
1589}
1590
1591static u8 get_memory_type(struct kvm_vcpu *vcpu, gfn_t gfn)
1592{
1593 u8 mtrr;
1594
1595 mtrr = get_mtrr_type(&vcpu->arch.mtrr_state, gfn << PAGE_SHIFT,
1596 (gfn << PAGE_SHIFT) + PAGE_SIZE);
1597 if (mtrr == 0xfe || mtrr == 0xff)
1598 mtrr = MTRR_TYPE_WRBACK;
1599 return mtrr;
1600}
1601
4731d4c7
MT
1602static int kvm_unsync_page(struct kvm_vcpu *vcpu, struct kvm_mmu_page *sp)
1603{
1604 unsigned index;
1605 struct hlist_head *bucket;
1606 struct kvm_mmu_page *s;
1607 struct hlist_node *node, *n;
1608
1609 index = kvm_page_table_hashfn(sp->gfn);
1610 bucket = &vcpu->kvm->arch.mmu_page_hash[index];
1611 /* don't unsync if pagetable is shadowed with multiple roles */
1612 hlist_for_each_entry_safe(s, node, n, bucket, hash_link) {
1613 if (s->gfn != sp->gfn || s->role.metaphysical)
1614 continue;
1615 if (s->role.word != sp->role.word)
1616 return 1;
1617 }
0074ff63 1618 kvm_mmu_mark_parents_unsync(vcpu, sp);
4731d4c7
MT
1619 ++vcpu->kvm->stat.mmu_unsync;
1620 sp->unsync = 1;
1621 mmu_convert_notrap(sp);
1622 return 0;
1623}
1624
1625static int mmu_need_write_protect(struct kvm_vcpu *vcpu, gfn_t gfn,
1626 bool can_unsync)
1627{
1628 struct kvm_mmu_page *shadow;
1629
1630 shadow = kvm_mmu_lookup_page(vcpu->kvm, gfn);
1631 if (shadow) {
1632 if (shadow->role.level != PT_PAGE_TABLE_LEVEL)
1633 return 1;
1634 if (shadow->unsync)
1635 return 0;
582801a9 1636 if (can_unsync && oos_shadow)
4731d4c7
MT
1637 return kvm_unsync_page(vcpu, shadow);
1638 return 1;
1639 }
1640 return 0;
1641}
1642
1e73f9dd
MT
1643static int set_spte(struct kvm_vcpu *vcpu, u64 *shadow_pte,
1644 unsigned pte_access, int user_fault,
1645 int write_fault, int dirty, int largepage,
4731d4c7
MT
1646 gfn_t gfn, pfn_t pfn, bool speculative,
1647 bool can_unsync)
1c4f1fd6
AK
1648{
1649 u64 spte;
1e73f9dd 1650 int ret = 0;
64d4d521
SY
1651 u64 mt_mask = shadow_mt_mask;
1652
1c4f1fd6
AK
1653 /*
1654 * We don't set the accessed bit, since we sometimes want to see
1655 * whether the guest actually used the pte (in order to detect
1656 * demand paging).
1657 */
7b52345e 1658 spte = shadow_base_present_pte | shadow_dirty_mask;
947da538 1659 if (!speculative)
3201b5d9 1660 spte |= shadow_accessed_mask;
1c4f1fd6
AK
1661 if (!dirty)
1662 pte_access &= ~ACC_WRITE_MASK;
7b52345e
SY
1663 if (pte_access & ACC_EXEC_MASK)
1664 spte |= shadow_x_mask;
1665 else
1666 spte |= shadow_nx_mask;
1c4f1fd6 1667 if (pte_access & ACC_USER_MASK)
7b52345e 1668 spte |= shadow_user_mask;
05da4558
MT
1669 if (largepage)
1670 spte |= PT_PAGE_SIZE_MASK;
64d4d521
SY
1671 if (mt_mask) {
1672 mt_mask = get_memory_type(vcpu, gfn) <<
1673 kvm_x86_ops->get_mt_mask_shift();
1674 spte |= mt_mask;
1675 }
1c4f1fd6 1676
35149e21 1677 spte |= (u64)pfn << PAGE_SHIFT;
1c4f1fd6
AK
1678
1679 if ((pte_access & ACC_WRITE_MASK)
1680 || (write_fault && !is_write_protection(vcpu) && !user_fault)) {
1c4f1fd6 1681
38187c83
MT
1682 if (largepage && has_wrprotected_page(vcpu->kvm, gfn)) {
1683 ret = 1;
1684 spte = shadow_trap_nonpresent_pte;
1685 goto set_pte;
1686 }
1687
1c4f1fd6 1688 spte |= PT_WRITABLE_MASK;
1c4f1fd6 1689
ecc5589f
MT
1690 /*
1691 * Optimization: for pte sync, if spte was writable the hash
1692 * lookup is unnecessary (and expensive). Write protection
1693 * is responsibility of mmu_get_page / kvm_sync_page.
1694 * Same reasoning can be applied to dirty page accounting.
1695 */
1696 if (!can_unsync && is_writeble_pte(*shadow_pte))
1697 goto set_pte;
1698
4731d4c7 1699 if (mmu_need_write_protect(vcpu, gfn, can_unsync)) {
1c4f1fd6 1700 pgprintk("%s: found shadow page for %lx, marking ro\n",
b8688d51 1701 __func__, gfn);
1e73f9dd 1702 ret = 1;
1c4f1fd6 1703 pte_access &= ~ACC_WRITE_MASK;
a378b4e6 1704 if (is_writeble_pte(spte))
1c4f1fd6 1705 spte &= ~PT_WRITABLE_MASK;
1c4f1fd6
AK
1706 }
1707 }
1708
1c4f1fd6
AK
1709 if (pte_access & ACC_WRITE_MASK)
1710 mark_page_dirty(vcpu->kvm, gfn);
1711
38187c83 1712set_pte:
1c4f1fd6 1713 set_shadow_pte(shadow_pte, spte);
1e73f9dd
MT
1714 return ret;
1715}
1716
1e73f9dd
MT
1717static void mmu_set_spte(struct kvm_vcpu *vcpu, u64 *shadow_pte,
1718 unsigned pt_access, unsigned pte_access,
1719 int user_fault, int write_fault, int dirty,
1720 int *ptwrite, int largepage, gfn_t gfn,
1721 pfn_t pfn, bool speculative)
1722{
1723 int was_rmapped = 0;
1724 int was_writeble = is_writeble_pte(*shadow_pte);
1725
1726 pgprintk("%s: spte %llx access %x write_fault %d"
1727 " user_fault %d gfn %lx\n",
1728 __func__, *shadow_pte, pt_access,
1729 write_fault, user_fault, gfn);
1730
1731 if (is_rmap_pte(*shadow_pte)) {
1732 /*
1733 * If we overwrite a PTE page pointer with a 2MB PMD, unlink
1734 * the parent of the now unreachable PTE.
1735 */
1736 if (largepage && !is_large_pte(*shadow_pte)) {
1737 struct kvm_mmu_page *child;
1738 u64 pte = *shadow_pte;
1739
1740 child = page_header(pte & PT64_BASE_ADDR_MASK);
1741 mmu_page_remove_parent_pte(child, shadow_pte);
1742 } else if (pfn != spte_to_pfn(*shadow_pte)) {
1743 pgprintk("hfn old %lx new %lx\n",
1744 spte_to_pfn(*shadow_pte), pfn);
1745 rmap_remove(vcpu->kvm, shadow_pte);
1746 } else {
1747 if (largepage)
1748 was_rmapped = is_large_pte(*shadow_pte);
1749 else
1750 was_rmapped = 1;
1751 }
1752 }
1753 if (set_spte(vcpu, shadow_pte, pte_access, user_fault, write_fault,
4731d4c7 1754 dirty, largepage, gfn, pfn, speculative, true)) {
1e73f9dd
MT
1755 if (write_fault)
1756 *ptwrite = 1;
a378b4e6
MT
1757 kvm_x86_ops->tlb_flush(vcpu);
1758 }
1e73f9dd
MT
1759
1760 pgprintk("%s: setting spte %llx\n", __func__, *shadow_pte);
1761 pgprintk("instantiating %s PTE (%s) at %ld (%llx) addr %p\n",
1762 is_large_pte(*shadow_pte)? "2MB" : "4kB",
1763 is_present_pte(*shadow_pte)?"RW":"R", gfn,
1764 *shadow_pte, shadow_pte);
1765 if (!was_rmapped && is_large_pte(*shadow_pte))
05da4558
MT
1766 ++vcpu->kvm->stat.lpages;
1767
1c4f1fd6
AK
1768 page_header_update_slot(vcpu->kvm, shadow_pte, gfn);
1769 if (!was_rmapped) {
05da4558 1770 rmap_add(vcpu, shadow_pte, gfn, largepage);
1c4f1fd6 1771 if (!is_rmap_pte(*shadow_pte))
35149e21 1772 kvm_release_pfn_clean(pfn);
75e68e60
IE
1773 } else {
1774 if (was_writeble)
35149e21 1775 kvm_release_pfn_dirty(pfn);
75e68e60 1776 else
35149e21 1777 kvm_release_pfn_clean(pfn);
1c4f1fd6 1778 }
1b7fcd32 1779 if (speculative) {
ad312c7c 1780 vcpu->arch.last_pte_updated = shadow_pte;
1b7fcd32
AK
1781 vcpu->arch.last_pte_gfn = gfn;
1782 }
1c4f1fd6
AK
1783}
1784
6aa8b732
AK
1785static void nonpaging_new_cr3(struct kvm_vcpu *vcpu)
1786{
1787}
1788
140754bc
AK
1789struct direct_shadow_walk {
1790 struct kvm_shadow_walk walker;
1791 pfn_t pfn;
1792 int write;
1793 int largepage;
1794 int pt_write;
1795};
6aa8b732 1796
140754bc
AK
1797static int direct_map_entry(struct kvm_shadow_walk *_walk,
1798 struct kvm_vcpu *vcpu,
d40a1ee4 1799 u64 addr, u64 *sptep, int level)
140754bc
AK
1800{
1801 struct direct_shadow_walk *walk =
1802 container_of(_walk, struct direct_shadow_walk, walker);
1803 struct kvm_mmu_page *sp;
1804 gfn_t pseudo_gfn;
1805 gfn_t gfn = addr >> PAGE_SHIFT;
1806
1807 if (level == PT_PAGE_TABLE_LEVEL
1808 || (walk->largepage && level == PT_DIRECTORY_LEVEL)) {
1809 mmu_set_spte(vcpu, sptep, ACC_ALL, ACC_ALL,
1810 0, walk->write, 1, &walk->pt_write,
1811 walk->largepage, gfn, walk->pfn, false);
bc2d4299 1812 ++vcpu->stat.pf_fixed;
140754bc
AK
1813 return 1;
1814 }
6aa8b732 1815
140754bc
AK
1816 if (*sptep == shadow_trap_nonpresent_pte) {
1817 pseudo_gfn = (addr & PT64_DIR_BASE_ADDR_MASK) >> PAGE_SHIFT;
d40a1ee4 1818 sp = kvm_mmu_get_page(vcpu, pseudo_gfn, (gva_t)addr, level - 1,
140754bc
AK
1819 1, ACC_ALL, sptep);
1820 if (!sp) {
1821 pgprintk("nonpaging_map: ENOMEM\n");
1822 kvm_release_pfn_clean(walk->pfn);
1823 return -ENOMEM;
6aa8b732
AK
1824 }
1825
140754bc
AK
1826 set_shadow_pte(sptep,
1827 __pa(sp->spt)
1828 | PT_PRESENT_MASK | PT_WRITABLE_MASK
1829 | shadow_user_mask | shadow_x_mask);
6aa8b732 1830 }
140754bc
AK
1831 return 0;
1832}
1833
1834static int __direct_map(struct kvm_vcpu *vcpu, gpa_t v, int write,
1835 int largepage, gfn_t gfn, pfn_t pfn)
1836{
1837 int r;
1838 struct direct_shadow_walk walker = {
1839 .walker = { .entry = direct_map_entry, },
1840 .pfn = pfn,
1841 .largepage = largepage,
1842 .write = write,
1843 .pt_write = 0,
1844 };
1845
d40a1ee4 1846 r = walk_shadow(&walker.walker, vcpu, gfn << PAGE_SHIFT);
140754bc
AK
1847 if (r < 0)
1848 return r;
1849 return walker.pt_write;
6aa8b732
AK
1850}
1851
10589a46
MT
1852static int nonpaging_map(struct kvm_vcpu *vcpu, gva_t v, int write, gfn_t gfn)
1853{
1854 int r;
05da4558 1855 int largepage = 0;
35149e21 1856 pfn_t pfn;
e930bffe 1857 unsigned long mmu_seq;
aaee2c94 1858
05da4558
MT
1859 if (is_largepage_backed(vcpu, gfn & ~(KVM_PAGES_PER_HPAGE-1))) {
1860 gfn &= ~(KVM_PAGES_PER_HPAGE-1);
1861 largepage = 1;
1862 }
1863
e930bffe 1864 mmu_seq = vcpu->kvm->mmu_notifier_seq;
4c2155ce 1865 smp_rmb();
35149e21 1866 pfn = gfn_to_pfn(vcpu->kvm, gfn);
aaee2c94 1867
d196e343 1868 /* mmio */
35149e21
AL
1869 if (is_error_pfn(pfn)) {
1870 kvm_release_pfn_clean(pfn);
d196e343
AK
1871 return 1;
1872 }
1873
aaee2c94 1874 spin_lock(&vcpu->kvm->mmu_lock);
e930bffe
AA
1875 if (mmu_notifier_retry(vcpu, mmu_seq))
1876 goto out_unlock;
eb787d10 1877 kvm_mmu_free_some_pages(vcpu);
6c41f428 1878 r = __direct_map(vcpu, v, write, largepage, gfn, pfn);
aaee2c94
MT
1879 spin_unlock(&vcpu->kvm->mmu_lock);
1880
aaee2c94 1881
10589a46 1882 return r;
e930bffe
AA
1883
1884out_unlock:
1885 spin_unlock(&vcpu->kvm->mmu_lock);
1886 kvm_release_pfn_clean(pfn);
1887 return 0;
10589a46
MT
1888}
1889
1890
17ac10ad
AK
1891static void mmu_free_roots(struct kvm_vcpu *vcpu)
1892{
1893 int i;
4db35314 1894 struct kvm_mmu_page *sp;
17ac10ad 1895
ad312c7c 1896 if (!VALID_PAGE(vcpu->arch.mmu.root_hpa))
7b53aa56 1897 return;
aaee2c94 1898 spin_lock(&vcpu->kvm->mmu_lock);
ad312c7c
ZX
1899 if (vcpu->arch.mmu.shadow_root_level == PT64_ROOT_LEVEL) {
1900 hpa_t root = vcpu->arch.mmu.root_hpa;
17ac10ad 1901
4db35314
AK
1902 sp = page_header(root);
1903 --sp->root_count;
2e53d63a
MT
1904 if (!sp->root_count && sp->role.invalid)
1905 kvm_mmu_zap_page(vcpu->kvm, sp);
ad312c7c 1906 vcpu->arch.mmu.root_hpa = INVALID_PAGE;
aaee2c94 1907 spin_unlock(&vcpu->kvm->mmu_lock);
17ac10ad
AK
1908 return;
1909 }
17ac10ad 1910 for (i = 0; i < 4; ++i) {
ad312c7c 1911 hpa_t root = vcpu->arch.mmu.pae_root[i];
17ac10ad 1912
417726a3 1913 if (root) {
417726a3 1914 root &= PT64_BASE_ADDR_MASK;
4db35314
AK
1915 sp = page_header(root);
1916 --sp->root_count;
2e53d63a
MT
1917 if (!sp->root_count && sp->role.invalid)
1918 kvm_mmu_zap_page(vcpu->kvm, sp);
417726a3 1919 }
ad312c7c 1920 vcpu->arch.mmu.pae_root[i] = INVALID_PAGE;
17ac10ad 1921 }
aaee2c94 1922 spin_unlock(&vcpu->kvm->mmu_lock);
ad312c7c 1923 vcpu->arch.mmu.root_hpa = INVALID_PAGE;
17ac10ad
AK
1924}
1925
1926static void mmu_alloc_roots(struct kvm_vcpu *vcpu)
1927{
1928 int i;
cea0f0e7 1929 gfn_t root_gfn;
4db35314 1930 struct kvm_mmu_page *sp;
fb72d167 1931 int metaphysical = 0;
3bb65a22 1932
ad312c7c 1933 root_gfn = vcpu->arch.cr3 >> PAGE_SHIFT;
17ac10ad 1934
ad312c7c
ZX
1935 if (vcpu->arch.mmu.shadow_root_level == PT64_ROOT_LEVEL) {
1936 hpa_t root = vcpu->arch.mmu.root_hpa;
17ac10ad
AK
1937
1938 ASSERT(!VALID_PAGE(root));
fb72d167
JR
1939 if (tdp_enabled)
1940 metaphysical = 1;
4db35314 1941 sp = kvm_mmu_get_page(vcpu, root_gfn, 0,
fb72d167
JR
1942 PT64_ROOT_LEVEL, metaphysical,
1943 ACC_ALL, NULL);
4db35314
AK
1944 root = __pa(sp->spt);
1945 ++sp->root_count;
ad312c7c 1946 vcpu->arch.mmu.root_hpa = root;
17ac10ad
AK
1947 return;
1948 }
fb72d167
JR
1949 metaphysical = !is_paging(vcpu);
1950 if (tdp_enabled)
1951 metaphysical = 1;
17ac10ad 1952 for (i = 0; i < 4; ++i) {
ad312c7c 1953 hpa_t root = vcpu->arch.mmu.pae_root[i];
17ac10ad
AK
1954
1955 ASSERT(!VALID_PAGE(root));
ad312c7c
ZX
1956 if (vcpu->arch.mmu.root_level == PT32E_ROOT_LEVEL) {
1957 if (!is_present_pte(vcpu->arch.pdptrs[i])) {
1958 vcpu->arch.mmu.pae_root[i] = 0;
417726a3
AK
1959 continue;
1960 }
ad312c7c
ZX
1961 root_gfn = vcpu->arch.pdptrs[i] >> PAGE_SHIFT;
1962 } else if (vcpu->arch.mmu.root_level == 0)
cea0f0e7 1963 root_gfn = 0;
4db35314 1964 sp = kvm_mmu_get_page(vcpu, root_gfn, i << 30,
fb72d167 1965 PT32_ROOT_LEVEL, metaphysical,
f7d9c7b7 1966 ACC_ALL, NULL);
4db35314
AK
1967 root = __pa(sp->spt);
1968 ++sp->root_count;
ad312c7c 1969 vcpu->arch.mmu.pae_root[i] = root | PT_PRESENT_MASK;
17ac10ad 1970 }
ad312c7c 1971 vcpu->arch.mmu.root_hpa = __pa(vcpu->arch.mmu.pae_root);
17ac10ad
AK
1972}
1973
0ba73cda
MT
1974static void mmu_sync_roots(struct kvm_vcpu *vcpu)
1975{
1976 int i;
1977 struct kvm_mmu_page *sp;
1978
1979 if (!VALID_PAGE(vcpu->arch.mmu.root_hpa))
1980 return;
1981 if (vcpu->arch.mmu.shadow_root_level == PT64_ROOT_LEVEL) {
1982 hpa_t root = vcpu->arch.mmu.root_hpa;
1983 sp = page_header(root);
1984 mmu_sync_children(vcpu, sp);
1985 return;
1986 }
1987 for (i = 0; i < 4; ++i) {
1988 hpa_t root = vcpu->arch.mmu.pae_root[i];
1989
1990 if (root) {
1991 root &= PT64_BASE_ADDR_MASK;
1992 sp = page_header(root);
1993 mmu_sync_children(vcpu, sp);
1994 }
1995 }
1996}
1997
1998void kvm_mmu_sync_roots(struct kvm_vcpu *vcpu)
1999{
2000 spin_lock(&vcpu->kvm->mmu_lock);
2001 mmu_sync_roots(vcpu);
2002 spin_unlock(&vcpu->kvm->mmu_lock);
2003}
2004
6aa8b732
AK
2005static gpa_t nonpaging_gva_to_gpa(struct kvm_vcpu *vcpu, gva_t vaddr)
2006{
2007 return vaddr;
2008}
2009
2010static int nonpaging_page_fault(struct kvm_vcpu *vcpu, gva_t gva,
3f3e7124 2011 u32 error_code)
6aa8b732 2012{
e833240f 2013 gfn_t gfn;
e2dec939 2014 int r;
6aa8b732 2015
b8688d51 2016 pgprintk("%s: gva %lx error %x\n", __func__, gva, error_code);
e2dec939
AK
2017 r = mmu_topup_memory_caches(vcpu);
2018 if (r)
2019 return r;
714b93da 2020
6aa8b732 2021 ASSERT(vcpu);
ad312c7c 2022 ASSERT(VALID_PAGE(vcpu->arch.mmu.root_hpa));
6aa8b732 2023
e833240f 2024 gfn = gva >> PAGE_SHIFT;
6aa8b732 2025
e833240f
AK
2026 return nonpaging_map(vcpu, gva & PAGE_MASK,
2027 error_code & PFERR_WRITE_MASK, gfn);
6aa8b732
AK
2028}
2029
fb72d167
JR
2030static int tdp_page_fault(struct kvm_vcpu *vcpu, gva_t gpa,
2031 u32 error_code)
2032{
35149e21 2033 pfn_t pfn;
fb72d167 2034 int r;
05da4558
MT
2035 int largepage = 0;
2036 gfn_t gfn = gpa >> PAGE_SHIFT;
e930bffe 2037 unsigned long mmu_seq;
fb72d167
JR
2038
2039 ASSERT(vcpu);
2040 ASSERT(VALID_PAGE(vcpu->arch.mmu.root_hpa));
2041
2042 r = mmu_topup_memory_caches(vcpu);
2043 if (r)
2044 return r;
2045
05da4558
MT
2046 if (is_largepage_backed(vcpu, gfn & ~(KVM_PAGES_PER_HPAGE-1))) {
2047 gfn &= ~(KVM_PAGES_PER_HPAGE-1);
2048 largepage = 1;
2049 }
e930bffe 2050 mmu_seq = vcpu->kvm->mmu_notifier_seq;
4c2155ce 2051 smp_rmb();
35149e21 2052 pfn = gfn_to_pfn(vcpu->kvm, gfn);
35149e21
AL
2053 if (is_error_pfn(pfn)) {
2054 kvm_release_pfn_clean(pfn);
fb72d167
JR
2055 return 1;
2056 }
2057 spin_lock(&vcpu->kvm->mmu_lock);
e930bffe
AA
2058 if (mmu_notifier_retry(vcpu, mmu_seq))
2059 goto out_unlock;
fb72d167
JR
2060 kvm_mmu_free_some_pages(vcpu);
2061 r = __direct_map(vcpu, gpa, error_code & PFERR_WRITE_MASK,
6c41f428 2062 largepage, gfn, pfn);
fb72d167 2063 spin_unlock(&vcpu->kvm->mmu_lock);
fb72d167
JR
2064
2065 return r;
e930bffe
AA
2066
2067out_unlock:
2068 spin_unlock(&vcpu->kvm->mmu_lock);
2069 kvm_release_pfn_clean(pfn);
2070 return 0;
fb72d167
JR
2071}
2072
6aa8b732
AK
2073static void nonpaging_free(struct kvm_vcpu *vcpu)
2074{
17ac10ad 2075 mmu_free_roots(vcpu);
6aa8b732
AK
2076}
2077
2078static int nonpaging_init_context(struct kvm_vcpu *vcpu)
2079{
ad312c7c 2080 struct kvm_mmu *context = &vcpu->arch.mmu;
6aa8b732
AK
2081
2082 context->new_cr3 = nonpaging_new_cr3;
2083 context->page_fault = nonpaging_page_fault;
6aa8b732
AK
2084 context->gva_to_gpa = nonpaging_gva_to_gpa;
2085 context->free = nonpaging_free;
c7addb90 2086 context->prefetch_page = nonpaging_prefetch_page;
e8bc217a 2087 context->sync_page = nonpaging_sync_page;
a7052897 2088 context->invlpg = nonpaging_invlpg;
cea0f0e7 2089 context->root_level = 0;
6aa8b732 2090 context->shadow_root_level = PT32E_ROOT_LEVEL;
17c3ba9d 2091 context->root_hpa = INVALID_PAGE;
6aa8b732
AK
2092 return 0;
2093}
2094
d835dfec 2095void kvm_mmu_flush_tlb(struct kvm_vcpu *vcpu)
6aa8b732 2096{
1165f5fe 2097 ++vcpu->stat.tlb_flush;
cbdd1bea 2098 kvm_x86_ops->tlb_flush(vcpu);
6aa8b732
AK
2099}
2100
2101static void paging_new_cr3(struct kvm_vcpu *vcpu)
2102{
b8688d51 2103 pgprintk("%s: cr3 %lx\n", __func__, vcpu->arch.cr3);
cea0f0e7 2104 mmu_free_roots(vcpu);
6aa8b732
AK
2105}
2106
6aa8b732
AK
2107static void inject_page_fault(struct kvm_vcpu *vcpu,
2108 u64 addr,
2109 u32 err_code)
2110{
c3c91fee 2111 kvm_inject_page_fault(vcpu, addr, err_code);
6aa8b732
AK
2112}
2113
6aa8b732
AK
2114static void paging_free(struct kvm_vcpu *vcpu)
2115{
2116 nonpaging_free(vcpu);
2117}
2118
2119#define PTTYPE 64
2120#include "paging_tmpl.h"
2121#undef PTTYPE
2122
2123#define PTTYPE 32
2124#include "paging_tmpl.h"
2125#undef PTTYPE
2126
17ac10ad 2127static int paging64_init_context_common(struct kvm_vcpu *vcpu, int level)
6aa8b732 2128{
ad312c7c 2129 struct kvm_mmu *context = &vcpu->arch.mmu;
6aa8b732
AK
2130
2131 ASSERT(is_pae(vcpu));
2132 context->new_cr3 = paging_new_cr3;
2133 context->page_fault = paging64_page_fault;
6aa8b732 2134 context->gva_to_gpa = paging64_gva_to_gpa;
c7addb90 2135 context->prefetch_page = paging64_prefetch_page;
e8bc217a 2136 context->sync_page = paging64_sync_page;
a7052897 2137 context->invlpg = paging64_invlpg;
6aa8b732 2138 context->free = paging_free;
17ac10ad
AK
2139 context->root_level = level;
2140 context->shadow_root_level = level;
17c3ba9d 2141 context->root_hpa = INVALID_PAGE;
6aa8b732
AK
2142 return 0;
2143}
2144
17ac10ad
AK
2145static int paging64_init_context(struct kvm_vcpu *vcpu)
2146{
2147 return paging64_init_context_common(vcpu, PT64_ROOT_LEVEL);
2148}
2149
6aa8b732
AK
2150static int paging32_init_context(struct kvm_vcpu *vcpu)
2151{
ad312c7c 2152 struct kvm_mmu *context = &vcpu->arch.mmu;
6aa8b732
AK
2153
2154 context->new_cr3 = paging_new_cr3;
2155 context->page_fault = paging32_page_fault;
6aa8b732
AK
2156 context->gva_to_gpa = paging32_gva_to_gpa;
2157 context->free = paging_free;
c7addb90 2158 context->prefetch_page = paging32_prefetch_page;
e8bc217a 2159 context->sync_page = paging32_sync_page;
a7052897 2160 context->invlpg = paging32_invlpg;
6aa8b732
AK
2161 context->root_level = PT32_ROOT_LEVEL;
2162 context->shadow_root_level = PT32E_ROOT_LEVEL;
17c3ba9d 2163 context->root_hpa = INVALID_PAGE;
6aa8b732
AK
2164 return 0;
2165}
2166
2167static int paging32E_init_context(struct kvm_vcpu *vcpu)
2168{
17ac10ad 2169 return paging64_init_context_common(vcpu, PT32E_ROOT_LEVEL);
6aa8b732
AK
2170}
2171
fb72d167
JR
2172static int init_kvm_tdp_mmu(struct kvm_vcpu *vcpu)
2173{
2174 struct kvm_mmu *context = &vcpu->arch.mmu;
2175
2176 context->new_cr3 = nonpaging_new_cr3;
2177 context->page_fault = tdp_page_fault;
2178 context->free = nonpaging_free;
2179 context->prefetch_page = nonpaging_prefetch_page;
e8bc217a 2180 context->sync_page = nonpaging_sync_page;
a7052897 2181 context->invlpg = nonpaging_invlpg;
67253af5 2182 context->shadow_root_level = kvm_x86_ops->get_tdp_level();
fb72d167
JR
2183 context->root_hpa = INVALID_PAGE;
2184
2185 if (!is_paging(vcpu)) {
2186 context->gva_to_gpa = nonpaging_gva_to_gpa;
2187 context->root_level = 0;
2188 } else if (is_long_mode(vcpu)) {
2189 context->gva_to_gpa = paging64_gva_to_gpa;
2190 context->root_level = PT64_ROOT_LEVEL;
2191 } else if (is_pae(vcpu)) {
2192 context->gva_to_gpa = paging64_gva_to_gpa;
2193 context->root_level = PT32E_ROOT_LEVEL;
2194 } else {
2195 context->gva_to_gpa = paging32_gva_to_gpa;
2196 context->root_level = PT32_ROOT_LEVEL;
2197 }
2198
2199 return 0;
2200}
2201
2202static int init_kvm_softmmu(struct kvm_vcpu *vcpu)
6aa8b732
AK
2203{
2204 ASSERT(vcpu);
ad312c7c 2205 ASSERT(!VALID_PAGE(vcpu->arch.mmu.root_hpa));
6aa8b732
AK
2206
2207 if (!is_paging(vcpu))
2208 return nonpaging_init_context(vcpu);
a9058ecd 2209 else if (is_long_mode(vcpu))
6aa8b732
AK
2210 return paging64_init_context(vcpu);
2211 else if (is_pae(vcpu))
2212 return paging32E_init_context(vcpu);
2213 else
2214 return paging32_init_context(vcpu);
2215}
2216
fb72d167
JR
2217static int init_kvm_mmu(struct kvm_vcpu *vcpu)
2218{
35149e21
AL
2219 vcpu->arch.update_pte.pfn = bad_pfn;
2220
fb72d167
JR
2221 if (tdp_enabled)
2222 return init_kvm_tdp_mmu(vcpu);
2223 else
2224 return init_kvm_softmmu(vcpu);
2225}
2226
6aa8b732
AK
2227static void destroy_kvm_mmu(struct kvm_vcpu *vcpu)
2228{
2229 ASSERT(vcpu);
ad312c7c
ZX
2230 if (VALID_PAGE(vcpu->arch.mmu.root_hpa)) {
2231 vcpu->arch.mmu.free(vcpu);
2232 vcpu->arch.mmu.root_hpa = INVALID_PAGE;
6aa8b732
AK
2233 }
2234}
2235
2236int kvm_mmu_reset_context(struct kvm_vcpu *vcpu)
17c3ba9d
AK
2237{
2238 destroy_kvm_mmu(vcpu);
2239 return init_kvm_mmu(vcpu);
2240}
8668a3c4 2241EXPORT_SYMBOL_GPL(kvm_mmu_reset_context);
17c3ba9d
AK
2242
2243int kvm_mmu_load(struct kvm_vcpu *vcpu)
6aa8b732 2244{
714b93da
AK
2245 int r;
2246
e2dec939 2247 r = mmu_topup_memory_caches(vcpu);
17c3ba9d
AK
2248 if (r)
2249 goto out;
aaee2c94 2250 spin_lock(&vcpu->kvm->mmu_lock);
eb787d10 2251 kvm_mmu_free_some_pages(vcpu);
17c3ba9d 2252 mmu_alloc_roots(vcpu);
0ba73cda 2253 mmu_sync_roots(vcpu);
aaee2c94 2254 spin_unlock(&vcpu->kvm->mmu_lock);
ad312c7c 2255 kvm_x86_ops->set_cr3(vcpu, vcpu->arch.mmu.root_hpa);
17c3ba9d 2256 kvm_mmu_flush_tlb(vcpu);
714b93da
AK
2257out:
2258 return r;
6aa8b732 2259}
17c3ba9d
AK
2260EXPORT_SYMBOL_GPL(kvm_mmu_load);
2261
2262void kvm_mmu_unload(struct kvm_vcpu *vcpu)
2263{
2264 mmu_free_roots(vcpu);
2265}
6aa8b732 2266
09072daf 2267static void mmu_pte_write_zap_pte(struct kvm_vcpu *vcpu,
4db35314 2268 struct kvm_mmu_page *sp,
ac1b714e
AK
2269 u64 *spte)
2270{
2271 u64 pte;
2272 struct kvm_mmu_page *child;
2273
2274 pte = *spte;
c7addb90 2275 if (is_shadow_present_pte(pte)) {
05da4558
MT
2276 if (sp->role.level == PT_PAGE_TABLE_LEVEL ||
2277 is_large_pte(pte))
290fc38d 2278 rmap_remove(vcpu->kvm, spte);
ac1b714e
AK
2279 else {
2280 child = page_header(pte & PT64_BASE_ADDR_MASK);
90cb0529 2281 mmu_page_remove_parent_pte(child, spte);
ac1b714e
AK
2282 }
2283 }
c7addb90 2284 set_shadow_pte(spte, shadow_trap_nonpresent_pte);
05da4558
MT
2285 if (is_large_pte(pte))
2286 --vcpu->kvm->stat.lpages;
ac1b714e
AK
2287}
2288
0028425f 2289static void mmu_pte_write_new_pte(struct kvm_vcpu *vcpu,
4db35314 2290 struct kvm_mmu_page *sp,
0028425f 2291 u64 *spte,
489f1d65 2292 const void *new)
0028425f 2293{
30945387
MT
2294 if (sp->role.level != PT_PAGE_TABLE_LEVEL) {
2295 if (!vcpu->arch.update_pte.largepage ||
2296 sp->role.glevels == PT32_ROOT_LEVEL) {
2297 ++vcpu->kvm->stat.mmu_pde_zapped;
2298 return;
2299 }
2300 }
0028425f 2301
4cee5764 2302 ++vcpu->kvm->stat.mmu_pte_updated;
4db35314 2303 if (sp->role.glevels == PT32_ROOT_LEVEL)
489f1d65 2304 paging32_update_pte(vcpu, sp, spte, new);
0028425f 2305 else
489f1d65 2306 paging64_update_pte(vcpu, sp, spte, new);
0028425f
AK
2307}
2308
79539cec
AK
2309static bool need_remote_flush(u64 old, u64 new)
2310{
2311 if (!is_shadow_present_pte(old))
2312 return false;
2313 if (!is_shadow_present_pte(new))
2314 return true;
2315 if ((old ^ new) & PT64_BASE_ADDR_MASK)
2316 return true;
2317 old ^= PT64_NX_MASK;
2318 new ^= PT64_NX_MASK;
2319 return (old & ~new & PT64_PERM_MASK) != 0;
2320}
2321
2322static void mmu_pte_write_flush_tlb(struct kvm_vcpu *vcpu, u64 old, u64 new)
2323{
2324 if (need_remote_flush(old, new))
2325 kvm_flush_remote_tlbs(vcpu->kvm);
2326 else
2327 kvm_mmu_flush_tlb(vcpu);
2328}
2329
12b7d28f
AK
2330static bool last_updated_pte_accessed(struct kvm_vcpu *vcpu)
2331{
ad312c7c 2332 u64 *spte = vcpu->arch.last_pte_updated;
12b7d28f 2333
7b52345e 2334 return !!(spte && (*spte & shadow_accessed_mask));
12b7d28f
AK
2335}
2336
d7824fff
AK
2337static void mmu_guess_page_from_pte_write(struct kvm_vcpu *vcpu, gpa_t gpa,
2338 const u8 *new, int bytes)
2339{
2340 gfn_t gfn;
2341 int r;
2342 u64 gpte = 0;
35149e21 2343 pfn_t pfn;
d7824fff 2344
05da4558
MT
2345 vcpu->arch.update_pte.largepage = 0;
2346
d7824fff
AK
2347 if (bytes != 4 && bytes != 8)
2348 return;
2349
2350 /*
2351 * Assume that the pte write on a page table of the same type
2352 * as the current vcpu paging mode. This is nearly always true
2353 * (might be false while changing modes). Note it is verified later
2354 * by update_pte().
2355 */
2356 if (is_pae(vcpu)) {
2357 /* Handle a 32-bit guest writing two halves of a 64-bit gpte */
2358 if ((bytes == 4) && (gpa % 4 == 0)) {
2359 r = kvm_read_guest(vcpu->kvm, gpa & ~(u64)7, &gpte, 8);
2360 if (r)
2361 return;
2362 memcpy((void *)&gpte + (gpa % 8), new, 4);
2363 } else if ((bytes == 8) && (gpa % 8 == 0)) {
2364 memcpy((void *)&gpte, new, 8);
2365 }
2366 } else {
2367 if ((bytes == 4) && (gpa % 4 == 0))
2368 memcpy((void *)&gpte, new, 4);
2369 }
2370 if (!is_present_pte(gpte))
2371 return;
2372 gfn = (gpte & PT64_BASE_ADDR_MASK) >> PAGE_SHIFT;
72dc67a6 2373
05da4558
MT
2374 if (is_large_pte(gpte) && is_largepage_backed(vcpu, gfn)) {
2375 gfn &= ~(KVM_PAGES_PER_HPAGE-1);
2376 vcpu->arch.update_pte.largepage = 1;
2377 }
e930bffe 2378 vcpu->arch.update_pte.mmu_seq = vcpu->kvm->mmu_notifier_seq;
4c2155ce 2379 smp_rmb();
35149e21 2380 pfn = gfn_to_pfn(vcpu->kvm, gfn);
72dc67a6 2381
35149e21
AL
2382 if (is_error_pfn(pfn)) {
2383 kvm_release_pfn_clean(pfn);
d196e343
AK
2384 return;
2385 }
d7824fff 2386 vcpu->arch.update_pte.gfn = gfn;
35149e21 2387 vcpu->arch.update_pte.pfn = pfn;
d7824fff
AK
2388}
2389
1b7fcd32
AK
2390static void kvm_mmu_access_page(struct kvm_vcpu *vcpu, gfn_t gfn)
2391{
2392 u64 *spte = vcpu->arch.last_pte_updated;
2393
2394 if (spte
2395 && vcpu->arch.last_pte_gfn == gfn
2396 && shadow_accessed_mask
2397 && !(*spte & shadow_accessed_mask)
2398 && is_shadow_present_pte(*spte))
2399 set_bit(PT_ACCESSED_SHIFT, (unsigned long *)spte);
2400}
2401
09072daf 2402void kvm_mmu_pte_write(struct kvm_vcpu *vcpu, gpa_t gpa,
fe551881 2403 const u8 *new, int bytes)
da4a00f0 2404{
9b7a0325 2405 gfn_t gfn = gpa >> PAGE_SHIFT;
4db35314 2406 struct kvm_mmu_page *sp;
0e7bc4b9 2407 struct hlist_node *node, *n;
9b7a0325
AK
2408 struct hlist_head *bucket;
2409 unsigned index;
489f1d65 2410 u64 entry, gentry;
9b7a0325 2411 u64 *spte;
9b7a0325 2412 unsigned offset = offset_in_page(gpa);
0e7bc4b9 2413 unsigned pte_size;
9b7a0325 2414 unsigned page_offset;
0e7bc4b9 2415 unsigned misaligned;
fce0657f 2416 unsigned quadrant;
9b7a0325 2417 int level;
86a5ba02 2418 int flooded = 0;
ac1b714e 2419 int npte;
489f1d65 2420 int r;
9b7a0325 2421
b8688d51 2422 pgprintk("%s: gpa %llx bytes %d\n", __func__, gpa, bytes);
d7824fff 2423 mmu_guess_page_from_pte_write(vcpu, gpa, new, bytes);
aaee2c94 2424 spin_lock(&vcpu->kvm->mmu_lock);
1b7fcd32 2425 kvm_mmu_access_page(vcpu, gfn);
eb787d10 2426 kvm_mmu_free_some_pages(vcpu);
4cee5764 2427 ++vcpu->kvm->stat.mmu_pte_write;
c7addb90 2428 kvm_mmu_audit(vcpu, "pre pte write");
ad312c7c 2429 if (gfn == vcpu->arch.last_pt_write_gfn
12b7d28f 2430 && !last_updated_pte_accessed(vcpu)) {
ad312c7c
ZX
2431 ++vcpu->arch.last_pt_write_count;
2432 if (vcpu->arch.last_pt_write_count >= 3)
86a5ba02
AK
2433 flooded = 1;
2434 } else {
ad312c7c
ZX
2435 vcpu->arch.last_pt_write_gfn = gfn;
2436 vcpu->arch.last_pt_write_count = 1;
2437 vcpu->arch.last_pte_updated = NULL;
86a5ba02 2438 }
1ae0a13d 2439 index = kvm_page_table_hashfn(gfn);
f05e70ac 2440 bucket = &vcpu->kvm->arch.mmu_page_hash[index];
4db35314 2441 hlist_for_each_entry_safe(sp, node, n, bucket, hash_link) {
5b5c6a5a 2442 if (sp->gfn != gfn || sp->role.metaphysical || sp->role.invalid)
9b7a0325 2443 continue;
4db35314 2444 pte_size = sp->role.glevels == PT32_ROOT_LEVEL ? 4 : 8;
0e7bc4b9 2445 misaligned = (offset ^ (offset + bytes - 1)) & ~(pte_size - 1);
e925c5ba 2446 misaligned |= bytes < 4;
86a5ba02 2447 if (misaligned || flooded) {
0e7bc4b9
AK
2448 /*
2449 * Misaligned accesses are too much trouble to fix
2450 * up; also, they usually indicate a page is not used
2451 * as a page table.
86a5ba02
AK
2452 *
2453 * If we're seeing too many writes to a page,
2454 * it may no longer be a page table, or we may be
2455 * forking, in which case it is better to unmap the
2456 * page.
0e7bc4b9
AK
2457 */
2458 pgprintk("misaligned: gpa %llx bytes %d role %x\n",
4db35314 2459 gpa, bytes, sp->role.word);
07385413
MT
2460 if (kvm_mmu_zap_page(vcpu->kvm, sp))
2461 n = bucket->first;
4cee5764 2462 ++vcpu->kvm->stat.mmu_flooded;
0e7bc4b9
AK
2463 continue;
2464 }
9b7a0325 2465 page_offset = offset;
4db35314 2466 level = sp->role.level;
ac1b714e 2467 npte = 1;
4db35314 2468 if (sp->role.glevels == PT32_ROOT_LEVEL) {
ac1b714e
AK
2469 page_offset <<= 1; /* 32->64 */
2470 /*
2471 * A 32-bit pde maps 4MB while the shadow pdes map
2472 * only 2MB. So we need to double the offset again
2473 * and zap two pdes instead of one.
2474 */
2475 if (level == PT32_ROOT_LEVEL) {
6b8d0f9b 2476 page_offset &= ~7; /* kill rounding error */
ac1b714e
AK
2477 page_offset <<= 1;
2478 npte = 2;
2479 }
fce0657f 2480 quadrant = page_offset >> PAGE_SHIFT;
9b7a0325 2481 page_offset &= ~PAGE_MASK;
4db35314 2482 if (quadrant != sp->role.quadrant)
fce0657f 2483 continue;
9b7a0325 2484 }
4db35314 2485 spte = &sp->spt[page_offset / sizeof(*spte)];
489f1d65
DE
2486 if ((gpa & (pte_size - 1)) || (bytes < pte_size)) {
2487 gentry = 0;
2488 r = kvm_read_guest_atomic(vcpu->kvm,
2489 gpa & ~(u64)(pte_size - 1),
2490 &gentry, pte_size);
2491 new = (const void *)&gentry;
2492 if (r < 0)
2493 new = NULL;
2494 }
ac1b714e 2495 while (npte--) {
79539cec 2496 entry = *spte;
4db35314 2497 mmu_pte_write_zap_pte(vcpu, sp, spte);
489f1d65
DE
2498 if (new)
2499 mmu_pte_write_new_pte(vcpu, sp, spte, new);
79539cec 2500 mmu_pte_write_flush_tlb(vcpu, entry, *spte);
ac1b714e 2501 ++spte;
9b7a0325 2502 }
9b7a0325 2503 }
c7addb90 2504 kvm_mmu_audit(vcpu, "post pte write");
aaee2c94 2505 spin_unlock(&vcpu->kvm->mmu_lock);
35149e21
AL
2506 if (!is_error_pfn(vcpu->arch.update_pte.pfn)) {
2507 kvm_release_pfn_clean(vcpu->arch.update_pte.pfn);
2508 vcpu->arch.update_pte.pfn = bad_pfn;
d7824fff 2509 }
da4a00f0
AK
2510}
2511
a436036b
AK
2512int kvm_mmu_unprotect_page_virt(struct kvm_vcpu *vcpu, gva_t gva)
2513{
10589a46
MT
2514 gpa_t gpa;
2515 int r;
a436036b 2516
10589a46 2517 gpa = vcpu->arch.mmu.gva_to_gpa(vcpu, gva);
10589a46 2518
aaee2c94 2519 spin_lock(&vcpu->kvm->mmu_lock);
10589a46 2520 r = kvm_mmu_unprotect_page(vcpu->kvm, gpa >> PAGE_SHIFT);
aaee2c94 2521 spin_unlock(&vcpu->kvm->mmu_lock);
10589a46 2522 return r;
a436036b 2523}
577bdc49 2524EXPORT_SYMBOL_GPL(kvm_mmu_unprotect_page_virt);
a436036b 2525
22d95b12 2526void __kvm_mmu_free_some_pages(struct kvm_vcpu *vcpu)
ebeace86 2527{
f05e70ac 2528 while (vcpu->kvm->arch.n_free_mmu_pages < KVM_REFILL_PAGES) {
4db35314 2529 struct kvm_mmu_page *sp;
ebeace86 2530
f05e70ac 2531 sp = container_of(vcpu->kvm->arch.active_mmu_pages.prev,
4db35314
AK
2532 struct kvm_mmu_page, link);
2533 kvm_mmu_zap_page(vcpu->kvm, sp);
4cee5764 2534 ++vcpu->kvm->stat.mmu_recycled;
ebeace86
AK
2535 }
2536}
ebeace86 2537
3067714c
AK
2538int kvm_mmu_page_fault(struct kvm_vcpu *vcpu, gva_t cr2, u32 error_code)
2539{
2540 int r;
2541 enum emulation_result er;
2542
ad312c7c 2543 r = vcpu->arch.mmu.page_fault(vcpu, cr2, error_code);
3067714c
AK
2544 if (r < 0)
2545 goto out;
2546
2547 if (!r) {
2548 r = 1;
2549 goto out;
2550 }
2551
b733bfb5
AK
2552 r = mmu_topup_memory_caches(vcpu);
2553 if (r)
2554 goto out;
2555
3067714c 2556 er = emulate_instruction(vcpu, vcpu->run, cr2, error_code, 0);
3067714c
AK
2557
2558 switch (er) {
2559 case EMULATE_DONE:
2560 return 1;
2561 case EMULATE_DO_MMIO:
2562 ++vcpu->stat.mmio_exits;
2563 return 0;
2564 case EMULATE_FAIL:
2565 kvm_report_emulation_failure(vcpu, "pagetable");
2566 return 1;
2567 default:
2568 BUG();
2569 }
2570out:
3067714c
AK
2571 return r;
2572}
2573EXPORT_SYMBOL_GPL(kvm_mmu_page_fault);
2574
a7052897
MT
2575void kvm_mmu_invlpg(struct kvm_vcpu *vcpu, gva_t gva)
2576{
2577 spin_lock(&vcpu->kvm->mmu_lock);
2578 vcpu->arch.mmu.invlpg(vcpu, gva);
2579 spin_unlock(&vcpu->kvm->mmu_lock);
2580 kvm_mmu_flush_tlb(vcpu);
2581 ++vcpu->stat.invlpg;
2582}
2583EXPORT_SYMBOL_GPL(kvm_mmu_invlpg);
2584
18552672
JR
2585void kvm_enable_tdp(void)
2586{
2587 tdp_enabled = true;
2588}
2589EXPORT_SYMBOL_GPL(kvm_enable_tdp);
2590
5f4cb662
JR
2591void kvm_disable_tdp(void)
2592{
2593 tdp_enabled = false;
2594}
2595EXPORT_SYMBOL_GPL(kvm_disable_tdp);
2596
6aa8b732
AK
2597static void free_mmu_pages(struct kvm_vcpu *vcpu)
2598{
4db35314 2599 struct kvm_mmu_page *sp;
6aa8b732 2600
f05e70ac
ZX
2601 while (!list_empty(&vcpu->kvm->arch.active_mmu_pages)) {
2602 sp = container_of(vcpu->kvm->arch.active_mmu_pages.next,
4db35314
AK
2603 struct kvm_mmu_page, link);
2604 kvm_mmu_zap_page(vcpu->kvm, sp);
8d2d73b9 2605 cond_resched();
f51234c2 2606 }
ad312c7c 2607 free_page((unsigned long)vcpu->arch.mmu.pae_root);
6aa8b732
AK
2608}
2609
2610static int alloc_mmu_pages(struct kvm_vcpu *vcpu)
2611{
17ac10ad 2612 struct page *page;
6aa8b732
AK
2613 int i;
2614
2615 ASSERT(vcpu);
2616
f05e70ac
ZX
2617 if (vcpu->kvm->arch.n_requested_mmu_pages)
2618 vcpu->kvm->arch.n_free_mmu_pages =
2619 vcpu->kvm->arch.n_requested_mmu_pages;
82ce2c96 2620 else
f05e70ac
ZX
2621 vcpu->kvm->arch.n_free_mmu_pages =
2622 vcpu->kvm->arch.n_alloc_mmu_pages;
17ac10ad
AK
2623 /*
2624 * When emulating 32-bit mode, cr3 is only 32 bits even on x86_64.
2625 * Therefore we need to allocate shadow page tables in the first
2626 * 4GB of memory, which happens to fit the DMA32 zone.
2627 */
2628 page = alloc_page(GFP_KERNEL | __GFP_DMA32);
2629 if (!page)
2630 goto error_1;
ad312c7c 2631 vcpu->arch.mmu.pae_root = page_address(page);
17ac10ad 2632 for (i = 0; i < 4; ++i)
ad312c7c 2633 vcpu->arch.mmu.pae_root[i] = INVALID_PAGE;
17ac10ad 2634
6aa8b732
AK
2635 return 0;
2636
2637error_1:
2638 free_mmu_pages(vcpu);
2639 return -ENOMEM;
2640}
2641
8018c27b 2642int kvm_mmu_create(struct kvm_vcpu *vcpu)
6aa8b732 2643{
6aa8b732 2644 ASSERT(vcpu);
ad312c7c 2645 ASSERT(!VALID_PAGE(vcpu->arch.mmu.root_hpa));
6aa8b732 2646
8018c27b
IM
2647 return alloc_mmu_pages(vcpu);
2648}
6aa8b732 2649
8018c27b
IM
2650int kvm_mmu_setup(struct kvm_vcpu *vcpu)
2651{
2652 ASSERT(vcpu);
ad312c7c 2653 ASSERT(!VALID_PAGE(vcpu->arch.mmu.root_hpa));
2c264957 2654
8018c27b 2655 return init_kvm_mmu(vcpu);
6aa8b732
AK
2656}
2657
2658void kvm_mmu_destroy(struct kvm_vcpu *vcpu)
2659{
2660 ASSERT(vcpu);
2661
2662 destroy_kvm_mmu(vcpu);
2663 free_mmu_pages(vcpu);
714b93da 2664 mmu_free_memory_caches(vcpu);
6aa8b732
AK
2665}
2666
90cb0529 2667void kvm_mmu_slot_remove_write_access(struct kvm *kvm, int slot)
6aa8b732 2668{
4db35314 2669 struct kvm_mmu_page *sp;
6aa8b732 2670
2245a28f 2671 spin_lock(&kvm->mmu_lock);
f05e70ac 2672 list_for_each_entry(sp, &kvm->arch.active_mmu_pages, link) {
6aa8b732
AK
2673 int i;
2674 u64 *pt;
2675
291f26bc 2676 if (!test_bit(slot, sp->slot_bitmap))
6aa8b732
AK
2677 continue;
2678
4db35314 2679 pt = sp->spt;
6aa8b732
AK
2680 for (i = 0; i < PT64_ENT_PER_PAGE; ++i)
2681 /* avoid RMW */
9647c14c 2682 if (pt[i] & PT_WRITABLE_MASK)
6aa8b732 2683 pt[i] &= ~PT_WRITABLE_MASK;
6aa8b732 2684 }
171d595d 2685 kvm_flush_remote_tlbs(kvm);
2245a28f 2686 spin_unlock(&kvm->mmu_lock);
6aa8b732 2687}
37a7d8b0 2688
90cb0529 2689void kvm_mmu_zap_all(struct kvm *kvm)
e0fa826f 2690{
4db35314 2691 struct kvm_mmu_page *sp, *node;
e0fa826f 2692
aaee2c94 2693 spin_lock(&kvm->mmu_lock);
f05e70ac 2694 list_for_each_entry_safe(sp, node, &kvm->arch.active_mmu_pages, link)
07385413
MT
2695 if (kvm_mmu_zap_page(kvm, sp))
2696 node = container_of(kvm->arch.active_mmu_pages.next,
2697 struct kvm_mmu_page, link);
aaee2c94 2698 spin_unlock(&kvm->mmu_lock);
e0fa826f 2699
90cb0529 2700 kvm_flush_remote_tlbs(kvm);
e0fa826f
DL
2701}
2702
8b2cf73c 2703static void kvm_mmu_remove_one_alloc_mmu_page(struct kvm *kvm)
3ee16c81
IE
2704{
2705 struct kvm_mmu_page *page;
2706
2707 page = container_of(kvm->arch.active_mmu_pages.prev,
2708 struct kvm_mmu_page, link);
2709 kvm_mmu_zap_page(kvm, page);
2710}
2711
2712static int mmu_shrink(int nr_to_scan, gfp_t gfp_mask)
2713{
2714 struct kvm *kvm;
2715 struct kvm *kvm_freed = NULL;
2716 int cache_count = 0;
2717
2718 spin_lock(&kvm_lock);
2719
2720 list_for_each_entry(kvm, &vm_list, vm_list) {
2721 int npages;
2722
5a4c9288
MT
2723 if (!down_read_trylock(&kvm->slots_lock))
2724 continue;
3ee16c81
IE
2725 spin_lock(&kvm->mmu_lock);
2726 npages = kvm->arch.n_alloc_mmu_pages -
2727 kvm->arch.n_free_mmu_pages;
2728 cache_count += npages;
2729 if (!kvm_freed && nr_to_scan > 0 && npages > 0) {
2730 kvm_mmu_remove_one_alloc_mmu_page(kvm);
2731 cache_count--;
2732 kvm_freed = kvm;
2733 }
2734 nr_to_scan--;
2735
2736 spin_unlock(&kvm->mmu_lock);
5a4c9288 2737 up_read(&kvm->slots_lock);
3ee16c81
IE
2738 }
2739 if (kvm_freed)
2740 list_move_tail(&kvm_freed->vm_list, &vm_list);
2741
2742 spin_unlock(&kvm_lock);
2743
2744 return cache_count;
2745}
2746
2747static struct shrinker mmu_shrinker = {
2748 .shrink = mmu_shrink,
2749 .seeks = DEFAULT_SEEKS * 10,
2750};
2751
2ddfd20e 2752static void mmu_destroy_caches(void)
b5a33a75
AK
2753{
2754 if (pte_chain_cache)
2755 kmem_cache_destroy(pte_chain_cache);
2756 if (rmap_desc_cache)
2757 kmem_cache_destroy(rmap_desc_cache);
d3d25b04
AK
2758 if (mmu_page_header_cache)
2759 kmem_cache_destroy(mmu_page_header_cache);
b5a33a75
AK
2760}
2761
3ee16c81
IE
2762void kvm_mmu_module_exit(void)
2763{
2764 mmu_destroy_caches();
2765 unregister_shrinker(&mmu_shrinker);
2766}
2767
b5a33a75
AK
2768int kvm_mmu_module_init(void)
2769{
2770 pte_chain_cache = kmem_cache_create("kvm_pte_chain",
2771 sizeof(struct kvm_pte_chain),
20c2df83 2772 0, 0, NULL);
b5a33a75
AK
2773 if (!pte_chain_cache)
2774 goto nomem;
2775 rmap_desc_cache = kmem_cache_create("kvm_rmap_desc",
2776 sizeof(struct kvm_rmap_desc),
20c2df83 2777 0, 0, NULL);
b5a33a75
AK
2778 if (!rmap_desc_cache)
2779 goto nomem;
2780
d3d25b04
AK
2781 mmu_page_header_cache = kmem_cache_create("kvm_mmu_page_header",
2782 sizeof(struct kvm_mmu_page),
20c2df83 2783 0, 0, NULL);
d3d25b04
AK
2784 if (!mmu_page_header_cache)
2785 goto nomem;
2786
3ee16c81
IE
2787 register_shrinker(&mmu_shrinker);
2788
b5a33a75
AK
2789 return 0;
2790
2791nomem:
3ee16c81 2792 mmu_destroy_caches();
b5a33a75
AK
2793 return -ENOMEM;
2794}
2795
3ad82a7e
ZX
2796/*
2797 * Caculate mmu pages needed for kvm.
2798 */
2799unsigned int kvm_mmu_calculate_mmu_pages(struct kvm *kvm)
2800{
2801 int i;
2802 unsigned int nr_mmu_pages;
2803 unsigned int nr_pages = 0;
2804
2805 for (i = 0; i < kvm->nmemslots; i++)
2806 nr_pages += kvm->memslots[i].npages;
2807
2808 nr_mmu_pages = nr_pages * KVM_PERMILLE_MMU_PAGES / 1000;
2809 nr_mmu_pages = max(nr_mmu_pages,
2810 (unsigned int) KVM_MIN_ALLOC_MMU_PAGES);
2811
2812 return nr_mmu_pages;
2813}
2814
2f333bcb
MT
2815static void *pv_mmu_peek_buffer(struct kvm_pv_mmu_op_buffer *buffer,
2816 unsigned len)
2817{
2818 if (len > buffer->len)
2819 return NULL;
2820 return buffer->ptr;
2821}
2822
2823static void *pv_mmu_read_buffer(struct kvm_pv_mmu_op_buffer *buffer,
2824 unsigned len)
2825{
2826 void *ret;
2827
2828 ret = pv_mmu_peek_buffer(buffer, len);
2829 if (!ret)
2830 return ret;
2831 buffer->ptr += len;
2832 buffer->len -= len;
2833 buffer->processed += len;
2834 return ret;
2835}
2836
2837static int kvm_pv_mmu_write(struct kvm_vcpu *vcpu,
2838 gpa_t addr, gpa_t value)
2839{
2840 int bytes = 8;
2841 int r;
2842
2843 if (!is_long_mode(vcpu) && !is_pae(vcpu))
2844 bytes = 4;
2845
2846 r = mmu_topup_memory_caches(vcpu);
2847 if (r)
2848 return r;
2849
3200f405 2850 if (!emulator_write_phys(vcpu, addr, &value, bytes))
2f333bcb
MT
2851 return -EFAULT;
2852
2853 return 1;
2854}
2855
2856static int kvm_pv_mmu_flush_tlb(struct kvm_vcpu *vcpu)
2857{
2858 kvm_x86_ops->tlb_flush(vcpu);
6ad9f15c 2859 set_bit(KVM_REQ_MMU_SYNC, &vcpu->requests);
2f333bcb
MT
2860 return 1;
2861}
2862
2863static int kvm_pv_mmu_release_pt(struct kvm_vcpu *vcpu, gpa_t addr)
2864{
2865 spin_lock(&vcpu->kvm->mmu_lock);
2866 mmu_unshadow(vcpu->kvm, addr >> PAGE_SHIFT);
2867 spin_unlock(&vcpu->kvm->mmu_lock);
2868 return 1;
2869}
2870
2871static int kvm_pv_mmu_op_one(struct kvm_vcpu *vcpu,
2872 struct kvm_pv_mmu_op_buffer *buffer)
2873{
2874 struct kvm_mmu_op_header *header;
2875
2876 header = pv_mmu_peek_buffer(buffer, sizeof *header);
2877 if (!header)
2878 return 0;
2879 switch (header->op) {
2880 case KVM_MMU_OP_WRITE_PTE: {
2881 struct kvm_mmu_op_write_pte *wpte;
2882
2883 wpte = pv_mmu_read_buffer(buffer, sizeof *wpte);
2884 if (!wpte)
2885 return 0;
2886 return kvm_pv_mmu_write(vcpu, wpte->pte_phys,
2887 wpte->pte_val);
2888 }
2889 case KVM_MMU_OP_FLUSH_TLB: {
2890 struct kvm_mmu_op_flush_tlb *ftlb;
2891
2892 ftlb = pv_mmu_read_buffer(buffer, sizeof *ftlb);
2893 if (!ftlb)
2894 return 0;
2895 return kvm_pv_mmu_flush_tlb(vcpu);
2896 }
2897 case KVM_MMU_OP_RELEASE_PT: {
2898 struct kvm_mmu_op_release_pt *rpt;
2899
2900 rpt = pv_mmu_read_buffer(buffer, sizeof *rpt);
2901 if (!rpt)
2902 return 0;
2903 return kvm_pv_mmu_release_pt(vcpu, rpt->pt_phys);
2904 }
2905 default: return 0;
2906 }
2907}
2908
2909int kvm_pv_mmu_op(struct kvm_vcpu *vcpu, unsigned long bytes,
2910 gpa_t addr, unsigned long *ret)
2911{
2912 int r;
6ad18fba 2913 struct kvm_pv_mmu_op_buffer *buffer = &vcpu->arch.mmu_op_buffer;
2f333bcb 2914
6ad18fba
DH
2915 buffer->ptr = buffer->buf;
2916 buffer->len = min_t(unsigned long, bytes, sizeof buffer->buf);
2917 buffer->processed = 0;
2f333bcb 2918
6ad18fba 2919 r = kvm_read_guest(vcpu->kvm, addr, buffer->buf, buffer->len);
2f333bcb
MT
2920 if (r)
2921 goto out;
2922
6ad18fba
DH
2923 while (buffer->len) {
2924 r = kvm_pv_mmu_op_one(vcpu, buffer);
2f333bcb
MT
2925 if (r < 0)
2926 goto out;
2927 if (r == 0)
2928 break;
2929 }
2930
2931 r = 1;
2932out:
6ad18fba 2933 *ret = buffer->processed;
2f333bcb
MT
2934 return r;
2935}
2936
37a7d8b0
AK
2937#ifdef AUDIT
2938
2939static const char *audit_msg;
2940
2941static gva_t canonicalize(gva_t gva)
2942{
2943#ifdef CONFIG_X86_64
2944 gva = (long long)(gva << 16) >> 16;
2945#endif
2946 return gva;
2947}
2948
2949static void audit_mappings_page(struct kvm_vcpu *vcpu, u64 page_pte,
2950 gva_t va, int level)
2951{
2952 u64 *pt = __va(page_pte & PT64_BASE_ADDR_MASK);
2953 int i;
2954 gva_t va_delta = 1ul << (PAGE_SHIFT + 9 * (level - 1));
2955
2956 for (i = 0; i < PT64_ENT_PER_PAGE; ++i, va += va_delta) {
2957 u64 ent = pt[i];
2958
c7addb90 2959 if (ent == shadow_trap_nonpresent_pte)
37a7d8b0
AK
2960 continue;
2961
2962 va = canonicalize(va);
c7addb90
AK
2963 if (level > 1) {
2964 if (ent == shadow_notrap_nonpresent_pte)
2965 printk(KERN_ERR "audit: (%s) nontrapping pte"
2966 " in nonleaf level: levels %d gva %lx"
2967 " level %d pte %llx\n", audit_msg,
ad312c7c 2968 vcpu->arch.mmu.root_level, va, level, ent);
c7addb90 2969
37a7d8b0 2970 audit_mappings_page(vcpu, ent, va, level - 1);
c7addb90 2971 } else {
ad312c7c 2972 gpa_t gpa = vcpu->arch.mmu.gva_to_gpa(vcpu, va);
35149e21 2973 hpa_t hpa = (hpa_t)gpa_to_pfn(vcpu, gpa) << PAGE_SHIFT;
37a7d8b0 2974
c7addb90 2975 if (is_shadow_present_pte(ent)
37a7d8b0 2976 && (ent & PT64_BASE_ADDR_MASK) != hpa)
c7addb90
AK
2977 printk(KERN_ERR "xx audit error: (%s) levels %d"
2978 " gva %lx gpa %llx hpa %llx ent %llx %d\n",
ad312c7c 2979 audit_msg, vcpu->arch.mmu.root_level,
d77c26fc
MD
2980 va, gpa, hpa, ent,
2981 is_shadow_present_pte(ent));
c7addb90
AK
2982 else if (ent == shadow_notrap_nonpresent_pte
2983 && !is_error_hpa(hpa))
2984 printk(KERN_ERR "audit: (%s) notrap shadow,"
2985 " valid guest gva %lx\n", audit_msg, va);
35149e21 2986 kvm_release_pfn_clean(pfn);
c7addb90 2987
37a7d8b0
AK
2988 }
2989 }
2990}
2991
2992static void audit_mappings(struct kvm_vcpu *vcpu)
2993{
1ea252af 2994 unsigned i;
37a7d8b0 2995
ad312c7c
ZX
2996 if (vcpu->arch.mmu.root_level == 4)
2997 audit_mappings_page(vcpu, vcpu->arch.mmu.root_hpa, 0, 4);
37a7d8b0
AK
2998 else
2999 for (i = 0; i < 4; ++i)
ad312c7c 3000 if (vcpu->arch.mmu.pae_root[i] & PT_PRESENT_MASK)
37a7d8b0 3001 audit_mappings_page(vcpu,
ad312c7c 3002 vcpu->arch.mmu.pae_root[i],
37a7d8b0
AK
3003 i << 30,
3004 2);
3005}
3006
3007static int count_rmaps(struct kvm_vcpu *vcpu)
3008{
3009 int nmaps = 0;
3010 int i, j, k;
3011
3012 for (i = 0; i < KVM_MEMORY_SLOTS; ++i) {
3013 struct kvm_memory_slot *m = &vcpu->kvm->memslots[i];
3014 struct kvm_rmap_desc *d;
3015
3016 for (j = 0; j < m->npages; ++j) {
290fc38d 3017 unsigned long *rmapp = &m->rmap[j];
37a7d8b0 3018
290fc38d 3019 if (!*rmapp)
37a7d8b0 3020 continue;
290fc38d 3021 if (!(*rmapp & 1)) {
37a7d8b0
AK
3022 ++nmaps;
3023 continue;
3024 }
290fc38d 3025 d = (struct kvm_rmap_desc *)(*rmapp & ~1ul);
37a7d8b0
AK
3026 while (d) {
3027 for (k = 0; k < RMAP_EXT; ++k)
3028 if (d->shadow_ptes[k])
3029 ++nmaps;
3030 else
3031 break;
3032 d = d->more;
3033 }
3034 }
3035 }
3036 return nmaps;
3037}
3038
3039static int count_writable_mappings(struct kvm_vcpu *vcpu)
3040{
3041 int nmaps = 0;
4db35314 3042 struct kvm_mmu_page *sp;
37a7d8b0
AK
3043 int i;
3044
f05e70ac 3045 list_for_each_entry(sp, &vcpu->kvm->arch.active_mmu_pages, link) {
4db35314 3046 u64 *pt = sp->spt;
37a7d8b0 3047
4db35314 3048 if (sp->role.level != PT_PAGE_TABLE_LEVEL)
37a7d8b0
AK
3049 continue;
3050
3051 for (i = 0; i < PT64_ENT_PER_PAGE; ++i) {
3052 u64 ent = pt[i];
3053
3054 if (!(ent & PT_PRESENT_MASK))
3055 continue;
3056 if (!(ent & PT_WRITABLE_MASK))
3057 continue;
3058 ++nmaps;
3059 }
3060 }
3061 return nmaps;
3062}
3063
3064static void audit_rmap(struct kvm_vcpu *vcpu)
3065{
3066 int n_rmap = count_rmaps(vcpu);
3067 int n_actual = count_writable_mappings(vcpu);
3068
3069 if (n_rmap != n_actual)
3070 printk(KERN_ERR "%s: (%s) rmap %d actual %d\n",
b8688d51 3071 __func__, audit_msg, n_rmap, n_actual);
37a7d8b0
AK
3072}
3073
3074static void audit_write_protection(struct kvm_vcpu *vcpu)
3075{
4db35314 3076 struct kvm_mmu_page *sp;
290fc38d
IE
3077 struct kvm_memory_slot *slot;
3078 unsigned long *rmapp;
3079 gfn_t gfn;
37a7d8b0 3080
f05e70ac 3081 list_for_each_entry(sp, &vcpu->kvm->arch.active_mmu_pages, link) {
4db35314 3082 if (sp->role.metaphysical)
37a7d8b0
AK
3083 continue;
3084
4db35314 3085 gfn = unalias_gfn(vcpu->kvm, sp->gfn);
2843099f 3086 slot = gfn_to_memslot_unaliased(vcpu->kvm, sp->gfn);
290fc38d
IE
3087 rmapp = &slot->rmap[gfn - slot->base_gfn];
3088 if (*rmapp)
37a7d8b0
AK
3089 printk(KERN_ERR "%s: (%s) shadow page has writable"
3090 " mappings: gfn %lx role %x\n",
b8688d51 3091 __func__, audit_msg, sp->gfn,
4db35314 3092 sp->role.word);
37a7d8b0
AK
3093 }
3094}
3095
3096static void kvm_mmu_audit(struct kvm_vcpu *vcpu, const char *msg)
3097{
3098 int olddbg = dbg;
3099
3100 dbg = 0;
3101 audit_msg = msg;
3102 audit_rmap(vcpu);
3103 audit_write_protection(vcpu);
3104 audit_mappings(vcpu);
3105 dbg = olddbg;
3106}
3107
3108#endif