KVM: MMU: protect kvm_mmu_change_mmu_pages with mmu_lock
[linux-2.6-block.git] / arch / x86 / kvm / mmu.c
CommitLineData
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1/*
2 * Kernel-based Virtual Machine driver for Linux
3 *
4 * This module enables machines with Intel VT-x extensions to run virtual
5 * machines without emulation or binary translation.
6 *
7 * MMU support
8 *
9 * Copyright (C) 2006 Qumranet, Inc.
10 *
11 * Authors:
12 * Yaniv Kamay <yaniv@qumranet.com>
13 * Avi Kivity <avi@qumranet.com>
14 *
15 * This work is licensed under the terms of the GNU GPL, version 2. See
16 * the COPYING file in the top-level directory.
17 *
18 */
e495606d 19
1d737c8a 20#include "mmu.h"
e495606d 21
edf88417 22#include <linux/kvm_host.h>
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23#include <linux/types.h>
24#include <linux/string.h>
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25#include <linux/mm.h>
26#include <linux/highmem.h>
27#include <linux/module.h>
448353ca 28#include <linux/swap.h>
05da4558 29#include <linux/hugetlb.h>
2f333bcb 30#include <linux/compiler.h>
6aa8b732 31
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32#include <asm/page.h>
33#include <asm/cmpxchg.h>
4e542370 34#include <asm/io.h>
13673a90 35#include <asm/vmx.h>
6aa8b732 36
18552672
JR
37/*
38 * When setting this variable to true it enables Two-Dimensional-Paging
39 * where the hardware walks 2 page tables:
40 * 1. the guest-virtual to guest-physical
41 * 2. while doing 1. it walks guest-physical to host-physical
42 * If the hardware supports that we don't need to do shadow paging.
43 */
2f333bcb 44bool tdp_enabled = false;
18552672 45
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46#undef MMU_DEBUG
47
48#undef AUDIT
49
50#ifdef AUDIT
51static void kvm_mmu_audit(struct kvm_vcpu *vcpu, const char *msg);
52#else
53static void kvm_mmu_audit(struct kvm_vcpu *vcpu, const char *msg) {}
54#endif
55
56#ifdef MMU_DEBUG
57
58#define pgprintk(x...) do { if (dbg) printk(x); } while (0)
59#define rmap_printk(x...) do { if (dbg) printk(x); } while (0)
60
61#else
62
63#define pgprintk(x...) do { } while (0)
64#define rmap_printk(x...) do { } while (0)
65
66#endif
67
68#if defined(MMU_DEBUG) || defined(AUDIT)
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69static int dbg = 0;
70module_param(dbg, bool, 0644);
37a7d8b0 71#endif
6aa8b732 72
582801a9
MT
73static int oos_shadow = 1;
74module_param(oos_shadow, bool, 0644);
75
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76#ifndef MMU_DEBUG
77#define ASSERT(x) do { } while (0)
78#else
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79#define ASSERT(x) \
80 if (!(x)) { \
81 printk(KERN_WARNING "assertion failed %s:%d: %s\n", \
82 __FILE__, __LINE__, #x); \
83 }
d6c69ee9 84#endif
6aa8b732 85
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86#define PT_FIRST_AVAIL_BITS_SHIFT 9
87#define PT64_SECOND_AVAIL_BITS_SHIFT 52
88
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89#define VALID_PAGE(x) ((x) != INVALID_PAGE)
90
91#define PT64_LEVEL_BITS 9
92
93#define PT64_LEVEL_SHIFT(level) \
d77c26fc 94 (PAGE_SHIFT + (level - 1) * PT64_LEVEL_BITS)
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95
96#define PT64_LEVEL_MASK(level) \
97 (((1ULL << PT64_LEVEL_BITS) - 1) << PT64_LEVEL_SHIFT(level))
98
99#define PT64_INDEX(address, level)\
100 (((address) >> PT64_LEVEL_SHIFT(level)) & ((1 << PT64_LEVEL_BITS) - 1))
101
102
103#define PT32_LEVEL_BITS 10
104
105#define PT32_LEVEL_SHIFT(level) \
d77c26fc 106 (PAGE_SHIFT + (level - 1) * PT32_LEVEL_BITS)
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107
108#define PT32_LEVEL_MASK(level) \
109 (((1ULL << PT32_LEVEL_BITS) - 1) << PT32_LEVEL_SHIFT(level))
110
111#define PT32_INDEX(address, level)\
112 (((address) >> PT32_LEVEL_SHIFT(level)) & ((1 << PT32_LEVEL_BITS) - 1))
113
114
27aba766 115#define PT64_BASE_ADDR_MASK (((1ULL << 52) - 1) & ~(u64)(PAGE_SIZE-1))
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116#define PT64_DIR_BASE_ADDR_MASK \
117 (PT64_BASE_ADDR_MASK & ~((1ULL << (PAGE_SHIFT + PT64_LEVEL_BITS)) - 1))
118
119#define PT32_BASE_ADDR_MASK PAGE_MASK
120#define PT32_DIR_BASE_ADDR_MASK \
121 (PAGE_MASK & ~((1ULL << (PAGE_SHIFT + PT32_LEVEL_BITS)) - 1))
122
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123#define PT64_PERM_MASK (PT_PRESENT_MASK | PT_WRITABLE_MASK | PT_USER_MASK \
124 | PT64_NX_MASK)
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125
126#define PFERR_PRESENT_MASK (1U << 0)
127#define PFERR_WRITE_MASK (1U << 1)
128#define PFERR_USER_MASK (1U << 2)
82725b20 129#define PFERR_RSVD_MASK (1U << 3)
73b1087e 130#define PFERR_FETCH_MASK (1U << 4)
6aa8b732 131
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132#define PT_DIRECTORY_LEVEL 2
133#define PT_PAGE_TABLE_LEVEL 1
134
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135#define RMAP_EXT 4
136
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137#define ACC_EXEC_MASK 1
138#define ACC_WRITE_MASK PT_WRITABLE_MASK
139#define ACC_USER_MASK PT_USER_MASK
140#define ACC_ALL (ACC_EXEC_MASK | ACC_WRITE_MASK | ACC_USER_MASK)
141
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142#define SHADOW_PT_INDEX(addr, level) PT64_INDEX(addr, level)
143
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144struct kvm_rmap_desc {
145 u64 *shadow_ptes[RMAP_EXT];
146 struct kvm_rmap_desc *more;
147};
148
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149struct kvm_shadow_walk_iterator {
150 u64 addr;
151 hpa_t shadow_addr;
152 int level;
153 u64 *sptep;
154 unsigned index;
155};
156
157#define for_each_shadow_entry(_vcpu, _addr, _walker) \
158 for (shadow_walk_init(&(_walker), _vcpu, _addr); \
159 shadow_walk_okay(&(_walker)); \
160 shadow_walk_next(&(_walker)))
161
162
4731d4c7
MT
163struct kvm_unsync_walk {
164 int (*entry) (struct kvm_mmu_page *sp, struct kvm_unsync_walk *walk);
165};
166
ad8cfbe3
MT
167typedef int (*mmu_parent_walk_fn) (struct kvm_vcpu *vcpu, struct kvm_mmu_page *sp);
168
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169static struct kmem_cache *pte_chain_cache;
170static struct kmem_cache *rmap_desc_cache;
d3d25b04 171static struct kmem_cache *mmu_page_header_cache;
b5a33a75 172
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173static u64 __read_mostly shadow_trap_nonpresent_pte;
174static u64 __read_mostly shadow_notrap_nonpresent_pte;
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175static u64 __read_mostly shadow_base_present_pte;
176static u64 __read_mostly shadow_nx_mask;
177static u64 __read_mostly shadow_x_mask; /* mutual exclusive with nx_mask */
178static u64 __read_mostly shadow_user_mask;
179static u64 __read_mostly shadow_accessed_mask;
180static u64 __read_mostly shadow_dirty_mask;
c7addb90 181
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182static inline u64 rsvd_bits(int s, int e)
183{
184 return ((1ULL << (e - s + 1)) - 1) << s;
185}
186
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187void kvm_mmu_set_nonpresent_ptes(u64 trap_pte, u64 notrap_pte)
188{
189 shadow_trap_nonpresent_pte = trap_pte;
190 shadow_notrap_nonpresent_pte = notrap_pte;
191}
192EXPORT_SYMBOL_GPL(kvm_mmu_set_nonpresent_ptes);
193
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194void kvm_mmu_set_base_ptes(u64 base_pte)
195{
196 shadow_base_present_pte = base_pte;
197}
198EXPORT_SYMBOL_GPL(kvm_mmu_set_base_ptes);
199
200void kvm_mmu_set_mask_ptes(u64 user_mask, u64 accessed_mask,
4b12f0de 201 u64 dirty_mask, u64 nx_mask, u64 x_mask)
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SY
202{
203 shadow_user_mask = user_mask;
204 shadow_accessed_mask = accessed_mask;
205 shadow_dirty_mask = dirty_mask;
206 shadow_nx_mask = nx_mask;
207 shadow_x_mask = x_mask;
208}
209EXPORT_SYMBOL_GPL(kvm_mmu_set_mask_ptes);
210
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211static int is_write_protection(struct kvm_vcpu *vcpu)
212{
ad312c7c 213 return vcpu->arch.cr0 & X86_CR0_WP;
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214}
215
216static int is_cpuid_PSE36(void)
217{
218 return 1;
219}
220
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221static int is_nx(struct kvm_vcpu *vcpu)
222{
ad312c7c 223 return vcpu->arch.shadow_efer & EFER_NX;
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224}
225
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226static int is_shadow_present_pte(u64 pte)
227{
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228 return pte != shadow_trap_nonpresent_pte
229 && pte != shadow_notrap_nonpresent_pte;
230}
231
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232static int is_large_pte(u64 pte)
233{
234 return pte & PT_PAGE_SIZE_MASK;
235}
236
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237static int is_writeble_pte(unsigned long pte)
238{
239 return pte & PT_WRITABLE_MASK;
240}
241
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242static int is_dirty_pte(unsigned long pte)
243{
7b52345e 244 return pte & shadow_dirty_mask;
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245}
246
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247static int is_rmap_pte(u64 pte)
248{
4b1a80fa 249 return is_shadow_present_pte(pte);
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250}
251
35149e21 252static pfn_t spte_to_pfn(u64 pte)
0b49ea86 253{
35149e21 254 return (pte & PT64_BASE_ADDR_MASK) >> PAGE_SHIFT;
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255}
256
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257static gfn_t pse36_gfn_delta(u32 gpte)
258{
259 int shift = 32 - PT32_DIR_PSE36_SHIFT - PAGE_SHIFT;
260
261 return (gpte & PT32_DIR_PSE36_MASK) << shift;
262}
263
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264static void set_shadow_pte(u64 *sptep, u64 spte)
265{
266#ifdef CONFIG_X86_64
267 set_64bit((unsigned long *)sptep, spte);
268#else
269 set_64bit((unsigned long long *)sptep, spte);
270#endif
271}
272
e2dec939 273static int mmu_topup_memory_cache(struct kvm_mmu_memory_cache *cache,
2e3e5882 274 struct kmem_cache *base_cache, int min)
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275{
276 void *obj;
277
278 if (cache->nobjs >= min)
e2dec939 279 return 0;
714b93da 280 while (cache->nobjs < ARRAY_SIZE(cache->objects)) {
2e3e5882 281 obj = kmem_cache_zalloc(base_cache, GFP_KERNEL);
714b93da 282 if (!obj)
e2dec939 283 return -ENOMEM;
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284 cache->objects[cache->nobjs++] = obj;
285 }
e2dec939 286 return 0;
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287}
288
289static void mmu_free_memory_cache(struct kvm_mmu_memory_cache *mc)
290{
291 while (mc->nobjs)
292 kfree(mc->objects[--mc->nobjs]);
293}
294
c1158e63 295static int mmu_topup_memory_cache_page(struct kvm_mmu_memory_cache *cache,
2e3e5882 296 int min)
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297{
298 struct page *page;
299
300 if (cache->nobjs >= min)
301 return 0;
302 while (cache->nobjs < ARRAY_SIZE(cache->objects)) {
2e3e5882 303 page = alloc_page(GFP_KERNEL);
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304 if (!page)
305 return -ENOMEM;
306 set_page_private(page, 0);
307 cache->objects[cache->nobjs++] = page_address(page);
308 }
309 return 0;
310}
311
312static void mmu_free_memory_cache_page(struct kvm_mmu_memory_cache *mc)
313{
314 while (mc->nobjs)
c4d198d5 315 free_page((unsigned long)mc->objects[--mc->nobjs]);
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316}
317
2e3e5882 318static int mmu_topup_memory_caches(struct kvm_vcpu *vcpu)
714b93da 319{
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320 int r;
321
ad312c7c 322 r = mmu_topup_memory_cache(&vcpu->arch.mmu_pte_chain_cache,
2e3e5882 323 pte_chain_cache, 4);
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324 if (r)
325 goto out;
ad312c7c 326 r = mmu_topup_memory_cache(&vcpu->arch.mmu_rmap_desc_cache,
c41ef344 327 rmap_desc_cache, 4);
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328 if (r)
329 goto out;
ad312c7c 330 r = mmu_topup_memory_cache_page(&vcpu->arch.mmu_page_cache, 8);
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331 if (r)
332 goto out;
ad312c7c 333 r = mmu_topup_memory_cache(&vcpu->arch.mmu_page_header_cache,
2e3e5882 334 mmu_page_header_cache, 4);
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335out:
336 return r;
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337}
338
339static void mmu_free_memory_caches(struct kvm_vcpu *vcpu)
340{
ad312c7c
ZX
341 mmu_free_memory_cache(&vcpu->arch.mmu_pte_chain_cache);
342 mmu_free_memory_cache(&vcpu->arch.mmu_rmap_desc_cache);
343 mmu_free_memory_cache_page(&vcpu->arch.mmu_page_cache);
344 mmu_free_memory_cache(&vcpu->arch.mmu_page_header_cache);
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345}
346
347static void *mmu_memory_cache_alloc(struct kvm_mmu_memory_cache *mc,
348 size_t size)
349{
350 void *p;
351
352 BUG_ON(!mc->nobjs);
353 p = mc->objects[--mc->nobjs];
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354 return p;
355}
356
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357static struct kvm_pte_chain *mmu_alloc_pte_chain(struct kvm_vcpu *vcpu)
358{
ad312c7c 359 return mmu_memory_cache_alloc(&vcpu->arch.mmu_pte_chain_cache,
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360 sizeof(struct kvm_pte_chain));
361}
362
90cb0529 363static void mmu_free_pte_chain(struct kvm_pte_chain *pc)
714b93da 364{
90cb0529 365 kfree(pc);
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366}
367
368static struct kvm_rmap_desc *mmu_alloc_rmap_desc(struct kvm_vcpu *vcpu)
369{
ad312c7c 370 return mmu_memory_cache_alloc(&vcpu->arch.mmu_rmap_desc_cache,
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371 sizeof(struct kvm_rmap_desc));
372}
373
90cb0529 374static void mmu_free_rmap_desc(struct kvm_rmap_desc *rd)
714b93da 375{
90cb0529 376 kfree(rd);
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377}
378
05da4558
MT
379/*
380 * Return the pointer to the largepage write count for a given
381 * gfn, handling slots that are not large page aligned.
382 */
383static int *slot_largepage_idx(gfn_t gfn, struct kvm_memory_slot *slot)
384{
385 unsigned long idx;
386
387 idx = (gfn / KVM_PAGES_PER_HPAGE) -
388 (slot->base_gfn / KVM_PAGES_PER_HPAGE);
389 return &slot->lpage_info[idx].write_count;
390}
391
392static void account_shadowed(struct kvm *kvm, gfn_t gfn)
393{
394 int *write_count;
395
2843099f
IE
396 gfn = unalias_gfn(kvm, gfn);
397 write_count = slot_largepage_idx(gfn,
398 gfn_to_memslot_unaliased(kvm, gfn));
05da4558 399 *write_count += 1;
05da4558
MT
400}
401
402static void unaccount_shadowed(struct kvm *kvm, gfn_t gfn)
403{
404 int *write_count;
405
2843099f
IE
406 gfn = unalias_gfn(kvm, gfn);
407 write_count = slot_largepage_idx(gfn,
408 gfn_to_memslot_unaliased(kvm, gfn));
05da4558
MT
409 *write_count -= 1;
410 WARN_ON(*write_count < 0);
411}
412
413static int has_wrprotected_page(struct kvm *kvm, gfn_t gfn)
414{
2843099f 415 struct kvm_memory_slot *slot;
05da4558
MT
416 int *largepage_idx;
417
2843099f
IE
418 gfn = unalias_gfn(kvm, gfn);
419 slot = gfn_to_memslot_unaliased(kvm, gfn);
05da4558
MT
420 if (slot) {
421 largepage_idx = slot_largepage_idx(gfn, slot);
422 return *largepage_idx;
423 }
424
425 return 1;
426}
427
428static int host_largepage_backed(struct kvm *kvm, gfn_t gfn)
429{
430 struct vm_area_struct *vma;
431 unsigned long addr;
4c2155ce 432 int ret = 0;
05da4558
MT
433
434 addr = gfn_to_hva(kvm, gfn);
435 if (kvm_is_error_hva(addr))
4c2155ce 436 return ret;
05da4558 437
4c2155ce 438 down_read(&current->mm->mmap_sem);
05da4558
MT
439 vma = find_vma(current->mm, addr);
440 if (vma && is_vm_hugetlb_page(vma))
4c2155ce
MT
441 ret = 1;
442 up_read(&current->mm->mmap_sem);
05da4558 443
4c2155ce 444 return ret;
05da4558
MT
445}
446
447static int is_largepage_backed(struct kvm_vcpu *vcpu, gfn_t large_gfn)
448{
449 struct kvm_memory_slot *slot;
450
451 if (has_wrprotected_page(vcpu->kvm, large_gfn))
452 return 0;
453
454 if (!host_largepage_backed(vcpu->kvm, large_gfn))
455 return 0;
456
457 slot = gfn_to_memslot(vcpu->kvm, large_gfn);
458 if (slot && slot->dirty_bitmap)
459 return 0;
460
461 return 1;
462}
463
290fc38d
IE
464/*
465 * Take gfn and return the reverse mapping to it.
466 * Note: gfn must be unaliased before this function get called
467 */
468
05da4558 469static unsigned long *gfn_to_rmap(struct kvm *kvm, gfn_t gfn, int lpage)
290fc38d
IE
470{
471 struct kvm_memory_slot *slot;
05da4558 472 unsigned long idx;
290fc38d
IE
473
474 slot = gfn_to_memslot(kvm, gfn);
05da4558
MT
475 if (!lpage)
476 return &slot->rmap[gfn - slot->base_gfn];
477
478 idx = (gfn / KVM_PAGES_PER_HPAGE) -
479 (slot->base_gfn / KVM_PAGES_PER_HPAGE);
480
481 return &slot->lpage_info[idx].rmap_pde;
290fc38d
IE
482}
483
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484/*
485 * Reverse mapping data structures:
486 *
290fc38d
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487 * If rmapp bit zero is zero, then rmapp point to the shadw page table entry
488 * that points to page_address(page).
cd4a4e53 489 *
290fc38d
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490 * If rmapp bit zero is one, (then rmap & ~1) points to a struct kvm_rmap_desc
491 * containing more mappings.
cd4a4e53 492 */
05da4558 493static void rmap_add(struct kvm_vcpu *vcpu, u64 *spte, gfn_t gfn, int lpage)
cd4a4e53 494{
4db35314 495 struct kvm_mmu_page *sp;
cd4a4e53 496 struct kvm_rmap_desc *desc;
290fc38d 497 unsigned long *rmapp;
cd4a4e53
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498 int i;
499
500 if (!is_rmap_pte(*spte))
501 return;
290fc38d 502 gfn = unalias_gfn(vcpu->kvm, gfn);
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503 sp = page_header(__pa(spte));
504 sp->gfns[spte - sp->spt] = gfn;
05da4558 505 rmapp = gfn_to_rmap(vcpu->kvm, gfn, lpage);
290fc38d 506 if (!*rmapp) {
cd4a4e53 507 rmap_printk("rmap_add: %p %llx 0->1\n", spte, *spte);
290fc38d
IE
508 *rmapp = (unsigned long)spte;
509 } else if (!(*rmapp & 1)) {
cd4a4e53 510 rmap_printk("rmap_add: %p %llx 1->many\n", spte, *spte);
714b93da 511 desc = mmu_alloc_rmap_desc(vcpu);
290fc38d 512 desc->shadow_ptes[0] = (u64 *)*rmapp;
cd4a4e53 513 desc->shadow_ptes[1] = spte;
290fc38d 514 *rmapp = (unsigned long)desc | 1;
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515 } else {
516 rmap_printk("rmap_add: %p %llx many->many\n", spte, *spte);
290fc38d 517 desc = (struct kvm_rmap_desc *)(*rmapp & ~1ul);
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518 while (desc->shadow_ptes[RMAP_EXT-1] && desc->more)
519 desc = desc->more;
520 if (desc->shadow_ptes[RMAP_EXT-1]) {
714b93da 521 desc->more = mmu_alloc_rmap_desc(vcpu);
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522 desc = desc->more;
523 }
524 for (i = 0; desc->shadow_ptes[i]; ++i)
525 ;
526 desc->shadow_ptes[i] = spte;
527 }
528}
529
290fc38d 530static void rmap_desc_remove_entry(unsigned long *rmapp,
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531 struct kvm_rmap_desc *desc,
532 int i,
533 struct kvm_rmap_desc *prev_desc)
534{
535 int j;
536
537 for (j = RMAP_EXT - 1; !desc->shadow_ptes[j] && j > i; --j)
538 ;
539 desc->shadow_ptes[i] = desc->shadow_ptes[j];
11718b4d 540 desc->shadow_ptes[j] = NULL;
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541 if (j != 0)
542 return;
543 if (!prev_desc && !desc->more)
290fc38d 544 *rmapp = (unsigned long)desc->shadow_ptes[0];
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545 else
546 if (prev_desc)
547 prev_desc->more = desc->more;
548 else
290fc38d 549 *rmapp = (unsigned long)desc->more | 1;
90cb0529 550 mmu_free_rmap_desc(desc);
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551}
552
290fc38d 553static void rmap_remove(struct kvm *kvm, u64 *spte)
cd4a4e53 554{
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555 struct kvm_rmap_desc *desc;
556 struct kvm_rmap_desc *prev_desc;
4db35314 557 struct kvm_mmu_page *sp;
35149e21 558 pfn_t pfn;
290fc38d 559 unsigned long *rmapp;
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560 int i;
561
562 if (!is_rmap_pte(*spte))
563 return;
4db35314 564 sp = page_header(__pa(spte));
35149e21 565 pfn = spte_to_pfn(*spte);
7b52345e 566 if (*spte & shadow_accessed_mask)
35149e21 567 kvm_set_pfn_accessed(pfn);
b4231d61 568 if (is_writeble_pte(*spte))
35149e21 569 kvm_release_pfn_dirty(pfn);
b4231d61 570 else
35149e21 571 kvm_release_pfn_clean(pfn);
05da4558 572 rmapp = gfn_to_rmap(kvm, sp->gfns[spte - sp->spt], is_large_pte(*spte));
290fc38d 573 if (!*rmapp) {
cd4a4e53
AK
574 printk(KERN_ERR "rmap_remove: %p %llx 0->BUG\n", spte, *spte);
575 BUG();
290fc38d 576 } else if (!(*rmapp & 1)) {
cd4a4e53 577 rmap_printk("rmap_remove: %p %llx 1->0\n", spte, *spte);
290fc38d 578 if ((u64 *)*rmapp != spte) {
cd4a4e53
AK
579 printk(KERN_ERR "rmap_remove: %p %llx 1->BUG\n",
580 spte, *spte);
581 BUG();
582 }
290fc38d 583 *rmapp = 0;
cd4a4e53
AK
584 } else {
585 rmap_printk("rmap_remove: %p %llx many->many\n", spte, *spte);
290fc38d 586 desc = (struct kvm_rmap_desc *)(*rmapp & ~1ul);
cd4a4e53
AK
587 prev_desc = NULL;
588 while (desc) {
589 for (i = 0; i < RMAP_EXT && desc->shadow_ptes[i]; ++i)
590 if (desc->shadow_ptes[i] == spte) {
290fc38d 591 rmap_desc_remove_entry(rmapp,
714b93da 592 desc, i,
cd4a4e53
AK
593 prev_desc);
594 return;
595 }
596 prev_desc = desc;
597 desc = desc->more;
598 }
599 BUG();
600 }
601}
602
98348e95 603static u64 *rmap_next(struct kvm *kvm, unsigned long *rmapp, u64 *spte)
374cbac0 604{
374cbac0 605 struct kvm_rmap_desc *desc;
98348e95
IE
606 struct kvm_rmap_desc *prev_desc;
607 u64 *prev_spte;
608 int i;
609
610 if (!*rmapp)
611 return NULL;
612 else if (!(*rmapp & 1)) {
613 if (!spte)
614 return (u64 *)*rmapp;
615 return NULL;
616 }
617 desc = (struct kvm_rmap_desc *)(*rmapp & ~1ul);
618 prev_desc = NULL;
619 prev_spte = NULL;
620 while (desc) {
621 for (i = 0; i < RMAP_EXT && desc->shadow_ptes[i]; ++i) {
622 if (prev_spte == spte)
623 return desc->shadow_ptes[i];
624 prev_spte = desc->shadow_ptes[i];
625 }
626 desc = desc->more;
627 }
628 return NULL;
629}
630
b1a36821 631static int rmap_write_protect(struct kvm *kvm, u64 gfn)
98348e95 632{
290fc38d 633 unsigned long *rmapp;
374cbac0 634 u64 *spte;
caa5b8a5 635 int write_protected = 0;
374cbac0 636
4a4c9924 637 gfn = unalias_gfn(kvm, gfn);
05da4558 638 rmapp = gfn_to_rmap(kvm, gfn, 0);
374cbac0 639
98348e95
IE
640 spte = rmap_next(kvm, rmapp, NULL);
641 while (spte) {
374cbac0 642 BUG_ON(!spte);
374cbac0 643 BUG_ON(!(*spte & PT_PRESENT_MASK));
374cbac0 644 rmap_printk("rmap_write_protect: spte %p %llx\n", spte, *spte);
caa5b8a5 645 if (is_writeble_pte(*spte)) {
9647c14c 646 set_shadow_pte(spte, *spte & ~PT_WRITABLE_MASK);
caa5b8a5
ED
647 write_protected = 1;
648 }
9647c14c 649 spte = rmap_next(kvm, rmapp, spte);
374cbac0 650 }
855149aa 651 if (write_protected) {
35149e21 652 pfn_t pfn;
855149aa
IE
653
654 spte = rmap_next(kvm, rmapp, NULL);
35149e21
AL
655 pfn = spte_to_pfn(*spte);
656 kvm_set_pfn_dirty(pfn);
855149aa
IE
657 }
658
05da4558
MT
659 /* check for huge page mappings */
660 rmapp = gfn_to_rmap(kvm, gfn, 1);
661 spte = rmap_next(kvm, rmapp, NULL);
662 while (spte) {
663 BUG_ON(!spte);
664 BUG_ON(!(*spte & PT_PRESENT_MASK));
665 BUG_ON((*spte & (PT_PAGE_SIZE_MASK|PT_PRESENT_MASK)) != (PT_PAGE_SIZE_MASK|PT_PRESENT_MASK));
666 pgprintk("rmap_write_protect(large): spte %p %llx %lld\n", spte, *spte, gfn);
667 if (is_writeble_pte(*spte)) {
668 rmap_remove(kvm, spte);
669 --kvm->stat.lpages;
670 set_shadow_pte(spte, shadow_trap_nonpresent_pte);
6597ca09 671 spte = NULL;
05da4558
MT
672 write_protected = 1;
673 }
674 spte = rmap_next(kvm, rmapp, spte);
675 }
676
b1a36821 677 return write_protected;
374cbac0
AK
678}
679
e930bffe
AA
680static int kvm_unmap_rmapp(struct kvm *kvm, unsigned long *rmapp)
681{
682 u64 *spte;
683 int need_tlb_flush = 0;
684
685 while ((spte = rmap_next(kvm, rmapp, NULL))) {
686 BUG_ON(!(*spte & PT_PRESENT_MASK));
687 rmap_printk("kvm_rmap_unmap_hva: spte %p %llx\n", spte, *spte);
688 rmap_remove(kvm, spte);
689 set_shadow_pte(spte, shadow_trap_nonpresent_pte);
690 need_tlb_flush = 1;
691 }
692 return need_tlb_flush;
693}
694
695static int kvm_handle_hva(struct kvm *kvm, unsigned long hva,
696 int (*handler)(struct kvm *kvm, unsigned long *rmapp))
697{
698 int i;
699 int retval = 0;
700
701 /*
702 * If mmap_sem isn't taken, we can look the memslots with only
703 * the mmu_lock by skipping over the slots with userspace_addr == 0.
704 */
705 for (i = 0; i < kvm->nmemslots; i++) {
706 struct kvm_memory_slot *memslot = &kvm->memslots[i];
707 unsigned long start = memslot->userspace_addr;
708 unsigned long end;
709
710 /* mmu_lock protects userspace_addr */
711 if (!start)
712 continue;
713
714 end = start + (memslot->npages << PAGE_SHIFT);
715 if (hva >= start && hva < end) {
716 gfn_t gfn_offset = (hva - start) >> PAGE_SHIFT;
717 retval |= handler(kvm, &memslot->rmap[gfn_offset]);
718 retval |= handler(kvm,
719 &memslot->lpage_info[
720 gfn_offset /
721 KVM_PAGES_PER_HPAGE].rmap_pde);
722 }
723 }
724
725 return retval;
726}
727
728int kvm_unmap_hva(struct kvm *kvm, unsigned long hva)
729{
730 return kvm_handle_hva(kvm, hva, kvm_unmap_rmapp);
731}
732
733static int kvm_age_rmapp(struct kvm *kvm, unsigned long *rmapp)
734{
735 u64 *spte;
736 int young = 0;
737
534e38b4
SY
738 /* always return old for EPT */
739 if (!shadow_accessed_mask)
740 return 0;
741
e930bffe
AA
742 spte = rmap_next(kvm, rmapp, NULL);
743 while (spte) {
744 int _young;
745 u64 _spte = *spte;
746 BUG_ON(!(_spte & PT_PRESENT_MASK));
747 _young = _spte & PT_ACCESSED_MASK;
748 if (_young) {
749 young = 1;
750 clear_bit(PT_ACCESSED_SHIFT, (unsigned long *)spte);
751 }
752 spte = rmap_next(kvm, rmapp, spte);
753 }
754 return young;
755}
756
757int kvm_age_hva(struct kvm *kvm, unsigned long hva)
758{
759 return kvm_handle_hva(kvm, hva, kvm_age_rmapp);
760}
761
d6c69ee9 762#ifdef MMU_DEBUG
47ad8e68 763static int is_empty_shadow_page(u64 *spt)
6aa8b732 764{
139bdb2d
AK
765 u64 *pos;
766 u64 *end;
767
47ad8e68 768 for (pos = spt, end = pos + PAGE_SIZE / sizeof(u64); pos != end; pos++)
3c915510 769 if (is_shadow_present_pte(*pos)) {
b8688d51 770 printk(KERN_ERR "%s: %p %llx\n", __func__,
139bdb2d 771 pos, *pos);
6aa8b732 772 return 0;
139bdb2d 773 }
6aa8b732
AK
774 return 1;
775}
d6c69ee9 776#endif
6aa8b732 777
4db35314 778static void kvm_mmu_free_page(struct kvm *kvm, struct kvm_mmu_page *sp)
260746c0 779{
4db35314
AK
780 ASSERT(is_empty_shadow_page(sp->spt));
781 list_del(&sp->link);
782 __free_page(virt_to_page(sp->spt));
783 __free_page(virt_to_page(sp->gfns));
784 kfree(sp);
f05e70ac 785 ++kvm->arch.n_free_mmu_pages;
260746c0
AK
786}
787
cea0f0e7
AK
788static unsigned kvm_page_table_hashfn(gfn_t gfn)
789{
1ae0a13d 790 return gfn & ((1 << KVM_MMU_HASH_SHIFT) - 1);
cea0f0e7
AK
791}
792
25c0de2c
AK
793static struct kvm_mmu_page *kvm_mmu_alloc_page(struct kvm_vcpu *vcpu,
794 u64 *parent_pte)
6aa8b732 795{
4db35314 796 struct kvm_mmu_page *sp;
6aa8b732 797
ad312c7c
ZX
798 sp = mmu_memory_cache_alloc(&vcpu->arch.mmu_page_header_cache, sizeof *sp);
799 sp->spt = mmu_memory_cache_alloc(&vcpu->arch.mmu_page_cache, PAGE_SIZE);
800 sp->gfns = mmu_memory_cache_alloc(&vcpu->arch.mmu_page_cache, PAGE_SIZE);
4db35314 801 set_page_private(virt_to_page(sp->spt), (unsigned long)sp);
f05e70ac 802 list_add(&sp->link, &vcpu->kvm->arch.active_mmu_pages);
6cffe8ca 803 INIT_LIST_HEAD(&sp->oos_link);
291f26bc 804 bitmap_zero(sp->slot_bitmap, KVM_MEMORY_SLOTS + KVM_PRIVATE_MEM_SLOTS);
4db35314
AK
805 sp->multimapped = 0;
806 sp->parent_pte = parent_pte;
f05e70ac 807 --vcpu->kvm->arch.n_free_mmu_pages;
4db35314 808 return sp;
6aa8b732
AK
809}
810
714b93da 811static void mmu_page_add_parent_pte(struct kvm_vcpu *vcpu,
4db35314 812 struct kvm_mmu_page *sp, u64 *parent_pte)
cea0f0e7
AK
813{
814 struct kvm_pte_chain *pte_chain;
815 struct hlist_node *node;
816 int i;
817
818 if (!parent_pte)
819 return;
4db35314
AK
820 if (!sp->multimapped) {
821 u64 *old = sp->parent_pte;
cea0f0e7
AK
822
823 if (!old) {
4db35314 824 sp->parent_pte = parent_pte;
cea0f0e7
AK
825 return;
826 }
4db35314 827 sp->multimapped = 1;
714b93da 828 pte_chain = mmu_alloc_pte_chain(vcpu);
4db35314
AK
829 INIT_HLIST_HEAD(&sp->parent_ptes);
830 hlist_add_head(&pte_chain->link, &sp->parent_ptes);
cea0f0e7
AK
831 pte_chain->parent_ptes[0] = old;
832 }
4db35314 833 hlist_for_each_entry(pte_chain, node, &sp->parent_ptes, link) {
cea0f0e7
AK
834 if (pte_chain->parent_ptes[NR_PTE_CHAIN_ENTRIES-1])
835 continue;
836 for (i = 0; i < NR_PTE_CHAIN_ENTRIES; ++i)
837 if (!pte_chain->parent_ptes[i]) {
838 pte_chain->parent_ptes[i] = parent_pte;
839 return;
840 }
841 }
714b93da 842 pte_chain = mmu_alloc_pte_chain(vcpu);
cea0f0e7 843 BUG_ON(!pte_chain);
4db35314 844 hlist_add_head(&pte_chain->link, &sp->parent_ptes);
cea0f0e7
AK
845 pte_chain->parent_ptes[0] = parent_pte;
846}
847
4db35314 848static void mmu_page_remove_parent_pte(struct kvm_mmu_page *sp,
cea0f0e7
AK
849 u64 *parent_pte)
850{
851 struct kvm_pte_chain *pte_chain;
852 struct hlist_node *node;
853 int i;
854
4db35314
AK
855 if (!sp->multimapped) {
856 BUG_ON(sp->parent_pte != parent_pte);
857 sp->parent_pte = NULL;
cea0f0e7
AK
858 return;
859 }
4db35314 860 hlist_for_each_entry(pte_chain, node, &sp->parent_ptes, link)
cea0f0e7
AK
861 for (i = 0; i < NR_PTE_CHAIN_ENTRIES; ++i) {
862 if (!pte_chain->parent_ptes[i])
863 break;
864 if (pte_chain->parent_ptes[i] != parent_pte)
865 continue;
697fe2e2
AK
866 while (i + 1 < NR_PTE_CHAIN_ENTRIES
867 && pte_chain->parent_ptes[i + 1]) {
cea0f0e7
AK
868 pte_chain->parent_ptes[i]
869 = pte_chain->parent_ptes[i + 1];
870 ++i;
871 }
872 pte_chain->parent_ptes[i] = NULL;
697fe2e2
AK
873 if (i == 0) {
874 hlist_del(&pte_chain->link);
90cb0529 875 mmu_free_pte_chain(pte_chain);
4db35314
AK
876 if (hlist_empty(&sp->parent_ptes)) {
877 sp->multimapped = 0;
878 sp->parent_pte = NULL;
697fe2e2
AK
879 }
880 }
cea0f0e7
AK
881 return;
882 }
883 BUG();
884}
885
ad8cfbe3
MT
886
887static void mmu_parent_walk(struct kvm_vcpu *vcpu, struct kvm_mmu_page *sp,
888 mmu_parent_walk_fn fn)
889{
890 struct kvm_pte_chain *pte_chain;
891 struct hlist_node *node;
892 struct kvm_mmu_page *parent_sp;
893 int i;
894
895 if (!sp->multimapped && sp->parent_pte) {
896 parent_sp = page_header(__pa(sp->parent_pte));
897 fn(vcpu, parent_sp);
898 mmu_parent_walk(vcpu, parent_sp, fn);
899 return;
900 }
901 hlist_for_each_entry(pte_chain, node, &sp->parent_ptes, link)
902 for (i = 0; i < NR_PTE_CHAIN_ENTRIES; ++i) {
903 if (!pte_chain->parent_ptes[i])
904 break;
905 parent_sp = page_header(__pa(pte_chain->parent_ptes[i]));
906 fn(vcpu, parent_sp);
907 mmu_parent_walk(vcpu, parent_sp, fn);
908 }
909}
910
0074ff63
MT
911static void kvm_mmu_update_unsync_bitmap(u64 *spte)
912{
913 unsigned int index;
914 struct kvm_mmu_page *sp = page_header(__pa(spte));
915
916 index = spte - sp->spt;
60c8aec6
MT
917 if (!__test_and_set_bit(index, sp->unsync_child_bitmap))
918 sp->unsync_children++;
919 WARN_ON(!sp->unsync_children);
0074ff63
MT
920}
921
922static void kvm_mmu_update_parents_unsync(struct kvm_mmu_page *sp)
923{
924 struct kvm_pte_chain *pte_chain;
925 struct hlist_node *node;
926 int i;
927
928 if (!sp->parent_pte)
929 return;
930
931 if (!sp->multimapped) {
932 kvm_mmu_update_unsync_bitmap(sp->parent_pte);
933 return;
934 }
935
936 hlist_for_each_entry(pte_chain, node, &sp->parent_ptes, link)
937 for (i = 0; i < NR_PTE_CHAIN_ENTRIES; ++i) {
938 if (!pte_chain->parent_ptes[i])
939 break;
940 kvm_mmu_update_unsync_bitmap(pte_chain->parent_ptes[i]);
941 }
942}
943
944static int unsync_walk_fn(struct kvm_vcpu *vcpu, struct kvm_mmu_page *sp)
945{
0074ff63
MT
946 kvm_mmu_update_parents_unsync(sp);
947 return 1;
948}
949
950static void kvm_mmu_mark_parents_unsync(struct kvm_vcpu *vcpu,
951 struct kvm_mmu_page *sp)
952{
953 mmu_parent_walk(vcpu, sp, unsync_walk_fn);
954 kvm_mmu_update_parents_unsync(sp);
955}
956
d761a501
AK
957static void nonpaging_prefetch_page(struct kvm_vcpu *vcpu,
958 struct kvm_mmu_page *sp)
959{
960 int i;
961
962 for (i = 0; i < PT64_ENT_PER_PAGE; ++i)
963 sp->spt[i] = shadow_trap_nonpresent_pte;
964}
965
e8bc217a
MT
966static int nonpaging_sync_page(struct kvm_vcpu *vcpu,
967 struct kvm_mmu_page *sp)
968{
969 return 1;
970}
971
a7052897
MT
972static void nonpaging_invlpg(struct kvm_vcpu *vcpu, gva_t gva)
973{
974}
975
60c8aec6
MT
976#define KVM_PAGE_ARRAY_NR 16
977
978struct kvm_mmu_pages {
979 struct mmu_page_and_offset {
980 struct kvm_mmu_page *sp;
981 unsigned int idx;
982 } page[KVM_PAGE_ARRAY_NR];
983 unsigned int nr;
984};
985
0074ff63
MT
986#define for_each_unsync_children(bitmap, idx) \
987 for (idx = find_first_bit(bitmap, 512); \
988 idx < 512; \
989 idx = find_next_bit(bitmap, 512, idx+1))
990
cded19f3
HE
991static int mmu_pages_add(struct kvm_mmu_pages *pvec, struct kvm_mmu_page *sp,
992 int idx)
4731d4c7 993{
60c8aec6 994 int i;
4731d4c7 995
60c8aec6
MT
996 if (sp->unsync)
997 for (i=0; i < pvec->nr; i++)
998 if (pvec->page[i].sp == sp)
999 return 0;
1000
1001 pvec->page[pvec->nr].sp = sp;
1002 pvec->page[pvec->nr].idx = idx;
1003 pvec->nr++;
1004 return (pvec->nr == KVM_PAGE_ARRAY_NR);
1005}
1006
1007static int __mmu_unsync_walk(struct kvm_mmu_page *sp,
1008 struct kvm_mmu_pages *pvec)
1009{
1010 int i, ret, nr_unsync_leaf = 0;
4731d4c7 1011
0074ff63 1012 for_each_unsync_children(sp->unsync_child_bitmap, i) {
4731d4c7
MT
1013 u64 ent = sp->spt[i];
1014
87917239 1015 if (is_shadow_present_pte(ent) && !is_large_pte(ent)) {
4731d4c7
MT
1016 struct kvm_mmu_page *child;
1017 child = page_header(ent & PT64_BASE_ADDR_MASK);
1018
1019 if (child->unsync_children) {
60c8aec6
MT
1020 if (mmu_pages_add(pvec, child, i))
1021 return -ENOSPC;
1022
1023 ret = __mmu_unsync_walk(child, pvec);
1024 if (!ret)
1025 __clear_bit(i, sp->unsync_child_bitmap);
1026 else if (ret > 0)
1027 nr_unsync_leaf += ret;
1028 else
4731d4c7
MT
1029 return ret;
1030 }
1031
1032 if (child->unsync) {
60c8aec6
MT
1033 nr_unsync_leaf++;
1034 if (mmu_pages_add(pvec, child, i))
1035 return -ENOSPC;
4731d4c7
MT
1036 }
1037 }
1038 }
1039
0074ff63 1040 if (find_first_bit(sp->unsync_child_bitmap, 512) == 512)
4731d4c7
MT
1041 sp->unsync_children = 0;
1042
60c8aec6
MT
1043 return nr_unsync_leaf;
1044}
1045
1046static int mmu_unsync_walk(struct kvm_mmu_page *sp,
1047 struct kvm_mmu_pages *pvec)
1048{
1049 if (!sp->unsync_children)
1050 return 0;
1051
1052 mmu_pages_add(pvec, sp, 0);
1053 return __mmu_unsync_walk(sp, pvec);
4731d4c7
MT
1054}
1055
4db35314 1056static struct kvm_mmu_page *kvm_mmu_lookup_page(struct kvm *kvm, gfn_t gfn)
cea0f0e7
AK
1057{
1058 unsigned index;
1059 struct hlist_head *bucket;
4db35314 1060 struct kvm_mmu_page *sp;
cea0f0e7
AK
1061 struct hlist_node *node;
1062
b8688d51 1063 pgprintk("%s: looking for gfn %lx\n", __func__, gfn);
1ae0a13d 1064 index = kvm_page_table_hashfn(gfn);
f05e70ac 1065 bucket = &kvm->arch.mmu_page_hash[index];
4db35314 1066 hlist_for_each_entry(sp, node, bucket, hash_link)
f6e2c02b 1067 if (sp->gfn == gfn && !sp->role.direct
2e53d63a 1068 && !sp->role.invalid) {
cea0f0e7 1069 pgprintk("%s: found role %x\n",
b8688d51 1070 __func__, sp->role.word);
4db35314 1071 return sp;
cea0f0e7
AK
1072 }
1073 return NULL;
1074}
1075
4731d4c7
MT
1076static void kvm_unlink_unsync_page(struct kvm *kvm, struct kvm_mmu_page *sp)
1077{
1078 WARN_ON(!sp->unsync);
1079 sp->unsync = 0;
1080 --kvm->stat.mmu_unsync;
1081}
1082
1083static int kvm_mmu_zap_page(struct kvm *kvm, struct kvm_mmu_page *sp);
1084
1085static int kvm_sync_page(struct kvm_vcpu *vcpu, struct kvm_mmu_page *sp)
1086{
1087 if (sp->role.glevels != vcpu->arch.mmu.root_level) {
1088 kvm_mmu_zap_page(vcpu->kvm, sp);
1089 return 1;
1090 }
1091
b1a36821
MT
1092 if (rmap_write_protect(vcpu->kvm, sp->gfn))
1093 kvm_flush_remote_tlbs(vcpu->kvm);
0c0f40bd 1094 kvm_unlink_unsync_page(vcpu->kvm, sp);
4731d4c7
MT
1095 if (vcpu->arch.mmu.sync_page(vcpu, sp)) {
1096 kvm_mmu_zap_page(vcpu->kvm, sp);
1097 return 1;
1098 }
1099
1100 kvm_mmu_flush_tlb(vcpu);
4731d4c7
MT
1101 return 0;
1102}
1103
60c8aec6
MT
1104struct mmu_page_path {
1105 struct kvm_mmu_page *parent[PT64_ROOT_LEVEL-1];
1106 unsigned int idx[PT64_ROOT_LEVEL-1];
4731d4c7
MT
1107};
1108
60c8aec6
MT
1109#define for_each_sp(pvec, sp, parents, i) \
1110 for (i = mmu_pages_next(&pvec, &parents, -1), \
1111 sp = pvec.page[i].sp; \
1112 i < pvec.nr && ({ sp = pvec.page[i].sp; 1;}); \
1113 i = mmu_pages_next(&pvec, &parents, i))
1114
cded19f3
HE
1115static int mmu_pages_next(struct kvm_mmu_pages *pvec,
1116 struct mmu_page_path *parents,
1117 int i)
60c8aec6
MT
1118{
1119 int n;
1120
1121 for (n = i+1; n < pvec->nr; n++) {
1122 struct kvm_mmu_page *sp = pvec->page[n].sp;
1123
1124 if (sp->role.level == PT_PAGE_TABLE_LEVEL) {
1125 parents->idx[0] = pvec->page[n].idx;
1126 return n;
1127 }
1128
1129 parents->parent[sp->role.level-2] = sp;
1130 parents->idx[sp->role.level-1] = pvec->page[n].idx;
1131 }
1132
1133 return n;
1134}
1135
cded19f3 1136static void mmu_pages_clear_parents(struct mmu_page_path *parents)
4731d4c7 1137{
60c8aec6
MT
1138 struct kvm_mmu_page *sp;
1139 unsigned int level = 0;
1140
1141 do {
1142 unsigned int idx = parents->idx[level];
4731d4c7 1143
60c8aec6
MT
1144 sp = parents->parent[level];
1145 if (!sp)
1146 return;
1147
1148 --sp->unsync_children;
1149 WARN_ON((int)sp->unsync_children < 0);
1150 __clear_bit(idx, sp->unsync_child_bitmap);
1151 level++;
1152 } while (level < PT64_ROOT_LEVEL-1 && !sp->unsync_children);
4731d4c7
MT
1153}
1154
60c8aec6
MT
1155static void kvm_mmu_pages_init(struct kvm_mmu_page *parent,
1156 struct mmu_page_path *parents,
1157 struct kvm_mmu_pages *pvec)
4731d4c7 1158{
60c8aec6
MT
1159 parents->parent[parent->role.level-1] = NULL;
1160 pvec->nr = 0;
1161}
4731d4c7 1162
60c8aec6
MT
1163static void mmu_sync_children(struct kvm_vcpu *vcpu,
1164 struct kvm_mmu_page *parent)
1165{
1166 int i;
1167 struct kvm_mmu_page *sp;
1168 struct mmu_page_path parents;
1169 struct kvm_mmu_pages pages;
1170
1171 kvm_mmu_pages_init(parent, &parents, &pages);
1172 while (mmu_unsync_walk(parent, &pages)) {
b1a36821
MT
1173 int protected = 0;
1174
1175 for_each_sp(pages, sp, parents, i)
1176 protected |= rmap_write_protect(vcpu->kvm, sp->gfn);
1177
1178 if (protected)
1179 kvm_flush_remote_tlbs(vcpu->kvm);
1180
60c8aec6
MT
1181 for_each_sp(pages, sp, parents, i) {
1182 kvm_sync_page(vcpu, sp);
1183 mmu_pages_clear_parents(&parents);
1184 }
4731d4c7 1185 cond_resched_lock(&vcpu->kvm->mmu_lock);
60c8aec6
MT
1186 kvm_mmu_pages_init(parent, &parents, &pages);
1187 }
4731d4c7
MT
1188}
1189
cea0f0e7
AK
1190static struct kvm_mmu_page *kvm_mmu_get_page(struct kvm_vcpu *vcpu,
1191 gfn_t gfn,
1192 gva_t gaddr,
1193 unsigned level,
f6e2c02b 1194 int direct,
41074d07 1195 unsigned access,
f7d9c7b7 1196 u64 *parent_pte)
cea0f0e7
AK
1197{
1198 union kvm_mmu_page_role role;
1199 unsigned index;
1200 unsigned quadrant;
1201 struct hlist_head *bucket;
4db35314 1202 struct kvm_mmu_page *sp;
4731d4c7 1203 struct hlist_node *node, *tmp;
cea0f0e7 1204
a770f6f2 1205 role = vcpu->arch.mmu.base_role;
cea0f0e7 1206 role.level = level;
f6e2c02b 1207 role.direct = direct;
41074d07 1208 role.access = access;
ad312c7c 1209 if (vcpu->arch.mmu.root_level <= PT32_ROOT_LEVEL) {
cea0f0e7
AK
1210 quadrant = gaddr >> (PAGE_SHIFT + (PT64_PT_BITS * level));
1211 quadrant &= (1 << ((PT32_PT_BITS - PT64_PT_BITS) * level)) - 1;
1212 role.quadrant = quadrant;
1213 }
b8688d51 1214 pgprintk("%s: looking gfn %lx role %x\n", __func__,
cea0f0e7 1215 gfn, role.word);
1ae0a13d 1216 index = kvm_page_table_hashfn(gfn);
f05e70ac 1217 bucket = &vcpu->kvm->arch.mmu_page_hash[index];
4731d4c7
MT
1218 hlist_for_each_entry_safe(sp, node, tmp, bucket, hash_link)
1219 if (sp->gfn == gfn) {
1220 if (sp->unsync)
1221 if (kvm_sync_page(vcpu, sp))
1222 continue;
1223
1224 if (sp->role.word != role.word)
1225 continue;
1226
4db35314 1227 mmu_page_add_parent_pte(vcpu, sp, parent_pte);
0074ff63
MT
1228 if (sp->unsync_children) {
1229 set_bit(KVM_REQ_MMU_SYNC, &vcpu->requests);
1230 kvm_mmu_mark_parents_unsync(vcpu, sp);
1231 }
b8688d51 1232 pgprintk("%s: found\n", __func__);
4db35314 1233 return sp;
cea0f0e7 1234 }
dfc5aa00 1235 ++vcpu->kvm->stat.mmu_cache_miss;
4db35314
AK
1236 sp = kvm_mmu_alloc_page(vcpu, parent_pte);
1237 if (!sp)
1238 return sp;
b8688d51 1239 pgprintk("%s: adding gfn %lx role %x\n", __func__, gfn, role.word);
4db35314
AK
1240 sp->gfn = gfn;
1241 sp->role = role;
1242 hlist_add_head(&sp->hash_link, bucket);
f6e2c02b 1243 if (!direct) {
b1a36821
MT
1244 if (rmap_write_protect(vcpu->kvm, gfn))
1245 kvm_flush_remote_tlbs(vcpu->kvm);
4731d4c7
MT
1246 account_shadowed(vcpu->kvm, gfn);
1247 }
131d8279
AK
1248 if (shadow_trap_nonpresent_pte != shadow_notrap_nonpresent_pte)
1249 vcpu->arch.mmu.prefetch_page(vcpu, sp);
1250 else
1251 nonpaging_prefetch_page(vcpu, sp);
4db35314 1252 return sp;
cea0f0e7
AK
1253}
1254
2d11123a
AK
1255static void shadow_walk_init(struct kvm_shadow_walk_iterator *iterator,
1256 struct kvm_vcpu *vcpu, u64 addr)
1257{
1258 iterator->addr = addr;
1259 iterator->shadow_addr = vcpu->arch.mmu.root_hpa;
1260 iterator->level = vcpu->arch.mmu.shadow_root_level;
1261 if (iterator->level == PT32E_ROOT_LEVEL) {
1262 iterator->shadow_addr
1263 = vcpu->arch.mmu.pae_root[(addr >> 30) & 3];
1264 iterator->shadow_addr &= PT64_BASE_ADDR_MASK;
1265 --iterator->level;
1266 if (!iterator->shadow_addr)
1267 iterator->level = 0;
1268 }
1269}
1270
1271static bool shadow_walk_okay(struct kvm_shadow_walk_iterator *iterator)
1272{
1273 if (iterator->level < PT_PAGE_TABLE_LEVEL)
1274 return false;
1275 iterator->index = SHADOW_PT_INDEX(iterator->addr, iterator->level);
1276 iterator->sptep = ((u64 *)__va(iterator->shadow_addr)) + iterator->index;
1277 return true;
1278}
1279
1280static void shadow_walk_next(struct kvm_shadow_walk_iterator *iterator)
1281{
1282 iterator->shadow_addr = *iterator->sptep & PT64_BASE_ADDR_MASK;
1283 --iterator->level;
1284}
1285
90cb0529 1286static void kvm_mmu_page_unlink_children(struct kvm *kvm,
4db35314 1287 struct kvm_mmu_page *sp)
a436036b 1288{
697fe2e2
AK
1289 unsigned i;
1290 u64 *pt;
1291 u64 ent;
1292
4db35314 1293 pt = sp->spt;
697fe2e2 1294
4db35314 1295 if (sp->role.level == PT_PAGE_TABLE_LEVEL) {
697fe2e2 1296 for (i = 0; i < PT64_ENT_PER_PAGE; ++i) {
c7addb90 1297 if (is_shadow_present_pte(pt[i]))
290fc38d 1298 rmap_remove(kvm, &pt[i]);
c7addb90 1299 pt[i] = shadow_trap_nonpresent_pte;
697fe2e2
AK
1300 }
1301 return;
1302 }
1303
1304 for (i = 0; i < PT64_ENT_PER_PAGE; ++i) {
1305 ent = pt[i];
1306
05da4558
MT
1307 if (is_shadow_present_pte(ent)) {
1308 if (!is_large_pte(ent)) {
1309 ent &= PT64_BASE_ADDR_MASK;
1310 mmu_page_remove_parent_pte(page_header(ent),
1311 &pt[i]);
1312 } else {
1313 --kvm->stat.lpages;
1314 rmap_remove(kvm, &pt[i]);
1315 }
1316 }
c7addb90 1317 pt[i] = shadow_trap_nonpresent_pte;
697fe2e2 1318 }
a436036b
AK
1319}
1320
4db35314 1321static void kvm_mmu_put_page(struct kvm_mmu_page *sp, u64 *parent_pte)
cea0f0e7 1322{
4db35314 1323 mmu_page_remove_parent_pte(sp, parent_pte);
a436036b
AK
1324}
1325
12b7d28f
AK
1326static void kvm_mmu_reset_last_pte_updated(struct kvm *kvm)
1327{
1328 int i;
1329
1330 for (i = 0; i < KVM_MAX_VCPUS; ++i)
1331 if (kvm->vcpus[i])
ad312c7c 1332 kvm->vcpus[i]->arch.last_pte_updated = NULL;
12b7d28f
AK
1333}
1334
31aa2b44 1335static void kvm_mmu_unlink_parents(struct kvm *kvm, struct kvm_mmu_page *sp)
a436036b
AK
1336{
1337 u64 *parent_pte;
1338
4db35314
AK
1339 while (sp->multimapped || sp->parent_pte) {
1340 if (!sp->multimapped)
1341 parent_pte = sp->parent_pte;
a436036b
AK
1342 else {
1343 struct kvm_pte_chain *chain;
1344
4db35314 1345 chain = container_of(sp->parent_ptes.first,
a436036b
AK
1346 struct kvm_pte_chain, link);
1347 parent_pte = chain->parent_ptes[0];
1348 }
697fe2e2 1349 BUG_ON(!parent_pte);
4db35314 1350 kvm_mmu_put_page(sp, parent_pte);
c7addb90 1351 set_shadow_pte(parent_pte, shadow_trap_nonpresent_pte);
a436036b 1352 }
31aa2b44
AK
1353}
1354
60c8aec6
MT
1355static int mmu_zap_unsync_children(struct kvm *kvm,
1356 struct kvm_mmu_page *parent)
4731d4c7 1357{
60c8aec6
MT
1358 int i, zapped = 0;
1359 struct mmu_page_path parents;
1360 struct kvm_mmu_pages pages;
4731d4c7 1361
60c8aec6 1362 if (parent->role.level == PT_PAGE_TABLE_LEVEL)
4731d4c7 1363 return 0;
60c8aec6
MT
1364
1365 kvm_mmu_pages_init(parent, &parents, &pages);
1366 while (mmu_unsync_walk(parent, &pages)) {
1367 struct kvm_mmu_page *sp;
1368
1369 for_each_sp(pages, sp, parents, i) {
1370 kvm_mmu_zap_page(kvm, sp);
1371 mmu_pages_clear_parents(&parents);
1372 }
1373 zapped += pages.nr;
1374 kvm_mmu_pages_init(parent, &parents, &pages);
1375 }
1376
1377 return zapped;
4731d4c7
MT
1378}
1379
07385413 1380static int kvm_mmu_zap_page(struct kvm *kvm, struct kvm_mmu_page *sp)
31aa2b44 1381{
4731d4c7 1382 int ret;
31aa2b44 1383 ++kvm->stat.mmu_shadow_zapped;
4731d4c7 1384 ret = mmu_zap_unsync_children(kvm, sp);
4db35314 1385 kvm_mmu_page_unlink_children(kvm, sp);
31aa2b44 1386 kvm_mmu_unlink_parents(kvm, sp);
5b5c6a5a 1387 kvm_flush_remote_tlbs(kvm);
f6e2c02b 1388 if (!sp->role.invalid && !sp->role.direct)
5b5c6a5a 1389 unaccount_shadowed(kvm, sp->gfn);
4731d4c7
MT
1390 if (sp->unsync)
1391 kvm_unlink_unsync_page(kvm, sp);
4db35314
AK
1392 if (!sp->root_count) {
1393 hlist_del(&sp->hash_link);
1394 kvm_mmu_free_page(kvm, sp);
2e53d63a 1395 } else {
2e53d63a 1396 sp->role.invalid = 1;
5b5c6a5a 1397 list_move(&sp->link, &kvm->arch.active_mmu_pages);
2e53d63a
MT
1398 kvm_reload_remote_mmus(kvm);
1399 }
12b7d28f 1400 kvm_mmu_reset_last_pte_updated(kvm);
4731d4c7 1401 return ret;
a436036b
AK
1402}
1403
82ce2c96
IE
1404/*
1405 * Changing the number of mmu pages allocated to the vm
1406 * Note: if kvm_nr_mmu_pages is too small, you will get dead lock
1407 */
1408void kvm_mmu_change_mmu_pages(struct kvm *kvm, unsigned int kvm_nr_mmu_pages)
1409{
1410 /*
1411 * If we set the number of mmu pages to be smaller be than the
1412 * number of actived pages , we must to free some mmu pages before we
1413 * change the value
1414 */
1415
f05e70ac 1416 if ((kvm->arch.n_alloc_mmu_pages - kvm->arch.n_free_mmu_pages) >
82ce2c96 1417 kvm_nr_mmu_pages) {
f05e70ac
ZX
1418 int n_used_mmu_pages = kvm->arch.n_alloc_mmu_pages
1419 - kvm->arch.n_free_mmu_pages;
82ce2c96
IE
1420
1421 while (n_used_mmu_pages > kvm_nr_mmu_pages) {
1422 struct kvm_mmu_page *page;
1423
f05e70ac 1424 page = container_of(kvm->arch.active_mmu_pages.prev,
82ce2c96
IE
1425 struct kvm_mmu_page, link);
1426 kvm_mmu_zap_page(kvm, page);
1427 n_used_mmu_pages--;
1428 }
f05e70ac 1429 kvm->arch.n_free_mmu_pages = 0;
82ce2c96
IE
1430 }
1431 else
f05e70ac
ZX
1432 kvm->arch.n_free_mmu_pages += kvm_nr_mmu_pages
1433 - kvm->arch.n_alloc_mmu_pages;
82ce2c96 1434
f05e70ac 1435 kvm->arch.n_alloc_mmu_pages = kvm_nr_mmu_pages;
82ce2c96
IE
1436}
1437
f67a46f4 1438static int kvm_mmu_unprotect_page(struct kvm *kvm, gfn_t gfn)
a436036b
AK
1439{
1440 unsigned index;
1441 struct hlist_head *bucket;
4db35314 1442 struct kvm_mmu_page *sp;
a436036b
AK
1443 struct hlist_node *node, *n;
1444 int r;
1445
b8688d51 1446 pgprintk("%s: looking for gfn %lx\n", __func__, gfn);
a436036b 1447 r = 0;
1ae0a13d 1448 index = kvm_page_table_hashfn(gfn);
f05e70ac 1449 bucket = &kvm->arch.mmu_page_hash[index];
4db35314 1450 hlist_for_each_entry_safe(sp, node, n, bucket, hash_link)
f6e2c02b 1451 if (sp->gfn == gfn && !sp->role.direct) {
b8688d51 1452 pgprintk("%s: gfn %lx role %x\n", __func__, gfn,
4db35314 1453 sp->role.word);
a436036b 1454 r = 1;
07385413
MT
1455 if (kvm_mmu_zap_page(kvm, sp))
1456 n = bucket->first;
a436036b
AK
1457 }
1458 return r;
cea0f0e7
AK
1459}
1460
f67a46f4 1461static void mmu_unshadow(struct kvm *kvm, gfn_t gfn)
97a0a01e 1462{
4677a3b6
AK
1463 unsigned index;
1464 struct hlist_head *bucket;
4db35314 1465 struct kvm_mmu_page *sp;
4677a3b6 1466 struct hlist_node *node, *nn;
97a0a01e 1467
4677a3b6
AK
1468 index = kvm_page_table_hashfn(gfn);
1469 bucket = &kvm->arch.mmu_page_hash[index];
1470 hlist_for_each_entry_safe(sp, node, nn, bucket, hash_link) {
f6e2c02b 1471 if (sp->gfn == gfn && !sp->role.direct
4677a3b6
AK
1472 && !sp->role.invalid) {
1473 pgprintk("%s: zap %lx %x\n",
1474 __func__, gfn, sp->role.word);
1475 kvm_mmu_zap_page(kvm, sp);
1476 }
97a0a01e
AK
1477 }
1478}
1479
38c335f1 1480static void page_header_update_slot(struct kvm *kvm, void *pte, gfn_t gfn)
6aa8b732 1481{
38c335f1 1482 int slot = memslot_id(kvm, gfn_to_memslot(kvm, gfn));
4db35314 1483 struct kvm_mmu_page *sp = page_header(__pa(pte));
6aa8b732 1484
291f26bc 1485 __set_bit(slot, sp->slot_bitmap);
6aa8b732
AK
1486}
1487
6844dec6
MT
1488static void mmu_convert_notrap(struct kvm_mmu_page *sp)
1489{
1490 int i;
1491 u64 *pt = sp->spt;
1492
1493 if (shadow_trap_nonpresent_pte == shadow_notrap_nonpresent_pte)
1494 return;
1495
1496 for (i = 0; i < PT64_ENT_PER_PAGE; ++i) {
1497 if (pt[i] == shadow_notrap_nonpresent_pte)
1498 set_shadow_pte(&pt[i], shadow_trap_nonpresent_pte);
1499 }
1500}
1501
039576c0
AK
1502struct page *gva_to_page(struct kvm_vcpu *vcpu, gva_t gva)
1503{
72dc67a6
IE
1504 struct page *page;
1505
ad312c7c 1506 gpa_t gpa = vcpu->arch.mmu.gva_to_gpa(vcpu, gva);
039576c0
AK
1507
1508 if (gpa == UNMAPPED_GVA)
1509 return NULL;
72dc67a6 1510
72dc67a6 1511 page = gfn_to_page(vcpu->kvm, gpa >> PAGE_SHIFT);
72dc67a6
IE
1512
1513 return page;
039576c0
AK
1514}
1515
74be52e3
SY
1516/*
1517 * The function is based on mtrr_type_lookup() in
1518 * arch/x86/kernel/cpu/mtrr/generic.c
1519 */
1520static int get_mtrr_type(struct mtrr_state_type *mtrr_state,
1521 u64 start, u64 end)
1522{
1523 int i;
1524 u64 base, mask;
1525 u8 prev_match, curr_match;
1526 int num_var_ranges = KVM_NR_VAR_MTRR;
1527
1528 if (!mtrr_state->enabled)
1529 return 0xFF;
1530
1531 /* Make end inclusive end, instead of exclusive */
1532 end--;
1533
1534 /* Look in fixed ranges. Just return the type as per start */
1535 if (mtrr_state->have_fixed && (start < 0x100000)) {
1536 int idx;
1537
1538 if (start < 0x80000) {
1539 idx = 0;
1540 idx += (start >> 16);
1541 return mtrr_state->fixed_ranges[idx];
1542 } else if (start < 0xC0000) {
1543 idx = 1 * 8;
1544 idx += ((start - 0x80000) >> 14);
1545 return mtrr_state->fixed_ranges[idx];
1546 } else if (start < 0x1000000) {
1547 idx = 3 * 8;
1548 idx += ((start - 0xC0000) >> 12);
1549 return mtrr_state->fixed_ranges[idx];
1550 }
1551 }
1552
1553 /*
1554 * Look in variable ranges
1555 * Look of multiple ranges matching this address and pick type
1556 * as per MTRR precedence
1557 */
1558 if (!(mtrr_state->enabled & 2))
1559 return mtrr_state->def_type;
1560
1561 prev_match = 0xFF;
1562 for (i = 0; i < num_var_ranges; ++i) {
1563 unsigned short start_state, end_state;
1564
1565 if (!(mtrr_state->var_ranges[i].mask_lo & (1 << 11)))
1566 continue;
1567
1568 base = (((u64)mtrr_state->var_ranges[i].base_hi) << 32) +
1569 (mtrr_state->var_ranges[i].base_lo & PAGE_MASK);
1570 mask = (((u64)mtrr_state->var_ranges[i].mask_hi) << 32) +
1571 (mtrr_state->var_ranges[i].mask_lo & PAGE_MASK);
1572
1573 start_state = ((start & mask) == (base & mask));
1574 end_state = ((end & mask) == (base & mask));
1575 if (start_state != end_state)
1576 return 0xFE;
1577
1578 if ((start & mask) != (base & mask))
1579 continue;
1580
1581 curr_match = mtrr_state->var_ranges[i].base_lo & 0xff;
1582 if (prev_match == 0xFF) {
1583 prev_match = curr_match;
1584 continue;
1585 }
1586
1587 if (prev_match == MTRR_TYPE_UNCACHABLE ||
1588 curr_match == MTRR_TYPE_UNCACHABLE)
1589 return MTRR_TYPE_UNCACHABLE;
1590
1591 if ((prev_match == MTRR_TYPE_WRBACK &&
1592 curr_match == MTRR_TYPE_WRTHROUGH) ||
1593 (prev_match == MTRR_TYPE_WRTHROUGH &&
1594 curr_match == MTRR_TYPE_WRBACK)) {
1595 prev_match = MTRR_TYPE_WRTHROUGH;
1596 curr_match = MTRR_TYPE_WRTHROUGH;
1597 }
1598
1599 if (prev_match != curr_match)
1600 return MTRR_TYPE_UNCACHABLE;
1601 }
1602
1603 if (prev_match != 0xFF)
1604 return prev_match;
1605
1606 return mtrr_state->def_type;
1607}
1608
4b12f0de 1609u8 kvm_get_guest_memory_type(struct kvm_vcpu *vcpu, gfn_t gfn)
74be52e3
SY
1610{
1611 u8 mtrr;
1612
1613 mtrr = get_mtrr_type(&vcpu->arch.mtrr_state, gfn << PAGE_SHIFT,
1614 (gfn << PAGE_SHIFT) + PAGE_SIZE);
1615 if (mtrr == 0xfe || mtrr == 0xff)
1616 mtrr = MTRR_TYPE_WRBACK;
1617 return mtrr;
1618}
4b12f0de 1619EXPORT_SYMBOL_GPL(kvm_get_guest_memory_type);
74be52e3 1620
4731d4c7
MT
1621static int kvm_unsync_page(struct kvm_vcpu *vcpu, struct kvm_mmu_page *sp)
1622{
1623 unsigned index;
1624 struct hlist_head *bucket;
1625 struct kvm_mmu_page *s;
1626 struct hlist_node *node, *n;
1627
1628 index = kvm_page_table_hashfn(sp->gfn);
1629 bucket = &vcpu->kvm->arch.mmu_page_hash[index];
1630 /* don't unsync if pagetable is shadowed with multiple roles */
1631 hlist_for_each_entry_safe(s, node, n, bucket, hash_link) {
f6e2c02b 1632 if (s->gfn != sp->gfn || s->role.direct)
4731d4c7
MT
1633 continue;
1634 if (s->role.word != sp->role.word)
1635 return 1;
1636 }
4731d4c7
MT
1637 ++vcpu->kvm->stat.mmu_unsync;
1638 sp->unsync = 1;
6cffe8ca 1639
c2d0ee46 1640 kvm_mmu_mark_parents_unsync(vcpu, sp);
6cffe8ca 1641
4731d4c7
MT
1642 mmu_convert_notrap(sp);
1643 return 0;
1644}
1645
1646static int mmu_need_write_protect(struct kvm_vcpu *vcpu, gfn_t gfn,
1647 bool can_unsync)
1648{
1649 struct kvm_mmu_page *shadow;
1650
1651 shadow = kvm_mmu_lookup_page(vcpu->kvm, gfn);
1652 if (shadow) {
1653 if (shadow->role.level != PT_PAGE_TABLE_LEVEL)
1654 return 1;
1655 if (shadow->unsync)
1656 return 0;
582801a9 1657 if (can_unsync && oos_shadow)
4731d4c7
MT
1658 return kvm_unsync_page(vcpu, shadow);
1659 return 1;
1660 }
1661 return 0;
1662}
1663
1e73f9dd
MT
1664static int set_spte(struct kvm_vcpu *vcpu, u64 *shadow_pte,
1665 unsigned pte_access, int user_fault,
1666 int write_fault, int dirty, int largepage,
c2d0ee46 1667 gfn_t gfn, pfn_t pfn, bool speculative,
4731d4c7 1668 bool can_unsync)
1c4f1fd6
AK
1669{
1670 u64 spte;
1e73f9dd 1671 int ret = 0;
64d4d521 1672
1c4f1fd6
AK
1673 /*
1674 * We don't set the accessed bit, since we sometimes want to see
1675 * whether the guest actually used the pte (in order to detect
1676 * demand paging).
1677 */
7b52345e 1678 spte = shadow_base_present_pte | shadow_dirty_mask;
947da538 1679 if (!speculative)
3201b5d9 1680 spte |= shadow_accessed_mask;
1c4f1fd6
AK
1681 if (!dirty)
1682 pte_access &= ~ACC_WRITE_MASK;
7b52345e
SY
1683 if (pte_access & ACC_EXEC_MASK)
1684 spte |= shadow_x_mask;
1685 else
1686 spte |= shadow_nx_mask;
1c4f1fd6 1687 if (pte_access & ACC_USER_MASK)
7b52345e 1688 spte |= shadow_user_mask;
05da4558
MT
1689 if (largepage)
1690 spte |= PT_PAGE_SIZE_MASK;
4b12f0de
SY
1691 if (tdp_enabled)
1692 spte |= kvm_x86_ops->get_mt_mask(vcpu, gfn,
1693 kvm_is_mmio_pfn(pfn));
1c4f1fd6 1694
35149e21 1695 spte |= (u64)pfn << PAGE_SHIFT;
1c4f1fd6
AK
1696
1697 if ((pte_access & ACC_WRITE_MASK)
1698 || (write_fault && !is_write_protection(vcpu) && !user_fault)) {
1c4f1fd6 1699
38187c83
MT
1700 if (largepage && has_wrprotected_page(vcpu->kvm, gfn)) {
1701 ret = 1;
1702 spte = shadow_trap_nonpresent_pte;
1703 goto set_pte;
1704 }
1705
1c4f1fd6 1706 spte |= PT_WRITABLE_MASK;
1c4f1fd6 1707
ecc5589f
MT
1708 /*
1709 * Optimization: for pte sync, if spte was writable the hash
1710 * lookup is unnecessary (and expensive). Write protection
1711 * is responsibility of mmu_get_page / kvm_sync_page.
1712 * Same reasoning can be applied to dirty page accounting.
1713 */
1714 if (!can_unsync && is_writeble_pte(*shadow_pte))
1715 goto set_pte;
1716
4731d4c7 1717 if (mmu_need_write_protect(vcpu, gfn, can_unsync)) {
1c4f1fd6 1718 pgprintk("%s: found shadow page for %lx, marking ro\n",
b8688d51 1719 __func__, gfn);
1e73f9dd 1720 ret = 1;
1c4f1fd6 1721 pte_access &= ~ACC_WRITE_MASK;
a378b4e6 1722 if (is_writeble_pte(spte))
1c4f1fd6 1723 spte &= ~PT_WRITABLE_MASK;
1c4f1fd6
AK
1724 }
1725 }
1726
1c4f1fd6
AK
1727 if (pte_access & ACC_WRITE_MASK)
1728 mark_page_dirty(vcpu->kvm, gfn);
1729
38187c83 1730set_pte:
1c4f1fd6 1731 set_shadow_pte(shadow_pte, spte);
1e73f9dd
MT
1732 return ret;
1733}
1734
1e73f9dd
MT
1735static void mmu_set_spte(struct kvm_vcpu *vcpu, u64 *shadow_pte,
1736 unsigned pt_access, unsigned pte_access,
1737 int user_fault, int write_fault, int dirty,
c2d0ee46
MT
1738 int *ptwrite, int largepage, gfn_t gfn,
1739 pfn_t pfn, bool speculative)
1e73f9dd
MT
1740{
1741 int was_rmapped = 0;
1742 int was_writeble = is_writeble_pte(*shadow_pte);
1743
1744 pgprintk("%s: spte %llx access %x write_fault %d"
1745 " user_fault %d gfn %lx\n",
1746 __func__, *shadow_pte, pt_access,
1747 write_fault, user_fault, gfn);
1748
1749 if (is_rmap_pte(*shadow_pte)) {
1750 /*
1751 * If we overwrite a PTE page pointer with a 2MB PMD, unlink
1752 * the parent of the now unreachable PTE.
1753 */
1754 if (largepage && !is_large_pte(*shadow_pte)) {
1755 struct kvm_mmu_page *child;
1756 u64 pte = *shadow_pte;
1757
1758 child = page_header(pte & PT64_BASE_ADDR_MASK);
1759 mmu_page_remove_parent_pte(child, shadow_pte);
1760 } else if (pfn != spte_to_pfn(*shadow_pte)) {
1761 pgprintk("hfn old %lx new %lx\n",
1762 spte_to_pfn(*shadow_pte), pfn);
1763 rmap_remove(vcpu->kvm, shadow_pte);
6bed6b9e
JR
1764 } else
1765 was_rmapped = 1;
1e73f9dd
MT
1766 }
1767 if (set_spte(vcpu, shadow_pte, pte_access, user_fault, write_fault,
c2d0ee46 1768 dirty, largepage, gfn, pfn, speculative, true)) {
1e73f9dd
MT
1769 if (write_fault)
1770 *ptwrite = 1;
a378b4e6
MT
1771 kvm_x86_ops->tlb_flush(vcpu);
1772 }
1e73f9dd
MT
1773
1774 pgprintk("%s: setting spte %llx\n", __func__, *shadow_pte);
1775 pgprintk("instantiating %s PTE (%s) at %ld (%llx) addr %p\n",
1776 is_large_pte(*shadow_pte)? "2MB" : "4kB",
1777 is_present_pte(*shadow_pte)?"RW":"R", gfn,
1778 *shadow_pte, shadow_pte);
1779 if (!was_rmapped && is_large_pte(*shadow_pte))
05da4558
MT
1780 ++vcpu->kvm->stat.lpages;
1781
1c4f1fd6
AK
1782 page_header_update_slot(vcpu->kvm, shadow_pte, gfn);
1783 if (!was_rmapped) {
05da4558 1784 rmap_add(vcpu, shadow_pte, gfn, largepage);
1c4f1fd6 1785 if (!is_rmap_pte(*shadow_pte))
35149e21 1786 kvm_release_pfn_clean(pfn);
75e68e60
IE
1787 } else {
1788 if (was_writeble)
35149e21 1789 kvm_release_pfn_dirty(pfn);
75e68e60 1790 else
35149e21 1791 kvm_release_pfn_clean(pfn);
1c4f1fd6 1792 }
1b7fcd32 1793 if (speculative) {
ad312c7c 1794 vcpu->arch.last_pte_updated = shadow_pte;
1b7fcd32
AK
1795 vcpu->arch.last_pte_gfn = gfn;
1796 }
1c4f1fd6
AK
1797}
1798
6aa8b732
AK
1799static void nonpaging_new_cr3(struct kvm_vcpu *vcpu)
1800{
1801}
1802
9f652d21
AK
1803static int __direct_map(struct kvm_vcpu *vcpu, gpa_t v, int write,
1804 int largepage, gfn_t gfn, pfn_t pfn)
140754bc 1805{
9f652d21 1806 struct kvm_shadow_walk_iterator iterator;
140754bc 1807 struct kvm_mmu_page *sp;
9f652d21 1808 int pt_write = 0;
140754bc 1809 gfn_t pseudo_gfn;
6aa8b732 1810
9f652d21
AK
1811 for_each_shadow_entry(vcpu, (u64)gfn << PAGE_SHIFT, iterator) {
1812 if (iterator.level == PT_PAGE_TABLE_LEVEL
1813 || (largepage && iterator.level == PT_DIRECTORY_LEVEL)) {
1814 mmu_set_spte(vcpu, iterator.sptep, ACC_ALL, ACC_ALL,
1815 0, write, 1, &pt_write,
c2d0ee46 1816 largepage, gfn, pfn, false);
9f652d21
AK
1817 ++vcpu->stat.pf_fixed;
1818 break;
6aa8b732
AK
1819 }
1820
9f652d21
AK
1821 if (*iterator.sptep == shadow_trap_nonpresent_pte) {
1822 pseudo_gfn = (iterator.addr & PT64_DIR_BASE_ADDR_MASK) >> PAGE_SHIFT;
1823 sp = kvm_mmu_get_page(vcpu, pseudo_gfn, iterator.addr,
1824 iterator.level - 1,
1825 1, ACC_ALL, iterator.sptep);
1826 if (!sp) {
1827 pgprintk("nonpaging_map: ENOMEM\n");
1828 kvm_release_pfn_clean(pfn);
1829 return -ENOMEM;
1830 }
140754bc 1831
9f652d21
AK
1832 set_shadow_pte(iterator.sptep,
1833 __pa(sp->spt)
1834 | PT_PRESENT_MASK | PT_WRITABLE_MASK
1835 | shadow_user_mask | shadow_x_mask);
1836 }
1837 }
1838 return pt_write;
6aa8b732
AK
1839}
1840
10589a46
MT
1841static int nonpaging_map(struct kvm_vcpu *vcpu, gva_t v, int write, gfn_t gfn)
1842{
1843 int r;
05da4558 1844 int largepage = 0;
35149e21 1845 pfn_t pfn;
e930bffe 1846 unsigned long mmu_seq;
aaee2c94 1847
05da4558
MT
1848 if (is_largepage_backed(vcpu, gfn & ~(KVM_PAGES_PER_HPAGE-1))) {
1849 gfn &= ~(KVM_PAGES_PER_HPAGE-1);
1850 largepage = 1;
1851 }
1852
e930bffe 1853 mmu_seq = vcpu->kvm->mmu_notifier_seq;
4c2155ce 1854 smp_rmb();
35149e21 1855 pfn = gfn_to_pfn(vcpu->kvm, gfn);
aaee2c94 1856
d196e343 1857 /* mmio */
35149e21
AL
1858 if (is_error_pfn(pfn)) {
1859 kvm_release_pfn_clean(pfn);
d196e343
AK
1860 return 1;
1861 }
1862
aaee2c94 1863 spin_lock(&vcpu->kvm->mmu_lock);
e930bffe
AA
1864 if (mmu_notifier_retry(vcpu, mmu_seq))
1865 goto out_unlock;
eb787d10 1866 kvm_mmu_free_some_pages(vcpu);
6c41f428 1867 r = __direct_map(vcpu, v, write, largepage, gfn, pfn);
aaee2c94
MT
1868 spin_unlock(&vcpu->kvm->mmu_lock);
1869
aaee2c94 1870
10589a46 1871 return r;
e930bffe
AA
1872
1873out_unlock:
1874 spin_unlock(&vcpu->kvm->mmu_lock);
1875 kvm_release_pfn_clean(pfn);
1876 return 0;
10589a46
MT
1877}
1878
1879
17ac10ad
AK
1880static void mmu_free_roots(struct kvm_vcpu *vcpu)
1881{
1882 int i;
4db35314 1883 struct kvm_mmu_page *sp;
17ac10ad 1884
ad312c7c 1885 if (!VALID_PAGE(vcpu->arch.mmu.root_hpa))
7b53aa56 1886 return;
aaee2c94 1887 spin_lock(&vcpu->kvm->mmu_lock);
ad312c7c
ZX
1888 if (vcpu->arch.mmu.shadow_root_level == PT64_ROOT_LEVEL) {
1889 hpa_t root = vcpu->arch.mmu.root_hpa;
17ac10ad 1890
4db35314
AK
1891 sp = page_header(root);
1892 --sp->root_count;
2e53d63a
MT
1893 if (!sp->root_count && sp->role.invalid)
1894 kvm_mmu_zap_page(vcpu->kvm, sp);
ad312c7c 1895 vcpu->arch.mmu.root_hpa = INVALID_PAGE;
aaee2c94 1896 spin_unlock(&vcpu->kvm->mmu_lock);
17ac10ad
AK
1897 return;
1898 }
17ac10ad 1899 for (i = 0; i < 4; ++i) {
ad312c7c 1900 hpa_t root = vcpu->arch.mmu.pae_root[i];
17ac10ad 1901
417726a3 1902 if (root) {
417726a3 1903 root &= PT64_BASE_ADDR_MASK;
4db35314
AK
1904 sp = page_header(root);
1905 --sp->root_count;
2e53d63a
MT
1906 if (!sp->root_count && sp->role.invalid)
1907 kvm_mmu_zap_page(vcpu->kvm, sp);
417726a3 1908 }
ad312c7c 1909 vcpu->arch.mmu.pae_root[i] = INVALID_PAGE;
17ac10ad 1910 }
aaee2c94 1911 spin_unlock(&vcpu->kvm->mmu_lock);
ad312c7c 1912 vcpu->arch.mmu.root_hpa = INVALID_PAGE;
17ac10ad
AK
1913}
1914
1915static void mmu_alloc_roots(struct kvm_vcpu *vcpu)
1916{
1917 int i;
cea0f0e7 1918 gfn_t root_gfn;
4db35314 1919 struct kvm_mmu_page *sp;
f6e2c02b 1920 int direct = 0;
3bb65a22 1921
ad312c7c 1922 root_gfn = vcpu->arch.cr3 >> PAGE_SHIFT;
17ac10ad 1923
ad312c7c
ZX
1924 if (vcpu->arch.mmu.shadow_root_level == PT64_ROOT_LEVEL) {
1925 hpa_t root = vcpu->arch.mmu.root_hpa;
17ac10ad
AK
1926
1927 ASSERT(!VALID_PAGE(root));
fb72d167 1928 if (tdp_enabled)
f6e2c02b 1929 direct = 1;
4db35314 1930 sp = kvm_mmu_get_page(vcpu, root_gfn, 0,
f6e2c02b 1931 PT64_ROOT_LEVEL, direct,
fb72d167 1932 ACC_ALL, NULL);
4db35314
AK
1933 root = __pa(sp->spt);
1934 ++sp->root_count;
ad312c7c 1935 vcpu->arch.mmu.root_hpa = root;
17ac10ad
AK
1936 return;
1937 }
f6e2c02b 1938 direct = !is_paging(vcpu);
fb72d167 1939 if (tdp_enabled)
f6e2c02b 1940 direct = 1;
17ac10ad 1941 for (i = 0; i < 4; ++i) {
ad312c7c 1942 hpa_t root = vcpu->arch.mmu.pae_root[i];
17ac10ad
AK
1943
1944 ASSERT(!VALID_PAGE(root));
ad312c7c
ZX
1945 if (vcpu->arch.mmu.root_level == PT32E_ROOT_LEVEL) {
1946 if (!is_present_pte(vcpu->arch.pdptrs[i])) {
1947 vcpu->arch.mmu.pae_root[i] = 0;
417726a3
AK
1948 continue;
1949 }
ad312c7c
ZX
1950 root_gfn = vcpu->arch.pdptrs[i] >> PAGE_SHIFT;
1951 } else if (vcpu->arch.mmu.root_level == 0)
cea0f0e7 1952 root_gfn = 0;
4db35314 1953 sp = kvm_mmu_get_page(vcpu, root_gfn, i << 30,
f6e2c02b 1954 PT32_ROOT_LEVEL, direct,
f7d9c7b7 1955 ACC_ALL, NULL);
4db35314
AK
1956 root = __pa(sp->spt);
1957 ++sp->root_count;
ad312c7c 1958 vcpu->arch.mmu.pae_root[i] = root | PT_PRESENT_MASK;
17ac10ad 1959 }
ad312c7c 1960 vcpu->arch.mmu.root_hpa = __pa(vcpu->arch.mmu.pae_root);
17ac10ad
AK
1961}
1962
0ba73cda
MT
1963static void mmu_sync_roots(struct kvm_vcpu *vcpu)
1964{
1965 int i;
1966 struct kvm_mmu_page *sp;
1967
1968 if (!VALID_PAGE(vcpu->arch.mmu.root_hpa))
1969 return;
1970 if (vcpu->arch.mmu.shadow_root_level == PT64_ROOT_LEVEL) {
1971 hpa_t root = vcpu->arch.mmu.root_hpa;
1972 sp = page_header(root);
1973 mmu_sync_children(vcpu, sp);
1974 return;
1975 }
1976 for (i = 0; i < 4; ++i) {
1977 hpa_t root = vcpu->arch.mmu.pae_root[i];
1978
1979 if (root) {
1980 root &= PT64_BASE_ADDR_MASK;
1981 sp = page_header(root);
1982 mmu_sync_children(vcpu, sp);
1983 }
1984 }
1985}
1986
1987void kvm_mmu_sync_roots(struct kvm_vcpu *vcpu)
1988{
1989 spin_lock(&vcpu->kvm->mmu_lock);
1990 mmu_sync_roots(vcpu);
6cffe8ca 1991 spin_unlock(&vcpu->kvm->mmu_lock);
0ba73cda
MT
1992}
1993
6aa8b732
AK
1994static gpa_t nonpaging_gva_to_gpa(struct kvm_vcpu *vcpu, gva_t vaddr)
1995{
1996 return vaddr;
1997}
1998
1999static int nonpaging_page_fault(struct kvm_vcpu *vcpu, gva_t gva,
3f3e7124 2000 u32 error_code)
6aa8b732 2001{
e833240f 2002 gfn_t gfn;
e2dec939 2003 int r;
6aa8b732 2004
b8688d51 2005 pgprintk("%s: gva %lx error %x\n", __func__, gva, error_code);
e2dec939
AK
2006 r = mmu_topup_memory_caches(vcpu);
2007 if (r)
2008 return r;
714b93da 2009
6aa8b732 2010 ASSERT(vcpu);
ad312c7c 2011 ASSERT(VALID_PAGE(vcpu->arch.mmu.root_hpa));
6aa8b732 2012
e833240f 2013 gfn = gva >> PAGE_SHIFT;
6aa8b732 2014
e833240f
AK
2015 return nonpaging_map(vcpu, gva & PAGE_MASK,
2016 error_code & PFERR_WRITE_MASK, gfn);
6aa8b732
AK
2017}
2018
fb72d167
JR
2019static int tdp_page_fault(struct kvm_vcpu *vcpu, gva_t gpa,
2020 u32 error_code)
2021{
35149e21 2022 pfn_t pfn;
fb72d167 2023 int r;
05da4558
MT
2024 int largepage = 0;
2025 gfn_t gfn = gpa >> PAGE_SHIFT;
e930bffe 2026 unsigned long mmu_seq;
fb72d167
JR
2027
2028 ASSERT(vcpu);
2029 ASSERT(VALID_PAGE(vcpu->arch.mmu.root_hpa));
2030
2031 r = mmu_topup_memory_caches(vcpu);
2032 if (r)
2033 return r;
2034
05da4558
MT
2035 if (is_largepage_backed(vcpu, gfn & ~(KVM_PAGES_PER_HPAGE-1))) {
2036 gfn &= ~(KVM_PAGES_PER_HPAGE-1);
2037 largepage = 1;
2038 }
e930bffe 2039 mmu_seq = vcpu->kvm->mmu_notifier_seq;
4c2155ce 2040 smp_rmb();
35149e21 2041 pfn = gfn_to_pfn(vcpu->kvm, gfn);
35149e21
AL
2042 if (is_error_pfn(pfn)) {
2043 kvm_release_pfn_clean(pfn);
fb72d167
JR
2044 return 1;
2045 }
2046 spin_lock(&vcpu->kvm->mmu_lock);
e930bffe
AA
2047 if (mmu_notifier_retry(vcpu, mmu_seq))
2048 goto out_unlock;
fb72d167
JR
2049 kvm_mmu_free_some_pages(vcpu);
2050 r = __direct_map(vcpu, gpa, error_code & PFERR_WRITE_MASK,
6c41f428 2051 largepage, gfn, pfn);
fb72d167 2052 spin_unlock(&vcpu->kvm->mmu_lock);
fb72d167
JR
2053
2054 return r;
e930bffe
AA
2055
2056out_unlock:
2057 spin_unlock(&vcpu->kvm->mmu_lock);
2058 kvm_release_pfn_clean(pfn);
2059 return 0;
fb72d167
JR
2060}
2061
6aa8b732
AK
2062static void nonpaging_free(struct kvm_vcpu *vcpu)
2063{
17ac10ad 2064 mmu_free_roots(vcpu);
6aa8b732
AK
2065}
2066
2067static int nonpaging_init_context(struct kvm_vcpu *vcpu)
2068{
ad312c7c 2069 struct kvm_mmu *context = &vcpu->arch.mmu;
6aa8b732
AK
2070
2071 context->new_cr3 = nonpaging_new_cr3;
2072 context->page_fault = nonpaging_page_fault;
6aa8b732
AK
2073 context->gva_to_gpa = nonpaging_gva_to_gpa;
2074 context->free = nonpaging_free;
c7addb90 2075 context->prefetch_page = nonpaging_prefetch_page;
e8bc217a 2076 context->sync_page = nonpaging_sync_page;
a7052897 2077 context->invlpg = nonpaging_invlpg;
cea0f0e7 2078 context->root_level = 0;
6aa8b732 2079 context->shadow_root_level = PT32E_ROOT_LEVEL;
17c3ba9d 2080 context->root_hpa = INVALID_PAGE;
6aa8b732
AK
2081 return 0;
2082}
2083
d835dfec 2084void kvm_mmu_flush_tlb(struct kvm_vcpu *vcpu)
6aa8b732 2085{
1165f5fe 2086 ++vcpu->stat.tlb_flush;
cbdd1bea 2087 kvm_x86_ops->tlb_flush(vcpu);
6aa8b732
AK
2088}
2089
2090static void paging_new_cr3(struct kvm_vcpu *vcpu)
2091{
b8688d51 2092 pgprintk("%s: cr3 %lx\n", __func__, vcpu->arch.cr3);
cea0f0e7 2093 mmu_free_roots(vcpu);
6aa8b732
AK
2094}
2095
6aa8b732
AK
2096static void inject_page_fault(struct kvm_vcpu *vcpu,
2097 u64 addr,
2098 u32 err_code)
2099{
c3c91fee 2100 kvm_inject_page_fault(vcpu, addr, err_code);
6aa8b732
AK
2101}
2102
6aa8b732
AK
2103static void paging_free(struct kvm_vcpu *vcpu)
2104{
2105 nonpaging_free(vcpu);
2106}
2107
82725b20
DE
2108static bool is_rsvd_bits_set(struct kvm_vcpu *vcpu, u64 gpte, int level)
2109{
2110 int bit7;
2111
2112 bit7 = (gpte >> 7) & 1;
2113 return (gpte & vcpu->arch.mmu.rsvd_bits_mask[bit7][level-1]) != 0;
2114}
2115
6aa8b732
AK
2116#define PTTYPE 64
2117#include "paging_tmpl.h"
2118#undef PTTYPE
2119
2120#define PTTYPE 32
2121#include "paging_tmpl.h"
2122#undef PTTYPE
2123
82725b20
DE
2124static void reset_rsvds_bits_mask(struct kvm_vcpu *vcpu, int level)
2125{
2126 struct kvm_mmu *context = &vcpu->arch.mmu;
2127 int maxphyaddr = cpuid_maxphyaddr(vcpu);
2128 u64 exb_bit_rsvd = 0;
2129
2130 if (!is_nx(vcpu))
2131 exb_bit_rsvd = rsvd_bits(63, 63);
2132 switch (level) {
2133 case PT32_ROOT_LEVEL:
2134 /* no rsvd bits for 2 level 4K page table entries */
2135 context->rsvd_bits_mask[0][1] = 0;
2136 context->rsvd_bits_mask[0][0] = 0;
2137 if (is_cpuid_PSE36())
2138 /* 36bits PSE 4MB page */
2139 context->rsvd_bits_mask[1][1] = rsvd_bits(17, 21);
2140 else
2141 /* 32 bits PSE 4MB page */
2142 context->rsvd_bits_mask[1][1] = rsvd_bits(13, 21);
2143 context->rsvd_bits_mask[1][0] = ~0ull;
2144 break;
2145 case PT32E_ROOT_LEVEL:
20c466b5
DE
2146 context->rsvd_bits_mask[0][2] =
2147 rsvd_bits(maxphyaddr, 63) |
2148 rsvd_bits(7, 8) | rsvd_bits(1, 2); /* PDPTE */
82725b20 2149 context->rsvd_bits_mask[0][1] = exb_bit_rsvd |
4c26b4cd 2150 rsvd_bits(maxphyaddr, 62); /* PDE */
82725b20
DE
2151 context->rsvd_bits_mask[0][0] = exb_bit_rsvd |
2152 rsvd_bits(maxphyaddr, 62); /* PTE */
2153 context->rsvd_bits_mask[1][1] = exb_bit_rsvd |
2154 rsvd_bits(maxphyaddr, 62) |
2155 rsvd_bits(13, 20); /* large page */
2156 context->rsvd_bits_mask[1][0] = ~0ull;
2157 break;
2158 case PT64_ROOT_LEVEL:
2159 context->rsvd_bits_mask[0][3] = exb_bit_rsvd |
2160 rsvd_bits(maxphyaddr, 51) | rsvd_bits(7, 8);
2161 context->rsvd_bits_mask[0][2] = exb_bit_rsvd |
2162 rsvd_bits(maxphyaddr, 51) | rsvd_bits(7, 8);
2163 context->rsvd_bits_mask[0][1] = exb_bit_rsvd |
4c26b4cd 2164 rsvd_bits(maxphyaddr, 51);
82725b20
DE
2165 context->rsvd_bits_mask[0][0] = exb_bit_rsvd |
2166 rsvd_bits(maxphyaddr, 51);
2167 context->rsvd_bits_mask[1][3] = context->rsvd_bits_mask[0][3];
2168 context->rsvd_bits_mask[1][2] = context->rsvd_bits_mask[0][2];
2169 context->rsvd_bits_mask[1][1] = exb_bit_rsvd |
4c26b4cd
SY
2170 rsvd_bits(maxphyaddr, 51) |
2171 rsvd_bits(13, 20); /* large page */
82725b20
DE
2172 context->rsvd_bits_mask[1][0] = ~0ull;
2173 break;
2174 }
2175}
2176
17ac10ad 2177static int paging64_init_context_common(struct kvm_vcpu *vcpu, int level)
6aa8b732 2178{
ad312c7c 2179 struct kvm_mmu *context = &vcpu->arch.mmu;
6aa8b732
AK
2180
2181 ASSERT(is_pae(vcpu));
2182 context->new_cr3 = paging_new_cr3;
2183 context->page_fault = paging64_page_fault;
6aa8b732 2184 context->gva_to_gpa = paging64_gva_to_gpa;
c7addb90 2185 context->prefetch_page = paging64_prefetch_page;
e8bc217a 2186 context->sync_page = paging64_sync_page;
a7052897 2187 context->invlpg = paging64_invlpg;
6aa8b732 2188 context->free = paging_free;
17ac10ad
AK
2189 context->root_level = level;
2190 context->shadow_root_level = level;
17c3ba9d 2191 context->root_hpa = INVALID_PAGE;
6aa8b732
AK
2192 return 0;
2193}
2194
17ac10ad
AK
2195static int paging64_init_context(struct kvm_vcpu *vcpu)
2196{
82725b20 2197 reset_rsvds_bits_mask(vcpu, PT64_ROOT_LEVEL);
17ac10ad
AK
2198 return paging64_init_context_common(vcpu, PT64_ROOT_LEVEL);
2199}
2200
6aa8b732
AK
2201static int paging32_init_context(struct kvm_vcpu *vcpu)
2202{
ad312c7c 2203 struct kvm_mmu *context = &vcpu->arch.mmu;
6aa8b732 2204
82725b20 2205 reset_rsvds_bits_mask(vcpu, PT32_ROOT_LEVEL);
6aa8b732
AK
2206 context->new_cr3 = paging_new_cr3;
2207 context->page_fault = paging32_page_fault;
6aa8b732
AK
2208 context->gva_to_gpa = paging32_gva_to_gpa;
2209 context->free = paging_free;
c7addb90 2210 context->prefetch_page = paging32_prefetch_page;
e8bc217a 2211 context->sync_page = paging32_sync_page;
a7052897 2212 context->invlpg = paging32_invlpg;
6aa8b732
AK
2213 context->root_level = PT32_ROOT_LEVEL;
2214 context->shadow_root_level = PT32E_ROOT_LEVEL;
17c3ba9d 2215 context->root_hpa = INVALID_PAGE;
6aa8b732
AK
2216 return 0;
2217}
2218
2219static int paging32E_init_context(struct kvm_vcpu *vcpu)
2220{
82725b20 2221 reset_rsvds_bits_mask(vcpu, PT32E_ROOT_LEVEL);
17ac10ad 2222 return paging64_init_context_common(vcpu, PT32E_ROOT_LEVEL);
6aa8b732
AK
2223}
2224
fb72d167
JR
2225static int init_kvm_tdp_mmu(struct kvm_vcpu *vcpu)
2226{
2227 struct kvm_mmu *context = &vcpu->arch.mmu;
2228
2229 context->new_cr3 = nonpaging_new_cr3;
2230 context->page_fault = tdp_page_fault;
2231 context->free = nonpaging_free;
2232 context->prefetch_page = nonpaging_prefetch_page;
e8bc217a 2233 context->sync_page = nonpaging_sync_page;
a7052897 2234 context->invlpg = nonpaging_invlpg;
67253af5 2235 context->shadow_root_level = kvm_x86_ops->get_tdp_level();
fb72d167
JR
2236 context->root_hpa = INVALID_PAGE;
2237
2238 if (!is_paging(vcpu)) {
2239 context->gva_to_gpa = nonpaging_gva_to_gpa;
2240 context->root_level = 0;
2241 } else if (is_long_mode(vcpu)) {
82725b20 2242 reset_rsvds_bits_mask(vcpu, PT64_ROOT_LEVEL);
fb72d167
JR
2243 context->gva_to_gpa = paging64_gva_to_gpa;
2244 context->root_level = PT64_ROOT_LEVEL;
2245 } else if (is_pae(vcpu)) {
82725b20 2246 reset_rsvds_bits_mask(vcpu, PT32E_ROOT_LEVEL);
fb72d167
JR
2247 context->gva_to_gpa = paging64_gva_to_gpa;
2248 context->root_level = PT32E_ROOT_LEVEL;
2249 } else {
82725b20 2250 reset_rsvds_bits_mask(vcpu, PT32_ROOT_LEVEL);
fb72d167
JR
2251 context->gva_to_gpa = paging32_gva_to_gpa;
2252 context->root_level = PT32_ROOT_LEVEL;
2253 }
2254
2255 return 0;
2256}
2257
2258static int init_kvm_softmmu(struct kvm_vcpu *vcpu)
6aa8b732 2259{
a770f6f2
AK
2260 int r;
2261
6aa8b732 2262 ASSERT(vcpu);
ad312c7c 2263 ASSERT(!VALID_PAGE(vcpu->arch.mmu.root_hpa));
6aa8b732
AK
2264
2265 if (!is_paging(vcpu))
a770f6f2 2266 r = nonpaging_init_context(vcpu);
a9058ecd 2267 else if (is_long_mode(vcpu))
a770f6f2 2268 r = paging64_init_context(vcpu);
6aa8b732 2269 else if (is_pae(vcpu))
a770f6f2 2270 r = paging32E_init_context(vcpu);
6aa8b732 2271 else
a770f6f2
AK
2272 r = paging32_init_context(vcpu);
2273
2274 vcpu->arch.mmu.base_role.glevels = vcpu->arch.mmu.root_level;
2275
2276 return r;
6aa8b732
AK
2277}
2278
fb72d167
JR
2279static int init_kvm_mmu(struct kvm_vcpu *vcpu)
2280{
35149e21
AL
2281 vcpu->arch.update_pte.pfn = bad_pfn;
2282
fb72d167
JR
2283 if (tdp_enabled)
2284 return init_kvm_tdp_mmu(vcpu);
2285 else
2286 return init_kvm_softmmu(vcpu);
2287}
2288
6aa8b732
AK
2289static void destroy_kvm_mmu(struct kvm_vcpu *vcpu)
2290{
2291 ASSERT(vcpu);
ad312c7c
ZX
2292 if (VALID_PAGE(vcpu->arch.mmu.root_hpa)) {
2293 vcpu->arch.mmu.free(vcpu);
2294 vcpu->arch.mmu.root_hpa = INVALID_PAGE;
6aa8b732
AK
2295 }
2296}
2297
2298int kvm_mmu_reset_context(struct kvm_vcpu *vcpu)
17c3ba9d
AK
2299{
2300 destroy_kvm_mmu(vcpu);
2301 return init_kvm_mmu(vcpu);
2302}
8668a3c4 2303EXPORT_SYMBOL_GPL(kvm_mmu_reset_context);
17c3ba9d
AK
2304
2305int kvm_mmu_load(struct kvm_vcpu *vcpu)
6aa8b732 2306{
714b93da
AK
2307 int r;
2308
e2dec939 2309 r = mmu_topup_memory_caches(vcpu);
17c3ba9d
AK
2310 if (r)
2311 goto out;
aaee2c94 2312 spin_lock(&vcpu->kvm->mmu_lock);
eb787d10 2313 kvm_mmu_free_some_pages(vcpu);
17c3ba9d 2314 mmu_alloc_roots(vcpu);
0ba73cda 2315 mmu_sync_roots(vcpu);
aaee2c94 2316 spin_unlock(&vcpu->kvm->mmu_lock);
ad312c7c 2317 kvm_x86_ops->set_cr3(vcpu, vcpu->arch.mmu.root_hpa);
17c3ba9d 2318 kvm_mmu_flush_tlb(vcpu);
714b93da
AK
2319out:
2320 return r;
6aa8b732 2321}
17c3ba9d
AK
2322EXPORT_SYMBOL_GPL(kvm_mmu_load);
2323
2324void kvm_mmu_unload(struct kvm_vcpu *vcpu)
2325{
2326 mmu_free_roots(vcpu);
2327}
6aa8b732 2328
09072daf 2329static void mmu_pte_write_zap_pte(struct kvm_vcpu *vcpu,
4db35314 2330 struct kvm_mmu_page *sp,
ac1b714e
AK
2331 u64 *spte)
2332{
2333 u64 pte;
2334 struct kvm_mmu_page *child;
2335
2336 pte = *spte;
c7addb90 2337 if (is_shadow_present_pte(pte)) {
05da4558
MT
2338 if (sp->role.level == PT_PAGE_TABLE_LEVEL ||
2339 is_large_pte(pte))
290fc38d 2340 rmap_remove(vcpu->kvm, spte);
ac1b714e
AK
2341 else {
2342 child = page_header(pte & PT64_BASE_ADDR_MASK);
90cb0529 2343 mmu_page_remove_parent_pte(child, spte);
ac1b714e
AK
2344 }
2345 }
c7addb90 2346 set_shadow_pte(spte, shadow_trap_nonpresent_pte);
05da4558
MT
2347 if (is_large_pte(pte))
2348 --vcpu->kvm->stat.lpages;
ac1b714e
AK
2349}
2350
0028425f 2351static void mmu_pte_write_new_pte(struct kvm_vcpu *vcpu,
4db35314 2352 struct kvm_mmu_page *sp,
0028425f 2353 u64 *spte,
489f1d65 2354 const void *new)
0028425f 2355{
30945387
MT
2356 if (sp->role.level != PT_PAGE_TABLE_LEVEL) {
2357 if (!vcpu->arch.update_pte.largepage ||
2358 sp->role.glevels == PT32_ROOT_LEVEL) {
2359 ++vcpu->kvm->stat.mmu_pde_zapped;
2360 return;
2361 }
2362 }
0028425f 2363
4cee5764 2364 ++vcpu->kvm->stat.mmu_pte_updated;
4db35314 2365 if (sp->role.glevels == PT32_ROOT_LEVEL)
489f1d65 2366 paging32_update_pte(vcpu, sp, spte, new);
0028425f 2367 else
489f1d65 2368 paging64_update_pte(vcpu, sp, spte, new);
0028425f
AK
2369}
2370
79539cec
AK
2371static bool need_remote_flush(u64 old, u64 new)
2372{
2373 if (!is_shadow_present_pte(old))
2374 return false;
2375 if (!is_shadow_present_pte(new))
2376 return true;
2377 if ((old ^ new) & PT64_BASE_ADDR_MASK)
2378 return true;
2379 old ^= PT64_NX_MASK;
2380 new ^= PT64_NX_MASK;
2381 return (old & ~new & PT64_PERM_MASK) != 0;
2382}
2383
2384static void mmu_pte_write_flush_tlb(struct kvm_vcpu *vcpu, u64 old, u64 new)
2385{
2386 if (need_remote_flush(old, new))
2387 kvm_flush_remote_tlbs(vcpu->kvm);
2388 else
2389 kvm_mmu_flush_tlb(vcpu);
2390}
2391
12b7d28f
AK
2392static bool last_updated_pte_accessed(struct kvm_vcpu *vcpu)
2393{
ad312c7c 2394 u64 *spte = vcpu->arch.last_pte_updated;
12b7d28f 2395
7b52345e 2396 return !!(spte && (*spte & shadow_accessed_mask));
12b7d28f
AK
2397}
2398
d7824fff
AK
2399static void mmu_guess_page_from_pte_write(struct kvm_vcpu *vcpu, gpa_t gpa,
2400 const u8 *new, int bytes)
2401{
2402 gfn_t gfn;
2403 int r;
2404 u64 gpte = 0;
35149e21 2405 pfn_t pfn;
d7824fff 2406
05da4558
MT
2407 vcpu->arch.update_pte.largepage = 0;
2408
d7824fff
AK
2409 if (bytes != 4 && bytes != 8)
2410 return;
2411
2412 /*
2413 * Assume that the pte write on a page table of the same type
2414 * as the current vcpu paging mode. This is nearly always true
2415 * (might be false while changing modes). Note it is verified later
2416 * by update_pte().
2417 */
2418 if (is_pae(vcpu)) {
2419 /* Handle a 32-bit guest writing two halves of a 64-bit gpte */
2420 if ((bytes == 4) && (gpa % 4 == 0)) {
2421 r = kvm_read_guest(vcpu->kvm, gpa & ~(u64)7, &gpte, 8);
2422 if (r)
2423 return;
2424 memcpy((void *)&gpte + (gpa % 8), new, 4);
2425 } else if ((bytes == 8) && (gpa % 8 == 0)) {
2426 memcpy((void *)&gpte, new, 8);
2427 }
2428 } else {
2429 if ((bytes == 4) && (gpa % 4 == 0))
2430 memcpy((void *)&gpte, new, 4);
2431 }
2432 if (!is_present_pte(gpte))
2433 return;
2434 gfn = (gpte & PT64_BASE_ADDR_MASK) >> PAGE_SHIFT;
72dc67a6 2435
05da4558
MT
2436 if (is_large_pte(gpte) && is_largepage_backed(vcpu, gfn)) {
2437 gfn &= ~(KVM_PAGES_PER_HPAGE-1);
2438 vcpu->arch.update_pte.largepage = 1;
2439 }
e930bffe 2440 vcpu->arch.update_pte.mmu_seq = vcpu->kvm->mmu_notifier_seq;
4c2155ce 2441 smp_rmb();
35149e21 2442 pfn = gfn_to_pfn(vcpu->kvm, gfn);
72dc67a6 2443
35149e21
AL
2444 if (is_error_pfn(pfn)) {
2445 kvm_release_pfn_clean(pfn);
d196e343
AK
2446 return;
2447 }
d7824fff 2448 vcpu->arch.update_pte.gfn = gfn;
35149e21 2449 vcpu->arch.update_pte.pfn = pfn;
d7824fff
AK
2450}
2451
1b7fcd32
AK
2452static void kvm_mmu_access_page(struct kvm_vcpu *vcpu, gfn_t gfn)
2453{
2454 u64 *spte = vcpu->arch.last_pte_updated;
2455
2456 if (spte
2457 && vcpu->arch.last_pte_gfn == gfn
2458 && shadow_accessed_mask
2459 && !(*spte & shadow_accessed_mask)
2460 && is_shadow_present_pte(*spte))
2461 set_bit(PT_ACCESSED_SHIFT, (unsigned long *)spte);
2462}
2463
09072daf 2464void kvm_mmu_pte_write(struct kvm_vcpu *vcpu, gpa_t gpa,
ad218f85
MT
2465 const u8 *new, int bytes,
2466 bool guest_initiated)
da4a00f0 2467{
9b7a0325 2468 gfn_t gfn = gpa >> PAGE_SHIFT;
4db35314 2469 struct kvm_mmu_page *sp;
0e7bc4b9 2470 struct hlist_node *node, *n;
9b7a0325
AK
2471 struct hlist_head *bucket;
2472 unsigned index;
489f1d65 2473 u64 entry, gentry;
9b7a0325 2474 u64 *spte;
9b7a0325 2475 unsigned offset = offset_in_page(gpa);
0e7bc4b9 2476 unsigned pte_size;
9b7a0325 2477 unsigned page_offset;
0e7bc4b9 2478 unsigned misaligned;
fce0657f 2479 unsigned quadrant;
9b7a0325 2480 int level;
86a5ba02 2481 int flooded = 0;
ac1b714e 2482 int npte;
489f1d65 2483 int r;
9b7a0325 2484
b8688d51 2485 pgprintk("%s: gpa %llx bytes %d\n", __func__, gpa, bytes);
d7824fff 2486 mmu_guess_page_from_pte_write(vcpu, gpa, new, bytes);
aaee2c94 2487 spin_lock(&vcpu->kvm->mmu_lock);
1b7fcd32 2488 kvm_mmu_access_page(vcpu, gfn);
eb787d10 2489 kvm_mmu_free_some_pages(vcpu);
4cee5764 2490 ++vcpu->kvm->stat.mmu_pte_write;
c7addb90 2491 kvm_mmu_audit(vcpu, "pre pte write");
ad218f85
MT
2492 if (guest_initiated) {
2493 if (gfn == vcpu->arch.last_pt_write_gfn
2494 && !last_updated_pte_accessed(vcpu)) {
2495 ++vcpu->arch.last_pt_write_count;
2496 if (vcpu->arch.last_pt_write_count >= 3)
2497 flooded = 1;
2498 } else {
2499 vcpu->arch.last_pt_write_gfn = gfn;
2500 vcpu->arch.last_pt_write_count = 1;
2501 vcpu->arch.last_pte_updated = NULL;
2502 }
86a5ba02 2503 }
1ae0a13d 2504 index = kvm_page_table_hashfn(gfn);
f05e70ac 2505 bucket = &vcpu->kvm->arch.mmu_page_hash[index];
4db35314 2506 hlist_for_each_entry_safe(sp, node, n, bucket, hash_link) {
f6e2c02b 2507 if (sp->gfn != gfn || sp->role.direct || sp->role.invalid)
9b7a0325 2508 continue;
4db35314 2509 pte_size = sp->role.glevels == PT32_ROOT_LEVEL ? 4 : 8;
0e7bc4b9 2510 misaligned = (offset ^ (offset + bytes - 1)) & ~(pte_size - 1);
e925c5ba 2511 misaligned |= bytes < 4;
86a5ba02 2512 if (misaligned || flooded) {
0e7bc4b9
AK
2513 /*
2514 * Misaligned accesses are too much trouble to fix
2515 * up; also, they usually indicate a page is not used
2516 * as a page table.
86a5ba02
AK
2517 *
2518 * If we're seeing too many writes to a page,
2519 * it may no longer be a page table, or we may be
2520 * forking, in which case it is better to unmap the
2521 * page.
0e7bc4b9
AK
2522 */
2523 pgprintk("misaligned: gpa %llx bytes %d role %x\n",
4db35314 2524 gpa, bytes, sp->role.word);
07385413
MT
2525 if (kvm_mmu_zap_page(vcpu->kvm, sp))
2526 n = bucket->first;
4cee5764 2527 ++vcpu->kvm->stat.mmu_flooded;
0e7bc4b9
AK
2528 continue;
2529 }
9b7a0325 2530 page_offset = offset;
4db35314 2531 level = sp->role.level;
ac1b714e 2532 npte = 1;
4db35314 2533 if (sp->role.glevels == PT32_ROOT_LEVEL) {
ac1b714e
AK
2534 page_offset <<= 1; /* 32->64 */
2535 /*
2536 * A 32-bit pde maps 4MB while the shadow pdes map
2537 * only 2MB. So we need to double the offset again
2538 * and zap two pdes instead of one.
2539 */
2540 if (level == PT32_ROOT_LEVEL) {
6b8d0f9b 2541 page_offset &= ~7; /* kill rounding error */
ac1b714e
AK
2542 page_offset <<= 1;
2543 npte = 2;
2544 }
fce0657f 2545 quadrant = page_offset >> PAGE_SHIFT;
9b7a0325 2546 page_offset &= ~PAGE_MASK;
4db35314 2547 if (quadrant != sp->role.quadrant)
fce0657f 2548 continue;
9b7a0325 2549 }
4db35314 2550 spte = &sp->spt[page_offset / sizeof(*spte)];
489f1d65
DE
2551 if ((gpa & (pte_size - 1)) || (bytes < pte_size)) {
2552 gentry = 0;
2553 r = kvm_read_guest_atomic(vcpu->kvm,
2554 gpa & ~(u64)(pte_size - 1),
2555 &gentry, pte_size);
2556 new = (const void *)&gentry;
2557 if (r < 0)
2558 new = NULL;
2559 }
ac1b714e 2560 while (npte--) {
79539cec 2561 entry = *spte;
4db35314 2562 mmu_pte_write_zap_pte(vcpu, sp, spte);
489f1d65
DE
2563 if (new)
2564 mmu_pte_write_new_pte(vcpu, sp, spte, new);
79539cec 2565 mmu_pte_write_flush_tlb(vcpu, entry, *spte);
ac1b714e 2566 ++spte;
9b7a0325 2567 }
9b7a0325 2568 }
c7addb90 2569 kvm_mmu_audit(vcpu, "post pte write");
aaee2c94 2570 spin_unlock(&vcpu->kvm->mmu_lock);
35149e21
AL
2571 if (!is_error_pfn(vcpu->arch.update_pte.pfn)) {
2572 kvm_release_pfn_clean(vcpu->arch.update_pte.pfn);
2573 vcpu->arch.update_pte.pfn = bad_pfn;
d7824fff 2574 }
da4a00f0
AK
2575}
2576
a436036b
AK
2577int kvm_mmu_unprotect_page_virt(struct kvm_vcpu *vcpu, gva_t gva)
2578{
10589a46
MT
2579 gpa_t gpa;
2580 int r;
a436036b 2581
10589a46 2582 gpa = vcpu->arch.mmu.gva_to_gpa(vcpu, gva);
10589a46 2583
aaee2c94 2584 spin_lock(&vcpu->kvm->mmu_lock);
10589a46 2585 r = kvm_mmu_unprotect_page(vcpu->kvm, gpa >> PAGE_SHIFT);
aaee2c94 2586 spin_unlock(&vcpu->kvm->mmu_lock);
10589a46 2587 return r;
a436036b 2588}
577bdc49 2589EXPORT_SYMBOL_GPL(kvm_mmu_unprotect_page_virt);
a436036b 2590
22d95b12 2591void __kvm_mmu_free_some_pages(struct kvm_vcpu *vcpu)
ebeace86 2592{
f05e70ac 2593 while (vcpu->kvm->arch.n_free_mmu_pages < KVM_REFILL_PAGES) {
4db35314 2594 struct kvm_mmu_page *sp;
ebeace86 2595
f05e70ac 2596 sp = container_of(vcpu->kvm->arch.active_mmu_pages.prev,
4db35314
AK
2597 struct kvm_mmu_page, link);
2598 kvm_mmu_zap_page(vcpu->kvm, sp);
4cee5764 2599 ++vcpu->kvm->stat.mmu_recycled;
ebeace86
AK
2600 }
2601}
ebeace86 2602
3067714c
AK
2603int kvm_mmu_page_fault(struct kvm_vcpu *vcpu, gva_t cr2, u32 error_code)
2604{
2605 int r;
2606 enum emulation_result er;
2607
ad312c7c 2608 r = vcpu->arch.mmu.page_fault(vcpu, cr2, error_code);
3067714c
AK
2609 if (r < 0)
2610 goto out;
2611
2612 if (!r) {
2613 r = 1;
2614 goto out;
2615 }
2616
b733bfb5
AK
2617 r = mmu_topup_memory_caches(vcpu);
2618 if (r)
2619 goto out;
2620
3067714c 2621 er = emulate_instruction(vcpu, vcpu->run, cr2, error_code, 0);
3067714c
AK
2622
2623 switch (er) {
2624 case EMULATE_DONE:
2625 return 1;
2626 case EMULATE_DO_MMIO:
2627 ++vcpu->stat.mmio_exits;
2628 return 0;
2629 case EMULATE_FAIL:
2630 kvm_report_emulation_failure(vcpu, "pagetable");
2631 return 1;
2632 default:
2633 BUG();
2634 }
2635out:
3067714c
AK
2636 return r;
2637}
2638EXPORT_SYMBOL_GPL(kvm_mmu_page_fault);
2639
a7052897
MT
2640void kvm_mmu_invlpg(struct kvm_vcpu *vcpu, gva_t gva)
2641{
a7052897 2642 vcpu->arch.mmu.invlpg(vcpu, gva);
a7052897
MT
2643 kvm_mmu_flush_tlb(vcpu);
2644 ++vcpu->stat.invlpg;
2645}
2646EXPORT_SYMBOL_GPL(kvm_mmu_invlpg);
2647
18552672
JR
2648void kvm_enable_tdp(void)
2649{
2650 tdp_enabled = true;
2651}
2652EXPORT_SYMBOL_GPL(kvm_enable_tdp);
2653
5f4cb662
JR
2654void kvm_disable_tdp(void)
2655{
2656 tdp_enabled = false;
2657}
2658EXPORT_SYMBOL_GPL(kvm_disable_tdp);
2659
6aa8b732
AK
2660static void free_mmu_pages(struct kvm_vcpu *vcpu)
2661{
ad312c7c 2662 free_page((unsigned long)vcpu->arch.mmu.pae_root);
6aa8b732
AK
2663}
2664
2665static int alloc_mmu_pages(struct kvm_vcpu *vcpu)
2666{
17ac10ad 2667 struct page *page;
6aa8b732
AK
2668 int i;
2669
2670 ASSERT(vcpu);
2671
f05e70ac
ZX
2672 if (vcpu->kvm->arch.n_requested_mmu_pages)
2673 vcpu->kvm->arch.n_free_mmu_pages =
2674 vcpu->kvm->arch.n_requested_mmu_pages;
82ce2c96 2675 else
f05e70ac
ZX
2676 vcpu->kvm->arch.n_free_mmu_pages =
2677 vcpu->kvm->arch.n_alloc_mmu_pages;
17ac10ad
AK
2678 /*
2679 * When emulating 32-bit mode, cr3 is only 32 bits even on x86_64.
2680 * Therefore we need to allocate shadow page tables in the first
2681 * 4GB of memory, which happens to fit the DMA32 zone.
2682 */
2683 page = alloc_page(GFP_KERNEL | __GFP_DMA32);
2684 if (!page)
2685 goto error_1;
ad312c7c 2686 vcpu->arch.mmu.pae_root = page_address(page);
17ac10ad 2687 for (i = 0; i < 4; ++i)
ad312c7c 2688 vcpu->arch.mmu.pae_root[i] = INVALID_PAGE;
17ac10ad 2689
6aa8b732
AK
2690 return 0;
2691
2692error_1:
2693 free_mmu_pages(vcpu);
2694 return -ENOMEM;
2695}
2696
8018c27b 2697int kvm_mmu_create(struct kvm_vcpu *vcpu)
6aa8b732 2698{
6aa8b732 2699 ASSERT(vcpu);
ad312c7c 2700 ASSERT(!VALID_PAGE(vcpu->arch.mmu.root_hpa));
6aa8b732 2701
8018c27b
IM
2702 return alloc_mmu_pages(vcpu);
2703}
6aa8b732 2704
8018c27b
IM
2705int kvm_mmu_setup(struct kvm_vcpu *vcpu)
2706{
2707 ASSERT(vcpu);
ad312c7c 2708 ASSERT(!VALID_PAGE(vcpu->arch.mmu.root_hpa));
2c264957 2709
8018c27b 2710 return init_kvm_mmu(vcpu);
6aa8b732
AK
2711}
2712
2713void kvm_mmu_destroy(struct kvm_vcpu *vcpu)
2714{
2715 ASSERT(vcpu);
2716
2717 destroy_kvm_mmu(vcpu);
2718 free_mmu_pages(vcpu);
714b93da 2719 mmu_free_memory_caches(vcpu);
6aa8b732
AK
2720}
2721
90cb0529 2722void kvm_mmu_slot_remove_write_access(struct kvm *kvm, int slot)
6aa8b732 2723{
4db35314 2724 struct kvm_mmu_page *sp;
6aa8b732 2725
f05e70ac 2726 list_for_each_entry(sp, &kvm->arch.active_mmu_pages, link) {
6aa8b732
AK
2727 int i;
2728 u64 *pt;
2729
291f26bc 2730 if (!test_bit(slot, sp->slot_bitmap))
6aa8b732
AK
2731 continue;
2732
4db35314 2733 pt = sp->spt;
6aa8b732
AK
2734 for (i = 0; i < PT64_ENT_PER_PAGE; ++i)
2735 /* avoid RMW */
9647c14c 2736 if (pt[i] & PT_WRITABLE_MASK)
6aa8b732 2737 pt[i] &= ~PT_WRITABLE_MASK;
6aa8b732 2738 }
171d595d 2739 kvm_flush_remote_tlbs(kvm);
6aa8b732 2740}
37a7d8b0 2741
90cb0529 2742void kvm_mmu_zap_all(struct kvm *kvm)
e0fa826f 2743{
4db35314 2744 struct kvm_mmu_page *sp, *node;
e0fa826f 2745
aaee2c94 2746 spin_lock(&kvm->mmu_lock);
f05e70ac 2747 list_for_each_entry_safe(sp, node, &kvm->arch.active_mmu_pages, link)
07385413
MT
2748 if (kvm_mmu_zap_page(kvm, sp))
2749 node = container_of(kvm->arch.active_mmu_pages.next,
2750 struct kvm_mmu_page, link);
aaee2c94 2751 spin_unlock(&kvm->mmu_lock);
e0fa826f 2752
90cb0529 2753 kvm_flush_remote_tlbs(kvm);
e0fa826f
DL
2754}
2755
8b2cf73c 2756static void kvm_mmu_remove_one_alloc_mmu_page(struct kvm *kvm)
3ee16c81
IE
2757{
2758 struct kvm_mmu_page *page;
2759
2760 page = container_of(kvm->arch.active_mmu_pages.prev,
2761 struct kvm_mmu_page, link);
2762 kvm_mmu_zap_page(kvm, page);
2763}
2764
2765static int mmu_shrink(int nr_to_scan, gfp_t gfp_mask)
2766{
2767 struct kvm *kvm;
2768 struct kvm *kvm_freed = NULL;
2769 int cache_count = 0;
2770
2771 spin_lock(&kvm_lock);
2772
2773 list_for_each_entry(kvm, &vm_list, vm_list) {
2774 int npages;
2775
5a4c9288
MT
2776 if (!down_read_trylock(&kvm->slots_lock))
2777 continue;
3ee16c81
IE
2778 spin_lock(&kvm->mmu_lock);
2779 npages = kvm->arch.n_alloc_mmu_pages -
2780 kvm->arch.n_free_mmu_pages;
2781 cache_count += npages;
2782 if (!kvm_freed && nr_to_scan > 0 && npages > 0) {
2783 kvm_mmu_remove_one_alloc_mmu_page(kvm);
2784 cache_count--;
2785 kvm_freed = kvm;
2786 }
2787 nr_to_scan--;
2788
2789 spin_unlock(&kvm->mmu_lock);
5a4c9288 2790 up_read(&kvm->slots_lock);
3ee16c81
IE
2791 }
2792 if (kvm_freed)
2793 list_move_tail(&kvm_freed->vm_list, &vm_list);
2794
2795 spin_unlock(&kvm_lock);
2796
2797 return cache_count;
2798}
2799
2800static struct shrinker mmu_shrinker = {
2801 .shrink = mmu_shrink,
2802 .seeks = DEFAULT_SEEKS * 10,
2803};
2804
2ddfd20e 2805static void mmu_destroy_caches(void)
b5a33a75
AK
2806{
2807 if (pte_chain_cache)
2808 kmem_cache_destroy(pte_chain_cache);
2809 if (rmap_desc_cache)
2810 kmem_cache_destroy(rmap_desc_cache);
d3d25b04
AK
2811 if (mmu_page_header_cache)
2812 kmem_cache_destroy(mmu_page_header_cache);
b5a33a75
AK
2813}
2814
3ee16c81
IE
2815void kvm_mmu_module_exit(void)
2816{
2817 mmu_destroy_caches();
2818 unregister_shrinker(&mmu_shrinker);
2819}
2820
b5a33a75
AK
2821int kvm_mmu_module_init(void)
2822{
2823 pte_chain_cache = kmem_cache_create("kvm_pte_chain",
2824 sizeof(struct kvm_pte_chain),
20c2df83 2825 0, 0, NULL);
b5a33a75
AK
2826 if (!pte_chain_cache)
2827 goto nomem;
2828 rmap_desc_cache = kmem_cache_create("kvm_rmap_desc",
2829 sizeof(struct kvm_rmap_desc),
20c2df83 2830 0, 0, NULL);
b5a33a75
AK
2831 if (!rmap_desc_cache)
2832 goto nomem;
2833
d3d25b04
AK
2834 mmu_page_header_cache = kmem_cache_create("kvm_mmu_page_header",
2835 sizeof(struct kvm_mmu_page),
20c2df83 2836 0, 0, NULL);
d3d25b04
AK
2837 if (!mmu_page_header_cache)
2838 goto nomem;
2839
3ee16c81
IE
2840 register_shrinker(&mmu_shrinker);
2841
b5a33a75
AK
2842 return 0;
2843
2844nomem:
3ee16c81 2845 mmu_destroy_caches();
b5a33a75
AK
2846 return -ENOMEM;
2847}
2848
3ad82a7e
ZX
2849/*
2850 * Caculate mmu pages needed for kvm.
2851 */
2852unsigned int kvm_mmu_calculate_mmu_pages(struct kvm *kvm)
2853{
2854 int i;
2855 unsigned int nr_mmu_pages;
2856 unsigned int nr_pages = 0;
2857
2858 for (i = 0; i < kvm->nmemslots; i++)
2859 nr_pages += kvm->memslots[i].npages;
2860
2861 nr_mmu_pages = nr_pages * KVM_PERMILLE_MMU_PAGES / 1000;
2862 nr_mmu_pages = max(nr_mmu_pages,
2863 (unsigned int) KVM_MIN_ALLOC_MMU_PAGES);
2864
2865 return nr_mmu_pages;
2866}
2867
2f333bcb
MT
2868static void *pv_mmu_peek_buffer(struct kvm_pv_mmu_op_buffer *buffer,
2869 unsigned len)
2870{
2871 if (len > buffer->len)
2872 return NULL;
2873 return buffer->ptr;
2874}
2875
2876static void *pv_mmu_read_buffer(struct kvm_pv_mmu_op_buffer *buffer,
2877 unsigned len)
2878{
2879 void *ret;
2880
2881 ret = pv_mmu_peek_buffer(buffer, len);
2882 if (!ret)
2883 return ret;
2884 buffer->ptr += len;
2885 buffer->len -= len;
2886 buffer->processed += len;
2887 return ret;
2888}
2889
2890static int kvm_pv_mmu_write(struct kvm_vcpu *vcpu,
2891 gpa_t addr, gpa_t value)
2892{
2893 int bytes = 8;
2894 int r;
2895
2896 if (!is_long_mode(vcpu) && !is_pae(vcpu))
2897 bytes = 4;
2898
2899 r = mmu_topup_memory_caches(vcpu);
2900 if (r)
2901 return r;
2902
3200f405 2903 if (!emulator_write_phys(vcpu, addr, &value, bytes))
2f333bcb
MT
2904 return -EFAULT;
2905
2906 return 1;
2907}
2908
2909static int kvm_pv_mmu_flush_tlb(struct kvm_vcpu *vcpu)
2910{
a8cd0244 2911 kvm_set_cr3(vcpu, vcpu->arch.cr3);
2f333bcb
MT
2912 return 1;
2913}
2914
2915static int kvm_pv_mmu_release_pt(struct kvm_vcpu *vcpu, gpa_t addr)
2916{
2917 spin_lock(&vcpu->kvm->mmu_lock);
2918 mmu_unshadow(vcpu->kvm, addr >> PAGE_SHIFT);
2919 spin_unlock(&vcpu->kvm->mmu_lock);
2920 return 1;
2921}
2922
2923static int kvm_pv_mmu_op_one(struct kvm_vcpu *vcpu,
2924 struct kvm_pv_mmu_op_buffer *buffer)
2925{
2926 struct kvm_mmu_op_header *header;
2927
2928 header = pv_mmu_peek_buffer(buffer, sizeof *header);
2929 if (!header)
2930 return 0;
2931 switch (header->op) {
2932 case KVM_MMU_OP_WRITE_PTE: {
2933 struct kvm_mmu_op_write_pte *wpte;
2934
2935 wpte = pv_mmu_read_buffer(buffer, sizeof *wpte);
2936 if (!wpte)
2937 return 0;
2938 return kvm_pv_mmu_write(vcpu, wpte->pte_phys,
2939 wpte->pte_val);
2940 }
2941 case KVM_MMU_OP_FLUSH_TLB: {
2942 struct kvm_mmu_op_flush_tlb *ftlb;
2943
2944 ftlb = pv_mmu_read_buffer(buffer, sizeof *ftlb);
2945 if (!ftlb)
2946 return 0;
2947 return kvm_pv_mmu_flush_tlb(vcpu);
2948 }
2949 case KVM_MMU_OP_RELEASE_PT: {
2950 struct kvm_mmu_op_release_pt *rpt;
2951
2952 rpt = pv_mmu_read_buffer(buffer, sizeof *rpt);
2953 if (!rpt)
2954 return 0;
2955 return kvm_pv_mmu_release_pt(vcpu, rpt->pt_phys);
2956 }
2957 default: return 0;
2958 }
2959}
2960
2961int kvm_pv_mmu_op(struct kvm_vcpu *vcpu, unsigned long bytes,
2962 gpa_t addr, unsigned long *ret)
2963{
2964 int r;
6ad18fba 2965 struct kvm_pv_mmu_op_buffer *buffer = &vcpu->arch.mmu_op_buffer;
2f333bcb 2966
6ad18fba
DH
2967 buffer->ptr = buffer->buf;
2968 buffer->len = min_t(unsigned long, bytes, sizeof buffer->buf);
2969 buffer->processed = 0;
2f333bcb 2970
6ad18fba 2971 r = kvm_read_guest(vcpu->kvm, addr, buffer->buf, buffer->len);
2f333bcb
MT
2972 if (r)
2973 goto out;
2974
6ad18fba
DH
2975 while (buffer->len) {
2976 r = kvm_pv_mmu_op_one(vcpu, buffer);
2f333bcb
MT
2977 if (r < 0)
2978 goto out;
2979 if (r == 0)
2980 break;
2981 }
2982
2983 r = 1;
2984out:
6ad18fba 2985 *ret = buffer->processed;
2f333bcb
MT
2986 return r;
2987}
2988
37a7d8b0
AK
2989#ifdef AUDIT
2990
2991static const char *audit_msg;
2992
2993static gva_t canonicalize(gva_t gva)
2994{
2995#ifdef CONFIG_X86_64
2996 gva = (long long)(gva << 16) >> 16;
2997#endif
2998 return gva;
2999}
3000
3001static void audit_mappings_page(struct kvm_vcpu *vcpu, u64 page_pte,
3002 gva_t va, int level)
3003{
3004 u64 *pt = __va(page_pte & PT64_BASE_ADDR_MASK);
3005 int i;
3006 gva_t va_delta = 1ul << (PAGE_SHIFT + 9 * (level - 1));
3007
3008 for (i = 0; i < PT64_ENT_PER_PAGE; ++i, va += va_delta) {
3009 u64 ent = pt[i];
3010
c7addb90 3011 if (ent == shadow_trap_nonpresent_pte)
37a7d8b0
AK
3012 continue;
3013
3014 va = canonicalize(va);
c7addb90
AK
3015 if (level > 1) {
3016 if (ent == shadow_notrap_nonpresent_pte)
3017 printk(KERN_ERR "audit: (%s) nontrapping pte"
3018 " in nonleaf level: levels %d gva %lx"
3019 " level %d pte %llx\n", audit_msg,
ad312c7c 3020 vcpu->arch.mmu.root_level, va, level, ent);
34382539
JK
3021 else
3022 audit_mappings_page(vcpu, ent, va, level - 1);
c7addb90 3023 } else {
ad312c7c 3024 gpa_t gpa = vcpu->arch.mmu.gva_to_gpa(vcpu, va);
34382539
JK
3025 gfn_t gfn = gpa >> PAGE_SHIFT;
3026 pfn_t pfn = gfn_to_pfn(vcpu->kvm, gfn);
3027 hpa_t hpa = (hpa_t)pfn << PAGE_SHIFT;
37a7d8b0 3028
c7addb90 3029 if (is_shadow_present_pte(ent)
37a7d8b0 3030 && (ent & PT64_BASE_ADDR_MASK) != hpa)
c7addb90
AK
3031 printk(KERN_ERR "xx audit error: (%s) levels %d"
3032 " gva %lx gpa %llx hpa %llx ent %llx %d\n",
ad312c7c 3033 audit_msg, vcpu->arch.mmu.root_level,
d77c26fc
MD
3034 va, gpa, hpa, ent,
3035 is_shadow_present_pte(ent));
c7addb90
AK
3036 else if (ent == shadow_notrap_nonpresent_pte
3037 && !is_error_hpa(hpa))
3038 printk(KERN_ERR "audit: (%s) notrap shadow,"
3039 " valid guest gva %lx\n", audit_msg, va);
35149e21 3040 kvm_release_pfn_clean(pfn);
c7addb90 3041
37a7d8b0
AK
3042 }
3043 }
3044}
3045
3046static void audit_mappings(struct kvm_vcpu *vcpu)
3047{
1ea252af 3048 unsigned i;
37a7d8b0 3049
ad312c7c
ZX
3050 if (vcpu->arch.mmu.root_level == 4)
3051 audit_mappings_page(vcpu, vcpu->arch.mmu.root_hpa, 0, 4);
37a7d8b0
AK
3052 else
3053 for (i = 0; i < 4; ++i)
ad312c7c 3054 if (vcpu->arch.mmu.pae_root[i] & PT_PRESENT_MASK)
37a7d8b0 3055 audit_mappings_page(vcpu,
ad312c7c 3056 vcpu->arch.mmu.pae_root[i],
37a7d8b0
AK
3057 i << 30,
3058 2);
3059}
3060
3061static int count_rmaps(struct kvm_vcpu *vcpu)
3062{
3063 int nmaps = 0;
3064 int i, j, k;
3065
3066 for (i = 0; i < KVM_MEMORY_SLOTS; ++i) {
3067 struct kvm_memory_slot *m = &vcpu->kvm->memslots[i];
3068 struct kvm_rmap_desc *d;
3069
3070 for (j = 0; j < m->npages; ++j) {
290fc38d 3071 unsigned long *rmapp = &m->rmap[j];
37a7d8b0 3072
290fc38d 3073 if (!*rmapp)
37a7d8b0 3074 continue;
290fc38d 3075 if (!(*rmapp & 1)) {
37a7d8b0
AK
3076 ++nmaps;
3077 continue;
3078 }
290fc38d 3079 d = (struct kvm_rmap_desc *)(*rmapp & ~1ul);
37a7d8b0
AK
3080 while (d) {
3081 for (k = 0; k < RMAP_EXT; ++k)
3082 if (d->shadow_ptes[k])
3083 ++nmaps;
3084 else
3085 break;
3086 d = d->more;
3087 }
3088 }
3089 }
3090 return nmaps;
3091}
3092
3093static int count_writable_mappings(struct kvm_vcpu *vcpu)
3094{
3095 int nmaps = 0;
4db35314 3096 struct kvm_mmu_page *sp;
37a7d8b0
AK
3097 int i;
3098
f05e70ac 3099 list_for_each_entry(sp, &vcpu->kvm->arch.active_mmu_pages, link) {
4db35314 3100 u64 *pt = sp->spt;
37a7d8b0 3101
4db35314 3102 if (sp->role.level != PT_PAGE_TABLE_LEVEL)
37a7d8b0
AK
3103 continue;
3104
3105 for (i = 0; i < PT64_ENT_PER_PAGE; ++i) {
3106 u64 ent = pt[i];
3107
3108 if (!(ent & PT_PRESENT_MASK))
3109 continue;
3110 if (!(ent & PT_WRITABLE_MASK))
3111 continue;
3112 ++nmaps;
3113 }
3114 }
3115 return nmaps;
3116}
3117
3118static void audit_rmap(struct kvm_vcpu *vcpu)
3119{
3120 int n_rmap = count_rmaps(vcpu);
3121 int n_actual = count_writable_mappings(vcpu);
3122
3123 if (n_rmap != n_actual)
3124 printk(KERN_ERR "%s: (%s) rmap %d actual %d\n",
b8688d51 3125 __func__, audit_msg, n_rmap, n_actual);
37a7d8b0
AK
3126}
3127
3128static void audit_write_protection(struct kvm_vcpu *vcpu)
3129{
4db35314 3130 struct kvm_mmu_page *sp;
290fc38d
IE
3131 struct kvm_memory_slot *slot;
3132 unsigned long *rmapp;
3133 gfn_t gfn;
37a7d8b0 3134
f05e70ac 3135 list_for_each_entry(sp, &vcpu->kvm->arch.active_mmu_pages, link) {
f6e2c02b 3136 if (sp->role.direct)
37a7d8b0
AK
3137 continue;
3138
4db35314 3139 gfn = unalias_gfn(vcpu->kvm, sp->gfn);
2843099f 3140 slot = gfn_to_memslot_unaliased(vcpu->kvm, sp->gfn);
290fc38d
IE
3141 rmapp = &slot->rmap[gfn - slot->base_gfn];
3142 if (*rmapp)
37a7d8b0
AK
3143 printk(KERN_ERR "%s: (%s) shadow page has writable"
3144 " mappings: gfn %lx role %x\n",
b8688d51 3145 __func__, audit_msg, sp->gfn,
4db35314 3146 sp->role.word);
37a7d8b0
AK
3147 }
3148}
3149
3150static void kvm_mmu_audit(struct kvm_vcpu *vcpu, const char *msg)
3151{
3152 int olddbg = dbg;
3153
3154 dbg = 0;
3155 audit_msg = msg;
3156 audit_rmap(vcpu);
3157 audit_write_protection(vcpu);
3158 audit_mappings(vcpu);
3159 dbg = olddbg;
3160}
3161
3162#endif