[linux-2.6-block.git] / arch / x86 / kvm / irq.h

/* SPDX-License-Identifier: GPL-2.0-only */
/*
 * irq.h: in kernel interrupt controller related definitions
 * Copyright (c) 2007, Intel Corporation.
 *
 * Authors:
 *   Yaozu (Eddie) Dong <Eddie.dong@intel.com>
 */

#ifndef __IRQ_H
#define __IRQ_H

#include <linux/mm_types.h>
#include <linux/hrtimer.h>
#include <linux/kvm_host.h>
#include <linux/spinlock.h>

#include <kvm/iodev.h>
#include "lapic.h"

#define PIC_NUM_PINS 16
#define SELECT_PIC(irq) \
	((irq) < 8 ? KVM_IRQCHIP_PIC_MASTER : KVM_IRQCHIP_PIC_SLAVE)

struct kvm;
struct kvm_vcpu;

struct kvm_kpic_state {
	u8 last_irr;	/* edge detection */
	u8 irr;		/* interrupt request register */
	u8 imr;		/* interrupt mask register */
	u8 isr;		/* interrupt service register */
	u8 priority_add;	/* highest irq priority */
	u8 irq_base;
	u8 read_reg_select;
	u8 poll;
	u8 special_mask;
	u8 init_state;
	u8 auto_eoi;
	u8 rotate_on_auto_eoi;
	u8 special_fully_nested_mode;
	u8 init4;		/* true if 4 byte init */
	u8 elcr;		/* PIIX edge/trigger selection */
	u8 elcr_mask;
	u8 isr_ack;	/* interrupt ack detection */
	struct kvm_pic *pics_state;
};

struct kvm_pic {
	spinlock_t lock;
	bool wakeup_needed;
	unsigned pending_acks;
	struct kvm *kvm;
	struct kvm_kpic_state pics[2]; /* 0 is master pic, 1 is slave pic */
	int output;		/* intr from master PIC */
	struct kvm_io_device dev_master;
	struct kvm_io_device dev_slave;
	struct kvm_io_device dev_elcr;
	unsigned long irq_states[PIC_NUM_PINS];
};

int kvm_pic_init(struct kvm *kvm);
void kvm_pic_destroy(struct kvm *kvm);
int kvm_pic_read_irq(struct kvm *kvm);
void kvm_pic_update_irq(struct kvm_pic *s);

static inline int irqchip_split(struct kvm *kvm)
{
	int mode = kvm->arch.irqchip_mode;

	/* Matches smp_wmb() when setting irqchip_mode */
	smp_rmb();
	return mode == KVM_IRQCHIP_SPLIT;
}

static inline int irqchip_kernel(struct kvm *kvm)
{
	int mode = kvm->arch.irqchip_mode;

	/* Matches smp_wmb() when setting irqchip_mode */
	smp_rmb();
	return mode == KVM_IRQCHIP_KERNEL;
}

static inline int pic_in_kernel(struct kvm *kvm)
{
	return irqchip_kernel(kvm);
}

static inline int irqchip_in_kernel(struct kvm *kvm)
{
	int mode = kvm->arch.irqchip_mode;

	/* Matches smp_wmb() when setting irqchip_mode */
	smp_rmb();
	return mode != KVM_IRQCHIP_NONE;
}

void kvm_inject_pending_timer_irqs(struct kvm_vcpu *vcpu);
void kvm_inject_apic_timer_irqs(struct kvm_vcpu *vcpu);
void kvm_apic_nmi_wd_deliver(struct kvm_vcpu *vcpu);
void __kvm_migrate_apic_timer(struct kvm_vcpu *vcpu);
void __kvm_migrate_pit_timer(struct kvm_vcpu *vcpu);
void __kvm_migrate_timers(struct kvm_vcpu *vcpu);

int apic_has_pending_timer(struct kvm_vcpu *vcpu);

int kvm_setup_default_irq_routing(struct kvm *kvm);
int kvm_setup_empty_irq_routing(struct kvm *kvm);
int kvm_irq_delivery_to_apic(struct kvm *kvm, struct kvm_lapic *src,
			     struct kvm_lapic_irq *irq,
			     struct dest_map *dest_map);

#endif
Commit	Line	Data
3b20eb23	1	/* SPDX-License-Identifier: GPL-2.0-only */
85f455f7 ED	2	/*
	3	* irq.h: in kernel interrupt controller related definitions
	4	* Copyright (c) 2007, Intel Corporation.
	5	*
85f455f7 ED	6	* Authors:
85f455f7 ED	7	* Yaozu (Eddie) Dong <Eddie.dong@intel.com>
85f455f7 ED	8	*/
	9
	10	#ifndef __IRQ_H
	11	#define __IRQ_H
	12
e01a1b57 HB	13	#include <linux/mm_types.h>
e01a1b57 HB	14	#include <linux/hrtimer.h>
edf88417	15	#include <linux/kvm_host.h>
3f353858	16	#include <linux/spinlock.h>
82470196	17
af669ac6	18	#include <kvm/iodev.h>
82470196	19	#include "lapic.h"
85f455f7	20
c65bbfa1	21	#define PIC_NUM_PINS 16
44882eed MT	22	#define SELECT_PIC(irq) \
44882eed MT	23	((irq) < 8 ? KVM_IRQCHIP_PIC_MASTER : KVM_IRQCHIP_PIC_SLAVE)
c65bbfa1	24
e01a1b57 HB	25	struct kvm;
	26	struct kvm_vcpu;
	27
85f455f7 ED	28	struct kvm_kpic_state {
	29	u8 last_irr; /* edge detection */
	30	u8 irr; /* interrupt request register */
	31	u8 imr; /* interrupt mask register */
	32	u8 isr; /* interrupt service register */
	33	u8 priority_add; /* highest irq priority */
	34	u8 irq_base;
	35	u8 read_reg_select;
	36	u8 poll;
	37	u8 special_mask;
	38	u8 init_state;
	39	u8 auto_eoi;
	40	u8 rotate_on_auto_eoi;
	41	u8 special_fully_nested_mode;
	42	u8 init4; /* true if 4 byte init */
	43	u8 elcr; /* PIIX edge/trigger selection */
	44	u8 elcr_mask;
eebb5f31	45	u8 isr_ack; /* interrupt ack detection */
85f455f7 ED	46	struct kvm_pic *pics_state;
	47	};
	48
	49	struct kvm_pic {
f4f51050	50	spinlock_t lock;
50a085bd	51	bool wakeup_needed;
3f353858 AK	52	unsigned pending_acks;
3f353858 AK	53	struct kvm *kvm;
85f455f7	54	struct kvm_kpic_state pics[2]; /* 0 is master pic, 1 is slave pic */
85f455f7	55	int output; /* intr from master PIC */
743eeb0b SL	56	struct kvm_io_device dev_master;
743eeb0b SL	57	struct kvm_io_device dev_slave;
34739a28	58	struct kvm_io_device dev_elcr;
93b6547e	59	unsigned long irq_states[PIC_NUM_PINS];
85f455f7 ED	60	};
85f455f7 ED	61
09941366 RK	62	int kvm_pic_init(struct kvm *kvm);
09941366 RK	63	void kvm_pic_destroy(struct kvm *kvm);
f5244726	64	int kvm_pic_read_irq(struct kvm *kvm);
6ceb9d79	65	void kvm_pic_update_irq(struct kvm_pic *s);
85f455f7	66
49df6397 SR	67	static inline int irqchip_split(struct kvm *kvm)
49df6397 SR	68	{
637e3f86 DH	69	int mode = kvm->arch.irqchip_mode;
	70
	71	/* Matches smp_wmb() when setting irqchip_mode */
	72	smp_rmb();
	73	return mode == KVM_IRQCHIP_SPLIT;
49df6397 SR	74	}
49df6397 SR	75
49776faf	76	static inline int irqchip_kernel(struct kvm *kvm)
682c59a3	77	{
637e3f86 DH	78	int mode = kvm->arch.irqchip_mode;
	79
	80	/* Matches smp_wmb() when setting irqchip_mode */
	81	smp_rmb();
	82	return mode == KVM_IRQCHIP_KERNEL;
49776faf	83	}
49df6397	84
88197e6a R	85	static inline int pic_in_kernel(struct kvm *kvm)
	86	{
	87	return irqchip_kernel(kvm);
	88	}
	89
49776faf RK	90	static inline int irqchip_in_kernel(struct kvm *kvm)
49776faf RK	91	{
637e3f86	92	int mode = kvm->arch.irqchip_mode;
3ddea128	93
637e3f86	94	/* Matches smp_wmb() when setting irqchip_mode */
3ddea128	95	smp_rmb();
5c0aea0e	96	return mode != KVM_IRQCHIP_NONE;
682c59a3 ZX	97	}
682c59a3 ZX	98
1b9778da ED	99	void kvm_inject_pending_timer_irqs(struct kvm_vcpu *vcpu);
1b9778da ED	100	void kvm_inject_apic_timer_irqs(struct kvm_vcpu *vcpu);
8fdb2351	101	void kvm_apic_nmi_wd_deliver(struct kvm_vcpu *vcpu);
2f52d58c	102	void __kvm_migrate_apic_timer(struct kvm_vcpu *vcpu);
2f599714 MT	103	void __kvm_migrate_pit_timer(struct kvm_vcpu *vcpu);
2f599714 MT	104	void __kvm_migrate_timers(struct kvm_vcpu *vcpu);
97222cc8	105
3d80840d MT	106	int apic_has_pending_timer(struct kvm_vcpu *vcpu);
3d80840d MT	107
d9565a73 EA	108	int kvm_setup_default_irq_routing(struct kvm *kvm);
d9565a73 EA	109	int kvm_setup_empty_irq_routing(struct kvm *kvm);
59508b30 PX	110	int kvm_irq_delivery_to_apic(struct kvm kvm, struct kvm_lapic src,
	111	struct kvm_lapic_irq *irq,
	112	struct dest_map *dest_map);
d9565a73	113
85f455f7	114	#endif