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x86/kvm/hyper-v: Introduce nested_get_evmcs_version() helper
[linux-block.git] / arch / x86 / kvm / hyperv.c
CommitLineData
e83d5887
AS		 1/*
2 * KVM Microsoft Hyper-V emulation
3 *
4 * derived from arch/x86/kvm/x86.c
5 *
6 * Copyright (C) 2006 Qumranet, Inc.
7 * Copyright (C) 2008 Qumranet, Inc.
8 * Copyright IBM Corporation, 2008
9 * Copyright 2010 Red Hat, Inc. and/or its affiliates.
10 * Copyright (C) 2015 Andrey Smetanin <asmetanin@virtuozzo.com>
11 *
12 * Authors:
13 * Avi Kivity <avi@qumranet.com>
14 * Yaniv Kamay <yaniv@qumranet.com>
15 * Amit Shah <amit.shah@qumranet.com>
16 * Ben-Ami Yassour <benami@il.ibm.com>
17 * Andrey Smetanin <asmetanin@virtuozzo.com>
18 *
19 * This work is licensed under the terms of the GNU GPL, version 2. See
20 * the COPYING file in the top-level directory.
21 *
22 */
23
24#include "x86.h"
25#include "lapic.h"
5c919412 26#include "ioapic.h"
e83d5887
AS		 27#include "hyperv.h"
28
29#include <linux/kvm_host.h>
765eaa0f 30#include <linux/highmem.h>
32ef5517 31#include <linux/sched/cputime.h>
faeb7833 32#include <linux/eventfd.h>
32ef5517 33
5c919412 34#include <asm/apicdef.h>
e83d5887
AS		 35#include <trace/events/kvm.h>
36
37#include "trace.h"
38
f21dd494
VK		 39#define KVM_HV_MAX_SPARSE_VCPU_SET_BITS DIV_ROUND_UP(KVM_MAX_VCPUS, 64)
40
5c919412
AS		 41static inline u64 synic_read_sint(struct kvm_vcpu_hv_synic *synic, int sint)
42{
43 return atomic64_read(&synic->sint[sint]);
44}
45
46static inline int synic_get_sint_vector(u64 sint_value)
47{
48 if (sint_value & HV_SYNIC_SINT_MASKED)
49 return -1;
50 return sint_value & HV_SYNIC_SINT_VECTOR_MASK;
51}
52
53static bool synic_has_vector_connected(struct kvm_vcpu_hv_synic *synic,
54 int vector)
55{
56 int i;
57
58 for (i = 0; i < ARRAY_SIZE(synic->sint); i++) {
59 if (synic_get_sint_vector(synic_read_sint(synic, i)) == vector)
60 return true;
61 }
62 return false;
63}
64
65static bool synic_has_vector_auto_eoi(struct kvm_vcpu_hv_synic *synic,
66 int vector)
67{
68 int i;
69 u64 sint_value;
70
71 for (i = 0; i < ARRAY_SIZE(synic->sint); i++) {
72 sint_value = synic_read_sint(synic, i);
73 if (synic_get_sint_vector(sint_value) == vector &&
74 sint_value & HV_SYNIC_SINT_AUTO_EOI)
75 return true;
76 }
77 return false;
78}
79
98f65ad4
VK		 80static void synic_update_vector(struct kvm_vcpu_hv_synic *synic,
81 int vector)
82{
83 if (vector < HV_SYNIC_FIRST_VALID_VECTOR)
84 return;
85
86 if (synic_has_vector_connected(synic, vector))
87 __set_bit(vector, synic->vec_bitmap);
88 else
89 __clear_bit(vector, synic->vec_bitmap);
90
91 if (synic_has_vector_auto_eoi(synic, vector))
92 __set_bit(vector, synic->auto_eoi_bitmap);
93 else
94 __clear_bit(vector, synic->auto_eoi_bitmap);
95}
96
7be58a64
AS		 97static int synic_set_sint(struct kvm_vcpu_hv_synic *synic, int sint,
98 u64 data, bool host)
5c919412 99{
98f65ad4 100 int vector, old_vector;
915e6f78 101 bool masked;
5c919412
AS		 102
103 vector = data & HV_SYNIC_SINT_VECTOR_MASK;
915e6f78
VK		 104 masked = data & HV_SYNIC_SINT_MASKED;
105
106 /*
107 * Valid vectors are 16-255, however, nested Hyper-V attempts to write
108 * default '0x10000' value on boot and this should not #GP. We need to
109 * allow zero-initing the register from host as well.
110 */
111 if (vector < HV_SYNIC_FIRST_VALID_VECTOR && !host && !masked)
5c919412
AS		 112 return 1;
113 /*
114 * Guest may configure multiple SINTs to use the same vector, so
115 * we maintain a bitmap of vectors handled by synic, and a
116 * bitmap of vectors with auto-eoi behavior. The bitmaps are
117 * updated here, and atomically queried on fast paths.
118 */
98f65ad4 119 old_vector = synic_read_sint(synic, sint) & HV_SYNIC_SINT_VECTOR_MASK;
5c919412
AS		 120
121 atomic64_set(&synic->sint[sint], data);
122
98f65ad4 123 synic_update_vector(synic, old_vector);
5c919412 124
98f65ad4 125 synic_update_vector(synic, vector);
5c919412
AS		 126
127 /* Load SynIC vectors into EOI exit bitmap */
128 kvm_make_request(KVM_REQ_SCAN_IOAPIC, synic_to_vcpu(synic));
129 return 0;
130}
131
d3457c87
RK		 132static struct kvm_vcpu *get_vcpu_by_vpidx(struct kvm *kvm, u32 vpidx)
133{
134 struct kvm_vcpu *vcpu = NULL;
135 int i;
136
9170200e
VK		 137 if (vpidx >= KVM_MAX_VCPUS)
138 return NULL;
139
140 vcpu = kvm_get_vcpu(kvm, vpidx);
d3457c87
RK		 141 if (vcpu && vcpu_to_hv_vcpu(vcpu)->vp_index == vpidx)
142 return vcpu;
143 kvm_for_each_vcpu(i, vcpu, kvm)
144 if (vcpu_to_hv_vcpu(vcpu)->vp_index == vpidx)
145 return vcpu;
146 return NULL;
147}
148
149static struct kvm_vcpu_hv_synic *synic_get(struct kvm *kvm, u32 vpidx)
5c919412
AS		 150{
151 struct kvm_vcpu *vcpu;
152 struct kvm_vcpu_hv_synic *synic;
153
d3457c87 154 vcpu = get_vcpu_by_vpidx(kvm, vpidx);
5c919412
AS		 155 if (!vcpu)
156 return NULL;
157 synic = vcpu_to_synic(vcpu);
158 return (synic->active) ? synic : NULL;
159}
160
161static void kvm_hv_notify_acked_sint(struct kvm_vcpu *vcpu, u32 sint)
162{
163 struct kvm *kvm = vcpu->kvm;
765eaa0f 164 struct kvm_vcpu_hv_synic *synic = vcpu_to_synic(vcpu);
1f4b34f8
AS		 165 struct kvm_vcpu_hv *hv_vcpu = vcpu_to_hv_vcpu(vcpu);
166 struct kvm_vcpu_hv_stimer *stimer;
167 int gsi, idx, stimers_pending;
5c919412 168
18659a9c 169 trace_kvm_hv_notify_acked_sint(vcpu->vcpu_id, sint);
5c919412 170
1f4b34f8
AS		 171 /* Try to deliver pending Hyper-V SynIC timers messages */
172 stimers_pending = 0;
173 for (idx = 0; idx < ARRAY_SIZE(hv_vcpu->stimer); idx++) {
174 stimer = &hv_vcpu->stimer[idx];
175 if (stimer->msg_pending &&
176 (stimer->config & HV_STIMER_ENABLE) &&
177 HV_STIMER_SINT(stimer->config) == sint) {
178 set_bit(stimer->index,
179 hv_vcpu->stimer_pending_bitmap);
180 stimers_pending++;
181 }
182 }
183 if (stimers_pending)
184 kvm_make_request(KVM_REQ_HV_STIMER, vcpu);
185
5c919412 186 idx = srcu_read_lock(&kvm->irq_srcu);
1f4b34f8 187 gsi = atomic_read(&synic->sint_to_gsi[sint]);
5c919412
AS		 188 if (gsi != -1)
189 kvm_notify_acked_gsi(kvm, gsi);
190 srcu_read_unlock(&kvm->irq_srcu, idx);
191}
192
db397571
AS		 193static void synic_exit(struct kvm_vcpu_hv_synic *synic, u32 msr)
194{
195 struct kvm_vcpu *vcpu = synic_to_vcpu(synic);
196 struct kvm_vcpu_hv *hv_vcpu = &vcpu->arch.hyperv;
197
198 hv_vcpu->exit.type = KVM_EXIT_HYPERV_SYNIC;
199 hv_vcpu->exit.u.synic.msr = msr;
200 hv_vcpu->exit.u.synic.control = synic->control;
201 hv_vcpu->exit.u.synic.evt_page = synic->evt_page;
202 hv_vcpu->exit.u.synic.msg_page = synic->msg_page;
203
204 kvm_make_request(KVM_REQ_HV_EXIT, vcpu);
205}
206
5c919412
AS		 207static int synic_set_msr(struct kvm_vcpu_hv_synic *synic,
208 u32 msr, u64 data, bool host)
209{
210 struct kvm_vcpu *vcpu = synic_to_vcpu(synic);
211 int ret;
212
44883f01 213 if (!synic->active && !host)
5c919412
AS		 214 return 1;
215
18659a9c
AS		 216 trace_kvm_hv_synic_set_msr(vcpu->vcpu_id, msr, data, host);
217
5c919412
AS		 218 ret = 0;
219 switch (msr) {
220 case HV_X64_MSR_SCONTROL:
221 synic->control = data;
db397571
AS		 222 if (!host)
223 synic_exit(synic, msr);
5c919412
AS		 224 break;
225 case HV_X64_MSR_SVERSION:
226 if (!host) {
227 ret = 1;
228 break;
229 }
230 synic->version = data;
231 break;
232 case HV_X64_MSR_SIEFP:
efc479e6
RK		 233 if ((data & HV_SYNIC_SIEFP_ENABLE) && !host &&
234 !synic->dont_zero_synic_pages)
5c919412
AS		 235 if (kvm_clear_guest(vcpu->kvm,
236 data & PAGE_MASK, PAGE_SIZE)) {
237 ret = 1;
238 break;
239 }
240 synic->evt_page = data;
db397571
AS		 241 if (!host)
242 synic_exit(synic, msr);
5c919412
AS		 243 break;
244 case HV_X64_MSR_SIMP:
efc479e6
RK		 245 if ((data & HV_SYNIC_SIMP_ENABLE) && !host &&
246 !synic->dont_zero_synic_pages)
5c919412
AS		 247 if (kvm_clear_guest(vcpu->kvm,
248 data & PAGE_MASK, PAGE_SIZE)) {
249 ret = 1;
250 break;
251 }
252 synic->msg_page = data;
db397571
AS		 253 if (!host)
254 synic_exit(synic, msr);
5c919412
AS		 255 break;
256 case HV_X64_MSR_EOM: {
257 int i;
258
259 for (i = 0; i < ARRAY_SIZE(synic->sint); i++)
260 kvm_hv_notify_acked_sint(vcpu, i);
261 break;
262 }
263 case HV_X64_MSR_SINT0 ... HV_X64_MSR_SINT15:
7be58a64 264 ret = synic_set_sint(synic, msr - HV_X64_MSR_SINT0, data, host);
5c919412
AS		 265 break;
266 default:
267 ret = 1;
268 break;
269 }
270 return ret;
271}
272
44883f01
PB		 273static int synic_get_msr(struct kvm_vcpu_hv_synic *synic, u32 msr, u64 *pdata,
274 bool host)
5c919412
AS		 275{
276 int ret;
277
44883f01 278 if (!synic->active && !host)
5c919412
AS		 279 return 1;
280
281 ret = 0;
282 switch (msr) {
283 case HV_X64_MSR_SCONTROL:
284 *pdata = synic->control;
285 break;
286 case HV_X64_MSR_SVERSION:
287 *pdata = synic->version;
288 break;
289 case HV_X64_MSR_SIEFP:
290 *pdata = synic->evt_page;
291 break;
292 case HV_X64_MSR_SIMP:
293 *pdata = synic->msg_page;
294 break;
295 case HV_X64_MSR_EOM:
296 *pdata = 0;
297 break;
298 case HV_X64_MSR_SINT0 ... HV_X64_MSR_SINT15:
299 *pdata = atomic64_read(&synic->sint[msr - HV_X64_MSR_SINT0]);
300 break;
301 default:
302 ret = 1;
303 break;
304 }
305 return ret;
306}
307
ecd8a8c2 308static int synic_set_irq(struct kvm_vcpu_hv_synic *synic, u32 sint)
5c919412
AS		 309{
310 struct kvm_vcpu *vcpu = synic_to_vcpu(synic);
311 struct kvm_lapic_irq irq;
312 int ret, vector;
313
314 if (sint >= ARRAY_SIZE(synic->sint))
315 return -EINVAL;
316
317 vector = synic_get_sint_vector(synic_read_sint(synic, sint));
318 if (vector < 0)
319 return -ENOENT;
320
321 memset(&irq, 0, sizeof(irq));
f98a3efb 322 irq.shorthand = APIC_DEST_SELF;
5c919412
AS		 323 irq.dest_mode = APIC_DEST_PHYSICAL;
324 irq.delivery_mode = APIC_DM_FIXED;
325 irq.vector = vector;
326 irq.level = 1;
327
f98a3efb 328 ret = kvm_irq_delivery_to_apic(vcpu->kvm, vcpu->arch.apic, &irq, NULL);
18659a9c 329 trace_kvm_hv_synic_set_irq(vcpu->vcpu_id, sint, irq.vector, ret);
5c919412
AS		 330 return ret;
331}
332
d3457c87 333int kvm_hv_synic_set_irq(struct kvm *kvm, u32 vpidx, u32 sint)
5c919412
AS		 334{
335 struct kvm_vcpu_hv_synic *synic;
336
d3457c87 337 synic = synic_get(kvm, vpidx);
5c919412
AS		 338 if (!synic)
339 return -EINVAL;
340
341 return synic_set_irq(synic, sint);
342}
343
344void kvm_hv_synic_send_eoi(struct kvm_vcpu *vcpu, int vector)
345{
346 struct kvm_vcpu_hv_synic *synic = vcpu_to_synic(vcpu);
347 int i;
348
18659a9c 349 trace_kvm_hv_synic_send_eoi(vcpu->vcpu_id, vector);
5c919412
AS		 350
351 for (i = 0; i < ARRAY_SIZE(synic->sint); i++)
352 if (synic_get_sint_vector(synic_read_sint(synic, i)) == vector)
353 kvm_hv_notify_acked_sint(vcpu, i);
354}
355
d3457c87 356static int kvm_hv_set_sint_gsi(struct kvm *kvm, u32 vpidx, u32 sint, int gsi)
5c919412
AS		 357{
358 struct kvm_vcpu_hv_synic *synic;
359
d3457c87 360 synic = synic_get(kvm, vpidx);
5c919412
AS		 361 if (!synic)
362 return -EINVAL;
363
364 if (sint >= ARRAY_SIZE(synic->sint_to_gsi))
365 return -EINVAL;
366
367 atomic_set(&synic->sint_to_gsi[sint], gsi);
368 return 0;
369}
370
371void kvm_hv_irq_routing_update(struct kvm *kvm)
372{
373 struct kvm_irq_routing_table *irq_rt;
374 struct kvm_kernel_irq_routing_entry *e;
375 u32 gsi;
376
377 irq_rt = srcu_dereference_check(kvm->irq_routing, &kvm->irq_srcu,
378 lockdep_is_held(&kvm->irq_lock));
379
380 for (gsi = 0; gsi < irq_rt->nr_rt_entries; gsi++) {
381 hlist_for_each_entry(e, &irq_rt->map[gsi], link) {
382 if (e->type == KVM_IRQ_ROUTING_HV_SINT)
383 kvm_hv_set_sint_gsi(kvm, e->hv_sint.vcpu,
384 e->hv_sint.sint, gsi);
385 }
386 }
387}
388
389static void synic_init(struct kvm_vcpu_hv_synic *synic)
390{
391 int i;
392
393 memset(synic, 0, sizeof(*synic));
394 synic->version = HV_SYNIC_VERSION_1;
395 for (i = 0; i < ARRAY_SIZE(synic->sint); i++) {
396 atomic64_set(&synic->sint[i], HV_SYNIC_SINT_MASKED);
397 atomic_set(&synic->sint_to_gsi[i], -1);
398 }
399}
400
93bf4172
AS		 401static u64 get_time_ref_counter(struct kvm *kvm)
402{
095cf55d
PB		 403 struct kvm_hv *hv = &kvm->arch.hyperv;
404 struct kvm_vcpu *vcpu;
405 u64 tsc;
406
407 /*
408 * The guest has not set up the TSC page or the clock isn't
409 * stable, fall back to get_kvmclock_ns.
410 */
411 if (!hv->tsc_ref.tsc_sequence)
412 return div_u64(get_kvmclock_ns(kvm), 100);
413
414 vcpu = kvm_get_vcpu(kvm, 0);
415 tsc = kvm_read_l1_tsc(vcpu, rdtsc());
416 return mul_u64_u64_shr(tsc, hv->tsc_ref.tsc_scale, 64)
417 + hv->tsc_ref.tsc_offset;
93bf4172
AS		 418}
419
f3b138c5 420static void stimer_mark_pending(struct kvm_vcpu_hv_stimer *stimer,
1f4b34f8
AS		 421 bool vcpu_kick)
422{
423 struct kvm_vcpu *vcpu = stimer_to_vcpu(stimer);
424
425 set_bit(stimer->index,
426 vcpu_to_hv_vcpu(vcpu)->stimer_pending_bitmap);
427 kvm_make_request(KVM_REQ_HV_STIMER, vcpu);
428 if (vcpu_kick)
429 kvm_vcpu_kick(vcpu);
430}
431
1f4b34f8
AS		 432static void stimer_cleanup(struct kvm_vcpu_hv_stimer *stimer)
433{
434 struct kvm_vcpu *vcpu = stimer_to_vcpu(stimer);
435
ac3e5fca
AS		 436 trace_kvm_hv_stimer_cleanup(stimer_to_vcpu(stimer)->vcpu_id,
437 stimer->index);
438
019b9781 439 hrtimer_cancel(&stimer->timer);
1f4b34f8
AS		 440 clear_bit(stimer->index,
441 vcpu_to_hv_vcpu(vcpu)->stimer_pending_bitmap);
442 stimer->msg_pending = false;
f808495d 443 stimer->exp_time = 0;
1f4b34f8
AS		 444}
445
446static enum hrtimer_restart stimer_timer_callback(struct hrtimer *timer)
447{
448 struct kvm_vcpu_hv_stimer *stimer;
449
450 stimer = container_of(timer, struct kvm_vcpu_hv_stimer, timer);
ac3e5fca
AS		 451 trace_kvm_hv_stimer_callback(stimer_to_vcpu(stimer)->vcpu_id,
452 stimer->index);
f3b138c5 453 stimer_mark_pending(stimer, true);
1f4b34f8
AS		 454
455 return HRTIMER_NORESTART;
456}
457
f808495d
AS		 458/*
459 * stimer_start() assumptions:
460 * a) stimer->count is not equal to 0
461 * b) stimer->config has HV_STIMER_ENABLE flag
462 */
1f4b34f8
AS		 463static int stimer_start(struct kvm_vcpu_hv_stimer *stimer)
464{
465 u64 time_now;
466 ktime_t ktime_now;
467
468 time_now = get_time_ref_counter(stimer_to_vcpu(stimer)->kvm);
469 ktime_now = ktime_get();
470
471 if (stimer->config & HV_STIMER_PERIODIC) {
f808495d
AS		 472 if (stimer->exp_time) {
473 if (time_now >= stimer->exp_time) {
474 u64 remainder;
475
476 div64_u64_rem(time_now - stimer->exp_time,
477 stimer->count, &remainder);
478 stimer->exp_time =
479 time_now + (stimer->count - remainder);
480 }
481 } else
482 stimer->exp_time = time_now + stimer->count;
1f4b34f8 483
ac3e5fca
AS		 484 trace_kvm_hv_stimer_start_periodic(
485 stimer_to_vcpu(stimer)->vcpu_id,
486 stimer->index,
487 time_now, stimer->exp_time);
488
1f4b34f8 489 hrtimer_start(&stimer->timer,
f808495d
AS		 490 ktime_add_ns(ktime_now,
491 100 * (stimer->exp_time - time_now)),
1f4b34f8
AS		 492 HRTIMER_MODE_ABS);
493 return 0;
494 }
495 stimer->exp_time = stimer->count;
496 if (time_now >= stimer->count) {
497 /*
498 * Expire timer according to Hypervisor Top-Level Functional
499 * specification v4(15.3.1):
500 * "If a one shot is enabled and the specified count is in
501 * the past, it will expire immediately."
502 */
f3b138c5 503 stimer_mark_pending(stimer, false);
1f4b34f8
AS		 504 return 0;
505 }
506
ac3e5fca
AS		 507 trace_kvm_hv_stimer_start_one_shot(stimer_to_vcpu(stimer)->vcpu_id,
508 stimer->index,
509 time_now, stimer->count);
510
1f4b34f8
AS		 511 hrtimer_start(&stimer->timer,
512 ktime_add_ns(ktime_now, 100 * (stimer->count - time_now)),
513 HRTIMER_MODE_ABS);
514 return 0;
515}
516
517static int stimer_set_config(struct kvm_vcpu_hv_stimer *stimer, u64 config,
518 bool host)
519{
ac3e5fca
AS		 520 trace_kvm_hv_stimer_set_config(stimer_to_vcpu(stimer)->vcpu_id,
521 stimer->index, config, host);
522
f3b138c5 523 stimer_cleanup(stimer);
23a3b201 524 if ((stimer->config & HV_STIMER_ENABLE) && HV_STIMER_SINT(config) == 0)
1f4b34f8
AS		 525 config &= ~HV_STIMER_ENABLE;
526 stimer->config = config;
f3b138c5 527 stimer_mark_pending(stimer, false);
1f4b34f8
AS		 528 return 0;
529}
530
531static int stimer_set_count(struct kvm_vcpu_hv_stimer *stimer, u64 count,
532 bool host)
533{
ac3e5fca
AS		 534 trace_kvm_hv_stimer_set_count(stimer_to_vcpu(stimer)->vcpu_id,
535 stimer->index, count, host);
536
1f4b34f8 537 stimer_cleanup(stimer);
f3b138c5 538 stimer->count = count;
1f4b34f8
AS		 539 if (stimer->count == 0)
540 stimer->config &= ~HV_STIMER_ENABLE;
f3b138c5 541 else if (stimer->config & HV_STIMER_AUTOENABLE)
1f4b34f8 542 stimer->config |= HV_STIMER_ENABLE;
f3b138c5 543 stimer_mark_pending(stimer, false);
1f4b34f8
AS		 544 return 0;
545}
546
547static int stimer_get_config(struct kvm_vcpu_hv_stimer *stimer, u64 *pconfig)
548{
549 *pconfig = stimer->config;
550 return 0;
551}
552
553static int stimer_get_count(struct kvm_vcpu_hv_stimer *stimer, u64 *pcount)
554{
555 *pcount = stimer->count;
556 return 0;
557}
558
559static int synic_deliver_msg(struct kvm_vcpu_hv_synic *synic, u32 sint,
7deec5e0 560 struct hv_message *src_msg, bool no_retry)
1f4b34f8
AS		 561{
562 struct kvm_vcpu *vcpu = synic_to_vcpu(synic);
3a0e7731
RK		 563 int msg_off = offsetof(struct hv_message_page, sint_message[sint]);
564 gfn_t msg_page_gfn;
565 struct hv_message_header hv_hdr;
1f4b34f8 566 int r;
1f4b34f8
AS		 567
568 if (!(synic->msg_page & HV_SYNIC_SIMP_ENABLE))
569 return -ENOENT;
570
3a0e7731 571 msg_page_gfn = synic->msg_page >> PAGE_SHIFT;
1f4b34f8 572
3a0e7731
RK		 573 /*
574 * Strictly following the spec-mandated ordering would assume setting
575 * .msg_pending before checking .message_type. However, this function
576 * is only called in vcpu context so the entire update is atomic from
577 * guest POV and thus the exact order here doesn't matter.
578 */
579 r = kvm_vcpu_read_guest_page(vcpu, msg_page_gfn, &hv_hdr.message_type,
580 msg_off + offsetof(struct hv_message,
581 header.message_type),
582 sizeof(hv_hdr.message_type));
583 if (r < 0)
584 return r;
585
586 if (hv_hdr.message_type != HVMSG_NONE) {
7deec5e0
RK		 587 if (no_retry)
588 return 0;
589
3a0e7731
RK		 590 hv_hdr.message_flags.msg_pending = 1;
591 r = kvm_vcpu_write_guest_page(vcpu, msg_page_gfn,
592 &hv_hdr.message_flags,
593 msg_off +
594 offsetof(struct hv_message,
595 header.message_flags),
596 sizeof(hv_hdr.message_flags));
597 if (r < 0)
598 return r;
599 return -EAGAIN;
1f4b34f8 600 }
3a0e7731
RK		 601
602 r = kvm_vcpu_write_guest_page(vcpu, msg_page_gfn, src_msg, msg_off,
603 sizeof(src_msg->header) +
604 src_msg->header.payload_size);
605 if (r < 0)
606 return r;
607
608 r = synic_set_irq(synic, sint);
609 if (r < 0)
610 return r;
611 if (r == 0)
612 return -EFAULT;
613 return 0;
1f4b34f8
AS		 614}
615
0cdeabb1 616static int stimer_send_msg(struct kvm_vcpu_hv_stimer *stimer)
1f4b34f8
AS		 617{
618 struct kvm_vcpu *vcpu = stimer_to_vcpu(stimer);
619 struct hv_message *msg = &stimer->msg;
620 struct hv_timer_message_payload *payload =
621 (struct hv_timer_message_payload *)&msg->u.payload;
1f4b34f8 622
7deec5e0
RK		 623 /*
624 * To avoid piling up periodic ticks, don't retry message
625 * delivery for them (within "lazy" lost ticks policy).
626 */
627 bool no_retry = stimer->config & HV_STIMER_PERIODIC;
628
1f4b34f8
AS		 629 payload->expiration_time = stimer->exp_time;
630 payload->delivery_time = get_time_ref_counter(vcpu->kvm);
0cdeabb1 631 return synic_deliver_msg(vcpu_to_synic(vcpu),
7deec5e0
RK		 632 HV_STIMER_SINT(stimer->config), msg,
633 no_retry);
1f4b34f8
AS		 634}
635
636static void stimer_expiration(struct kvm_vcpu_hv_stimer *stimer)
637{
ac3e5fca
AS		 638 int r;
639
0cdeabb1 640 stimer->msg_pending = true;
ac3e5fca
AS		 641 r = stimer_send_msg(stimer);
642 trace_kvm_hv_stimer_expiration(stimer_to_vcpu(stimer)->vcpu_id,
643 stimer->index, r);
644 if (!r) {
0cdeabb1
AS		 645 stimer->msg_pending = false;
646 if (!(stimer->config & HV_STIMER_PERIODIC))
647 stimer->config &= ~HV_STIMER_ENABLE;
648 }
1f4b34f8
AS		 649}
650
651void kvm_hv_process_stimers(struct kvm_vcpu *vcpu)
652{
653 struct kvm_vcpu_hv *hv_vcpu = vcpu_to_hv_vcpu(vcpu);
654 struct kvm_vcpu_hv_stimer *stimer;
f3b138c5 655 u64 time_now, exp_time;
1f4b34f8
AS		 656 int i;
657
658 for (i = 0; i < ARRAY_SIZE(hv_vcpu->stimer); i++)
659 if (test_and_clear_bit(i, hv_vcpu->stimer_pending_bitmap)) {
660 stimer = &hv_vcpu->stimer[i];
1f4b34f8 661 if (stimer->config & HV_STIMER_ENABLE) {
f3b138c5
AS		 662 exp_time = stimer->exp_time;
663
664 if (exp_time) {
665 time_now =
666 get_time_ref_counter(vcpu->kvm);
667 if (time_now >= exp_time)
668 stimer_expiration(stimer);
669 }
0cdeabb1 670
f3b138c5 671 if ((stimer->config & HV_STIMER_ENABLE) &&
f1ff89ec
RK		 672 stimer->count) {
673 if (!stimer->msg_pending)
674 stimer_start(stimer);
675 } else
0cdeabb1 676 stimer_cleanup(stimer);
1f4b34f8
AS		 677 }
678 }
679}
680
681void kvm_hv_vcpu_uninit(struct kvm_vcpu *vcpu)
682{
683 struct kvm_vcpu_hv *hv_vcpu = vcpu_to_hv_vcpu(vcpu);
684 int i;
685
686 for (i = 0; i < ARRAY_SIZE(hv_vcpu->stimer); i++)
687 stimer_cleanup(&hv_vcpu->stimer[i]);
688}
689
72bbf935
LP		 690bool kvm_hv_assist_page_enabled(struct kvm_vcpu *vcpu)
691{
692 if (!(vcpu->arch.hyperv.hv_vapic & HV_X64_MSR_VP_ASSIST_PAGE_ENABLE))
693 return false;
694 return vcpu->arch.pv_eoi.msr_val & KVM_MSR_ENABLED;
695}
696EXPORT_SYMBOL_GPL(kvm_hv_assist_page_enabled);
697
698bool kvm_hv_get_assist_page(struct kvm_vcpu *vcpu,
699 struct hv_vp_assist_page *assist_page)
700{
701 if (!kvm_hv_assist_page_enabled(vcpu))
702 return false;
703 return !kvm_read_guest_cached(vcpu->kvm, &vcpu->arch.pv_eoi.data,
704 assist_page, sizeof(*assist_page));
705}
706EXPORT_SYMBOL_GPL(kvm_hv_get_assist_page);
707
1f4b34f8
AS		 708static void stimer_prepare_msg(struct kvm_vcpu_hv_stimer *stimer)
709{
710 struct hv_message *msg = &stimer->msg;
711 struct hv_timer_message_payload *payload =
712 (struct hv_timer_message_payload *)&msg->u.payload;
713
714 memset(&msg->header, 0, sizeof(msg->header));
715 msg->header.message_type = HVMSG_TIMER_EXPIRED;
716 msg->header.payload_size = sizeof(*payload);
717
718 payload->timer_index = stimer->index;
719 payload->expiration_time = 0;
720 payload->delivery_time = 0;
721}
722
723static void stimer_init(struct kvm_vcpu_hv_stimer *stimer, int timer_index)
724{
725 memset(stimer, 0, sizeof(*stimer));
726 stimer->index = timer_index;
727 hrtimer_init(&stimer->timer, CLOCK_MONOTONIC, HRTIMER_MODE_ABS);
728 stimer->timer.function = stimer_timer_callback;
729 stimer_prepare_msg(stimer);
730}
731
5c919412
AS		 732void kvm_hv_vcpu_init(struct kvm_vcpu *vcpu)
733{
1f4b34f8
AS		 734 struct kvm_vcpu_hv *hv_vcpu = vcpu_to_hv_vcpu(vcpu);
735 int i;
736
737 synic_init(&hv_vcpu->synic);
738
739 bitmap_zero(hv_vcpu->stimer_pending_bitmap, HV_SYNIC_STIMER_COUNT);
740 for (i = 0; i < ARRAY_SIZE(hv_vcpu->stimer); i++)
741 stimer_init(&hv_vcpu->stimer[i], i);
5c919412
AS		 742}
743
d3457c87
RK		 744void kvm_hv_vcpu_postcreate(struct kvm_vcpu *vcpu)
745{
746 struct kvm_vcpu_hv *hv_vcpu = vcpu_to_hv_vcpu(vcpu);
747
748 hv_vcpu->vp_index = kvm_vcpu_get_idx(vcpu);
749}
750
efc479e6 751int kvm_hv_activate_synic(struct kvm_vcpu *vcpu, bool dont_zero_synic_pages)
5c919412 752{
efc479e6
RK		 753 struct kvm_vcpu_hv_synic *synic = vcpu_to_synic(vcpu);
754
5c919412
AS		 755 /*
756 * Hyper-V SynIC auto EOI SINT's are
757 * not compatible with APICV, so deactivate APICV
758 */
759 kvm_vcpu_deactivate_apicv(vcpu);
efc479e6
RK		 760 synic->active = true;
761 synic->dont_zero_synic_pages = dont_zero_synic_pages;
5c919412
AS		 762 return 0;
763}
764
e83d5887
AS		 765static bool kvm_hv_msr_partition_wide(u32 msr)
766{
767 bool r = false;
768
769 switch (msr) {
770 case HV_X64_MSR_GUEST_OS_ID:
771 case HV_X64_MSR_HYPERCALL:
772 case HV_X64_MSR_REFERENCE_TSC:
773 case HV_X64_MSR_TIME_REF_COUNT:
e7d9513b
AS		 774 case HV_X64_MSR_CRASH_CTL:
775 case HV_X64_MSR_CRASH_P0 ... HV_X64_MSR_CRASH_P4:
e516cebb 776 case HV_X64_MSR_RESET:
a2e164e7
VK		 777 case HV_X64_MSR_REENLIGHTENMENT_CONTROL:
778 case HV_X64_MSR_TSC_EMULATION_CONTROL:
779 case HV_X64_MSR_TSC_EMULATION_STATUS:
e83d5887
AS		 780 r = true;
781 break;
782 }
783
784 return r;
785}
786
e7d9513b
AS		 787static int kvm_hv_msr_get_crash_data(struct kvm_vcpu *vcpu,
788 u32 index, u64 *pdata)
789{
790 struct kvm_hv *hv = &vcpu->kvm->arch.hyperv;
791
792 if (WARN_ON_ONCE(index >= ARRAY_SIZE(hv->hv_crash_param)))
793 return -EINVAL;
794
795 *pdata = hv->hv_crash_param[index];
796 return 0;
797}
798
799static int kvm_hv_msr_get_crash_ctl(struct kvm_vcpu *vcpu, u64 *pdata)
800{
801 struct kvm_hv *hv = &vcpu->kvm->arch.hyperv;
802
803 *pdata = hv->hv_crash_ctl;
804 return 0;
805}
806
807static int kvm_hv_msr_set_crash_ctl(struct kvm_vcpu *vcpu, u64 data, bool host)
808{
809 struct kvm_hv *hv = &vcpu->kvm->arch.hyperv;
810
811 if (host)
a4987def 812 hv->hv_crash_ctl = data & HV_CRASH_CTL_CRASH_NOTIFY;
e7d9513b 813
a4987def 814 if (!host && (data & HV_CRASH_CTL_CRASH_NOTIFY)) {
e7d9513b
AS		 815
816 vcpu_debug(vcpu, "hv crash (0x%llx 0x%llx 0x%llx 0x%llx 0x%llx)\n",
817 hv->hv_crash_param[0],
818 hv->hv_crash_param[1],
819 hv->hv_crash_param[2],
820 hv->hv_crash_param[3],
821 hv->hv_crash_param[4]);
822
823 /* Send notification about crash to user space */
824 kvm_make_request(KVM_REQ_HV_CRASH, vcpu);
825 }
826
827 return 0;
828}
829
830static int kvm_hv_msr_set_crash_data(struct kvm_vcpu *vcpu,
831 u32 index, u64 data)
832{
833 struct kvm_hv *hv = &vcpu->kvm->arch.hyperv;
834
835 if (WARN_ON_ONCE(index >= ARRAY_SIZE(hv->hv_crash_param)))
836 return -EINVAL;
837
838 hv->hv_crash_param[index] = data;
839 return 0;
840}
841
095cf55d
PB		 842/*
843 * The kvmclock and Hyper-V TSC page use similar formulas, and converting
844 * between them is possible:
845 *
846 * kvmclock formula:
847 * nsec = (ticks - tsc_timestamp) * tsc_to_system_mul * 2^(tsc_shift-32)
848 * + system_time
849 *
850 * Hyper-V formula:
851 * nsec/100 = ticks * scale / 2^64 + offset
852 *
853 * When tsc_timestamp = system_time = 0, offset is zero in the Hyper-V formula.
854 * By dividing the kvmclock formula by 100 and equating what's left we get:
855 * ticks * scale / 2^64 = ticks * tsc_to_system_mul * 2^(tsc_shift-32) / 100
856 * scale / 2^64 = tsc_to_system_mul * 2^(tsc_shift-32) / 100
857 * scale = tsc_to_system_mul * 2^(32+tsc_shift) / 100
858 *
859 * Now expand the kvmclock formula and divide by 100:
860 * nsec = ticks * tsc_to_system_mul * 2^(tsc_shift-32)
861 * - tsc_timestamp * tsc_to_system_mul * 2^(tsc_shift-32)
862 * + system_time
863 * nsec/100 = ticks * tsc_to_system_mul * 2^(tsc_shift-32) / 100
864 * - tsc_timestamp * tsc_to_system_mul * 2^(tsc_shift-32) / 100
865 * + system_time / 100
866 *
867 * Replace tsc_to_system_mul * 2^(tsc_shift-32) / 100 by scale / 2^64:
868 * nsec/100 = ticks * scale / 2^64
869 * - tsc_timestamp * scale / 2^64
870 * + system_time / 100
871 *
872 * Equate with the Hyper-V formula so that ticks * scale / 2^64 cancels out:
873 * offset = system_time / 100 - tsc_timestamp * scale / 2^64
874 *
875 * These two equivalencies are implemented in this function.
876 */
877static bool compute_tsc_page_parameters(struct pvclock_vcpu_time_info *hv_clock,
878 HV_REFERENCE_TSC_PAGE *tsc_ref)
879{
880 u64 max_mul;
881
882 if (!(hv_clock->flags & PVCLOCK_TSC_STABLE_BIT))
883 return false;
884
885 /*
886 * check if scale would overflow, if so we use the time ref counter
887 * tsc_to_system_mul * 2^(tsc_shift+32) / 100 >= 2^64
888 * tsc_to_system_mul / 100 >= 2^(32-tsc_shift)
889 * tsc_to_system_mul >= 100 * 2^(32-tsc_shift)
890 */
891 max_mul = 100ull << (32 - hv_clock->tsc_shift);
892 if (hv_clock->tsc_to_system_mul >= max_mul)
893 return false;
894
895 /*
896 * Otherwise compute the scale and offset according to the formulas
897 * derived above.
898 */
899 tsc_ref->tsc_scale =
900 mul_u64_u32_div(1ULL << (32 + hv_clock->tsc_shift),
901 hv_clock->tsc_to_system_mul,
902 100);
903
904 tsc_ref->tsc_offset = hv_clock->system_time;
905 do_div(tsc_ref->tsc_offset, 100);
906 tsc_ref->tsc_offset -=
907 mul_u64_u64_shr(hv_clock->tsc_timestamp, tsc_ref->tsc_scale, 64);
908 return true;
909}
910
911void kvm_hv_setup_tsc_page(struct kvm *kvm,
912 struct pvclock_vcpu_time_info *hv_clock)
913{
914 struct kvm_hv *hv = &kvm->arch.hyperv;
915 u32 tsc_seq;
916 u64 gfn;
917
918 BUILD_BUG_ON(sizeof(tsc_seq) != sizeof(hv->tsc_ref.tsc_sequence));
919 BUILD_BUG_ON(offsetof(HV_REFERENCE_TSC_PAGE, tsc_sequence) != 0);
920
921 if (!(hv->hv_tsc_page & HV_X64_MSR_TSC_REFERENCE_ENABLE))
922 return;
923
3f5ad8be
PB		 924 mutex_lock(&kvm->arch.hyperv.hv_lock);
925 if (!(hv->hv_tsc_page & HV_X64_MSR_TSC_REFERENCE_ENABLE))
926 goto out_unlock;
927
095cf55d
PB		 928 gfn = hv->hv_tsc_page >> HV_X64_MSR_TSC_REFERENCE_ADDRESS_SHIFT;
929 /*
930 * Because the TSC parameters only vary when there is a
931 * change in the master clock, do not bother with caching.
932 */
933 if (unlikely(kvm_read_guest(kvm, gfn_to_gpa(gfn),
934 &tsc_seq, sizeof(tsc_seq))))
3f5ad8be 935 goto out_unlock;
095cf55d
PB		 936
937 /*
938 * While we're computing and writing the parameters, force the
939 * guest to use the time reference count MSR.
940 */
941 hv->tsc_ref.tsc_sequence = 0;
942 if (kvm_write_guest(kvm, gfn_to_gpa(gfn),
943 &hv->tsc_ref, sizeof(hv->tsc_ref.tsc_sequence)))
3f5ad8be 944 goto out_unlock;
095cf55d
PB		 945
946 if (!compute_tsc_page_parameters(hv_clock, &hv->tsc_ref))
3f5ad8be 947 goto out_unlock;
095cf55d
PB		 948
949 /* Ensure sequence is zero before writing the rest of the struct. */
950 smp_wmb();
951 if (kvm_write_guest(kvm, gfn_to_gpa(gfn), &hv->tsc_ref, sizeof(hv->tsc_ref)))
3f5ad8be 952 goto out_unlock;
095cf55d
PB		 953
954 /*
955 * Now switch to the TSC page mechanism by writing the sequence.
956 */
957 tsc_seq++;
958 if (tsc_seq == 0xFFFFFFFF || tsc_seq == 0)
959 tsc_seq = 1;
960
961 /* Write the struct entirely before the non-zero sequence. */
962 smp_wmb();
963
964 hv->tsc_ref.tsc_sequence = tsc_seq;
965 kvm_write_guest(kvm, gfn_to_gpa(gfn),
966 &hv->tsc_ref, sizeof(hv->tsc_ref.tsc_sequence));
3f5ad8be
PB		 967out_unlock:
968 mutex_unlock(&kvm->arch.hyperv.hv_lock);
095cf55d
PB		 969}
970
e7d9513b
AS		 971static int kvm_hv_set_msr_pw(struct kvm_vcpu *vcpu, u32 msr, u64 data,
972 bool host)
e83d5887
AS		 973{
974 struct kvm *kvm = vcpu->kvm;
975 struct kvm_hv *hv = &kvm->arch.hyperv;
976
977 switch (msr) {
978 case HV_X64_MSR_GUEST_OS_ID:
979 hv->hv_guest_os_id = data;
980 /* setting guest os id to zero disables hypercall page */
981 if (!hv->hv_guest_os_id)
982 hv->hv_hypercall &= ~HV_X64_MSR_HYPERCALL_ENABLE;
983 break;
984 case HV_X64_MSR_HYPERCALL: {
985 u64 gfn;
986 unsigned long addr;
987 u8 instructions[4];
988
989 /* if guest os id is not set hypercall should remain disabled */
990 if (!hv->hv_guest_os_id)
991 break;
992 if (!(data & HV_X64_MSR_HYPERCALL_ENABLE)) {
993 hv->hv_hypercall = data;
994 break;
995 }
996 gfn = data >> HV_X64_MSR_HYPERCALL_PAGE_ADDRESS_SHIFT;
997 addr = gfn_to_hva(kvm, gfn);
998 if (kvm_is_error_hva(addr))
999 return 1;
1000 kvm_x86_ops->patch_hypercall(vcpu, instructions);
1001 ((unsigned char *)instructions)[3] = 0xc3; /* ret */
1002 if (__copy_to_user((void __user *)addr, instructions, 4))
1003 return 1;
1004 hv->hv_hypercall = data;
1005 mark_page_dirty(kvm, gfn);
1006 break;
1007 }
095cf55d 1008 case HV_X64_MSR_REFERENCE_TSC:
e83d5887 1009 hv->hv_tsc_page = data;
095cf55d
PB		 1010 if (hv->hv_tsc_page & HV_X64_MSR_TSC_REFERENCE_ENABLE)
1011 kvm_make_request(KVM_REQ_MASTERCLOCK_UPDATE, vcpu);
e83d5887 1012 break;
e7d9513b
AS		 1013 case HV_X64_MSR_CRASH_P0 ... HV_X64_MSR_CRASH_P4:
1014 return kvm_hv_msr_set_crash_data(vcpu,
1015 msr - HV_X64_MSR_CRASH_P0,
1016 data);
1017 case HV_X64_MSR_CRASH_CTL:
1018 return kvm_hv_msr_set_crash_ctl(vcpu, data, host);
e516cebb
AS		 1019 case HV_X64_MSR_RESET:
1020 if (data == 1) {
1021 vcpu_debug(vcpu, "hyper-v reset requested\n");
1022 kvm_make_request(KVM_REQ_HV_RESET, vcpu);
1023 }
1024 break;
a2e164e7
VK		 1025 case HV_X64_MSR_REENLIGHTENMENT_CONTROL:
1026 hv->hv_reenlightenment_control = data;
1027 break;
1028 case HV_X64_MSR_TSC_EMULATION_CONTROL:
1029 hv->hv_tsc_emulation_control = data;
1030 break;
1031 case HV_X64_MSR_TSC_EMULATION_STATUS:
1032 hv->hv_tsc_emulation_status = data;
1033 break;
44883f01
PB		 1034 case HV_X64_MSR_TIME_REF_COUNT:
1035 /* read-only, but still ignore it if host-initiated */
1036 if (!host)
1037 return 1;
1038 break;
e83d5887
AS		 1039 default:
1040 vcpu_unimpl(vcpu, "Hyper-V uhandled wrmsr: 0x%x data 0x%llx\n",
1041 msr, data);
1042 return 1;
1043 }
1044 return 0;
1045}
1046
9eec50b8
AS		 1047/* Calculate cpu time spent by current task in 100ns units */
1048static u64 current_task_runtime_100ns(void)
1049{
5613fda9 1050 u64 utime, stime;
9eec50b8
AS		 1051
1052 task_cputime_adjusted(current, &utime, &stime);
5613fda9
FW		 1053
1054 return div_u64(utime + stime, 100);
9eec50b8
AS		 1055}
1056
1057static int kvm_hv_set_msr(struct kvm_vcpu *vcpu, u32 msr, u64 data, bool host)
e83d5887 1058{
1779a39f 1059 struct kvm_vcpu_hv *hv_vcpu = &vcpu->arch.hyperv;
e83d5887
AS		 1060
1061 switch (msr) {
87ee613d
VK		 1062 case HV_X64_MSR_VP_INDEX: {
1063 struct kvm_hv *hv = &vcpu->kvm->arch.hyperv;
1064 int vcpu_idx = kvm_vcpu_get_idx(vcpu);
1065 u32 new_vp_index = (u32)data;
1066
1067 if (!host || new_vp_index >= KVM_MAX_VCPUS)
d3457c87 1068 return 1;
87ee613d
VK		 1069
1070 if (new_vp_index == hv_vcpu->vp_index)
1071 return 0;
1072
1073 /*
1074 * The VP index is initialized to vcpu_index by
1075 * kvm_hv_vcpu_postcreate so they initially match. Now the
1076 * VP index is changing, adjust num_mismatched_vp_indexes if
1077 * it now matches or no longer matches vcpu_idx.
1078 */
1079 if (hv_vcpu->vp_index == vcpu_idx)
1080 atomic_inc(&hv->num_mismatched_vp_indexes);
1081 else if (new_vp_index == vcpu_idx)
1082 atomic_dec(&hv->num_mismatched_vp_indexes);
1083
1084 hv_vcpu->vp_index = new_vp_index;
d3457c87 1085 break;
87ee613d 1086 }
d4abc577 1087 case HV_X64_MSR_VP_ASSIST_PAGE: {
e83d5887
AS		 1088 u64 gfn;
1089 unsigned long addr;
1090
d4abc577 1091 if (!(data & HV_X64_MSR_VP_ASSIST_PAGE_ENABLE)) {
1779a39f 1092 hv_vcpu->hv_vapic = data;
72bbf935 1093 if (kvm_lapic_enable_pv_eoi(vcpu, 0, 0))
e83d5887
AS		 1094 return 1;
1095 break;
1096 }
d4abc577 1097 gfn = data >> HV_X64_MSR_VP_ASSIST_PAGE_ADDRESS_SHIFT;
e83d5887
AS		 1098 addr = kvm_vcpu_gfn_to_hva(vcpu, gfn);
1099 if (kvm_is_error_hva(addr))
1100 return 1;
12e0c618
VK		 1101
1102 /*
1103 * Clear apic_assist portion of f(struct hv_vp_assist_page
1104 * only, there can be valuable data in the rest which needs
1105 * to be preserved e.g. on migration.
1106 */
1107 if (__clear_user((void __user *)addr, sizeof(u32)))
e83d5887 1108 return 1;
1779a39f 1109 hv_vcpu->hv_vapic = data;
e83d5887
AS		 1110 kvm_vcpu_mark_page_dirty(vcpu, gfn);
1111 if (kvm_lapic_enable_pv_eoi(vcpu,
72bbf935
LP		 1112 gfn_to_gpa(gfn) | KVM_MSR_ENABLED,
1113 sizeof(struct hv_vp_assist_page)))
e83d5887
AS		 1114 return 1;
1115 break;
1116 }
1117 case HV_X64_MSR_EOI:
1118 return kvm_hv_vapic_msr_write(vcpu, APIC_EOI, data);
1119 case HV_X64_MSR_ICR:
1120 return kvm_hv_vapic_msr_write(vcpu, APIC_ICR, data);
1121 case HV_X64_MSR_TPR:
1122 return kvm_hv_vapic_msr_write(vcpu, APIC_TASKPRI, data);
9eec50b8
AS		 1123 case HV_X64_MSR_VP_RUNTIME:
1124 if (!host)
1125 return 1;
1779a39f 1126 hv_vcpu->runtime_offset = data - current_task_runtime_100ns();
9eec50b8 1127 break;
5c919412
AS		 1128 case HV_X64_MSR_SCONTROL:
1129 case HV_X64_MSR_SVERSION:
1130 case HV_X64_MSR_SIEFP:
1131 case HV_X64_MSR_SIMP:
1132 case HV_X64_MSR_EOM:
1133 case HV_X64_MSR_SINT0 ... HV_X64_MSR_SINT15:
1134 return synic_set_msr(vcpu_to_synic(vcpu), msr, data, host);
1f4b34f8
AS		 1135 case HV_X64_MSR_STIMER0_CONFIG:
1136 case HV_X64_MSR_STIMER1_CONFIG:
1137 case HV_X64_MSR_STIMER2_CONFIG:
1138 case HV_X64_MSR_STIMER3_CONFIG: {
1139 int timer_index = (msr - HV_X64_MSR_STIMER0_CONFIG)/2;
1140
1141 return stimer_set_config(vcpu_to_stimer(vcpu, timer_index),
1142 data, host);
1143 }
1144 case HV_X64_MSR_STIMER0_COUNT:
1145 case HV_X64_MSR_STIMER1_COUNT:
1146 case HV_X64_MSR_STIMER2_COUNT:
1147 case HV_X64_MSR_STIMER3_COUNT: {
1148 int timer_index = (msr - HV_X64_MSR_STIMER0_COUNT)/2;
1149
1150 return stimer_set_count(vcpu_to_stimer(vcpu, timer_index),
1151 data, host);
1152 }
44883f01
PB		 1153 case HV_X64_MSR_TSC_FREQUENCY:
1154 case HV_X64_MSR_APIC_FREQUENCY:
1155 /* read-only, but still ignore it if host-initiated */
1156 if (!host)
1157 return 1;
1158 break;
e83d5887
AS		 1159 default:
1160 vcpu_unimpl(vcpu, "Hyper-V uhandled wrmsr: 0x%x data 0x%llx\n",
1161 msr, data);
1162 return 1;
1163 }
1164
1165 return 0;
1166}
1167
1168static int kvm_hv_get_msr_pw(struct kvm_vcpu *vcpu, u32 msr, u64 *pdata)
1169{
1170 u64 data = 0;
1171 struct kvm *kvm = vcpu->kvm;
1172 struct kvm_hv *hv = &kvm->arch.hyperv;
1173
1174 switch (msr) {
1175 case HV_X64_MSR_GUEST_OS_ID:
1176 data = hv->hv_guest_os_id;
1177 break;
1178 case HV_X64_MSR_HYPERCALL:
1179 data = hv->hv_hypercall;
1180 break;
93bf4172
AS		 1181 case HV_X64_MSR_TIME_REF_COUNT:
1182 data = get_time_ref_counter(kvm);
e83d5887 1183 break;
e83d5887
AS		 1184 case HV_X64_MSR_REFERENCE_TSC:
1185 data = hv->hv_tsc_page;
1186 break;
e7d9513b
AS		 1187 case HV_X64_MSR_CRASH_P0 ... HV_X64_MSR_CRASH_P4:
1188 return kvm_hv_msr_get_crash_data(vcpu,
1189 msr - HV_X64_MSR_CRASH_P0,
1190 pdata);
1191 case HV_X64_MSR_CRASH_CTL:
1192 return kvm_hv_msr_get_crash_ctl(vcpu, pdata);
e516cebb
AS		 1193 case HV_X64_MSR_RESET:
1194 data = 0;
1195 break;
a2e164e7
VK		 1196 case HV_X64_MSR_REENLIGHTENMENT_CONTROL:
1197 data = hv->hv_reenlightenment_control;
1198 break;
1199 case HV_X64_MSR_TSC_EMULATION_CONTROL:
1200 data = hv->hv_tsc_emulation_control;
1201 break;
1202 case HV_X64_MSR_TSC_EMULATION_STATUS:
1203 data = hv->hv_tsc_emulation_status;
1204 break;
e83d5887
AS		 1205 default:
1206 vcpu_unimpl(vcpu, "Hyper-V unhandled rdmsr: 0x%x\n", msr);
1207 return 1;
1208 }
1209
1210 *pdata = data;
1211 return 0;
1212}
1213
44883f01
PB		 1214static int kvm_hv_get_msr(struct kvm_vcpu *vcpu, u32 msr, u64 *pdata,
1215 bool host)
e83d5887
AS		 1216{
1217 u64 data = 0;
1779a39f 1218 struct kvm_vcpu_hv *hv_vcpu = &vcpu->arch.hyperv;
e83d5887
AS		 1219
1220 switch (msr) {
d3457c87 1221 case HV_X64_MSR_VP_INDEX:
1779a39f 1222 data = hv_vcpu->vp_index;
e83d5887 1223 break;
e83d5887
AS		 1224 case HV_X64_MSR_EOI:
1225 return kvm_hv_vapic_msr_read(vcpu, APIC_EOI, pdata);
1226 case HV_X64_MSR_ICR:
1227 return kvm_hv_vapic_msr_read(vcpu, APIC_ICR, pdata);
1228 case HV_X64_MSR_TPR:
1229 return kvm_hv_vapic_msr_read(vcpu, APIC_TASKPRI, pdata);
d4abc577 1230 case HV_X64_MSR_VP_ASSIST_PAGE:
1779a39f 1231 data = hv_vcpu->hv_vapic;
e83d5887 1232 break;
9eec50b8 1233 case HV_X64_MSR_VP_RUNTIME:
1779a39f 1234 data = current_task_runtime_100ns() + hv_vcpu->runtime_offset;
9eec50b8 1235 break;
5c919412
AS		 1236 case HV_X64_MSR_SCONTROL:
1237 case HV_X64_MSR_SVERSION:
1238 case HV_X64_MSR_SIEFP:
1239 case HV_X64_MSR_SIMP:
1240 case HV_X64_MSR_EOM:
1241 case HV_X64_MSR_SINT0 ... HV_X64_MSR_SINT15:
44883f01 1242 return synic_get_msr(vcpu_to_synic(vcpu), msr, pdata, host);
1f4b34f8
AS		 1243 case HV_X64_MSR_STIMER0_CONFIG:
1244 case HV_X64_MSR_STIMER1_CONFIG:
1245 case HV_X64_MSR_STIMER2_CONFIG:
1246 case HV_X64_MSR_STIMER3_CONFIG: {
1247 int timer_index = (msr - HV_X64_MSR_STIMER0_CONFIG)/2;
1248
1249 return stimer_get_config(vcpu_to_stimer(vcpu, timer_index),
1250 pdata);
1251 }
1252 case HV_X64_MSR_STIMER0_COUNT:
1253 case HV_X64_MSR_STIMER1_COUNT:
1254 case HV_X64_MSR_STIMER2_COUNT:
1255 case HV_X64_MSR_STIMER3_COUNT: {
1256 int timer_index = (msr - HV_X64_MSR_STIMER0_COUNT)/2;
1257
1258 return stimer_get_count(vcpu_to_stimer(vcpu, timer_index),
1259 pdata);
1260 }
72c139ba
LP		 1261 case HV_X64_MSR_TSC_FREQUENCY:
1262 data = (u64)vcpu->arch.virtual_tsc_khz * 1000;
1263 break;
1264 case HV_X64_MSR_APIC_FREQUENCY:
1265 data = APIC_BUS_FREQUENCY;
1266 break;
e83d5887
AS		 1267 default:
1268 vcpu_unimpl(vcpu, "Hyper-V unhandled rdmsr: 0x%x\n", msr);
1269 return 1;
1270 }
1271 *pdata = data;
1272 return 0;
1273}
1274
e7d9513b 1275int kvm_hv_set_msr_common(struct kvm_vcpu *vcpu, u32 msr, u64 data, bool host)
e83d5887
AS		 1276{
1277 if (kvm_hv_msr_partition_wide(msr)) {
1278 int r;
1279
3f5ad8be 1280 mutex_lock(&vcpu->kvm->arch.hyperv.hv_lock);
e7d9513b 1281 r = kvm_hv_set_msr_pw(vcpu, msr, data, host);
3f5ad8be 1282 mutex_unlock(&vcpu->kvm->arch.hyperv.hv_lock);
e83d5887
AS		 1283 return r;
1284 } else
9eec50b8 1285 return kvm_hv_set_msr(vcpu, msr, data, host);
e83d5887
AS		 1286}
1287
44883f01 1288int kvm_hv_get_msr_common(struct kvm_vcpu *vcpu, u32 msr, u64 *pdata, bool host)
e83d5887
AS		 1289{
1290 if (kvm_hv_msr_partition_wide(msr)) {
1291 int r;
1292
3f5ad8be 1293 mutex_lock(&vcpu->kvm->arch.hyperv.hv_lock);
e83d5887 1294 r = kvm_hv_get_msr_pw(vcpu, msr, pdata);
3f5ad8be 1295 mutex_unlock(&vcpu->kvm->arch.hyperv.hv_lock);
e83d5887
AS		 1296 return r;
1297 } else
44883f01 1298 return kvm_hv_get_msr(vcpu, msr, pdata, host);
e83d5887
AS		 1299}
1300
f21dd494
VK		 1301static __always_inline unsigned long *sparse_set_to_vcpu_mask(
1302 struct kvm *kvm, u64 *sparse_banks, u64 valid_bank_mask,
1303 u64 *vp_bitmap, unsigned long *vcpu_bitmap)
c7012676 1304{
f21dd494
VK		 1305 struct kvm_hv *hv = &kvm->arch.hyperv;
1306 struct kvm_vcpu *vcpu;
1307 int i, bank, sbank = 0;
c7012676 1308
f21dd494
VK		 1309 memset(vp_bitmap, 0,
1310 KVM_HV_MAX_SPARSE_VCPU_SET_BITS * sizeof(*vp_bitmap));
1311 for_each_set_bit(bank, (unsigned long *)&valid_bank_mask,
1312 KVM_HV_MAX_SPARSE_VCPU_SET_BITS)
1313 vp_bitmap[bank] = sparse_banks[sbank++];
c7012676 1314
f21dd494
VK		 1315 if (likely(!atomic_read(&hv->num_mismatched_vp_indexes))) {
1316 /* for all vcpus vp_index == vcpu_idx */
1317 return (unsigned long *)vp_bitmap;
1318 }
2cefc5fe 1319
f21dd494
VK		 1320 bitmap_zero(vcpu_bitmap, KVM_MAX_VCPUS);
1321 kvm_for_each_vcpu(i, vcpu, kvm) {
1322 if (test_bit(vcpu_to_hv_vcpu(vcpu)->vp_index,
1323 (unsigned long *)vp_bitmap))
1324 __set_bit(i, vcpu_bitmap);
1325 }
1326 return vcpu_bitmap;
c7012676
VK		 1327}
1328
e2f11f42 1329static u64 kvm_hv_flush_tlb(struct kvm_vcpu *current_vcpu, u64 ingpa,
c7012676 1330 u16 rep_cnt, bool ex)
e2f11f42
VK		 1331{
1332 struct kvm *kvm = current_vcpu->kvm;
2cefc5fe 1333 struct kvm_vcpu_hv *hv_vcpu = &current_vcpu->arch.hyperv;
c7012676 1334 struct hv_tlb_flush_ex flush_ex;
e2f11f42 1335 struct hv_tlb_flush flush;
f21dd494
VK		 1336 u64 vp_bitmap[KVM_HV_MAX_SPARSE_VCPU_SET_BITS];
1337 DECLARE_BITMAP(vcpu_bitmap, KVM_MAX_VCPUS);
1338 unsigned long *vcpu_mask;
2cefc5fe 1339 u64 valid_bank_mask;
c7012676 1340 u64 sparse_banks[64];
f21dd494 1341 int sparse_banks_len;
c7012676 1342 bool all_cpus;
e2f11f42 1343
c7012676
VK		 1344 if (!ex) {
1345 if (unlikely(kvm_read_guest(kvm, ingpa, &flush, sizeof(flush))))
1346 return HV_STATUS_INVALID_HYPERCALL_INPUT;
e2f11f42 1347
c7012676
VK		 1348 trace_kvm_hv_flush_tlb(flush.processor_mask,
1349 flush.address_space, flush.flags);
1350
2cefc5fe 1351 valid_bank_mask = BIT_ULL(0);
c7012676
VK		 1352 sparse_banks[0] = flush.processor_mask;
1353 all_cpus = flush.flags & HV_FLUSH_ALL_PROCESSORS;
1354 } else {
1355 if (unlikely(kvm_read_guest(kvm, ingpa, &flush_ex,
1356 sizeof(flush_ex))))
1357 return HV_STATUS_INVALID_HYPERCALL_INPUT;
1358
1359 trace_kvm_hv_flush_tlb_ex(flush_ex.hv_vp_set.valid_bank_mask,
1360 flush_ex.hv_vp_set.format,
1361 flush_ex.address_space,
1362 flush_ex.flags);
1363
1364 valid_bank_mask = flush_ex.hv_vp_set.valid_bank_mask;
1365 all_cpus = flush_ex.hv_vp_set.format !=
1366 HV_GENERIC_SET_SPARSE_4K;
1367
0b0a31ba
VK		 1368 sparse_banks_len =
1369 bitmap_weight((unsigned long *)&valid_bank_mask, 64) *
c7012676
VK		 1370 sizeof(sparse_banks[0]);
1371
1372 if (!sparse_banks_len && !all_cpus)
1373 goto ret_success;
1374
1375 if (!all_cpus &&
1376 kvm_read_guest(kvm,
1377 ingpa + offsetof(struct hv_tlb_flush_ex,
1378 hv_vp_set.bank_contents),
1379 sparse_banks,
1380 sparse_banks_len))
1381 return HV_STATUS_INVALID_HYPERCALL_INPUT;
1382 }
e2f11f42 1383
e6b6c483 1384 cpumask_clear(&hv_vcpu->tlb_flush);
e2f11f42 1385
f21dd494
VK		 1386 vcpu_mask = all_cpus ? NULL :
1387 sparse_set_to_vcpu_mask(kvm, sparse_banks, valid_bank_mask,
1388 vp_bitmap, vcpu_bitmap);
e2f11f42 1389
2cefc5fe 1390 /*
f21dd494
VK		 1391 * vcpu->arch.cr3 may not be up-to-date for running vCPUs so we can't
1392 * analyze it here, flush TLB regardless of the specified address space.
2cefc5fe 1393 */
e2f11f42
VK		 1394 kvm_make_vcpus_request_mask(kvm,
1395 KVM_REQ_TLB_FLUSH | KVM_REQUEST_NO_WAKEUP,
f21dd494 1396 vcpu_mask, &hv_vcpu->tlb_flush);
e2f11f42 1397
c7012676 1398ret_success:
e2f11f42
VK		 1399 /* We always do full TLB flush, set rep_done = rep_cnt. */
1400 return (u64)HV_STATUS_SUCCESS |
1401 ((u64)rep_cnt << HV_HYPERCALL_REP_COMP_OFFSET);
1402}
1403
f21dd494
VK		 1404static void kvm_send_ipi_to_many(struct kvm *kvm, u32 vector,
1405 unsigned long *vcpu_bitmap)
1406{
1407 struct kvm_lapic_irq irq = {
1408 .delivery_mode = APIC_DM_FIXED,
1409 .vector = vector
1410 };
1411 struct kvm_vcpu *vcpu;
1412 int i;
1413
1414 kvm_for_each_vcpu(i, vcpu, kvm) {
1415 if (vcpu_bitmap && !test_bit(i, vcpu_bitmap))
1416 continue;
1417
1418 /* We fail only when APIC is disabled */
1419 kvm_apic_set_irq(vcpu, &irq, NULL);
1420 }
1421}
1422
214ff83d
VK		 1423static u64 kvm_hv_send_ipi(struct kvm_vcpu *current_vcpu, u64 ingpa, u64 outgpa,
1424 bool ex, bool fast)
1425{
1426 struct kvm *kvm = current_vcpu->kvm;
214ff83d
VK		 1427 struct hv_send_ipi_ex send_ipi_ex;
1428 struct hv_send_ipi send_ipi;
f21dd494
VK		 1429 u64 vp_bitmap[KVM_HV_MAX_SPARSE_VCPU_SET_BITS];
1430 DECLARE_BITMAP(vcpu_bitmap, KVM_MAX_VCPUS);
1431 unsigned long *vcpu_mask;
214ff83d
VK		 1432 unsigned long valid_bank_mask;
1433 u64 sparse_banks[64];
f21dd494
VK		 1434 int sparse_banks_len;
1435 u32 vector;
214ff83d
VK		 1436 bool all_cpus;
1437
1438 if (!ex) {
1439 if (!fast) {
1440 if (unlikely(kvm_read_guest(kvm, ingpa, &send_ipi,
1441 sizeof(send_ipi))))
1442 return HV_STATUS_INVALID_HYPERCALL_INPUT;
1443 sparse_banks[0] = send_ipi.cpu_mask;
f21dd494 1444 vector = send_ipi.vector;
214ff83d
VK		 1445 } else {
1446 /* 'reserved' part of hv_send_ipi should be 0 */
1447 if (unlikely(ingpa >> 32 != 0))
1448 return HV_STATUS_INVALID_HYPERCALL_INPUT;
1449 sparse_banks[0] = outgpa;
f21dd494 1450 vector = (u32)ingpa;
214ff83d
VK		 1451 }
1452 all_cpus = false;
1453 valid_bank_mask = BIT_ULL(0);
1454
f21dd494 1455 trace_kvm_hv_send_ipi(vector, sparse_banks[0]);
214ff83d
VK		 1456 } else {
1457 if (unlikely(kvm_read_guest(kvm, ingpa, &send_ipi_ex,
1458 sizeof(send_ipi_ex))))
1459 return HV_STATUS_INVALID_HYPERCALL_INPUT;
1460
1461 trace_kvm_hv_send_ipi_ex(send_ipi_ex.vector,
1462 send_ipi_ex.vp_set.format,
1463 send_ipi_ex.vp_set.valid_bank_mask);
1464
f21dd494 1465 vector = send_ipi_ex.vector;
214ff83d
VK		 1466 valid_bank_mask = send_ipi_ex.vp_set.valid_bank_mask;
1467 sparse_banks_len = bitmap_weight(&valid_bank_mask, 64) *
1468 sizeof(sparse_banks[0]);
1469
1470 all_cpus = send_ipi_ex.vp_set.format == HV_GENERIC_SET_ALL;
1471
1472 if (!sparse_banks_len)
1473 goto ret_success;
1474
1475 if (!all_cpus &&
1476 kvm_read_guest(kvm,
1477 ingpa + offsetof(struct hv_send_ipi_ex,
1478 vp_set.bank_contents),
1479 sparse_banks,
1480 sparse_banks_len))
1481 return HV_STATUS_INVALID_HYPERCALL_INPUT;
1482 }
1483
f21dd494 1484 if ((vector < HV_IPI_LOW_VECTOR) || (vector > HV_IPI_HIGH_VECTOR))
214ff83d
VK		 1485 return HV_STATUS_INVALID_HYPERCALL_INPUT;
1486
f21dd494
VK		 1487 vcpu_mask = all_cpus ? NULL :
1488 sparse_set_to_vcpu_mask(kvm, sparse_banks, valid_bank_mask,
1489 vp_bitmap, vcpu_bitmap);
214ff83d 1490
f21dd494 1491 kvm_send_ipi_to_many(kvm, vector, vcpu_mask);
214ff83d
VK		 1492
1493ret_success:
1494 return HV_STATUS_SUCCESS;
1495}
1496
e83d5887
AS		 1497bool kvm_hv_hypercall_enabled(struct kvm *kvm)
1498{
3f5ad8be 1499 return READ_ONCE(kvm->arch.hyperv.hv_hypercall) & HV_X64_MSR_HYPERCALL_ENABLE;
e83d5887
AS		 1500}
1501
83326e43
AS		 1502static void kvm_hv_hypercall_set_result(struct kvm_vcpu *vcpu, u64 result)
1503{
1504 bool longmode;
1505
1506 longmode = is_64_bit_mode(vcpu);
1507 if (longmode)
1508 kvm_register_write(vcpu, VCPU_REGS_RAX, result);
1509 else {
1510 kvm_register_write(vcpu, VCPU_REGS_RDX, result >> 32);
1511 kvm_register_write(vcpu, VCPU_REGS_RAX, result & 0xffffffff);
1512 }
1513}
1514
696ca779 1515static int kvm_hv_hypercall_complete(struct kvm_vcpu *vcpu, u64 result)
83326e43 1516{
696ca779
RK		 1517 kvm_hv_hypercall_set_result(vcpu, result);
1518 ++vcpu->stat.hypercalls;
6356ee0c 1519 return kvm_skip_emulated_instruction(vcpu);
83326e43
AS		 1520}
1521
696ca779
RK		 1522static int kvm_hv_hypercall_complete_userspace(struct kvm_vcpu *vcpu)
1523{
1524 return kvm_hv_hypercall_complete(vcpu, vcpu->run->hyperv.u.hcall.result);
1525}
1526
faeb7833
RK		 1527static u16 kvm_hvcall_signal_event(struct kvm_vcpu *vcpu, bool fast, u64 param)
1528{
1529 struct eventfd_ctx *eventfd;
1530
1531 if (unlikely(!fast)) {
1532 int ret;
1533 gpa_t gpa = param;
1534
1535 if ((gpa & (__alignof__(param) - 1)) ||
1536 offset_in_page(gpa) + sizeof(param) > PAGE_SIZE)
1537 return HV_STATUS_INVALID_ALIGNMENT;
1538
1539 ret = kvm_vcpu_read_guest(vcpu, gpa, &param, sizeof(param));
1540 if (ret < 0)
1541 return HV_STATUS_INVALID_ALIGNMENT;
1542 }
1543
1544 /*
1545 * Per spec, bits 32-47 contain the extra "flag number". However, we
1546 * have no use for it, and in all known usecases it is zero, so just
1547 * report lookup failure if it isn't.
1548 */
1549 if (param & 0xffff00000000ULL)
1550 return HV_STATUS_INVALID_PORT_ID;
1551 /* remaining bits are reserved-zero */
1552 if (param & ~KVM_HYPERV_CONN_ID_MASK)
1553 return HV_STATUS_INVALID_HYPERCALL_INPUT;
1554
452a68d0
PB		 1555 /* the eventfd is protected by vcpu->kvm->srcu, but conn_to_evt isn't */
1556 rcu_read_lock();
faeb7833 1557 eventfd = idr_find(&vcpu->kvm->arch.hyperv.conn_to_evt, param);
452a68d0 1558 rcu_read_unlock();
faeb7833
RK		 1559 if (!eventfd)
1560 return HV_STATUS_INVALID_PORT_ID;
1561
1562 eventfd_signal(eventfd, 1);
1563 return HV_STATUS_SUCCESS;
1564}
1565
e83d5887
AS		 1566int kvm_hv_hypercall(struct kvm_vcpu *vcpu)
1567{
d32ef547
DC		 1568 u64 param, ingpa, outgpa, ret = HV_STATUS_SUCCESS;
1569 uint16_t code, rep_idx, rep_cnt;
56b9ae78 1570 bool fast, longmode, rep;
e83d5887
AS		 1571
1572 /*
1573 * hypercall generates UD from non zero cpl and real mode
1574 * per HYPER-V spec
1575 */
1576 if (kvm_x86_ops->get_cpl(vcpu) != 0 || !is_protmode(vcpu)) {
1577 kvm_queue_exception(vcpu, UD_VECTOR);
0d9c055e 1578 return 1;
e83d5887
AS		 1579 }
1580
1581 longmode = is_64_bit_mode(vcpu);
1582
1583 if (!longmode) {
1584 param = ((u64)kvm_register_read(vcpu, VCPU_REGS_RDX) << 32) |
1585 (kvm_register_read(vcpu, VCPU_REGS_RAX) & 0xffffffff);
1586 ingpa = ((u64)kvm_register_read(vcpu, VCPU_REGS_RBX) << 32) |
1587 (kvm_register_read(vcpu, VCPU_REGS_RCX) & 0xffffffff);
1588 outgpa = ((u64)kvm_register_read(vcpu, VCPU_REGS_RDI) << 32) |
1589 (kvm_register_read(vcpu, VCPU_REGS_RSI) & 0xffffffff);
1590 }
1591#ifdef CONFIG_X86_64
1592 else {
1593 param = kvm_register_read(vcpu, VCPU_REGS_RCX);
1594 ingpa = kvm_register_read(vcpu, VCPU_REGS_RDX);
1595 outgpa = kvm_register_read(vcpu, VCPU_REGS_R8);
1596 }
1597#endif
1598
1599 code = param & 0xffff;
142c95da
VK		 1600 fast = !!(param & HV_HYPERCALL_FAST_BIT);
1601 rep_cnt = (param >> HV_HYPERCALL_REP_COMP_OFFSET) & 0xfff;
1602 rep_idx = (param >> HV_HYPERCALL_REP_START_OFFSET) & 0xfff;
56b9ae78 1603 rep = !!(rep_cnt || rep_idx);
e83d5887
AS		 1604
1605 trace_kvm_hv_hypercall(code, fast, rep_cnt, rep_idx, ingpa, outgpa);
1606
1607 switch (code) {
8ed6d767 1608 case HVCALL_NOTIFY_LONG_SPIN_WAIT:
56b9ae78
VK		 1609 if (unlikely(rep)) {
1610 ret = HV_STATUS_INVALID_HYPERCALL_INPUT;
1611 break;
1612 }
de63ad4c 1613 kvm_vcpu_on_spin(vcpu, true);
e83d5887 1614 break;
83326e43 1615 case HVCALL_SIGNAL_EVENT:
56b9ae78
VK		 1616 if (unlikely(rep)) {
1617 ret = HV_STATUS_INVALID_HYPERCALL_INPUT;
1618 break;
1619 }
d32ef547
DC		 1620 ret = kvm_hvcall_signal_event(vcpu, fast, ingpa);
1621 if (ret != HV_STATUS_INVALID_PORT_ID)
faeb7833
RK		 1622 break;
1623 /* maybe userspace knows this conn_id: fall through */
1624 case HVCALL_POST_MESSAGE:
a2b5c3c0 1625 /* don't bother userspace if it has no way to handle it */
56b9ae78
VK		 1626 if (unlikely(rep || !vcpu_to_synic(vcpu)->active)) {
1627 ret = HV_STATUS_INVALID_HYPERCALL_INPUT;
a2b5c3c0
PB		 1628 break;
1629 }
83326e43
AS		 1630 vcpu->run->exit_reason = KVM_EXIT_HYPERV;
1631 vcpu->run->hyperv.type = KVM_EXIT_HYPERV_HCALL;
1632 vcpu->run->hyperv.u.hcall.input = param;
1633 vcpu->run->hyperv.u.hcall.params[0] = ingpa;
1634 vcpu->run->hyperv.u.hcall.params[1] = outgpa;
1635 vcpu->arch.complete_userspace_io =
1636 kvm_hv_hypercall_complete_userspace;
1637 return 0;
e2f11f42
VK		 1638 case HVCALL_FLUSH_VIRTUAL_ADDRESS_LIST:
1639 if (unlikely(fast || !rep_cnt || rep_idx)) {
1640 ret = HV_STATUS_INVALID_HYPERCALL_INPUT;
1641 break;
1642 }
c7012676 1643 ret = kvm_hv_flush_tlb(vcpu, ingpa, rep_cnt, false);
e2f11f42
VK		 1644 break;
1645 case HVCALL_FLUSH_VIRTUAL_ADDRESS_SPACE:
1646 if (unlikely(fast || rep)) {
1647 ret = HV_STATUS_INVALID_HYPERCALL_INPUT;
1648 break;
1649 }
c7012676
VK		 1650 ret = kvm_hv_flush_tlb(vcpu, ingpa, rep_cnt, false);
1651 break;
1652 case HVCALL_FLUSH_VIRTUAL_ADDRESS_LIST_EX:
1653 if (unlikely(fast || !rep_cnt || rep_idx)) {
1654 ret = HV_STATUS_INVALID_HYPERCALL_INPUT;
1655 break;
1656 }
1657 ret = kvm_hv_flush_tlb(vcpu, ingpa, rep_cnt, true);
1658 break;
1659 case HVCALL_FLUSH_VIRTUAL_ADDRESS_SPACE_EX:
1660 if (unlikely(fast || rep)) {
1661 ret = HV_STATUS_INVALID_HYPERCALL_INPUT;
1662 break;
1663 }
1664 ret = kvm_hv_flush_tlb(vcpu, ingpa, rep_cnt, true);
e2f11f42 1665 break;
214ff83d
VK		 1666 case HVCALL_SEND_IPI:
1667 if (unlikely(rep)) {
1668 ret = HV_STATUS_INVALID_HYPERCALL_INPUT;
1669 break;
1670 }
1671 ret = kvm_hv_send_ipi(vcpu, ingpa, outgpa, false, fast);
1672 break;
1673 case HVCALL_SEND_IPI_EX:
1674 if (unlikely(fast || rep)) {
1675 ret = HV_STATUS_INVALID_HYPERCALL_INPUT;
1676 break;
1677 }
1678 ret = kvm_hv_send_ipi(vcpu, ingpa, outgpa, true, false);
1679 break;
e83d5887 1680 default:
d32ef547 1681 ret = HV_STATUS_INVALID_HYPERCALL_CODE;
e83d5887
AS		 1682 break;
1683 }
1684
696ca779 1685 return kvm_hv_hypercall_complete(vcpu, ret);
e83d5887 1686}
cbc0236a
RK		 1687
1688void kvm_hv_init_vm(struct kvm *kvm)
1689{
1690 mutex_init(&kvm->arch.hyperv.hv_lock);
faeb7833 1691 idr_init(&kvm->arch.hyperv.conn_to_evt);
cbc0236a
RK		 1692}
1693
1694void kvm_hv_destroy_vm(struct kvm *kvm)
1695{
faeb7833
RK		 1696 struct eventfd_ctx *eventfd;
1697 int i;
1698
1699 idr_for_each_entry(&kvm->arch.hyperv.conn_to_evt, eventfd, i)
1700 eventfd_ctx_put(eventfd);
1701 idr_destroy(&kvm->arch.hyperv.conn_to_evt);
1702}
1703
1704static int kvm_hv_eventfd_assign(struct kvm *kvm, u32 conn_id, int fd)
1705{
1706 struct kvm_hv *hv = &kvm->arch.hyperv;
1707 struct eventfd_ctx *eventfd;
1708 int ret;
1709
1710 eventfd = eventfd_ctx_fdget(fd);
1711 if (IS_ERR(eventfd))
1712 return PTR_ERR(eventfd);
1713
1714 mutex_lock(&hv->hv_lock);
1715 ret = idr_alloc(&hv->conn_to_evt, eventfd, conn_id, conn_id + 1,
1716 GFP_KERNEL);
1717 mutex_unlock(&hv->hv_lock);
1718
1719 if (ret >= 0)
1720 return 0;
1721
1722 if (ret == -ENOSPC)
1723 ret = -EEXIST;
1724 eventfd_ctx_put(eventfd);
1725 return ret;
1726}
1727
1728static int kvm_hv_eventfd_deassign(struct kvm *kvm, u32 conn_id)
1729{
1730 struct kvm_hv *hv = &kvm->arch.hyperv;
1731 struct eventfd_ctx *eventfd;
1732
1733 mutex_lock(&hv->hv_lock);
1734 eventfd = idr_remove(&hv->conn_to_evt, conn_id);
1735 mutex_unlock(&hv->hv_lock);
1736
1737 if (!eventfd)
1738 return -ENOENT;
1739
1740 synchronize_srcu(&kvm->srcu);
1741 eventfd_ctx_put(eventfd);
1742 return 0;
1743}
1744
1745int kvm_vm_ioctl_hv_eventfd(struct kvm *kvm, struct kvm_hyperv_eventfd *args)
1746{
1747 if ((args->flags & ~KVM_HYPERV_EVENTFD_DEASSIGN) ||
1748 (args->conn_id & ~KVM_HYPERV_CONN_ID_MASK))
1749 return -EINVAL;
1750
1751 if (args->flags == KVM_HYPERV_EVENTFD_DEASSIGN)
1752 return kvm_hv_eventfd_deassign(kvm, args->conn_id);
1753 return kvm_hv_eventfd_assign(kvm, args->conn_id, args->fd);
cbc0236a 1754}
Linux 6.x block layer and io_uring tree(s)