Commit | Line | Data |
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e83d5887 AS |
1 | /* |
2 | * KVM Microsoft Hyper-V emulation | |
3 | * | |
4 | * derived from arch/x86/kvm/x86.c | |
5 | * | |
6 | * Copyright (C) 2006 Qumranet, Inc. | |
7 | * Copyright (C) 2008 Qumranet, Inc. | |
8 | * Copyright IBM Corporation, 2008 | |
9 | * Copyright 2010 Red Hat, Inc. and/or its affiliates. | |
10 | * Copyright (C) 2015 Andrey Smetanin <asmetanin@virtuozzo.com> | |
11 | * | |
12 | * Authors: | |
13 | * Avi Kivity <avi@qumranet.com> | |
14 | * Yaniv Kamay <yaniv@qumranet.com> | |
15 | * Amit Shah <amit.shah@qumranet.com> | |
16 | * Ben-Ami Yassour <benami@il.ibm.com> | |
17 | * Andrey Smetanin <asmetanin@virtuozzo.com> | |
18 | * | |
19 | * This work is licensed under the terms of the GNU GPL, version 2. See | |
20 | * the COPYING file in the top-level directory. | |
21 | * | |
22 | */ | |
23 | ||
24 | #include "x86.h" | |
25 | #include "lapic.h" | |
5c919412 | 26 | #include "ioapic.h" |
e83d5887 AS |
27 | #include "hyperv.h" |
28 | ||
29 | #include <linux/kvm_host.h> | |
765eaa0f | 30 | #include <linux/highmem.h> |
32ef5517 | 31 | #include <linux/sched/cputime.h> |
faeb7833 | 32 | #include <linux/eventfd.h> |
32ef5517 | 33 | |
5c919412 | 34 | #include <asm/apicdef.h> |
e83d5887 AS |
35 | #include <trace/events/kvm.h> |
36 | ||
37 | #include "trace.h" | |
38 | ||
5c919412 AS |
39 | static inline u64 synic_read_sint(struct kvm_vcpu_hv_synic *synic, int sint) |
40 | { | |
41 | return atomic64_read(&synic->sint[sint]); | |
42 | } | |
43 | ||
44 | static inline int synic_get_sint_vector(u64 sint_value) | |
45 | { | |
46 | if (sint_value & HV_SYNIC_SINT_MASKED) | |
47 | return -1; | |
48 | return sint_value & HV_SYNIC_SINT_VECTOR_MASK; | |
49 | } | |
50 | ||
51 | static bool synic_has_vector_connected(struct kvm_vcpu_hv_synic *synic, | |
52 | int vector) | |
53 | { | |
54 | int i; | |
55 | ||
56 | for (i = 0; i < ARRAY_SIZE(synic->sint); i++) { | |
57 | if (synic_get_sint_vector(synic_read_sint(synic, i)) == vector) | |
58 | return true; | |
59 | } | |
60 | return false; | |
61 | } | |
62 | ||
63 | static bool synic_has_vector_auto_eoi(struct kvm_vcpu_hv_synic *synic, | |
64 | int vector) | |
65 | { | |
66 | int i; | |
67 | u64 sint_value; | |
68 | ||
69 | for (i = 0; i < ARRAY_SIZE(synic->sint); i++) { | |
70 | sint_value = synic_read_sint(synic, i); | |
71 | if (synic_get_sint_vector(sint_value) == vector && | |
72 | sint_value & HV_SYNIC_SINT_AUTO_EOI) | |
73 | return true; | |
74 | } | |
75 | return false; | |
76 | } | |
77 | ||
98f65ad4 VK |
78 | static void synic_update_vector(struct kvm_vcpu_hv_synic *synic, |
79 | int vector) | |
80 | { | |
81 | if (vector < HV_SYNIC_FIRST_VALID_VECTOR) | |
82 | return; | |
83 | ||
84 | if (synic_has_vector_connected(synic, vector)) | |
85 | __set_bit(vector, synic->vec_bitmap); | |
86 | else | |
87 | __clear_bit(vector, synic->vec_bitmap); | |
88 | ||
89 | if (synic_has_vector_auto_eoi(synic, vector)) | |
90 | __set_bit(vector, synic->auto_eoi_bitmap); | |
91 | else | |
92 | __clear_bit(vector, synic->auto_eoi_bitmap); | |
93 | } | |
94 | ||
7be58a64 AS |
95 | static int synic_set_sint(struct kvm_vcpu_hv_synic *synic, int sint, |
96 | u64 data, bool host) | |
5c919412 | 97 | { |
98f65ad4 | 98 | int vector, old_vector; |
915e6f78 | 99 | bool masked; |
5c919412 AS |
100 | |
101 | vector = data & HV_SYNIC_SINT_VECTOR_MASK; | |
915e6f78 VK |
102 | masked = data & HV_SYNIC_SINT_MASKED; |
103 | ||
104 | /* | |
105 | * Valid vectors are 16-255, however, nested Hyper-V attempts to write | |
106 | * default '0x10000' value on boot and this should not #GP. We need to | |
107 | * allow zero-initing the register from host as well. | |
108 | */ | |
109 | if (vector < HV_SYNIC_FIRST_VALID_VECTOR && !host && !masked) | |
5c919412 AS |
110 | return 1; |
111 | /* | |
112 | * Guest may configure multiple SINTs to use the same vector, so | |
113 | * we maintain a bitmap of vectors handled by synic, and a | |
114 | * bitmap of vectors with auto-eoi behavior. The bitmaps are | |
115 | * updated here, and atomically queried on fast paths. | |
116 | */ | |
98f65ad4 | 117 | old_vector = synic_read_sint(synic, sint) & HV_SYNIC_SINT_VECTOR_MASK; |
5c919412 AS |
118 | |
119 | atomic64_set(&synic->sint[sint], data); | |
120 | ||
98f65ad4 | 121 | synic_update_vector(synic, old_vector); |
5c919412 | 122 | |
98f65ad4 | 123 | synic_update_vector(synic, vector); |
5c919412 AS |
124 | |
125 | /* Load SynIC vectors into EOI exit bitmap */ | |
126 | kvm_make_request(KVM_REQ_SCAN_IOAPIC, synic_to_vcpu(synic)); | |
127 | return 0; | |
128 | } | |
129 | ||
d3457c87 RK |
130 | static struct kvm_vcpu *get_vcpu_by_vpidx(struct kvm *kvm, u32 vpidx) |
131 | { | |
132 | struct kvm_vcpu *vcpu = NULL; | |
133 | int i; | |
134 | ||
9170200e VK |
135 | if (vpidx >= KVM_MAX_VCPUS) |
136 | return NULL; | |
137 | ||
138 | vcpu = kvm_get_vcpu(kvm, vpidx); | |
d3457c87 RK |
139 | if (vcpu && vcpu_to_hv_vcpu(vcpu)->vp_index == vpidx) |
140 | return vcpu; | |
141 | kvm_for_each_vcpu(i, vcpu, kvm) | |
142 | if (vcpu_to_hv_vcpu(vcpu)->vp_index == vpidx) | |
143 | return vcpu; | |
144 | return NULL; | |
145 | } | |
146 | ||
147 | static struct kvm_vcpu_hv_synic *synic_get(struct kvm *kvm, u32 vpidx) | |
5c919412 AS |
148 | { |
149 | struct kvm_vcpu *vcpu; | |
150 | struct kvm_vcpu_hv_synic *synic; | |
151 | ||
d3457c87 | 152 | vcpu = get_vcpu_by_vpidx(kvm, vpidx); |
5c919412 AS |
153 | if (!vcpu) |
154 | return NULL; | |
155 | synic = vcpu_to_synic(vcpu); | |
156 | return (synic->active) ? synic : NULL; | |
157 | } | |
158 | ||
765eaa0f AS |
159 | static void synic_clear_sint_msg_pending(struct kvm_vcpu_hv_synic *synic, |
160 | u32 sint) | |
161 | { | |
162 | struct kvm_vcpu *vcpu = synic_to_vcpu(synic); | |
163 | struct page *page; | |
164 | gpa_t gpa; | |
165 | struct hv_message *msg; | |
166 | struct hv_message_page *msg_page; | |
167 | ||
168 | gpa = synic->msg_page & PAGE_MASK; | |
169 | page = kvm_vcpu_gfn_to_page(vcpu, gpa >> PAGE_SHIFT); | |
170 | if (is_error_page(page)) { | |
171 | vcpu_err(vcpu, "Hyper-V SynIC can't get msg page, gpa 0x%llx\n", | |
172 | gpa); | |
173 | return; | |
174 | } | |
175 | msg_page = kmap_atomic(page); | |
176 | ||
177 | msg = &msg_page->sint_message[sint]; | |
178 | msg->header.message_flags.msg_pending = 0; | |
179 | ||
180 | kunmap_atomic(msg_page); | |
181 | kvm_release_page_dirty(page); | |
182 | kvm_vcpu_mark_page_dirty(vcpu, gpa >> PAGE_SHIFT); | |
183 | } | |
184 | ||
5c919412 AS |
185 | static void kvm_hv_notify_acked_sint(struct kvm_vcpu *vcpu, u32 sint) |
186 | { | |
187 | struct kvm *kvm = vcpu->kvm; | |
765eaa0f | 188 | struct kvm_vcpu_hv_synic *synic = vcpu_to_synic(vcpu); |
1f4b34f8 AS |
189 | struct kvm_vcpu_hv *hv_vcpu = vcpu_to_hv_vcpu(vcpu); |
190 | struct kvm_vcpu_hv_stimer *stimer; | |
191 | int gsi, idx, stimers_pending; | |
5c919412 | 192 | |
18659a9c | 193 | trace_kvm_hv_notify_acked_sint(vcpu->vcpu_id, sint); |
5c919412 | 194 | |
765eaa0f AS |
195 | if (synic->msg_page & HV_SYNIC_SIMP_ENABLE) |
196 | synic_clear_sint_msg_pending(synic, sint); | |
197 | ||
1f4b34f8 AS |
198 | /* Try to deliver pending Hyper-V SynIC timers messages */ |
199 | stimers_pending = 0; | |
200 | for (idx = 0; idx < ARRAY_SIZE(hv_vcpu->stimer); idx++) { | |
201 | stimer = &hv_vcpu->stimer[idx]; | |
202 | if (stimer->msg_pending && | |
203 | (stimer->config & HV_STIMER_ENABLE) && | |
204 | HV_STIMER_SINT(stimer->config) == sint) { | |
205 | set_bit(stimer->index, | |
206 | hv_vcpu->stimer_pending_bitmap); | |
207 | stimers_pending++; | |
208 | } | |
209 | } | |
210 | if (stimers_pending) | |
211 | kvm_make_request(KVM_REQ_HV_STIMER, vcpu); | |
212 | ||
5c919412 | 213 | idx = srcu_read_lock(&kvm->irq_srcu); |
1f4b34f8 | 214 | gsi = atomic_read(&synic->sint_to_gsi[sint]); |
5c919412 AS |
215 | if (gsi != -1) |
216 | kvm_notify_acked_gsi(kvm, gsi); | |
217 | srcu_read_unlock(&kvm->irq_srcu, idx); | |
218 | } | |
219 | ||
db397571 AS |
220 | static void synic_exit(struct kvm_vcpu_hv_synic *synic, u32 msr) |
221 | { | |
222 | struct kvm_vcpu *vcpu = synic_to_vcpu(synic); | |
223 | struct kvm_vcpu_hv *hv_vcpu = &vcpu->arch.hyperv; | |
224 | ||
225 | hv_vcpu->exit.type = KVM_EXIT_HYPERV_SYNIC; | |
226 | hv_vcpu->exit.u.synic.msr = msr; | |
227 | hv_vcpu->exit.u.synic.control = synic->control; | |
228 | hv_vcpu->exit.u.synic.evt_page = synic->evt_page; | |
229 | hv_vcpu->exit.u.synic.msg_page = synic->msg_page; | |
230 | ||
231 | kvm_make_request(KVM_REQ_HV_EXIT, vcpu); | |
232 | } | |
233 | ||
5c919412 AS |
234 | static int synic_set_msr(struct kvm_vcpu_hv_synic *synic, |
235 | u32 msr, u64 data, bool host) | |
236 | { | |
237 | struct kvm_vcpu *vcpu = synic_to_vcpu(synic); | |
238 | int ret; | |
239 | ||
44883f01 | 240 | if (!synic->active && !host) |
5c919412 AS |
241 | return 1; |
242 | ||
18659a9c AS |
243 | trace_kvm_hv_synic_set_msr(vcpu->vcpu_id, msr, data, host); |
244 | ||
5c919412 AS |
245 | ret = 0; |
246 | switch (msr) { | |
247 | case HV_X64_MSR_SCONTROL: | |
248 | synic->control = data; | |
db397571 AS |
249 | if (!host) |
250 | synic_exit(synic, msr); | |
5c919412 AS |
251 | break; |
252 | case HV_X64_MSR_SVERSION: | |
253 | if (!host) { | |
254 | ret = 1; | |
255 | break; | |
256 | } | |
257 | synic->version = data; | |
258 | break; | |
259 | case HV_X64_MSR_SIEFP: | |
efc479e6 RK |
260 | if ((data & HV_SYNIC_SIEFP_ENABLE) && !host && |
261 | !synic->dont_zero_synic_pages) | |
5c919412 AS |
262 | if (kvm_clear_guest(vcpu->kvm, |
263 | data & PAGE_MASK, PAGE_SIZE)) { | |
264 | ret = 1; | |
265 | break; | |
266 | } | |
267 | synic->evt_page = data; | |
db397571 AS |
268 | if (!host) |
269 | synic_exit(synic, msr); | |
5c919412 AS |
270 | break; |
271 | case HV_X64_MSR_SIMP: | |
efc479e6 RK |
272 | if ((data & HV_SYNIC_SIMP_ENABLE) && !host && |
273 | !synic->dont_zero_synic_pages) | |
5c919412 AS |
274 | if (kvm_clear_guest(vcpu->kvm, |
275 | data & PAGE_MASK, PAGE_SIZE)) { | |
276 | ret = 1; | |
277 | break; | |
278 | } | |
279 | synic->msg_page = data; | |
db397571 AS |
280 | if (!host) |
281 | synic_exit(synic, msr); | |
5c919412 AS |
282 | break; |
283 | case HV_X64_MSR_EOM: { | |
284 | int i; | |
285 | ||
286 | for (i = 0; i < ARRAY_SIZE(synic->sint); i++) | |
287 | kvm_hv_notify_acked_sint(vcpu, i); | |
288 | break; | |
289 | } | |
290 | case HV_X64_MSR_SINT0 ... HV_X64_MSR_SINT15: | |
7be58a64 | 291 | ret = synic_set_sint(synic, msr - HV_X64_MSR_SINT0, data, host); |
5c919412 AS |
292 | break; |
293 | default: | |
294 | ret = 1; | |
295 | break; | |
296 | } | |
297 | return ret; | |
298 | } | |
299 | ||
44883f01 PB |
300 | static int synic_get_msr(struct kvm_vcpu_hv_synic *synic, u32 msr, u64 *pdata, |
301 | bool host) | |
5c919412 AS |
302 | { |
303 | int ret; | |
304 | ||
44883f01 | 305 | if (!synic->active && !host) |
5c919412 AS |
306 | return 1; |
307 | ||
308 | ret = 0; | |
309 | switch (msr) { | |
310 | case HV_X64_MSR_SCONTROL: | |
311 | *pdata = synic->control; | |
312 | break; | |
313 | case HV_X64_MSR_SVERSION: | |
314 | *pdata = synic->version; | |
315 | break; | |
316 | case HV_X64_MSR_SIEFP: | |
317 | *pdata = synic->evt_page; | |
318 | break; | |
319 | case HV_X64_MSR_SIMP: | |
320 | *pdata = synic->msg_page; | |
321 | break; | |
322 | case HV_X64_MSR_EOM: | |
323 | *pdata = 0; | |
324 | break; | |
325 | case HV_X64_MSR_SINT0 ... HV_X64_MSR_SINT15: | |
326 | *pdata = atomic64_read(&synic->sint[msr - HV_X64_MSR_SINT0]); | |
327 | break; | |
328 | default: | |
329 | ret = 1; | |
330 | break; | |
331 | } | |
332 | return ret; | |
333 | } | |
334 | ||
ecd8a8c2 | 335 | static int synic_set_irq(struct kvm_vcpu_hv_synic *synic, u32 sint) |
5c919412 AS |
336 | { |
337 | struct kvm_vcpu *vcpu = synic_to_vcpu(synic); | |
338 | struct kvm_lapic_irq irq; | |
339 | int ret, vector; | |
340 | ||
341 | if (sint >= ARRAY_SIZE(synic->sint)) | |
342 | return -EINVAL; | |
343 | ||
344 | vector = synic_get_sint_vector(synic_read_sint(synic, sint)); | |
345 | if (vector < 0) | |
346 | return -ENOENT; | |
347 | ||
348 | memset(&irq, 0, sizeof(irq)); | |
f98a3efb | 349 | irq.shorthand = APIC_DEST_SELF; |
5c919412 AS |
350 | irq.dest_mode = APIC_DEST_PHYSICAL; |
351 | irq.delivery_mode = APIC_DM_FIXED; | |
352 | irq.vector = vector; | |
353 | irq.level = 1; | |
354 | ||
f98a3efb | 355 | ret = kvm_irq_delivery_to_apic(vcpu->kvm, vcpu->arch.apic, &irq, NULL); |
18659a9c | 356 | trace_kvm_hv_synic_set_irq(vcpu->vcpu_id, sint, irq.vector, ret); |
5c919412 AS |
357 | return ret; |
358 | } | |
359 | ||
d3457c87 | 360 | int kvm_hv_synic_set_irq(struct kvm *kvm, u32 vpidx, u32 sint) |
5c919412 AS |
361 | { |
362 | struct kvm_vcpu_hv_synic *synic; | |
363 | ||
d3457c87 | 364 | synic = synic_get(kvm, vpidx); |
5c919412 AS |
365 | if (!synic) |
366 | return -EINVAL; | |
367 | ||
368 | return synic_set_irq(synic, sint); | |
369 | } | |
370 | ||
371 | void kvm_hv_synic_send_eoi(struct kvm_vcpu *vcpu, int vector) | |
372 | { | |
373 | struct kvm_vcpu_hv_synic *synic = vcpu_to_synic(vcpu); | |
374 | int i; | |
375 | ||
18659a9c | 376 | trace_kvm_hv_synic_send_eoi(vcpu->vcpu_id, vector); |
5c919412 AS |
377 | |
378 | for (i = 0; i < ARRAY_SIZE(synic->sint); i++) | |
379 | if (synic_get_sint_vector(synic_read_sint(synic, i)) == vector) | |
380 | kvm_hv_notify_acked_sint(vcpu, i); | |
381 | } | |
382 | ||
d3457c87 | 383 | static int kvm_hv_set_sint_gsi(struct kvm *kvm, u32 vpidx, u32 sint, int gsi) |
5c919412 AS |
384 | { |
385 | struct kvm_vcpu_hv_synic *synic; | |
386 | ||
d3457c87 | 387 | synic = synic_get(kvm, vpidx); |
5c919412 AS |
388 | if (!synic) |
389 | return -EINVAL; | |
390 | ||
391 | if (sint >= ARRAY_SIZE(synic->sint_to_gsi)) | |
392 | return -EINVAL; | |
393 | ||
394 | atomic_set(&synic->sint_to_gsi[sint], gsi); | |
395 | return 0; | |
396 | } | |
397 | ||
398 | void kvm_hv_irq_routing_update(struct kvm *kvm) | |
399 | { | |
400 | struct kvm_irq_routing_table *irq_rt; | |
401 | struct kvm_kernel_irq_routing_entry *e; | |
402 | u32 gsi; | |
403 | ||
404 | irq_rt = srcu_dereference_check(kvm->irq_routing, &kvm->irq_srcu, | |
405 | lockdep_is_held(&kvm->irq_lock)); | |
406 | ||
407 | for (gsi = 0; gsi < irq_rt->nr_rt_entries; gsi++) { | |
408 | hlist_for_each_entry(e, &irq_rt->map[gsi], link) { | |
409 | if (e->type == KVM_IRQ_ROUTING_HV_SINT) | |
410 | kvm_hv_set_sint_gsi(kvm, e->hv_sint.vcpu, | |
411 | e->hv_sint.sint, gsi); | |
412 | } | |
413 | } | |
414 | } | |
415 | ||
416 | static void synic_init(struct kvm_vcpu_hv_synic *synic) | |
417 | { | |
418 | int i; | |
419 | ||
420 | memset(synic, 0, sizeof(*synic)); | |
421 | synic->version = HV_SYNIC_VERSION_1; | |
422 | for (i = 0; i < ARRAY_SIZE(synic->sint); i++) { | |
423 | atomic64_set(&synic->sint[i], HV_SYNIC_SINT_MASKED); | |
424 | atomic_set(&synic->sint_to_gsi[i], -1); | |
425 | } | |
426 | } | |
427 | ||
93bf4172 AS |
428 | static u64 get_time_ref_counter(struct kvm *kvm) |
429 | { | |
095cf55d PB |
430 | struct kvm_hv *hv = &kvm->arch.hyperv; |
431 | struct kvm_vcpu *vcpu; | |
432 | u64 tsc; | |
433 | ||
434 | /* | |
435 | * The guest has not set up the TSC page or the clock isn't | |
436 | * stable, fall back to get_kvmclock_ns. | |
437 | */ | |
438 | if (!hv->tsc_ref.tsc_sequence) | |
439 | return div_u64(get_kvmclock_ns(kvm), 100); | |
440 | ||
441 | vcpu = kvm_get_vcpu(kvm, 0); | |
442 | tsc = kvm_read_l1_tsc(vcpu, rdtsc()); | |
443 | return mul_u64_u64_shr(tsc, hv->tsc_ref.tsc_scale, 64) | |
444 | + hv->tsc_ref.tsc_offset; | |
93bf4172 AS |
445 | } |
446 | ||
f3b138c5 | 447 | static void stimer_mark_pending(struct kvm_vcpu_hv_stimer *stimer, |
1f4b34f8 AS |
448 | bool vcpu_kick) |
449 | { | |
450 | struct kvm_vcpu *vcpu = stimer_to_vcpu(stimer); | |
451 | ||
452 | set_bit(stimer->index, | |
453 | vcpu_to_hv_vcpu(vcpu)->stimer_pending_bitmap); | |
454 | kvm_make_request(KVM_REQ_HV_STIMER, vcpu); | |
455 | if (vcpu_kick) | |
456 | kvm_vcpu_kick(vcpu); | |
457 | } | |
458 | ||
1f4b34f8 AS |
459 | static void stimer_cleanup(struct kvm_vcpu_hv_stimer *stimer) |
460 | { | |
461 | struct kvm_vcpu *vcpu = stimer_to_vcpu(stimer); | |
462 | ||
ac3e5fca AS |
463 | trace_kvm_hv_stimer_cleanup(stimer_to_vcpu(stimer)->vcpu_id, |
464 | stimer->index); | |
465 | ||
019b9781 | 466 | hrtimer_cancel(&stimer->timer); |
1f4b34f8 AS |
467 | clear_bit(stimer->index, |
468 | vcpu_to_hv_vcpu(vcpu)->stimer_pending_bitmap); | |
469 | stimer->msg_pending = false; | |
f808495d | 470 | stimer->exp_time = 0; |
1f4b34f8 AS |
471 | } |
472 | ||
473 | static enum hrtimer_restart stimer_timer_callback(struct hrtimer *timer) | |
474 | { | |
475 | struct kvm_vcpu_hv_stimer *stimer; | |
476 | ||
477 | stimer = container_of(timer, struct kvm_vcpu_hv_stimer, timer); | |
ac3e5fca AS |
478 | trace_kvm_hv_stimer_callback(stimer_to_vcpu(stimer)->vcpu_id, |
479 | stimer->index); | |
f3b138c5 | 480 | stimer_mark_pending(stimer, true); |
1f4b34f8 AS |
481 | |
482 | return HRTIMER_NORESTART; | |
483 | } | |
484 | ||
f808495d AS |
485 | /* |
486 | * stimer_start() assumptions: | |
487 | * a) stimer->count is not equal to 0 | |
488 | * b) stimer->config has HV_STIMER_ENABLE flag | |
489 | */ | |
1f4b34f8 AS |
490 | static int stimer_start(struct kvm_vcpu_hv_stimer *stimer) |
491 | { | |
492 | u64 time_now; | |
493 | ktime_t ktime_now; | |
494 | ||
495 | time_now = get_time_ref_counter(stimer_to_vcpu(stimer)->kvm); | |
496 | ktime_now = ktime_get(); | |
497 | ||
498 | if (stimer->config & HV_STIMER_PERIODIC) { | |
f808495d AS |
499 | if (stimer->exp_time) { |
500 | if (time_now >= stimer->exp_time) { | |
501 | u64 remainder; | |
502 | ||
503 | div64_u64_rem(time_now - stimer->exp_time, | |
504 | stimer->count, &remainder); | |
505 | stimer->exp_time = | |
506 | time_now + (stimer->count - remainder); | |
507 | } | |
508 | } else | |
509 | stimer->exp_time = time_now + stimer->count; | |
1f4b34f8 | 510 | |
ac3e5fca AS |
511 | trace_kvm_hv_stimer_start_periodic( |
512 | stimer_to_vcpu(stimer)->vcpu_id, | |
513 | stimer->index, | |
514 | time_now, stimer->exp_time); | |
515 | ||
1f4b34f8 | 516 | hrtimer_start(&stimer->timer, |
f808495d AS |
517 | ktime_add_ns(ktime_now, |
518 | 100 * (stimer->exp_time - time_now)), | |
1f4b34f8 AS |
519 | HRTIMER_MODE_ABS); |
520 | return 0; | |
521 | } | |
522 | stimer->exp_time = stimer->count; | |
523 | if (time_now >= stimer->count) { | |
524 | /* | |
525 | * Expire timer according to Hypervisor Top-Level Functional | |
526 | * specification v4(15.3.1): | |
527 | * "If a one shot is enabled and the specified count is in | |
528 | * the past, it will expire immediately." | |
529 | */ | |
f3b138c5 | 530 | stimer_mark_pending(stimer, false); |
1f4b34f8 AS |
531 | return 0; |
532 | } | |
533 | ||
ac3e5fca AS |
534 | trace_kvm_hv_stimer_start_one_shot(stimer_to_vcpu(stimer)->vcpu_id, |
535 | stimer->index, | |
536 | time_now, stimer->count); | |
537 | ||
1f4b34f8 AS |
538 | hrtimer_start(&stimer->timer, |
539 | ktime_add_ns(ktime_now, 100 * (stimer->count - time_now)), | |
540 | HRTIMER_MODE_ABS); | |
541 | return 0; | |
542 | } | |
543 | ||
544 | static int stimer_set_config(struct kvm_vcpu_hv_stimer *stimer, u64 config, | |
545 | bool host) | |
546 | { | |
ac3e5fca AS |
547 | trace_kvm_hv_stimer_set_config(stimer_to_vcpu(stimer)->vcpu_id, |
548 | stimer->index, config, host); | |
549 | ||
f3b138c5 | 550 | stimer_cleanup(stimer); |
23a3b201 | 551 | if ((stimer->config & HV_STIMER_ENABLE) && HV_STIMER_SINT(config) == 0) |
1f4b34f8 AS |
552 | config &= ~HV_STIMER_ENABLE; |
553 | stimer->config = config; | |
f3b138c5 | 554 | stimer_mark_pending(stimer, false); |
1f4b34f8 AS |
555 | return 0; |
556 | } | |
557 | ||
558 | static int stimer_set_count(struct kvm_vcpu_hv_stimer *stimer, u64 count, | |
559 | bool host) | |
560 | { | |
ac3e5fca AS |
561 | trace_kvm_hv_stimer_set_count(stimer_to_vcpu(stimer)->vcpu_id, |
562 | stimer->index, count, host); | |
563 | ||
1f4b34f8 | 564 | stimer_cleanup(stimer); |
f3b138c5 | 565 | stimer->count = count; |
1f4b34f8 AS |
566 | if (stimer->count == 0) |
567 | stimer->config &= ~HV_STIMER_ENABLE; | |
f3b138c5 | 568 | else if (stimer->config & HV_STIMER_AUTOENABLE) |
1f4b34f8 | 569 | stimer->config |= HV_STIMER_ENABLE; |
f3b138c5 | 570 | stimer_mark_pending(stimer, false); |
1f4b34f8 AS |
571 | return 0; |
572 | } | |
573 | ||
574 | static int stimer_get_config(struct kvm_vcpu_hv_stimer *stimer, u64 *pconfig) | |
575 | { | |
576 | *pconfig = stimer->config; | |
577 | return 0; | |
578 | } | |
579 | ||
580 | static int stimer_get_count(struct kvm_vcpu_hv_stimer *stimer, u64 *pcount) | |
581 | { | |
582 | *pcount = stimer->count; | |
583 | return 0; | |
584 | } | |
585 | ||
586 | static int synic_deliver_msg(struct kvm_vcpu_hv_synic *synic, u32 sint, | |
587 | struct hv_message *src_msg) | |
588 | { | |
589 | struct kvm_vcpu *vcpu = synic_to_vcpu(synic); | |
590 | struct page *page; | |
591 | gpa_t gpa; | |
592 | struct hv_message *dst_msg; | |
593 | int r; | |
594 | struct hv_message_page *msg_page; | |
595 | ||
596 | if (!(synic->msg_page & HV_SYNIC_SIMP_ENABLE)) | |
597 | return -ENOENT; | |
598 | ||
599 | gpa = synic->msg_page & PAGE_MASK; | |
600 | page = kvm_vcpu_gfn_to_page(vcpu, gpa >> PAGE_SHIFT); | |
601 | if (is_error_page(page)) | |
602 | return -EFAULT; | |
603 | ||
604 | msg_page = kmap_atomic(page); | |
605 | dst_msg = &msg_page->sint_message[sint]; | |
606 | if (sync_cmpxchg(&dst_msg->header.message_type, HVMSG_NONE, | |
607 | src_msg->header.message_type) != HVMSG_NONE) { | |
608 | dst_msg->header.message_flags.msg_pending = 1; | |
609 | r = -EAGAIN; | |
610 | } else { | |
611 | memcpy(&dst_msg->u.payload, &src_msg->u.payload, | |
612 | src_msg->header.payload_size); | |
613 | dst_msg->header.message_type = src_msg->header.message_type; | |
614 | dst_msg->header.payload_size = src_msg->header.payload_size; | |
615 | r = synic_set_irq(synic, sint); | |
616 | if (r >= 1) | |
617 | r = 0; | |
618 | else if (r == 0) | |
619 | r = -EFAULT; | |
620 | } | |
621 | kunmap_atomic(msg_page); | |
622 | kvm_release_page_dirty(page); | |
623 | kvm_vcpu_mark_page_dirty(vcpu, gpa >> PAGE_SHIFT); | |
624 | return r; | |
625 | } | |
626 | ||
0cdeabb1 | 627 | static int stimer_send_msg(struct kvm_vcpu_hv_stimer *stimer) |
1f4b34f8 AS |
628 | { |
629 | struct kvm_vcpu *vcpu = stimer_to_vcpu(stimer); | |
630 | struct hv_message *msg = &stimer->msg; | |
631 | struct hv_timer_message_payload *payload = | |
632 | (struct hv_timer_message_payload *)&msg->u.payload; | |
1f4b34f8 | 633 | |
1f4b34f8 AS |
634 | payload->expiration_time = stimer->exp_time; |
635 | payload->delivery_time = get_time_ref_counter(vcpu->kvm); | |
0cdeabb1 AS |
636 | return synic_deliver_msg(vcpu_to_synic(vcpu), |
637 | HV_STIMER_SINT(stimer->config), msg); | |
1f4b34f8 AS |
638 | } |
639 | ||
640 | static void stimer_expiration(struct kvm_vcpu_hv_stimer *stimer) | |
641 | { | |
ac3e5fca AS |
642 | int r; |
643 | ||
0cdeabb1 | 644 | stimer->msg_pending = true; |
ac3e5fca AS |
645 | r = stimer_send_msg(stimer); |
646 | trace_kvm_hv_stimer_expiration(stimer_to_vcpu(stimer)->vcpu_id, | |
647 | stimer->index, r); | |
648 | if (!r) { | |
0cdeabb1 AS |
649 | stimer->msg_pending = false; |
650 | if (!(stimer->config & HV_STIMER_PERIODIC)) | |
651 | stimer->config &= ~HV_STIMER_ENABLE; | |
652 | } | |
1f4b34f8 AS |
653 | } |
654 | ||
655 | void kvm_hv_process_stimers(struct kvm_vcpu *vcpu) | |
656 | { | |
657 | struct kvm_vcpu_hv *hv_vcpu = vcpu_to_hv_vcpu(vcpu); | |
658 | struct kvm_vcpu_hv_stimer *stimer; | |
f3b138c5 | 659 | u64 time_now, exp_time; |
1f4b34f8 AS |
660 | int i; |
661 | ||
662 | for (i = 0; i < ARRAY_SIZE(hv_vcpu->stimer); i++) | |
663 | if (test_and_clear_bit(i, hv_vcpu->stimer_pending_bitmap)) { | |
664 | stimer = &hv_vcpu->stimer[i]; | |
1f4b34f8 | 665 | if (stimer->config & HV_STIMER_ENABLE) { |
f3b138c5 AS |
666 | exp_time = stimer->exp_time; |
667 | ||
668 | if (exp_time) { | |
669 | time_now = | |
670 | get_time_ref_counter(vcpu->kvm); | |
671 | if (time_now >= exp_time) | |
672 | stimer_expiration(stimer); | |
673 | } | |
0cdeabb1 | 674 | |
f3b138c5 | 675 | if ((stimer->config & HV_STIMER_ENABLE) && |
f1ff89ec RK |
676 | stimer->count) { |
677 | if (!stimer->msg_pending) | |
678 | stimer_start(stimer); | |
679 | } else | |
0cdeabb1 | 680 | stimer_cleanup(stimer); |
1f4b34f8 AS |
681 | } |
682 | } | |
683 | } | |
684 | ||
685 | void kvm_hv_vcpu_uninit(struct kvm_vcpu *vcpu) | |
686 | { | |
687 | struct kvm_vcpu_hv *hv_vcpu = vcpu_to_hv_vcpu(vcpu); | |
688 | int i; | |
689 | ||
690 | for (i = 0; i < ARRAY_SIZE(hv_vcpu->stimer); i++) | |
691 | stimer_cleanup(&hv_vcpu->stimer[i]); | |
692 | } | |
693 | ||
694 | static void stimer_prepare_msg(struct kvm_vcpu_hv_stimer *stimer) | |
695 | { | |
696 | struct hv_message *msg = &stimer->msg; | |
697 | struct hv_timer_message_payload *payload = | |
698 | (struct hv_timer_message_payload *)&msg->u.payload; | |
699 | ||
700 | memset(&msg->header, 0, sizeof(msg->header)); | |
701 | msg->header.message_type = HVMSG_TIMER_EXPIRED; | |
702 | msg->header.payload_size = sizeof(*payload); | |
703 | ||
704 | payload->timer_index = stimer->index; | |
705 | payload->expiration_time = 0; | |
706 | payload->delivery_time = 0; | |
707 | } | |
708 | ||
709 | static void stimer_init(struct kvm_vcpu_hv_stimer *stimer, int timer_index) | |
710 | { | |
711 | memset(stimer, 0, sizeof(*stimer)); | |
712 | stimer->index = timer_index; | |
713 | hrtimer_init(&stimer->timer, CLOCK_MONOTONIC, HRTIMER_MODE_ABS); | |
714 | stimer->timer.function = stimer_timer_callback; | |
715 | stimer_prepare_msg(stimer); | |
716 | } | |
717 | ||
5c919412 AS |
718 | void kvm_hv_vcpu_init(struct kvm_vcpu *vcpu) |
719 | { | |
1f4b34f8 AS |
720 | struct kvm_vcpu_hv *hv_vcpu = vcpu_to_hv_vcpu(vcpu); |
721 | int i; | |
722 | ||
723 | synic_init(&hv_vcpu->synic); | |
724 | ||
725 | bitmap_zero(hv_vcpu->stimer_pending_bitmap, HV_SYNIC_STIMER_COUNT); | |
726 | for (i = 0; i < ARRAY_SIZE(hv_vcpu->stimer); i++) | |
727 | stimer_init(&hv_vcpu->stimer[i], i); | |
5c919412 AS |
728 | } |
729 | ||
d3457c87 RK |
730 | void kvm_hv_vcpu_postcreate(struct kvm_vcpu *vcpu) |
731 | { | |
732 | struct kvm_vcpu_hv *hv_vcpu = vcpu_to_hv_vcpu(vcpu); | |
733 | ||
734 | hv_vcpu->vp_index = kvm_vcpu_get_idx(vcpu); | |
735 | } | |
736 | ||
efc479e6 | 737 | int kvm_hv_activate_synic(struct kvm_vcpu *vcpu, bool dont_zero_synic_pages) |
5c919412 | 738 | { |
efc479e6 RK |
739 | struct kvm_vcpu_hv_synic *synic = vcpu_to_synic(vcpu); |
740 | ||
5c919412 AS |
741 | /* |
742 | * Hyper-V SynIC auto EOI SINT's are | |
743 | * not compatible with APICV, so deactivate APICV | |
744 | */ | |
745 | kvm_vcpu_deactivate_apicv(vcpu); | |
efc479e6 RK |
746 | synic->active = true; |
747 | synic->dont_zero_synic_pages = dont_zero_synic_pages; | |
5c919412 AS |
748 | return 0; |
749 | } | |
750 | ||
e83d5887 AS |
751 | static bool kvm_hv_msr_partition_wide(u32 msr) |
752 | { | |
753 | bool r = false; | |
754 | ||
755 | switch (msr) { | |
756 | case HV_X64_MSR_GUEST_OS_ID: | |
757 | case HV_X64_MSR_HYPERCALL: | |
758 | case HV_X64_MSR_REFERENCE_TSC: | |
759 | case HV_X64_MSR_TIME_REF_COUNT: | |
e7d9513b AS |
760 | case HV_X64_MSR_CRASH_CTL: |
761 | case HV_X64_MSR_CRASH_P0 ... HV_X64_MSR_CRASH_P4: | |
e516cebb | 762 | case HV_X64_MSR_RESET: |
a2e164e7 VK |
763 | case HV_X64_MSR_REENLIGHTENMENT_CONTROL: |
764 | case HV_X64_MSR_TSC_EMULATION_CONTROL: | |
765 | case HV_X64_MSR_TSC_EMULATION_STATUS: | |
e83d5887 AS |
766 | r = true; |
767 | break; | |
768 | } | |
769 | ||
770 | return r; | |
771 | } | |
772 | ||
e7d9513b AS |
773 | static int kvm_hv_msr_get_crash_data(struct kvm_vcpu *vcpu, |
774 | u32 index, u64 *pdata) | |
775 | { | |
776 | struct kvm_hv *hv = &vcpu->kvm->arch.hyperv; | |
777 | ||
778 | if (WARN_ON_ONCE(index >= ARRAY_SIZE(hv->hv_crash_param))) | |
779 | return -EINVAL; | |
780 | ||
781 | *pdata = hv->hv_crash_param[index]; | |
782 | return 0; | |
783 | } | |
784 | ||
785 | static int kvm_hv_msr_get_crash_ctl(struct kvm_vcpu *vcpu, u64 *pdata) | |
786 | { | |
787 | struct kvm_hv *hv = &vcpu->kvm->arch.hyperv; | |
788 | ||
789 | *pdata = hv->hv_crash_ctl; | |
790 | return 0; | |
791 | } | |
792 | ||
793 | static int kvm_hv_msr_set_crash_ctl(struct kvm_vcpu *vcpu, u64 data, bool host) | |
794 | { | |
795 | struct kvm_hv *hv = &vcpu->kvm->arch.hyperv; | |
796 | ||
797 | if (host) | |
798 | hv->hv_crash_ctl = data & HV_X64_MSR_CRASH_CTL_NOTIFY; | |
799 | ||
800 | if (!host && (data & HV_X64_MSR_CRASH_CTL_NOTIFY)) { | |
801 | ||
802 | vcpu_debug(vcpu, "hv crash (0x%llx 0x%llx 0x%llx 0x%llx 0x%llx)\n", | |
803 | hv->hv_crash_param[0], | |
804 | hv->hv_crash_param[1], | |
805 | hv->hv_crash_param[2], | |
806 | hv->hv_crash_param[3], | |
807 | hv->hv_crash_param[4]); | |
808 | ||
809 | /* Send notification about crash to user space */ | |
810 | kvm_make_request(KVM_REQ_HV_CRASH, vcpu); | |
811 | } | |
812 | ||
813 | return 0; | |
814 | } | |
815 | ||
816 | static int kvm_hv_msr_set_crash_data(struct kvm_vcpu *vcpu, | |
817 | u32 index, u64 data) | |
818 | { | |
819 | struct kvm_hv *hv = &vcpu->kvm->arch.hyperv; | |
820 | ||
821 | if (WARN_ON_ONCE(index >= ARRAY_SIZE(hv->hv_crash_param))) | |
822 | return -EINVAL; | |
823 | ||
824 | hv->hv_crash_param[index] = data; | |
825 | return 0; | |
826 | } | |
827 | ||
095cf55d PB |
828 | /* |
829 | * The kvmclock and Hyper-V TSC page use similar formulas, and converting | |
830 | * between them is possible: | |
831 | * | |
832 | * kvmclock formula: | |
833 | * nsec = (ticks - tsc_timestamp) * tsc_to_system_mul * 2^(tsc_shift-32) | |
834 | * + system_time | |
835 | * | |
836 | * Hyper-V formula: | |
837 | * nsec/100 = ticks * scale / 2^64 + offset | |
838 | * | |
839 | * When tsc_timestamp = system_time = 0, offset is zero in the Hyper-V formula. | |
840 | * By dividing the kvmclock formula by 100 and equating what's left we get: | |
841 | * ticks * scale / 2^64 = ticks * tsc_to_system_mul * 2^(tsc_shift-32) / 100 | |
842 | * scale / 2^64 = tsc_to_system_mul * 2^(tsc_shift-32) / 100 | |
843 | * scale = tsc_to_system_mul * 2^(32+tsc_shift) / 100 | |
844 | * | |
845 | * Now expand the kvmclock formula and divide by 100: | |
846 | * nsec = ticks * tsc_to_system_mul * 2^(tsc_shift-32) | |
847 | * - tsc_timestamp * tsc_to_system_mul * 2^(tsc_shift-32) | |
848 | * + system_time | |
849 | * nsec/100 = ticks * tsc_to_system_mul * 2^(tsc_shift-32) / 100 | |
850 | * - tsc_timestamp * tsc_to_system_mul * 2^(tsc_shift-32) / 100 | |
851 | * + system_time / 100 | |
852 | * | |
853 | * Replace tsc_to_system_mul * 2^(tsc_shift-32) / 100 by scale / 2^64: | |
854 | * nsec/100 = ticks * scale / 2^64 | |
855 | * - tsc_timestamp * scale / 2^64 | |
856 | * + system_time / 100 | |
857 | * | |
858 | * Equate with the Hyper-V formula so that ticks * scale / 2^64 cancels out: | |
859 | * offset = system_time / 100 - tsc_timestamp * scale / 2^64 | |
860 | * | |
861 | * These two equivalencies are implemented in this function. | |
862 | */ | |
863 | static bool compute_tsc_page_parameters(struct pvclock_vcpu_time_info *hv_clock, | |
864 | HV_REFERENCE_TSC_PAGE *tsc_ref) | |
865 | { | |
866 | u64 max_mul; | |
867 | ||
868 | if (!(hv_clock->flags & PVCLOCK_TSC_STABLE_BIT)) | |
869 | return false; | |
870 | ||
871 | /* | |
872 | * check if scale would overflow, if so we use the time ref counter | |
873 | * tsc_to_system_mul * 2^(tsc_shift+32) / 100 >= 2^64 | |
874 | * tsc_to_system_mul / 100 >= 2^(32-tsc_shift) | |
875 | * tsc_to_system_mul >= 100 * 2^(32-tsc_shift) | |
876 | */ | |
877 | max_mul = 100ull << (32 - hv_clock->tsc_shift); | |
878 | if (hv_clock->tsc_to_system_mul >= max_mul) | |
879 | return false; | |
880 | ||
881 | /* | |
882 | * Otherwise compute the scale and offset according to the formulas | |
883 | * derived above. | |
884 | */ | |
885 | tsc_ref->tsc_scale = | |
886 | mul_u64_u32_div(1ULL << (32 + hv_clock->tsc_shift), | |
887 | hv_clock->tsc_to_system_mul, | |
888 | 100); | |
889 | ||
890 | tsc_ref->tsc_offset = hv_clock->system_time; | |
891 | do_div(tsc_ref->tsc_offset, 100); | |
892 | tsc_ref->tsc_offset -= | |
893 | mul_u64_u64_shr(hv_clock->tsc_timestamp, tsc_ref->tsc_scale, 64); | |
894 | return true; | |
895 | } | |
896 | ||
897 | void kvm_hv_setup_tsc_page(struct kvm *kvm, | |
898 | struct pvclock_vcpu_time_info *hv_clock) | |
899 | { | |
900 | struct kvm_hv *hv = &kvm->arch.hyperv; | |
901 | u32 tsc_seq; | |
902 | u64 gfn; | |
903 | ||
904 | BUILD_BUG_ON(sizeof(tsc_seq) != sizeof(hv->tsc_ref.tsc_sequence)); | |
905 | BUILD_BUG_ON(offsetof(HV_REFERENCE_TSC_PAGE, tsc_sequence) != 0); | |
906 | ||
907 | if (!(hv->hv_tsc_page & HV_X64_MSR_TSC_REFERENCE_ENABLE)) | |
908 | return; | |
909 | ||
3f5ad8be PB |
910 | mutex_lock(&kvm->arch.hyperv.hv_lock); |
911 | if (!(hv->hv_tsc_page & HV_X64_MSR_TSC_REFERENCE_ENABLE)) | |
912 | goto out_unlock; | |
913 | ||
095cf55d PB |
914 | gfn = hv->hv_tsc_page >> HV_X64_MSR_TSC_REFERENCE_ADDRESS_SHIFT; |
915 | /* | |
916 | * Because the TSC parameters only vary when there is a | |
917 | * change in the master clock, do not bother with caching. | |
918 | */ | |
919 | if (unlikely(kvm_read_guest(kvm, gfn_to_gpa(gfn), | |
920 | &tsc_seq, sizeof(tsc_seq)))) | |
3f5ad8be | 921 | goto out_unlock; |
095cf55d PB |
922 | |
923 | /* | |
924 | * While we're computing and writing the parameters, force the | |
925 | * guest to use the time reference count MSR. | |
926 | */ | |
927 | hv->tsc_ref.tsc_sequence = 0; | |
928 | if (kvm_write_guest(kvm, gfn_to_gpa(gfn), | |
929 | &hv->tsc_ref, sizeof(hv->tsc_ref.tsc_sequence))) | |
3f5ad8be | 930 | goto out_unlock; |
095cf55d PB |
931 | |
932 | if (!compute_tsc_page_parameters(hv_clock, &hv->tsc_ref)) | |
3f5ad8be | 933 | goto out_unlock; |
095cf55d PB |
934 | |
935 | /* Ensure sequence is zero before writing the rest of the struct. */ | |
936 | smp_wmb(); | |
937 | if (kvm_write_guest(kvm, gfn_to_gpa(gfn), &hv->tsc_ref, sizeof(hv->tsc_ref))) | |
3f5ad8be | 938 | goto out_unlock; |
095cf55d PB |
939 | |
940 | /* | |
941 | * Now switch to the TSC page mechanism by writing the sequence. | |
942 | */ | |
943 | tsc_seq++; | |
944 | if (tsc_seq == 0xFFFFFFFF || tsc_seq == 0) | |
945 | tsc_seq = 1; | |
946 | ||
947 | /* Write the struct entirely before the non-zero sequence. */ | |
948 | smp_wmb(); | |
949 | ||
950 | hv->tsc_ref.tsc_sequence = tsc_seq; | |
951 | kvm_write_guest(kvm, gfn_to_gpa(gfn), | |
952 | &hv->tsc_ref, sizeof(hv->tsc_ref.tsc_sequence)); | |
3f5ad8be PB |
953 | out_unlock: |
954 | mutex_unlock(&kvm->arch.hyperv.hv_lock); | |
095cf55d PB |
955 | } |
956 | ||
e7d9513b AS |
957 | static int kvm_hv_set_msr_pw(struct kvm_vcpu *vcpu, u32 msr, u64 data, |
958 | bool host) | |
e83d5887 AS |
959 | { |
960 | struct kvm *kvm = vcpu->kvm; | |
961 | struct kvm_hv *hv = &kvm->arch.hyperv; | |
962 | ||
963 | switch (msr) { | |
964 | case HV_X64_MSR_GUEST_OS_ID: | |
965 | hv->hv_guest_os_id = data; | |
966 | /* setting guest os id to zero disables hypercall page */ | |
967 | if (!hv->hv_guest_os_id) | |
968 | hv->hv_hypercall &= ~HV_X64_MSR_HYPERCALL_ENABLE; | |
969 | break; | |
970 | case HV_X64_MSR_HYPERCALL: { | |
971 | u64 gfn; | |
972 | unsigned long addr; | |
973 | u8 instructions[4]; | |
974 | ||
975 | /* if guest os id is not set hypercall should remain disabled */ | |
976 | if (!hv->hv_guest_os_id) | |
977 | break; | |
978 | if (!(data & HV_X64_MSR_HYPERCALL_ENABLE)) { | |
979 | hv->hv_hypercall = data; | |
980 | break; | |
981 | } | |
982 | gfn = data >> HV_X64_MSR_HYPERCALL_PAGE_ADDRESS_SHIFT; | |
983 | addr = gfn_to_hva(kvm, gfn); | |
984 | if (kvm_is_error_hva(addr)) | |
985 | return 1; | |
986 | kvm_x86_ops->patch_hypercall(vcpu, instructions); | |
987 | ((unsigned char *)instructions)[3] = 0xc3; /* ret */ | |
988 | if (__copy_to_user((void __user *)addr, instructions, 4)) | |
989 | return 1; | |
990 | hv->hv_hypercall = data; | |
991 | mark_page_dirty(kvm, gfn); | |
992 | break; | |
993 | } | |
095cf55d | 994 | case HV_X64_MSR_REFERENCE_TSC: |
e83d5887 | 995 | hv->hv_tsc_page = data; |
095cf55d PB |
996 | if (hv->hv_tsc_page & HV_X64_MSR_TSC_REFERENCE_ENABLE) |
997 | kvm_make_request(KVM_REQ_MASTERCLOCK_UPDATE, vcpu); | |
e83d5887 | 998 | break; |
e7d9513b AS |
999 | case HV_X64_MSR_CRASH_P0 ... HV_X64_MSR_CRASH_P4: |
1000 | return kvm_hv_msr_set_crash_data(vcpu, | |
1001 | msr - HV_X64_MSR_CRASH_P0, | |
1002 | data); | |
1003 | case HV_X64_MSR_CRASH_CTL: | |
1004 | return kvm_hv_msr_set_crash_ctl(vcpu, data, host); | |
e516cebb AS |
1005 | case HV_X64_MSR_RESET: |
1006 | if (data == 1) { | |
1007 | vcpu_debug(vcpu, "hyper-v reset requested\n"); | |
1008 | kvm_make_request(KVM_REQ_HV_RESET, vcpu); | |
1009 | } | |
1010 | break; | |
a2e164e7 VK |
1011 | case HV_X64_MSR_REENLIGHTENMENT_CONTROL: |
1012 | hv->hv_reenlightenment_control = data; | |
1013 | break; | |
1014 | case HV_X64_MSR_TSC_EMULATION_CONTROL: | |
1015 | hv->hv_tsc_emulation_control = data; | |
1016 | break; | |
1017 | case HV_X64_MSR_TSC_EMULATION_STATUS: | |
1018 | hv->hv_tsc_emulation_status = data; | |
1019 | break; | |
44883f01 PB |
1020 | case HV_X64_MSR_TIME_REF_COUNT: |
1021 | /* read-only, but still ignore it if host-initiated */ | |
1022 | if (!host) | |
1023 | return 1; | |
1024 | break; | |
e83d5887 AS |
1025 | default: |
1026 | vcpu_unimpl(vcpu, "Hyper-V uhandled wrmsr: 0x%x data 0x%llx\n", | |
1027 | msr, data); | |
1028 | return 1; | |
1029 | } | |
1030 | return 0; | |
1031 | } | |
1032 | ||
9eec50b8 AS |
1033 | /* Calculate cpu time spent by current task in 100ns units */ |
1034 | static u64 current_task_runtime_100ns(void) | |
1035 | { | |
5613fda9 | 1036 | u64 utime, stime; |
9eec50b8 AS |
1037 | |
1038 | task_cputime_adjusted(current, &utime, &stime); | |
5613fda9 FW |
1039 | |
1040 | return div_u64(utime + stime, 100); | |
9eec50b8 AS |
1041 | } |
1042 | ||
1043 | static int kvm_hv_set_msr(struct kvm_vcpu *vcpu, u32 msr, u64 data, bool host) | |
e83d5887 | 1044 | { |
1779a39f | 1045 | struct kvm_vcpu_hv *hv_vcpu = &vcpu->arch.hyperv; |
e83d5887 AS |
1046 | |
1047 | switch (msr) { | |
d3457c87 | 1048 | case HV_X64_MSR_VP_INDEX: |
9170200e | 1049 | if (!host || (u32)data >= KVM_MAX_VCPUS) |
d3457c87 | 1050 | return 1; |
1779a39f | 1051 | hv_vcpu->vp_index = (u32)data; |
d3457c87 | 1052 | break; |
d4abc577 | 1053 | case HV_X64_MSR_VP_ASSIST_PAGE: { |
e83d5887 AS |
1054 | u64 gfn; |
1055 | unsigned long addr; | |
1056 | ||
d4abc577 | 1057 | if (!(data & HV_X64_MSR_VP_ASSIST_PAGE_ENABLE)) { |
1779a39f | 1058 | hv_vcpu->hv_vapic = data; |
e83d5887 AS |
1059 | if (kvm_lapic_enable_pv_eoi(vcpu, 0)) |
1060 | return 1; | |
1061 | break; | |
1062 | } | |
d4abc577 | 1063 | gfn = data >> HV_X64_MSR_VP_ASSIST_PAGE_ADDRESS_SHIFT; |
e83d5887 AS |
1064 | addr = kvm_vcpu_gfn_to_hva(vcpu, gfn); |
1065 | if (kvm_is_error_hva(addr)) | |
1066 | return 1; | |
1067 | if (__clear_user((void __user *)addr, PAGE_SIZE)) | |
1068 | return 1; | |
1779a39f | 1069 | hv_vcpu->hv_vapic = data; |
e83d5887 AS |
1070 | kvm_vcpu_mark_page_dirty(vcpu, gfn); |
1071 | if (kvm_lapic_enable_pv_eoi(vcpu, | |
1072 | gfn_to_gpa(gfn) | KVM_MSR_ENABLED)) | |
1073 | return 1; | |
1074 | break; | |
1075 | } | |
1076 | case HV_X64_MSR_EOI: | |
1077 | return kvm_hv_vapic_msr_write(vcpu, APIC_EOI, data); | |
1078 | case HV_X64_MSR_ICR: | |
1079 | return kvm_hv_vapic_msr_write(vcpu, APIC_ICR, data); | |
1080 | case HV_X64_MSR_TPR: | |
1081 | return kvm_hv_vapic_msr_write(vcpu, APIC_TASKPRI, data); | |
9eec50b8 AS |
1082 | case HV_X64_MSR_VP_RUNTIME: |
1083 | if (!host) | |
1084 | return 1; | |
1779a39f | 1085 | hv_vcpu->runtime_offset = data - current_task_runtime_100ns(); |
9eec50b8 | 1086 | break; |
5c919412 AS |
1087 | case HV_X64_MSR_SCONTROL: |
1088 | case HV_X64_MSR_SVERSION: | |
1089 | case HV_X64_MSR_SIEFP: | |
1090 | case HV_X64_MSR_SIMP: | |
1091 | case HV_X64_MSR_EOM: | |
1092 | case HV_X64_MSR_SINT0 ... HV_X64_MSR_SINT15: | |
1093 | return synic_set_msr(vcpu_to_synic(vcpu), msr, data, host); | |
1f4b34f8 AS |
1094 | case HV_X64_MSR_STIMER0_CONFIG: |
1095 | case HV_X64_MSR_STIMER1_CONFIG: | |
1096 | case HV_X64_MSR_STIMER2_CONFIG: | |
1097 | case HV_X64_MSR_STIMER3_CONFIG: { | |
1098 | int timer_index = (msr - HV_X64_MSR_STIMER0_CONFIG)/2; | |
1099 | ||
1100 | return stimer_set_config(vcpu_to_stimer(vcpu, timer_index), | |
1101 | data, host); | |
1102 | } | |
1103 | case HV_X64_MSR_STIMER0_COUNT: | |
1104 | case HV_X64_MSR_STIMER1_COUNT: | |
1105 | case HV_X64_MSR_STIMER2_COUNT: | |
1106 | case HV_X64_MSR_STIMER3_COUNT: { | |
1107 | int timer_index = (msr - HV_X64_MSR_STIMER0_COUNT)/2; | |
1108 | ||
1109 | return stimer_set_count(vcpu_to_stimer(vcpu, timer_index), | |
1110 | data, host); | |
1111 | } | |
44883f01 PB |
1112 | case HV_X64_MSR_TSC_FREQUENCY: |
1113 | case HV_X64_MSR_APIC_FREQUENCY: | |
1114 | /* read-only, but still ignore it if host-initiated */ | |
1115 | if (!host) | |
1116 | return 1; | |
1117 | break; | |
e83d5887 AS |
1118 | default: |
1119 | vcpu_unimpl(vcpu, "Hyper-V uhandled wrmsr: 0x%x data 0x%llx\n", | |
1120 | msr, data); | |
1121 | return 1; | |
1122 | } | |
1123 | ||
1124 | return 0; | |
1125 | } | |
1126 | ||
1127 | static int kvm_hv_get_msr_pw(struct kvm_vcpu *vcpu, u32 msr, u64 *pdata) | |
1128 | { | |
1129 | u64 data = 0; | |
1130 | struct kvm *kvm = vcpu->kvm; | |
1131 | struct kvm_hv *hv = &kvm->arch.hyperv; | |
1132 | ||
1133 | switch (msr) { | |
1134 | case HV_X64_MSR_GUEST_OS_ID: | |
1135 | data = hv->hv_guest_os_id; | |
1136 | break; | |
1137 | case HV_X64_MSR_HYPERCALL: | |
1138 | data = hv->hv_hypercall; | |
1139 | break; | |
93bf4172 AS |
1140 | case HV_X64_MSR_TIME_REF_COUNT: |
1141 | data = get_time_ref_counter(kvm); | |
e83d5887 | 1142 | break; |
e83d5887 AS |
1143 | case HV_X64_MSR_REFERENCE_TSC: |
1144 | data = hv->hv_tsc_page; | |
1145 | break; | |
e7d9513b AS |
1146 | case HV_X64_MSR_CRASH_P0 ... HV_X64_MSR_CRASH_P4: |
1147 | return kvm_hv_msr_get_crash_data(vcpu, | |
1148 | msr - HV_X64_MSR_CRASH_P0, | |
1149 | pdata); | |
1150 | case HV_X64_MSR_CRASH_CTL: | |
1151 | return kvm_hv_msr_get_crash_ctl(vcpu, pdata); | |
e516cebb AS |
1152 | case HV_X64_MSR_RESET: |
1153 | data = 0; | |
1154 | break; | |
a2e164e7 VK |
1155 | case HV_X64_MSR_REENLIGHTENMENT_CONTROL: |
1156 | data = hv->hv_reenlightenment_control; | |
1157 | break; | |
1158 | case HV_X64_MSR_TSC_EMULATION_CONTROL: | |
1159 | data = hv->hv_tsc_emulation_control; | |
1160 | break; | |
1161 | case HV_X64_MSR_TSC_EMULATION_STATUS: | |
1162 | data = hv->hv_tsc_emulation_status; | |
1163 | break; | |
e83d5887 AS |
1164 | default: |
1165 | vcpu_unimpl(vcpu, "Hyper-V unhandled rdmsr: 0x%x\n", msr); | |
1166 | return 1; | |
1167 | } | |
1168 | ||
1169 | *pdata = data; | |
1170 | return 0; | |
1171 | } | |
1172 | ||
44883f01 PB |
1173 | static int kvm_hv_get_msr(struct kvm_vcpu *vcpu, u32 msr, u64 *pdata, |
1174 | bool host) | |
e83d5887 AS |
1175 | { |
1176 | u64 data = 0; | |
1779a39f | 1177 | struct kvm_vcpu_hv *hv_vcpu = &vcpu->arch.hyperv; |
e83d5887 AS |
1178 | |
1179 | switch (msr) { | |
d3457c87 | 1180 | case HV_X64_MSR_VP_INDEX: |
1779a39f | 1181 | data = hv_vcpu->vp_index; |
e83d5887 | 1182 | break; |
e83d5887 AS |
1183 | case HV_X64_MSR_EOI: |
1184 | return kvm_hv_vapic_msr_read(vcpu, APIC_EOI, pdata); | |
1185 | case HV_X64_MSR_ICR: | |
1186 | return kvm_hv_vapic_msr_read(vcpu, APIC_ICR, pdata); | |
1187 | case HV_X64_MSR_TPR: | |
1188 | return kvm_hv_vapic_msr_read(vcpu, APIC_TASKPRI, pdata); | |
d4abc577 | 1189 | case HV_X64_MSR_VP_ASSIST_PAGE: |
1779a39f | 1190 | data = hv_vcpu->hv_vapic; |
e83d5887 | 1191 | break; |
9eec50b8 | 1192 | case HV_X64_MSR_VP_RUNTIME: |
1779a39f | 1193 | data = current_task_runtime_100ns() + hv_vcpu->runtime_offset; |
9eec50b8 | 1194 | break; |
5c919412 AS |
1195 | case HV_X64_MSR_SCONTROL: |
1196 | case HV_X64_MSR_SVERSION: | |
1197 | case HV_X64_MSR_SIEFP: | |
1198 | case HV_X64_MSR_SIMP: | |
1199 | case HV_X64_MSR_EOM: | |
1200 | case HV_X64_MSR_SINT0 ... HV_X64_MSR_SINT15: | |
44883f01 | 1201 | return synic_get_msr(vcpu_to_synic(vcpu), msr, pdata, host); |
1f4b34f8 AS |
1202 | case HV_X64_MSR_STIMER0_CONFIG: |
1203 | case HV_X64_MSR_STIMER1_CONFIG: | |
1204 | case HV_X64_MSR_STIMER2_CONFIG: | |
1205 | case HV_X64_MSR_STIMER3_CONFIG: { | |
1206 | int timer_index = (msr - HV_X64_MSR_STIMER0_CONFIG)/2; | |
1207 | ||
1208 | return stimer_get_config(vcpu_to_stimer(vcpu, timer_index), | |
1209 | pdata); | |
1210 | } | |
1211 | case HV_X64_MSR_STIMER0_COUNT: | |
1212 | case HV_X64_MSR_STIMER1_COUNT: | |
1213 | case HV_X64_MSR_STIMER2_COUNT: | |
1214 | case HV_X64_MSR_STIMER3_COUNT: { | |
1215 | int timer_index = (msr - HV_X64_MSR_STIMER0_COUNT)/2; | |
1216 | ||
1217 | return stimer_get_count(vcpu_to_stimer(vcpu, timer_index), | |
1218 | pdata); | |
1219 | } | |
72c139ba LP |
1220 | case HV_X64_MSR_TSC_FREQUENCY: |
1221 | data = (u64)vcpu->arch.virtual_tsc_khz * 1000; | |
1222 | break; | |
1223 | case HV_X64_MSR_APIC_FREQUENCY: | |
1224 | data = APIC_BUS_FREQUENCY; | |
1225 | break; | |
e83d5887 AS |
1226 | default: |
1227 | vcpu_unimpl(vcpu, "Hyper-V unhandled rdmsr: 0x%x\n", msr); | |
1228 | return 1; | |
1229 | } | |
1230 | *pdata = data; | |
1231 | return 0; | |
1232 | } | |
1233 | ||
e7d9513b | 1234 | int kvm_hv_set_msr_common(struct kvm_vcpu *vcpu, u32 msr, u64 data, bool host) |
e83d5887 AS |
1235 | { |
1236 | if (kvm_hv_msr_partition_wide(msr)) { | |
1237 | int r; | |
1238 | ||
3f5ad8be | 1239 | mutex_lock(&vcpu->kvm->arch.hyperv.hv_lock); |
e7d9513b | 1240 | r = kvm_hv_set_msr_pw(vcpu, msr, data, host); |
3f5ad8be | 1241 | mutex_unlock(&vcpu->kvm->arch.hyperv.hv_lock); |
e83d5887 AS |
1242 | return r; |
1243 | } else | |
9eec50b8 | 1244 | return kvm_hv_set_msr(vcpu, msr, data, host); |
e83d5887 AS |
1245 | } |
1246 | ||
44883f01 | 1247 | int kvm_hv_get_msr_common(struct kvm_vcpu *vcpu, u32 msr, u64 *pdata, bool host) |
e83d5887 AS |
1248 | { |
1249 | if (kvm_hv_msr_partition_wide(msr)) { | |
1250 | int r; | |
1251 | ||
3f5ad8be | 1252 | mutex_lock(&vcpu->kvm->arch.hyperv.hv_lock); |
e83d5887 | 1253 | r = kvm_hv_get_msr_pw(vcpu, msr, pdata); |
3f5ad8be | 1254 | mutex_unlock(&vcpu->kvm->arch.hyperv.hv_lock); |
e83d5887 AS |
1255 | return r; |
1256 | } else | |
44883f01 | 1257 | return kvm_hv_get_msr(vcpu, msr, pdata, host); |
e83d5887 AS |
1258 | } |
1259 | ||
c7012676 VK |
1260 | static __always_inline int get_sparse_bank_no(u64 valid_bank_mask, int bank_no) |
1261 | { | |
1262 | int i = 0, j; | |
1263 | ||
1264 | if (!(valid_bank_mask & BIT_ULL(bank_no))) | |
1265 | return -1; | |
1266 | ||
1267 | for (j = 0; j < bank_no; j++) | |
1268 | if (valid_bank_mask & BIT_ULL(j)) | |
1269 | i++; | |
1270 | ||
1271 | return i; | |
1272 | } | |
1273 | ||
e2f11f42 | 1274 | static u64 kvm_hv_flush_tlb(struct kvm_vcpu *current_vcpu, u64 ingpa, |
c7012676 | 1275 | u16 rep_cnt, bool ex) |
e2f11f42 VK |
1276 | { |
1277 | struct kvm *kvm = current_vcpu->kvm; | |
1278 | struct kvm_vcpu_hv *hv_current = ¤t_vcpu->arch.hyperv; | |
c7012676 | 1279 | struct hv_tlb_flush_ex flush_ex; |
e2f11f42 VK |
1280 | struct hv_tlb_flush flush; |
1281 | struct kvm_vcpu *vcpu; | |
1282 | unsigned long vcpu_bitmap[BITS_TO_LONGS(KVM_MAX_VCPUS)] = {0}; | |
c7012676 VK |
1283 | unsigned long valid_bank_mask = 0; |
1284 | u64 sparse_banks[64]; | |
1285 | int sparse_banks_len, i; | |
1286 | bool all_cpus; | |
e2f11f42 | 1287 | |
c7012676 VK |
1288 | if (!ex) { |
1289 | if (unlikely(kvm_read_guest(kvm, ingpa, &flush, sizeof(flush)))) | |
1290 | return HV_STATUS_INVALID_HYPERCALL_INPUT; | |
e2f11f42 | 1291 | |
c7012676 VK |
1292 | trace_kvm_hv_flush_tlb(flush.processor_mask, |
1293 | flush.address_space, flush.flags); | |
1294 | ||
1295 | sparse_banks[0] = flush.processor_mask; | |
1296 | all_cpus = flush.flags & HV_FLUSH_ALL_PROCESSORS; | |
1297 | } else { | |
1298 | if (unlikely(kvm_read_guest(kvm, ingpa, &flush_ex, | |
1299 | sizeof(flush_ex)))) | |
1300 | return HV_STATUS_INVALID_HYPERCALL_INPUT; | |
1301 | ||
1302 | trace_kvm_hv_flush_tlb_ex(flush_ex.hv_vp_set.valid_bank_mask, | |
1303 | flush_ex.hv_vp_set.format, | |
1304 | flush_ex.address_space, | |
1305 | flush_ex.flags); | |
1306 | ||
1307 | valid_bank_mask = flush_ex.hv_vp_set.valid_bank_mask; | |
1308 | all_cpus = flush_ex.hv_vp_set.format != | |
1309 | HV_GENERIC_SET_SPARSE_4K; | |
1310 | ||
1311 | sparse_banks_len = bitmap_weight(&valid_bank_mask, 64) * | |
1312 | sizeof(sparse_banks[0]); | |
1313 | ||
1314 | if (!sparse_banks_len && !all_cpus) | |
1315 | goto ret_success; | |
1316 | ||
1317 | if (!all_cpus && | |
1318 | kvm_read_guest(kvm, | |
1319 | ingpa + offsetof(struct hv_tlb_flush_ex, | |
1320 | hv_vp_set.bank_contents), | |
1321 | sparse_banks, | |
1322 | sparse_banks_len)) | |
1323 | return HV_STATUS_INVALID_HYPERCALL_INPUT; | |
1324 | } | |
e2f11f42 VK |
1325 | |
1326 | cpumask_clear(&hv_current->tlb_lush); | |
1327 | ||
a812297c VK |
1328 | if (all_cpus) { |
1329 | kvm_make_vcpus_request_mask(kvm, | |
1330 | KVM_REQ_TLB_FLUSH | KVM_REQUEST_NO_WAKEUP, | |
1331 | NULL, &hv_current->tlb_lush); | |
1332 | goto ret_success; | |
1333 | } | |
1334 | ||
e2f11f42 VK |
1335 | kvm_for_each_vcpu(i, vcpu, kvm) { |
1336 | struct kvm_vcpu_hv *hv = &vcpu->arch.hyperv; | |
c7012676 VK |
1337 | int bank = hv->vp_index / 64, sbank = 0; |
1338 | ||
a812297c VK |
1339 | /* Banks >64 can't be represented */ |
1340 | if (bank >= 64) | |
1341 | continue; | |
c7012676 | 1342 | |
a812297c VK |
1343 | /* Non-ex hypercalls can only address first 64 vCPUs */ |
1344 | if (!ex && bank) | |
1345 | continue; | |
c7012676 | 1346 | |
a812297c VK |
1347 | if (ex) { |
1348 | /* | |
1349 | * Check is the bank of this vCPU is in sparse | |
1350 | * set and get the sparse bank number. | |
1351 | */ | |
1352 | sbank = get_sparse_bank_no(valid_bank_mask, bank); | |
e2f11f42 | 1353 | |
a812297c | 1354 | if (sbank < 0) |
c7012676 VK |
1355 | continue; |
1356 | } | |
e2f11f42 | 1357 | |
a812297c VK |
1358 | if (!(sparse_banks[sbank] & BIT_ULL(hv->vp_index % 64))) |
1359 | continue; | |
1360 | ||
e2f11f42 VK |
1361 | /* |
1362 | * vcpu->arch.cr3 may not be up-to-date for running vCPUs so we | |
1363 | * can't analyze it here, flush TLB regardless of the specified | |
1364 | * address space. | |
1365 | */ | |
1366 | __set_bit(i, vcpu_bitmap); | |
1367 | } | |
1368 | ||
1369 | kvm_make_vcpus_request_mask(kvm, | |
1370 | KVM_REQ_TLB_FLUSH | KVM_REQUEST_NO_WAKEUP, | |
1371 | vcpu_bitmap, &hv_current->tlb_lush); | |
1372 | ||
c7012676 | 1373 | ret_success: |
e2f11f42 VK |
1374 | /* We always do full TLB flush, set rep_done = rep_cnt. */ |
1375 | return (u64)HV_STATUS_SUCCESS | | |
1376 | ((u64)rep_cnt << HV_HYPERCALL_REP_COMP_OFFSET); | |
1377 | } | |
1378 | ||
e83d5887 AS |
1379 | bool kvm_hv_hypercall_enabled(struct kvm *kvm) |
1380 | { | |
3f5ad8be | 1381 | return READ_ONCE(kvm->arch.hyperv.hv_hypercall) & HV_X64_MSR_HYPERCALL_ENABLE; |
e83d5887 AS |
1382 | } |
1383 | ||
83326e43 AS |
1384 | static void kvm_hv_hypercall_set_result(struct kvm_vcpu *vcpu, u64 result) |
1385 | { | |
1386 | bool longmode; | |
1387 | ||
1388 | longmode = is_64_bit_mode(vcpu); | |
1389 | if (longmode) | |
1390 | kvm_register_write(vcpu, VCPU_REGS_RAX, result); | |
1391 | else { | |
1392 | kvm_register_write(vcpu, VCPU_REGS_RDX, result >> 32); | |
1393 | kvm_register_write(vcpu, VCPU_REGS_RAX, result & 0xffffffff); | |
1394 | } | |
1395 | } | |
1396 | ||
696ca779 | 1397 | static int kvm_hv_hypercall_complete(struct kvm_vcpu *vcpu, u64 result) |
83326e43 | 1398 | { |
696ca779 RK |
1399 | kvm_hv_hypercall_set_result(vcpu, result); |
1400 | ++vcpu->stat.hypercalls; | |
6356ee0c | 1401 | return kvm_skip_emulated_instruction(vcpu); |
83326e43 AS |
1402 | } |
1403 | ||
696ca779 RK |
1404 | static int kvm_hv_hypercall_complete_userspace(struct kvm_vcpu *vcpu) |
1405 | { | |
1406 | return kvm_hv_hypercall_complete(vcpu, vcpu->run->hyperv.u.hcall.result); | |
1407 | } | |
1408 | ||
faeb7833 RK |
1409 | static u16 kvm_hvcall_signal_event(struct kvm_vcpu *vcpu, bool fast, u64 param) |
1410 | { | |
1411 | struct eventfd_ctx *eventfd; | |
1412 | ||
1413 | if (unlikely(!fast)) { | |
1414 | int ret; | |
1415 | gpa_t gpa = param; | |
1416 | ||
1417 | if ((gpa & (__alignof__(param) - 1)) || | |
1418 | offset_in_page(gpa) + sizeof(param) > PAGE_SIZE) | |
1419 | return HV_STATUS_INVALID_ALIGNMENT; | |
1420 | ||
1421 | ret = kvm_vcpu_read_guest(vcpu, gpa, ¶m, sizeof(param)); | |
1422 | if (ret < 0) | |
1423 | return HV_STATUS_INVALID_ALIGNMENT; | |
1424 | } | |
1425 | ||
1426 | /* | |
1427 | * Per spec, bits 32-47 contain the extra "flag number". However, we | |
1428 | * have no use for it, and in all known usecases it is zero, so just | |
1429 | * report lookup failure if it isn't. | |
1430 | */ | |
1431 | if (param & 0xffff00000000ULL) | |
1432 | return HV_STATUS_INVALID_PORT_ID; | |
1433 | /* remaining bits are reserved-zero */ | |
1434 | if (param & ~KVM_HYPERV_CONN_ID_MASK) | |
1435 | return HV_STATUS_INVALID_HYPERCALL_INPUT; | |
1436 | ||
452a68d0 PB |
1437 | /* the eventfd is protected by vcpu->kvm->srcu, but conn_to_evt isn't */ |
1438 | rcu_read_lock(); | |
faeb7833 | 1439 | eventfd = idr_find(&vcpu->kvm->arch.hyperv.conn_to_evt, param); |
452a68d0 | 1440 | rcu_read_unlock(); |
faeb7833 RK |
1441 | if (!eventfd) |
1442 | return HV_STATUS_INVALID_PORT_ID; | |
1443 | ||
1444 | eventfd_signal(eventfd, 1); | |
1445 | return HV_STATUS_SUCCESS; | |
1446 | } | |
1447 | ||
e83d5887 AS |
1448 | int kvm_hv_hypercall(struct kvm_vcpu *vcpu) |
1449 | { | |
d32ef547 DC |
1450 | u64 param, ingpa, outgpa, ret = HV_STATUS_SUCCESS; |
1451 | uint16_t code, rep_idx, rep_cnt; | |
56b9ae78 | 1452 | bool fast, longmode, rep; |
e83d5887 AS |
1453 | |
1454 | /* | |
1455 | * hypercall generates UD from non zero cpl and real mode | |
1456 | * per HYPER-V spec | |
1457 | */ | |
1458 | if (kvm_x86_ops->get_cpl(vcpu) != 0 || !is_protmode(vcpu)) { | |
1459 | kvm_queue_exception(vcpu, UD_VECTOR); | |
0d9c055e | 1460 | return 1; |
e83d5887 AS |
1461 | } |
1462 | ||
1463 | longmode = is_64_bit_mode(vcpu); | |
1464 | ||
1465 | if (!longmode) { | |
1466 | param = ((u64)kvm_register_read(vcpu, VCPU_REGS_RDX) << 32) | | |
1467 | (kvm_register_read(vcpu, VCPU_REGS_RAX) & 0xffffffff); | |
1468 | ingpa = ((u64)kvm_register_read(vcpu, VCPU_REGS_RBX) << 32) | | |
1469 | (kvm_register_read(vcpu, VCPU_REGS_RCX) & 0xffffffff); | |
1470 | outgpa = ((u64)kvm_register_read(vcpu, VCPU_REGS_RDI) << 32) | | |
1471 | (kvm_register_read(vcpu, VCPU_REGS_RSI) & 0xffffffff); | |
1472 | } | |
1473 | #ifdef CONFIG_X86_64 | |
1474 | else { | |
1475 | param = kvm_register_read(vcpu, VCPU_REGS_RCX); | |
1476 | ingpa = kvm_register_read(vcpu, VCPU_REGS_RDX); | |
1477 | outgpa = kvm_register_read(vcpu, VCPU_REGS_R8); | |
1478 | } | |
1479 | #endif | |
1480 | ||
1481 | code = param & 0xffff; | |
142c95da VK |
1482 | fast = !!(param & HV_HYPERCALL_FAST_BIT); |
1483 | rep_cnt = (param >> HV_HYPERCALL_REP_COMP_OFFSET) & 0xfff; | |
1484 | rep_idx = (param >> HV_HYPERCALL_REP_START_OFFSET) & 0xfff; | |
56b9ae78 | 1485 | rep = !!(rep_cnt || rep_idx); |
e83d5887 AS |
1486 | |
1487 | trace_kvm_hv_hypercall(code, fast, rep_cnt, rep_idx, ingpa, outgpa); | |
1488 | ||
1489 | switch (code) { | |
8ed6d767 | 1490 | case HVCALL_NOTIFY_LONG_SPIN_WAIT: |
56b9ae78 VK |
1491 | if (unlikely(rep)) { |
1492 | ret = HV_STATUS_INVALID_HYPERCALL_INPUT; | |
1493 | break; | |
1494 | } | |
de63ad4c | 1495 | kvm_vcpu_on_spin(vcpu, true); |
e83d5887 | 1496 | break; |
83326e43 | 1497 | case HVCALL_SIGNAL_EVENT: |
56b9ae78 VK |
1498 | if (unlikely(rep)) { |
1499 | ret = HV_STATUS_INVALID_HYPERCALL_INPUT; | |
1500 | break; | |
1501 | } | |
d32ef547 DC |
1502 | ret = kvm_hvcall_signal_event(vcpu, fast, ingpa); |
1503 | if (ret != HV_STATUS_INVALID_PORT_ID) | |
faeb7833 RK |
1504 | break; |
1505 | /* maybe userspace knows this conn_id: fall through */ | |
1506 | case HVCALL_POST_MESSAGE: | |
a2b5c3c0 | 1507 | /* don't bother userspace if it has no way to handle it */ |
56b9ae78 VK |
1508 | if (unlikely(rep || !vcpu_to_synic(vcpu)->active)) { |
1509 | ret = HV_STATUS_INVALID_HYPERCALL_INPUT; | |
a2b5c3c0 PB |
1510 | break; |
1511 | } | |
83326e43 AS |
1512 | vcpu->run->exit_reason = KVM_EXIT_HYPERV; |
1513 | vcpu->run->hyperv.type = KVM_EXIT_HYPERV_HCALL; | |
1514 | vcpu->run->hyperv.u.hcall.input = param; | |
1515 | vcpu->run->hyperv.u.hcall.params[0] = ingpa; | |
1516 | vcpu->run->hyperv.u.hcall.params[1] = outgpa; | |
1517 | vcpu->arch.complete_userspace_io = | |
1518 | kvm_hv_hypercall_complete_userspace; | |
1519 | return 0; | |
e2f11f42 VK |
1520 | case HVCALL_FLUSH_VIRTUAL_ADDRESS_LIST: |
1521 | if (unlikely(fast || !rep_cnt || rep_idx)) { | |
1522 | ret = HV_STATUS_INVALID_HYPERCALL_INPUT; | |
1523 | break; | |
1524 | } | |
c7012676 | 1525 | ret = kvm_hv_flush_tlb(vcpu, ingpa, rep_cnt, false); |
e2f11f42 VK |
1526 | break; |
1527 | case HVCALL_FLUSH_VIRTUAL_ADDRESS_SPACE: | |
1528 | if (unlikely(fast || rep)) { | |
1529 | ret = HV_STATUS_INVALID_HYPERCALL_INPUT; | |
1530 | break; | |
1531 | } | |
c7012676 VK |
1532 | ret = kvm_hv_flush_tlb(vcpu, ingpa, rep_cnt, false); |
1533 | break; | |
1534 | case HVCALL_FLUSH_VIRTUAL_ADDRESS_LIST_EX: | |
1535 | if (unlikely(fast || !rep_cnt || rep_idx)) { | |
1536 | ret = HV_STATUS_INVALID_HYPERCALL_INPUT; | |
1537 | break; | |
1538 | } | |
1539 | ret = kvm_hv_flush_tlb(vcpu, ingpa, rep_cnt, true); | |
1540 | break; | |
1541 | case HVCALL_FLUSH_VIRTUAL_ADDRESS_SPACE_EX: | |
1542 | if (unlikely(fast || rep)) { | |
1543 | ret = HV_STATUS_INVALID_HYPERCALL_INPUT; | |
1544 | break; | |
1545 | } | |
1546 | ret = kvm_hv_flush_tlb(vcpu, ingpa, rep_cnt, true); | |
e2f11f42 | 1547 | break; |
e83d5887 | 1548 | default: |
d32ef547 | 1549 | ret = HV_STATUS_INVALID_HYPERCALL_CODE; |
e83d5887 AS |
1550 | break; |
1551 | } | |
1552 | ||
696ca779 | 1553 | return kvm_hv_hypercall_complete(vcpu, ret); |
e83d5887 | 1554 | } |
cbc0236a RK |
1555 | |
1556 | void kvm_hv_init_vm(struct kvm *kvm) | |
1557 | { | |
1558 | mutex_init(&kvm->arch.hyperv.hv_lock); | |
faeb7833 | 1559 | idr_init(&kvm->arch.hyperv.conn_to_evt); |
cbc0236a RK |
1560 | } |
1561 | ||
1562 | void kvm_hv_destroy_vm(struct kvm *kvm) | |
1563 | { | |
faeb7833 RK |
1564 | struct eventfd_ctx *eventfd; |
1565 | int i; | |
1566 | ||
1567 | idr_for_each_entry(&kvm->arch.hyperv.conn_to_evt, eventfd, i) | |
1568 | eventfd_ctx_put(eventfd); | |
1569 | idr_destroy(&kvm->arch.hyperv.conn_to_evt); | |
1570 | } | |
1571 | ||
1572 | static int kvm_hv_eventfd_assign(struct kvm *kvm, u32 conn_id, int fd) | |
1573 | { | |
1574 | struct kvm_hv *hv = &kvm->arch.hyperv; | |
1575 | struct eventfd_ctx *eventfd; | |
1576 | int ret; | |
1577 | ||
1578 | eventfd = eventfd_ctx_fdget(fd); | |
1579 | if (IS_ERR(eventfd)) | |
1580 | return PTR_ERR(eventfd); | |
1581 | ||
1582 | mutex_lock(&hv->hv_lock); | |
1583 | ret = idr_alloc(&hv->conn_to_evt, eventfd, conn_id, conn_id + 1, | |
1584 | GFP_KERNEL); | |
1585 | mutex_unlock(&hv->hv_lock); | |
1586 | ||
1587 | if (ret >= 0) | |
1588 | return 0; | |
1589 | ||
1590 | if (ret == -ENOSPC) | |
1591 | ret = -EEXIST; | |
1592 | eventfd_ctx_put(eventfd); | |
1593 | return ret; | |
1594 | } | |
1595 | ||
1596 | static int kvm_hv_eventfd_deassign(struct kvm *kvm, u32 conn_id) | |
1597 | { | |
1598 | struct kvm_hv *hv = &kvm->arch.hyperv; | |
1599 | struct eventfd_ctx *eventfd; | |
1600 | ||
1601 | mutex_lock(&hv->hv_lock); | |
1602 | eventfd = idr_remove(&hv->conn_to_evt, conn_id); | |
1603 | mutex_unlock(&hv->hv_lock); | |
1604 | ||
1605 | if (!eventfd) | |
1606 | return -ENOENT; | |
1607 | ||
1608 | synchronize_srcu(&kvm->srcu); | |
1609 | eventfd_ctx_put(eventfd); | |
1610 | return 0; | |
1611 | } | |
1612 | ||
1613 | int kvm_vm_ioctl_hv_eventfd(struct kvm *kvm, struct kvm_hyperv_eventfd *args) | |
1614 | { | |
1615 | if ((args->flags & ~KVM_HYPERV_EVENTFD_DEASSIGN) || | |
1616 | (args->conn_id & ~KVM_HYPERV_CONN_ID_MASK)) | |
1617 | return -EINVAL; | |
1618 | ||
1619 | if (args->flags == KVM_HYPERV_EVENTFD_DEASSIGN) | |
1620 | return kvm_hv_eventfd_deassign(kvm, args->conn_id); | |
1621 | return kvm_hv_eventfd_assign(kvm, args->conn_id, args->fd); | |
cbc0236a | 1622 | } |