Commit | Line | Data |
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b2441318 | 1 | /* SPDX-License-Identifier: GPL-2.0 */ |
17ce265d SR |
2 | /* |
3 | * ld script for the x86 kernel | |
4 | * | |
5 | * Historic 32-bit version written by Martin Mares <mj@atrey.karlin.mff.cuni.cz> | |
6 | * | |
91fd7fe8 IM |
7 | * Modernisation, unification and other changes and fixes: |
8 | * Copyright (C) 2007-2009 Sam Ravnborg <sam@ravnborg.org> | |
17ce265d SR |
9 | * |
10 | * | |
11 | * Don't define absolute symbols until and unless you know that symbol | |
12 | * value is should remain constant even if kernel image is relocated | |
13 | * at run time. Absolute symbols are not relocated. If symbol value should | |
14 | * change if kernel is relocated, make the symbol section relative and | |
15 | * put it inside the section definition. | |
16 | */ | |
17 | ||
18 | #ifdef CONFIG_X86_32 | |
19 | #define LOAD_OFFSET __PAGE_OFFSET | |
20 | #else | |
21 | #define LOAD_OFFSET __START_KERNEL_map | |
22 | #endif | |
23 | ||
441110a5 KC |
24 | #define EMITS_PT_NOTE |
25 | ||
17ce265d SR |
26 | #include <asm-generic/vmlinux.lds.h> |
27 | #include <asm/asm-offsets.h> | |
28 | #include <asm/thread_info.h> | |
29 | #include <asm/page_types.h> | |
ee9f8fce | 30 | #include <asm/orc_lookup.h> |
17ce265d SR |
31 | #include <asm/cache.h> |
32 | #include <asm/boot.h> | |
33 | ||
34 | #undef i386 /* in case the preprocessor is a 32bit one */ | |
35 | ||
e6d7bc0b | 36 | OUTPUT_FORMAT(CONFIG_OUTPUT_FORMAT) |
17ce265d SR |
37 | |
38 | #ifdef CONFIG_X86_32 | |
39 | OUTPUT_ARCH(i386) | |
40 | ENTRY(phys_startup_32) | |
6b35eb9d | 41 | jiffies = jiffies_64; |
17ce265d SR |
42 | #else |
43 | OUTPUT_ARCH(i386:x86-64) | |
44 | ENTRY(phys_startup_64) | |
6b35eb9d | 45 | jiffies_64 = jiffies; |
17ce265d SR |
46 | #endif |
47 | ||
9ccaf77c | 48 | #if defined(CONFIG_X86_64) |
d6cc1c3a | 49 | /* |
9ccaf77c KC |
50 | * On 64-bit, align RODATA to 2MB so we retain large page mappings for |
51 | * boundaries spanning kernel text, rodata and data sections. | |
d6cc1c3a SS |
52 | * |
53 | * However, kernel identity mappings will have different RWX permissions | |
54 | * to the pages mapping to text and to the pages padding (which are freed) the | |
55 | * text section. Hence kernel identity mappings will be broken to smaller | |
56 | * pages. For 64-bit, kernel text and kernel identity mappings are different, | |
9ccaf77c KC |
57 | * so we can enable protection checks as well as retain 2MB large page |
58 | * mappings for kernel text. | |
d6cc1c3a | 59 | */ |
39d668e0 | 60 | #define X86_ALIGN_RODATA_BEGIN . = ALIGN(HPAGE_SIZE); |
74e08179 | 61 | |
39d668e0 | 62 | #define X86_ALIGN_RODATA_END \ |
74e08179 | 63 | . = ALIGN(HPAGE_SIZE); \ |
39d668e0 JR |
64 | __end_rodata_hpage_align = .; \ |
65 | __end_rodata_aligned = .; | |
74e08179 | 66 | |
2f7412ba TG |
67 | #define ALIGN_ENTRY_TEXT_BEGIN . = ALIGN(PMD_SIZE); |
68 | #define ALIGN_ENTRY_TEXT_END . = ALIGN(PMD_SIZE); | |
69 | ||
b3f0907c BS |
70 | /* |
71 | * This section contains data which will be mapped as decrypted. Memory | |
72 | * encryption operates on a page basis. Make this section PMD-aligned | |
73 | * to avoid splitting the pages while mapping the section early. | |
74 | * | |
75 | * Note: We use a separate section so that only this section gets | |
76 | * decrypted to avoid exposing more than we wish. | |
77 | */ | |
78 | #define BSS_DECRYPTED \ | |
79 | . = ALIGN(PMD_SIZE); \ | |
80 | __start_bss_decrypted = .; \ | |
81 | *(.bss..decrypted); \ | |
82 | . = ALIGN(PAGE_SIZE); \ | |
83 | __start_bss_decrypted_unused = .; \ | |
84 | . = ALIGN(PMD_SIZE); \ | |
85 | __end_bss_decrypted = .; \ | |
86 | ||
74e08179 SS |
87 | #else |
88 | ||
39d668e0 JR |
89 | #define X86_ALIGN_RODATA_BEGIN |
90 | #define X86_ALIGN_RODATA_END \ | |
91 | . = ALIGN(PAGE_SIZE); \ | |
92 | __end_rodata_aligned = .; | |
74e08179 | 93 | |
2f7412ba TG |
94 | #define ALIGN_ENTRY_TEXT_BEGIN |
95 | #define ALIGN_ENTRY_TEXT_END | |
b3f0907c | 96 | #define BSS_DECRYPTED |
2f7412ba | 97 | |
74e08179 SS |
98 | #endif |
99 | ||
afb8095a SR |
100 | PHDRS { |
101 | text PT_LOAD FLAGS(5); /* R_E */ | |
5bd5a452 | 102 | data PT_LOAD FLAGS(6); /* RW_ */ |
afb8095a | 103 | #ifdef CONFIG_X86_64 |
afb8095a | 104 | #ifdef CONFIG_SMP |
8d0cc631 | 105 | percpu PT_LOAD FLAGS(6); /* RW_ */ |
afb8095a | 106 | #endif |
c62e4320 | 107 | init PT_LOAD FLAGS(7); /* RWE */ |
afb8095a SR |
108 | #endif |
109 | note PT_NOTE FLAGS(0); /* ___ */ | |
110 | } | |
17ce265d | 111 | |
444e0ae4 SR |
112 | SECTIONS |
113 | { | |
114 | #ifdef CONFIG_X86_32 | |
142b9e6c AB |
115 | . = LOAD_OFFSET + LOAD_PHYSICAL_ADDR; |
116 | phys_startup_32 = ABSOLUTE(startup_32 - LOAD_OFFSET); | |
444e0ae4 | 117 | #else |
142b9e6c AB |
118 | . = __START_KERNEL; |
119 | phys_startup_64 = ABSOLUTE(startup_64 - LOAD_OFFSET); | |
444e0ae4 SR |
120 | #endif |
121 | ||
dfc20895 | 122 | /* Text and read-only data */ |
dfc20895 | 123 | .text : AT(ADDR(.text) - LOAD_OFFSET) { |
4ae59b91 | 124 | _text = .; |
e728f61c | 125 | _stext = .; |
4ae59b91 TA |
126 | /* bootstrapping code */ |
127 | HEAD_TEXT | |
dfc20895 SR |
128 | TEXT_TEXT |
129 | SCHED_TEXT | |
6727ad9e | 130 | CPUIDLE_TEXT |
dfc20895 SR |
131 | LOCK_TEXT |
132 | KPROBES_TEXT | |
2f7412ba | 133 | ALIGN_ENTRY_TEXT_BEGIN |
ea714547 | 134 | ENTRY_TEXT |
dfc20895 | 135 | IRQENTRY_TEXT |
2f7412ba | 136 | ALIGN_ENTRY_TEXT_END |
be7635e7 | 137 | SOFTIRQENTRY_TEXT |
dfc20895 SR |
138 | *(.fixup) |
139 | *(.gnu.warning) | |
3386bc8a | 140 | |
736e80a4 MH |
141 | #ifdef CONFIG_RETPOLINE |
142 | __indirect_thunk_start = .; | |
143 | *(.text.__x86.indirect_thunk) | |
144 | __indirect_thunk_end = .; | |
145 | #endif | |
013c66ed | 146 | } :text = 0x9090 |
392bef70 | 147 | |
7a42d41d | 148 | EXCEPTION_TABLE(16) |
448bc3ab | 149 | |
b9076938 KC |
150 | /* End of text section, which should occupy whole number of pages */ |
151 | _etext = .; | |
5bd5a452 | 152 | . = ALIGN(PAGE_SIZE); |
b9076938 | 153 | |
39d668e0 | 154 | X86_ALIGN_RODATA_BEGIN |
c62e4320 | 155 | RO_DATA(PAGE_SIZE) |
39d668e0 | 156 | X86_ALIGN_RODATA_END |
448bc3ab | 157 | |
1f6397ba | 158 | /* Data */ |
1f6397ba | 159 | .data : AT(ADDR(.data) - LOAD_OFFSET) { |
1260866a CM |
160 | /* Start of data section */ |
161 | _sdata = .; | |
c62e4320 JB |
162 | |
163 | /* init_task */ | |
164 | INIT_TASK_DATA(THREAD_SIZE) | |
1f6397ba SR |
165 | |
166 | #ifdef CONFIG_X86_32 | |
c62e4320 JB |
167 | /* 32 bit has nosave before _edata */ |
168 | NOSAVE_DATA | |
1f6397ba SR |
169 | #endif |
170 | ||
c62e4320 | 171 | PAGE_ALIGNED_DATA(PAGE_SIZE) |
1f6397ba | 172 | |
350f8f56 | 173 | CACHELINE_ALIGNED_DATA(L1_CACHE_BYTES) |
1f6397ba | 174 | |
c62e4320 JB |
175 | DATA_DATA |
176 | CONSTRUCTORS | |
177 | ||
178 | /* rarely changed data like cpu maps */ | |
350f8f56 | 179 | READ_MOSTLY_DATA(INTERNODE_CACHE_BYTES) |
1f6397ba | 180 | |
1f6397ba SR |
181 | /* End of data section */ |
182 | _edata = .; | |
c62e4320 | 183 | } :data |
1f6397ba | 184 | |
b5effd38 | 185 | BUG_TABLE |
ff6f87e1 | 186 | |
ee9f8fce JP |
187 | ORC_UNWIND_TABLE |
188 | ||
9c40818d AL |
189 | . = ALIGN(PAGE_SIZE); |
190 | __vvar_page = .; | |
191 | ||
192 | .vvar : AT(ADDR(.vvar) - LOAD_OFFSET) { | |
f670bb76 AL |
193 | /* work around gold bug 13023 */ |
194 | __vvar_beginning_hack = .; | |
9c40818d | 195 | |
f670bb76 AL |
196 | /* Place all vvars at the offsets in asm/vvar.h. */ |
197 | #define EMIT_VVAR(name, offset) \ | |
198 | . = __vvar_beginning_hack + offset; \ | |
9c40818d AL |
199 | *(.vvar_ ## name) |
200 | #define __VVAR_KERNEL_LDS | |
201 | #include <asm/vvar.h> | |
202 | #undef __VVAR_KERNEL_LDS | |
203 | #undef EMIT_VVAR | |
204 | ||
309944be AL |
205 | /* |
206 | * Pad the rest of the page with zeros. Otherwise the loader | |
207 | * can leave garbage here. | |
208 | */ | |
209 | . = __vvar_beginning_hack + PAGE_SIZE; | |
9c40818d AL |
210 | } :data |
211 | ||
a06cc94f | 212 | . = ALIGN(__vvar_page + PAGE_SIZE, PAGE_SIZE); |
9c40818d | 213 | |
c62e4320 JB |
214 | /* Init code and data - will be freed after init */ |
215 | . = ALIGN(PAGE_SIZE); | |
216 | .init.begin : AT(ADDR(.init.begin) - LOAD_OFFSET) { | |
217 | __init_begin = .; /* paired with __init_end */ | |
e58bdaa8 | 218 | } |
e58bdaa8 | 219 | |
c62e4320 | 220 | #if defined(CONFIG_X86_64) && defined(CONFIG_SMP) |
e58bdaa8 | 221 | /* |
c62e4320 JB |
222 | * percpu offsets are zero-based on SMP. PERCPU_VADDR() changes the |
223 | * output PHDR, so the next output section - .init.text - should | |
224 | * start another segment - init. | |
e58bdaa8 | 225 | */ |
19df0c2f | 226 | PERCPU_VADDR(INTERNODE_CACHE_BYTES, 0, :percpu) |
97b67ae5 JB |
227 | ASSERT(SIZEOF(.data..percpu) < CONFIG_PHYSICAL_START, |
228 | "per-CPU data too large - increase CONFIG_PHYSICAL_START") | |
c62e4320 | 229 | #endif |
e58bdaa8 | 230 | |
123f3e1d | 231 | INIT_TEXT_SECTION(PAGE_SIZE) |
c62e4320 JB |
232 | #ifdef CONFIG_X86_64 |
233 | :init | |
234 | #endif | |
e58bdaa8 | 235 | |
337e4cc8 BP |
236 | /* |
237 | * Section for code used exclusively before alternatives are run. All | |
238 | * references to such code must be patched out by alternatives, normally | |
239 | * by using X86_FEATURE_ALWAYS CPU feature bit. | |
240 | * | |
241 | * See static_cpu_has() for an example. | |
242 | */ | |
243 | .altinstr_aux : AT(ADDR(.altinstr_aux) - LOAD_OFFSET) { | |
244 | *(.altinstr_aux) | |
245 | } | |
246 | ||
123f3e1d | 247 | INIT_DATA_SECTION(16) |
e58bdaa8 SR |
248 | |
249 | .x86_cpu_dev.init : AT(ADDR(.x86_cpu_dev.init) - LOAD_OFFSET) { | |
250 | __x86_cpu_dev_start = .; | |
251 | *(.x86_cpu_dev.init) | |
252 | __x86_cpu_dev_end = .; | |
253 | } | |
254 | ||
66ac5013 DC |
255 | #ifdef CONFIG_X86_INTEL_MID |
256 | .x86_intel_mid_dev.init : AT(ADDR(.x86_intel_mid_dev.init) - \ | |
257 | LOAD_OFFSET) { | |
258 | __x86_intel_mid_dev_start = .; | |
259 | *(.x86_intel_mid_dev.init) | |
260 | __x86_intel_mid_dev_end = .; | |
261 | } | |
262 | #endif | |
263 | ||
6f44d033 KRW |
264 | /* |
265 | * start address and size of operations which during runtime | |
266 | * can be patched with virtualization friendly instructions or | |
267 | * baremetal native ones. Think page table operations. | |
268 | * Details in paravirt_types.h | |
269 | */ | |
ae618362 SR |
270 | . = ALIGN(8); |
271 | .parainstructions : AT(ADDR(.parainstructions) - LOAD_OFFSET) { | |
272 | __parainstructions = .; | |
273 | *(.parainstructions) | |
274 | __parainstructions_end = .; | |
275 | } | |
276 | ||
6f44d033 KRW |
277 | /* |
278 | * struct alt_inst entries. From the header (alternative.h): | |
279 | * "Alternative instructions for different CPU types or capabilities" | |
280 | * Think locking instructions on spinlocks. | |
281 | */ | |
ae618362 SR |
282 | . = ALIGN(8); |
283 | .altinstructions : AT(ADDR(.altinstructions) - LOAD_OFFSET) { | |
284 | __alt_instructions = .; | |
285 | *(.altinstructions) | |
286 | __alt_instructions_end = .; | |
287 | } | |
288 | ||
6f44d033 KRW |
289 | /* |
290 | * And here are the replacement instructions. The linker sticks | |
291 | * them as binary blobs. The .altinstructions has enough data to | |
292 | * get the address and the length of them to patch the kernel safely. | |
293 | */ | |
ae618362 SR |
294 | .altinstr_replacement : AT(ADDR(.altinstr_replacement) - LOAD_OFFSET) { |
295 | *(.altinstr_replacement) | |
296 | } | |
297 | ||
6f44d033 KRW |
298 | /* |
299 | * struct iommu_table_entry entries are injected in this section. | |
300 | * It is an array of IOMMUs which during run time gets sorted depending | |
301 | * on its dependency order. After rootfs_initcall is complete | |
302 | * this section can be safely removed. | |
303 | */ | |
0444ad93 KRW |
304 | .iommu_table : AT(ADDR(.iommu_table) - LOAD_OFFSET) { |
305 | __iommu_table = .; | |
306 | *(.iommu_table) | |
0444ad93 KRW |
307 | __iommu_table_end = .; |
308 | } | |
4822b7fc | 309 | |
107e0e0c SS |
310 | . = ALIGN(8); |
311 | .apicdrivers : AT(ADDR(.apicdrivers) - LOAD_OFFSET) { | |
312 | __apicdrivers = .; | |
313 | *(.apicdrivers); | |
314 | __apicdrivers_end = .; | |
315 | } | |
316 | ||
7ac41ccf | 317 | . = ALIGN(8); |
bf6a5741 SR |
318 | /* |
319 | * .exit.text is discard at runtime, not link time, to deal with | |
320 | * references from .altinstructions and .eh_frame | |
321 | */ | |
322 | .exit.text : AT(ADDR(.exit.text) - LOAD_OFFSET) { | |
323 | EXIT_TEXT | |
324 | } | |
325 | ||
326 | .exit.data : AT(ADDR(.exit.data) - LOAD_OFFSET) { | |
327 | EXIT_DATA | |
328 | } | |
329 | ||
c62e4320 | 330 | #if !defined(CONFIG_X86_64) || !defined(CONFIG_SMP) |
0415b00d | 331 | PERCPU_SECTION(INTERNODE_CACHE_BYTES) |
9d16e783 SR |
332 | #endif |
333 | ||
334 | . = ALIGN(PAGE_SIZE); | |
fd073194 | 335 | |
9d16e783 | 336 | /* freed after init ends here */ |
fd073194 IM |
337 | .init.end : AT(ADDR(.init.end) - LOAD_OFFSET) { |
338 | __init_end = .; | |
339 | } | |
9d16e783 | 340 | |
c62e4320 JB |
341 | /* |
342 | * smp_locks might be freed after init | |
343 | * start/end must be page aligned | |
344 | */ | |
345 | . = ALIGN(PAGE_SIZE); | |
346 | .smp_locks : AT(ADDR(.smp_locks) - LOAD_OFFSET) { | |
347 | __smp_locks = .; | |
348 | *(.smp_locks) | |
c62e4320 | 349 | . = ALIGN(PAGE_SIZE); |
596b711e | 350 | __smp_locks_end = .; |
c62e4320 JB |
351 | } |
352 | ||
9d16e783 SR |
353 | #ifdef CONFIG_X86_64 |
354 | .data_nosave : AT(ADDR(.data_nosave) - LOAD_OFFSET) { | |
c62e4320 JB |
355 | NOSAVE_DATA |
356 | } | |
9d16e783 SR |
357 | #endif |
358 | ||
091e52c3 SR |
359 | /* BSS */ |
360 | . = ALIGN(PAGE_SIZE); | |
361 | .bss : AT(ADDR(.bss) - LOAD_OFFSET) { | |
362 | __bss_start = .; | |
7c74df07 | 363 | *(.bss..page_aligned) |
6a03469a | 364 | *(BSS_MAIN) |
b3f0907c | 365 | BSS_DECRYPTED |
5bd5a452 | 366 | . = ALIGN(PAGE_SIZE); |
091e52c3 SR |
367 | __bss_stop = .; |
368 | } | |
9d16e783 | 369 | |
c603a309 TL |
370 | /* |
371 | * The memory occupied from _text to here, __end_of_kernel_reserve, is | |
372 | * automatically reserved in setup_arch(). Anything after here must be | |
373 | * explicitly reserved using memblock_reserve() or it will be discarded | |
374 | * and treated as available memory. | |
375 | */ | |
376 | __end_of_kernel_reserve = .; | |
377 | ||
091e52c3 SR |
378 | . = ALIGN(PAGE_SIZE); |
379 | .brk : AT(ADDR(.brk) - LOAD_OFFSET) { | |
380 | __brk_base = .; | |
381 | . += 64 * 1024; /* 64k alignment slop space */ | |
382 | *(.brk_reservation) /* areas brk users have reserved */ | |
383 | __brk_limit = .; | |
384 | } | |
385 | ||
974f221c | 386 | . = ALIGN(PAGE_SIZE); /* keep VO_INIT_SIZE page aligned */ |
873b5271 | 387 | _end = .; |
091e52c3 | 388 | |
e1bfa873 TL |
389 | #ifdef CONFIG_AMD_MEM_ENCRYPT |
390 | /* | |
391 | * Early scratch/workarea section: Lives outside of the kernel proper | |
392 | * (_text - _end). | |
393 | * | |
394 | * Resides after _end because even though the .brk section is after | |
395 | * __end_of_kernel_reserve, the .brk section is later reserved as a | |
396 | * part of the kernel. Since it is located after __end_of_kernel_reserve | |
397 | * it will be discarded and become part of the available memory. As | |
398 | * such, it can only be used by very early boot code and must not be | |
399 | * needed afterwards. | |
400 | * | |
401 | * Currently used by SME for performing in-place encryption of the | |
402 | * kernel during boot. Resides on a 2MB boundary to simplify the | |
403 | * pagetable setup used for SME in-place encryption. | |
404 | */ | |
405 | . = ALIGN(HPAGE_SIZE); | |
406 | .init.scratch : AT(ADDR(.init.scratch) - LOAD_OFFSET) { | |
407 | __init_scratch_begin = .; | |
408 | *(.init.scratch) | |
409 | . = ALIGN(HPAGE_SIZE); | |
410 | __init_scratch_end = .; | |
411 | } | |
412 | #endif | |
413 | ||
a06cc94f C |
414 | STABS_DEBUG |
415 | DWARF_DEBUG | |
023bf6f1 | 416 | |
023bf6f1 | 417 | DISCARDS |
9a99417a JP |
418 | /DISCARD/ : { |
419 | *(.eh_frame) | |
9a99417a | 420 | } |
444e0ae4 SR |
421 | } |
422 | ||
17ce265d SR |
423 | |
424 | #ifdef CONFIG_X86_32 | |
a5912f6b IM |
425 | /* |
426 | * The ASSERT() sink to . is intentional, for binutils 2.14 compatibility: | |
427 | */ | |
d2ba8b21 PA |
428 | . = ASSERT((_end - LOAD_OFFSET <= KERNEL_IMAGE_SIZE), |
429 | "kernel image bigger than KERNEL_IMAGE_SIZE"); | |
17ce265d SR |
430 | #else |
431 | /* | |
432 | * Per-cpu symbols which need to be offset from __per_cpu_load | |
433 | * for the boot processor. | |
434 | */ | |
d071ae09 | 435 | #define INIT_PER_CPU(x) init_per_cpu__##x = ABSOLUTE(x) + __per_cpu_load |
17ce265d | 436 | INIT_PER_CPU(gdt_page); |
e6401c13 AL |
437 | INIT_PER_CPU(fixed_percpu_data); |
438 | INIT_PER_CPU(irq_stack_backing_store); | |
17ce265d SR |
439 | |
440 | /* | |
441 | * Build-time check on the image size: | |
442 | */ | |
d2ba8b21 PA |
443 | . = ASSERT((_end - _text <= KERNEL_IMAGE_SIZE), |
444 | "kernel image bigger than KERNEL_IMAGE_SIZE"); | |
17ce265d SR |
445 | |
446 | #ifdef CONFIG_SMP | |
e6401c13 AL |
447 | . = ASSERT((fixed_percpu_data == 0), |
448 | "fixed_percpu_data is not at start of per-cpu area"); | |
17ce265d SR |
449 | #endif |
450 | ||
451 | #endif /* CONFIG_X86_32 */ | |
452 | ||
2965faa5 | 453 | #ifdef CONFIG_KEXEC_CORE |
17ce265d SR |
454 | #include <asm/kexec.h> |
455 | ||
d2ba8b21 PA |
456 | . = ASSERT(kexec_control_code_size <= KEXEC_CONTROL_CODE_MAX_SIZE, |
457 | "kexec control code size is too big"); | |
17ce265d SR |
458 | #endif |
459 |