x86/speculation: Prevent deadlock on ssb_state::lock
[linux-2.6-block.git] / arch / x86 / kernel / vmlinux.lds.S
CommitLineData
b2441318 1/* SPDX-License-Identifier: GPL-2.0 */
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2/*
3 * ld script for the x86 kernel
4 *
5 * Historic 32-bit version written by Martin Mares <mj@atrey.karlin.mff.cuni.cz>
6 *
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7 * Modernisation, unification and other changes and fixes:
8 * Copyright (C) 2007-2009 Sam Ravnborg <sam@ravnborg.org>
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9 *
10 *
11 * Don't define absolute symbols until and unless you know that symbol
12 * value is should remain constant even if kernel image is relocated
13 * at run time. Absolute symbols are not relocated. If symbol value should
14 * change if kernel is relocated, make the symbol section relative and
15 * put it inside the section definition.
16 */
17
18#ifdef CONFIG_X86_32
19#define LOAD_OFFSET __PAGE_OFFSET
20#else
21#define LOAD_OFFSET __START_KERNEL_map
22#endif
23
24#include <asm-generic/vmlinux.lds.h>
25#include <asm/asm-offsets.h>
26#include <asm/thread_info.h>
27#include <asm/page_types.h>
ee9f8fce 28#include <asm/orc_lookup.h>
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29#include <asm/cache.h>
30#include <asm/boot.h>
31
32#undef i386 /* in case the preprocessor is a 32bit one */
33
e6d7bc0b 34OUTPUT_FORMAT(CONFIG_OUTPUT_FORMAT)
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35
36#ifdef CONFIG_X86_32
37OUTPUT_ARCH(i386)
38ENTRY(phys_startup_32)
6b35eb9d 39jiffies = jiffies_64;
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40#else
41OUTPUT_ARCH(i386:x86-64)
42ENTRY(phys_startup_64)
6b35eb9d 43jiffies_64 = jiffies;
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44#endif
45
9ccaf77c 46#if defined(CONFIG_X86_64)
d6cc1c3a 47/*
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48 * On 64-bit, align RODATA to 2MB so we retain large page mappings for
49 * boundaries spanning kernel text, rodata and data sections.
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50 *
51 * However, kernel identity mappings will have different RWX permissions
52 * to the pages mapping to text and to the pages padding (which are freed) the
53 * text section. Hence kernel identity mappings will be broken to smaller
54 * pages. For 64-bit, kernel text and kernel identity mappings are different,
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55 * so we can enable protection checks as well as retain 2MB large page
56 * mappings for kernel text.
d6cc1c3a 57 */
39d668e0 58#define X86_ALIGN_RODATA_BEGIN . = ALIGN(HPAGE_SIZE);
74e08179 59
39d668e0 60#define X86_ALIGN_RODATA_END \
74e08179 61 . = ALIGN(HPAGE_SIZE); \
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62 __end_rodata_hpage_align = .; \
63 __end_rodata_aligned = .;
74e08179 64
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65#define ALIGN_ENTRY_TEXT_BEGIN . = ALIGN(PMD_SIZE);
66#define ALIGN_ENTRY_TEXT_END . = ALIGN(PMD_SIZE);
67
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68/*
69 * This section contains data which will be mapped as decrypted. Memory
70 * encryption operates on a page basis. Make this section PMD-aligned
71 * to avoid splitting the pages while mapping the section early.
72 *
73 * Note: We use a separate section so that only this section gets
74 * decrypted to avoid exposing more than we wish.
75 */
76#define BSS_DECRYPTED \
77 . = ALIGN(PMD_SIZE); \
78 __start_bss_decrypted = .; \
79 *(.bss..decrypted); \
80 . = ALIGN(PAGE_SIZE); \
81 __start_bss_decrypted_unused = .; \
82 . = ALIGN(PMD_SIZE); \
83 __end_bss_decrypted = .; \
84
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85#else
86
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87#define X86_ALIGN_RODATA_BEGIN
88#define X86_ALIGN_RODATA_END \
89 . = ALIGN(PAGE_SIZE); \
90 __end_rodata_aligned = .;
74e08179 91
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92#define ALIGN_ENTRY_TEXT_BEGIN
93#define ALIGN_ENTRY_TEXT_END
b3f0907c 94#define BSS_DECRYPTED
2f7412ba 95
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96#endif
97
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98PHDRS {
99 text PT_LOAD FLAGS(5); /* R_E */
5bd5a452 100 data PT_LOAD FLAGS(6); /* RW_ */
afb8095a 101#ifdef CONFIG_X86_64
afb8095a 102#ifdef CONFIG_SMP
8d0cc631 103 percpu PT_LOAD FLAGS(6); /* RW_ */
afb8095a 104#endif
c62e4320 105 init PT_LOAD FLAGS(7); /* RWE */
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106#endif
107 note PT_NOTE FLAGS(0); /* ___ */
108}
17ce265d 109
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110SECTIONS
111{
112#ifdef CONFIG_X86_32
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113 . = LOAD_OFFSET + LOAD_PHYSICAL_ADDR;
114 phys_startup_32 = ABSOLUTE(startup_32 - LOAD_OFFSET);
444e0ae4 115#else
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116 . = __START_KERNEL;
117 phys_startup_64 = ABSOLUTE(startup_64 - LOAD_OFFSET);
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118#endif
119
dfc20895 120 /* Text and read-only data */
dfc20895 121 .text : AT(ADDR(.text) - LOAD_OFFSET) {
4ae59b91 122 _text = .;
e728f61c 123 _stext = .;
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124 /* bootstrapping code */
125 HEAD_TEXT
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126 TEXT_TEXT
127 SCHED_TEXT
6727ad9e 128 CPUIDLE_TEXT
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129 LOCK_TEXT
130 KPROBES_TEXT
2f7412ba 131 ALIGN_ENTRY_TEXT_BEGIN
ea714547 132 ENTRY_TEXT
dfc20895 133 IRQENTRY_TEXT
2f7412ba 134 ALIGN_ENTRY_TEXT_END
be7635e7 135 SOFTIRQENTRY_TEXT
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136 *(.fixup)
137 *(.gnu.warning)
3386bc8a 138
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139#ifdef CONFIG_RETPOLINE
140 __indirect_thunk_start = .;
141 *(.text.__x86.indirect_thunk)
142 __indirect_thunk_end = .;
143#endif
144
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145 /* End of text section */
146 _etext = .;
147 } :text = 0x9090
148
149 NOTES :text :note
150
123f3e1d 151 EXCEPTION_TABLE(16) :text = 0x9090
448bc3ab 152
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153 /* .text should occupy whole number of pages */
154 . = ALIGN(PAGE_SIZE);
39d668e0 155 X86_ALIGN_RODATA_BEGIN
c62e4320 156 RO_DATA(PAGE_SIZE)
39d668e0 157 X86_ALIGN_RODATA_END
448bc3ab 158
1f6397ba 159 /* Data */
1f6397ba 160 .data : AT(ADDR(.data) - LOAD_OFFSET) {
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161 /* Start of data section */
162 _sdata = .;
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163
164 /* init_task */
165 INIT_TASK_DATA(THREAD_SIZE)
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166
167#ifdef CONFIG_X86_32
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168 /* 32 bit has nosave before _edata */
169 NOSAVE_DATA
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170#endif
171
c62e4320 172 PAGE_ALIGNED_DATA(PAGE_SIZE)
1f6397ba 173
350f8f56 174 CACHELINE_ALIGNED_DATA(L1_CACHE_BYTES)
1f6397ba 175
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176 DATA_DATA
177 CONSTRUCTORS
178
179 /* rarely changed data like cpu maps */
350f8f56 180 READ_MOSTLY_DATA(INTERNODE_CACHE_BYTES)
1f6397ba 181
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182 /* End of data section */
183 _edata = .;
c62e4320 184 } :data
1f6397ba 185
b5effd38 186 BUG_TABLE
ff6f87e1 187
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188 ORC_UNWIND_TABLE
189
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190 . = ALIGN(PAGE_SIZE);
191 __vvar_page = .;
192
193 .vvar : AT(ADDR(.vvar) - LOAD_OFFSET) {
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194 /* work around gold bug 13023 */
195 __vvar_beginning_hack = .;
9c40818d 196
f670bb76
AL
197 /* Place all vvars at the offsets in asm/vvar.h. */
198#define EMIT_VVAR(name, offset) \
199 . = __vvar_beginning_hack + offset; \
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200 *(.vvar_ ## name)
201#define __VVAR_KERNEL_LDS
202#include <asm/vvar.h>
203#undef __VVAR_KERNEL_LDS
204#undef EMIT_VVAR
205
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206 /*
207 * Pad the rest of the page with zeros. Otherwise the loader
208 * can leave garbage here.
209 */
210 . = __vvar_beginning_hack + PAGE_SIZE;
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211 } :data
212
a06cc94f 213 . = ALIGN(__vvar_page + PAGE_SIZE, PAGE_SIZE);
9c40818d 214
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215 /* Init code and data - will be freed after init */
216 . = ALIGN(PAGE_SIZE);
217 .init.begin : AT(ADDR(.init.begin) - LOAD_OFFSET) {
218 __init_begin = .; /* paired with __init_end */
e58bdaa8 219 }
e58bdaa8 220
c62e4320 221#if defined(CONFIG_X86_64) && defined(CONFIG_SMP)
e58bdaa8 222 /*
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223 * percpu offsets are zero-based on SMP. PERCPU_VADDR() changes the
224 * output PHDR, so the next output section - .init.text - should
225 * start another segment - init.
e58bdaa8 226 */
19df0c2f 227 PERCPU_VADDR(INTERNODE_CACHE_BYTES, 0, :percpu)
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228 ASSERT(SIZEOF(.data..percpu) < CONFIG_PHYSICAL_START,
229 "per-CPU data too large - increase CONFIG_PHYSICAL_START")
c62e4320 230#endif
e58bdaa8 231
123f3e1d 232 INIT_TEXT_SECTION(PAGE_SIZE)
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233#ifdef CONFIG_X86_64
234 :init
235#endif
e58bdaa8 236
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237 /*
238 * Section for code used exclusively before alternatives are run. All
239 * references to such code must be patched out by alternatives, normally
240 * by using X86_FEATURE_ALWAYS CPU feature bit.
241 *
242 * See static_cpu_has() for an example.
243 */
244 .altinstr_aux : AT(ADDR(.altinstr_aux) - LOAD_OFFSET) {
245 *(.altinstr_aux)
246 }
247
123f3e1d 248 INIT_DATA_SECTION(16)
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249
250 .x86_cpu_dev.init : AT(ADDR(.x86_cpu_dev.init) - LOAD_OFFSET) {
251 __x86_cpu_dev_start = .;
252 *(.x86_cpu_dev.init)
253 __x86_cpu_dev_end = .;
254 }
255
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256#ifdef CONFIG_X86_INTEL_MID
257 .x86_intel_mid_dev.init : AT(ADDR(.x86_intel_mid_dev.init) - \
258 LOAD_OFFSET) {
259 __x86_intel_mid_dev_start = .;
260 *(.x86_intel_mid_dev.init)
261 __x86_intel_mid_dev_end = .;
262 }
263#endif
264
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265 /*
266 * start address and size of operations which during runtime
267 * can be patched with virtualization friendly instructions or
268 * baremetal native ones. Think page table operations.
269 * Details in paravirt_types.h
270 */
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SR
271 . = ALIGN(8);
272 .parainstructions : AT(ADDR(.parainstructions) - LOAD_OFFSET) {
273 __parainstructions = .;
274 *(.parainstructions)
275 __parainstructions_end = .;
276 }
277
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278 /*
279 * struct alt_inst entries. From the header (alternative.h):
280 * "Alternative instructions for different CPU types or capabilities"
281 * Think locking instructions on spinlocks.
282 */
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283 . = ALIGN(8);
284 .altinstructions : AT(ADDR(.altinstructions) - LOAD_OFFSET) {
285 __alt_instructions = .;
286 *(.altinstructions)
287 __alt_instructions_end = .;
288 }
289
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290 /*
291 * And here are the replacement instructions. The linker sticks
292 * them as binary blobs. The .altinstructions has enough data to
293 * get the address and the length of them to patch the kernel safely.
294 */
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295 .altinstr_replacement : AT(ADDR(.altinstr_replacement) - LOAD_OFFSET) {
296 *(.altinstr_replacement)
297 }
298
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299 /*
300 * struct iommu_table_entry entries are injected in this section.
301 * It is an array of IOMMUs which during run time gets sorted depending
302 * on its dependency order. After rootfs_initcall is complete
303 * this section can be safely removed.
304 */
0444ad93
KRW
305 .iommu_table : AT(ADDR(.iommu_table) - LOAD_OFFSET) {
306 __iommu_table = .;
307 *(.iommu_table)
0444ad93
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308 __iommu_table_end = .;
309 }
4822b7fc 310
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311 . = ALIGN(8);
312 .apicdrivers : AT(ADDR(.apicdrivers) - LOAD_OFFSET) {
313 __apicdrivers = .;
314 *(.apicdrivers);
315 __apicdrivers_end = .;
316 }
317
7ac41ccf 318 . = ALIGN(8);
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319 /*
320 * .exit.text is discard at runtime, not link time, to deal with
321 * references from .altinstructions and .eh_frame
322 */
323 .exit.text : AT(ADDR(.exit.text) - LOAD_OFFSET) {
324 EXIT_TEXT
325 }
326
327 .exit.data : AT(ADDR(.exit.data) - LOAD_OFFSET) {
328 EXIT_DATA
329 }
330
c62e4320 331#if !defined(CONFIG_X86_64) || !defined(CONFIG_SMP)
0415b00d 332 PERCPU_SECTION(INTERNODE_CACHE_BYTES)
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333#endif
334
335 . = ALIGN(PAGE_SIZE);
fd073194 336
9d16e783 337 /* freed after init ends here */
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IM
338 .init.end : AT(ADDR(.init.end) - LOAD_OFFSET) {
339 __init_end = .;
340 }
9d16e783 341
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342 /*
343 * smp_locks might be freed after init
344 * start/end must be page aligned
345 */
346 . = ALIGN(PAGE_SIZE);
347 .smp_locks : AT(ADDR(.smp_locks) - LOAD_OFFSET) {
348 __smp_locks = .;
349 *(.smp_locks)
c62e4320 350 . = ALIGN(PAGE_SIZE);
596b711e 351 __smp_locks_end = .;
c62e4320
JB
352 }
353
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354#ifdef CONFIG_X86_64
355 .data_nosave : AT(ADDR(.data_nosave) - LOAD_OFFSET) {
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356 NOSAVE_DATA
357 }
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358#endif
359
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360 /* BSS */
361 . = ALIGN(PAGE_SIZE);
362 .bss : AT(ADDR(.bss) - LOAD_OFFSET) {
363 __bss_start = .;
7c74df07 364 *(.bss..page_aligned)
091e52c3 365 *(.bss)
b3f0907c 366 BSS_DECRYPTED
5bd5a452 367 . = ALIGN(PAGE_SIZE);
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SR
368 __bss_stop = .;
369 }
9d16e783 370
091e52c3
SR
371 . = ALIGN(PAGE_SIZE);
372 .brk : AT(ADDR(.brk) - LOAD_OFFSET) {
373 __brk_base = .;
374 . += 64 * 1024; /* 64k alignment slop space */
375 *(.brk_reservation) /* areas brk users have reserved */
376 __brk_limit = .;
377 }
378
974f221c 379 . = ALIGN(PAGE_SIZE); /* keep VO_INIT_SIZE page aligned */
873b5271 380 _end = .;
091e52c3 381
a06cc94f
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382 STABS_DEBUG
383 DWARF_DEBUG
023bf6f1
TH
384
385 /* Sections to be discarded */
386 DISCARDS
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387 /DISCARD/ : {
388 *(.eh_frame)
9a99417a 389 }
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390}
391
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392
393#ifdef CONFIG_X86_32
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394/*
395 * The ASSERT() sink to . is intentional, for binutils 2.14 compatibility:
396 */
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397. = ASSERT((_end - LOAD_OFFSET <= KERNEL_IMAGE_SIZE),
398 "kernel image bigger than KERNEL_IMAGE_SIZE");
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399#else
400/*
401 * Per-cpu symbols which need to be offset from __per_cpu_load
402 * for the boot processor.
403 */
d071ae09 404#define INIT_PER_CPU(x) init_per_cpu__##x = ABSOLUTE(x) + __per_cpu_load
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405INIT_PER_CPU(gdt_page);
406INIT_PER_CPU(irq_stack_union);
407
408/*
409 * Build-time check on the image size:
410 */
d2ba8b21
PA
411. = ASSERT((_end - _text <= KERNEL_IMAGE_SIZE),
412 "kernel image bigger than KERNEL_IMAGE_SIZE");
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413
414#ifdef CONFIG_SMP
dd17c8f7 415. = ASSERT((irq_stack_union == 0),
d2ba8b21 416 "irq_stack_union is not at start of per-cpu area");
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417#endif
418
419#endif /* CONFIG_X86_32 */
420
2965faa5 421#ifdef CONFIG_KEXEC_CORE
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422#include <asm/kexec.h>
423
d2ba8b21
PA
424. = ASSERT(kexec_control_code_size <= KEXEC_CONTROL_CODE_MAX_SIZE,
425 "kexec control code size is too big");
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426#endif
427