x86_64, traps: Fix the espfix64 #DF fixup and rewrite it in C
[linux-2.6-block.git] / arch / x86 / kernel / traps.c
CommitLineData
1da177e4 1/*
1da177e4 2 * Copyright (C) 1991, 1992 Linus Torvalds
a8c1be9d 3 * Copyright (C) 2000, 2001, 2002 Andi Kleen, SuSE Labs
1da177e4
LT
4 *
5 * Pentium III FXSR, SSE support
6 * Gareth Hughes <gareth@valinux.com>, May 2000
7 */
8
9/*
c1d518c8 10 * Handle hardware traps and faults.
1da177e4 11 */
c767a54b
JP
12
13#define pr_fmt(fmt) KBUILD_MODNAME ": " fmt
14
56dd9470 15#include <linux/context_tracking.h>
b5964405
IM
16#include <linux/interrupt.h>
17#include <linux/kallsyms.h>
18#include <linux/spinlock.h>
b5964405
IM
19#include <linux/kprobes.h>
20#include <linux/uaccess.h>
b5964405 21#include <linux/kdebug.h>
f503b5ae 22#include <linux/kgdb.h>
1da177e4 23#include <linux/kernel.h>
b5964405
IM
24#include <linux/module.h>
25#include <linux/ptrace.h>
b02ef20a 26#include <linux/uprobes.h>
1da177e4 27#include <linux/string.h>
b5964405 28#include <linux/delay.h>
1da177e4 29#include <linux/errno.h>
b5964405
IM
30#include <linux/kexec.h>
31#include <linux/sched.h>
1da177e4 32#include <linux/timer.h>
1da177e4 33#include <linux/init.h>
91768d6c 34#include <linux/bug.h>
b5964405
IM
35#include <linux/nmi.h>
36#include <linux/mm.h>
c1d518c8
AH
37#include <linux/smp.h>
38#include <linux/io.h>
1da177e4
LT
39
40#ifdef CONFIG_EISA
41#include <linux/ioport.h>
42#include <linux/eisa.h>
43#endif
44
c0d12172
DJ
45#if defined(CONFIG_EDAC)
46#include <linux/edac.h>
47#endif
48
f8561296 49#include <asm/kmemcheck.h>
b5964405 50#include <asm/stacktrace.h>
1da177e4 51#include <asm/processor.h>
1da177e4 52#include <asm/debugreg.h>
60063497 53#include <linux/atomic.h>
08d636b6 54#include <asm/ftrace.h>
c1d518c8 55#include <asm/traps.h>
1da177e4
LT
56#include <asm/desc.h>
57#include <asm/i387.h>
1361b83a 58#include <asm/fpu-internal.h>
9e55e44e 59#include <asm/mce.h>
4eefbe79 60#include <asm/fixmap.h>
1164dd00 61#include <asm/mach_traps.h>
17f41571 62#include <asm/alternative.h>
c1d518c8 63
081f75bb 64#ifdef CONFIG_X86_64
428cf902 65#include <asm/x86_init.h>
081f75bb
AH
66#include <asm/pgalloc.h>
67#include <asm/proto.h>
4df05f36
KC
68
69/* No need to be aligned, but done to keep all IDTs defined the same way. */
70gate_desc debug_idt_table[NR_VECTORS] __page_aligned_bss;
081f75bb 71#else
c1d518c8 72#include <asm/processor-flags.h>
8e6dafd6 73#include <asm/setup.h>
1da177e4 74
1da177e4 75asmlinkage int system_call(void);
081f75bb 76#endif
1da177e4 77
4df05f36
KC
78/* Must be page-aligned because the real IDT is used in a fixmap. */
79gate_desc idt_table[NR_VECTORS] __page_aligned_bss;
80
b77b881f
YL
81DECLARE_BITMAP(used_vectors, NR_VECTORS);
82EXPORT_SYMBOL_GPL(used_vectors);
83
762db434
AH
84static inline void conditional_sti(struct pt_regs *regs)
85{
86 if (regs->flags & X86_EFLAGS_IF)
87 local_irq_enable();
88}
89
3d2a71a5
AH
90static inline void preempt_conditional_sti(struct pt_regs *regs)
91{
bdb43806 92 preempt_count_inc();
3d2a71a5
AH
93 if (regs->flags & X86_EFLAGS_IF)
94 local_irq_enable();
95}
96
be716615
TG
97static inline void conditional_cli(struct pt_regs *regs)
98{
99 if (regs->flags & X86_EFLAGS_IF)
100 local_irq_disable();
101}
102
3d2a71a5
AH
103static inline void preempt_conditional_cli(struct pt_regs *regs)
104{
105 if (regs->flags & X86_EFLAGS_IF)
106 local_irq_disable();
bdb43806 107 preempt_count_dec();
3d2a71a5
AH
108}
109
9326638c 110static nokprobe_inline int
c416ddf5
FW
111do_trap_no_signal(struct task_struct *tsk, int trapnr, char *str,
112 struct pt_regs *regs, long error_code)
1da177e4 113{
081f75bb 114#ifdef CONFIG_X86_32
6b6891f9 115 if (regs->flags & X86_VM_MASK) {
3c1326f8 116 /*
c416ddf5 117 * Traps 0, 1, 3, 4, and 5 should be forwarded to vm86.
3c1326f8
AH
118 * On nmi (interrupt 2), do_trap should not be called.
119 */
c416ddf5
FW
120 if (trapnr < X86_TRAP_UD) {
121 if (!handle_vm86_trap((struct kernel_vm86_regs *) regs,
122 error_code, trapnr))
123 return 0;
124 }
125 return -1;
1da177e4 126 }
081f75bb 127#endif
c416ddf5
FW
128 if (!user_mode(regs)) {
129 if (!fixup_exception(regs)) {
130 tsk->thread.error_code = error_code;
131 tsk->thread.trap_nr = trapnr;
132 die(str, regs, error_code);
133 }
134 return 0;
135 }
1da177e4 136
c416ddf5
FW
137 return -1;
138}
1da177e4 139
1c326c4d
ON
140static siginfo_t *fill_trap_info(struct pt_regs *regs, int signr, int trapnr,
141 siginfo_t *info)
958d3d72
ON
142{
143 unsigned long siaddr;
144 int sicode;
145
146 switch (trapnr) {
1c326c4d
ON
147 default:
148 return SEND_SIG_PRIV;
149
958d3d72
ON
150 case X86_TRAP_DE:
151 sicode = FPE_INTDIV;
b02ef20a 152 siaddr = uprobe_get_trap_addr(regs);
958d3d72
ON
153 break;
154 case X86_TRAP_UD:
155 sicode = ILL_ILLOPN;
b02ef20a 156 siaddr = uprobe_get_trap_addr(regs);
958d3d72
ON
157 break;
158 case X86_TRAP_AC:
159 sicode = BUS_ADRALN;
160 siaddr = 0;
161 break;
162 }
163
164 info->si_signo = signr;
165 info->si_errno = 0;
166 info->si_code = sicode;
167 info->si_addr = (void __user *)siaddr;
1c326c4d 168 return info;
958d3d72
ON
169}
170
9326638c 171static void
c416ddf5
FW
172do_trap(int trapnr, int signr, char *str, struct pt_regs *regs,
173 long error_code, siginfo_t *info)
174{
175 struct task_struct *tsk = current;
176
177
178 if (!do_trap_no_signal(tsk, trapnr, str, regs, error_code))
179 return;
b5964405 180 /*
51e7dc70 181 * We want error_code and trap_nr set for userspace faults and
b5964405
IM
182 * kernelspace faults which result in die(), but not
183 * kernelspace faults which are fixed up. die() gives the
184 * process no chance to handle the signal and notice the
185 * kernel fault information, so that won't result in polluting
186 * the information about previously queued, but not yet
187 * delivered, faults. See also do_general_protection below.
188 */
189 tsk->thread.error_code = error_code;
51e7dc70 190 tsk->thread.trap_nr = trapnr;
d1895183 191
081f75bb
AH
192#ifdef CONFIG_X86_64
193 if (show_unhandled_signals && unhandled_signal(tsk, signr) &&
194 printk_ratelimit()) {
c767a54b
JP
195 pr_info("%s[%d] trap %s ip:%lx sp:%lx error:%lx",
196 tsk->comm, tsk->pid, str,
197 regs->ip, regs->sp, error_code);
081f75bb 198 print_vma_addr(" in ", regs->ip);
c767a54b 199 pr_cont("\n");
081f75bb
AH
200 }
201#endif
202
38cad57b 203 force_sig_info(signr, info ?: SEND_SIG_PRIV, tsk);
1da177e4 204}
9326638c 205NOKPROBE_SYMBOL(do_trap);
1da177e4 206
dff0796e 207static void do_error_trap(struct pt_regs *regs, long error_code, char *str,
1c326c4d 208 unsigned long trapnr, int signr)
dff0796e
ON
209{
210 enum ctx_state prev_state = exception_enter();
1c326c4d 211 siginfo_t info;
dff0796e
ON
212
213 if (notify_die(DIE_TRAP, str, regs, error_code, trapnr, signr) !=
214 NOTIFY_STOP) {
215 conditional_sti(regs);
1c326c4d
ON
216 do_trap(trapnr, signr, str, regs, error_code,
217 fill_trap_info(regs, signr, trapnr, &info));
dff0796e
ON
218 }
219
220 exception_exit(prev_state);
221}
222
b5964405 223#define DO_ERROR(trapnr, signr, str, name) \
e407d620 224dotraplinkage void do_##name(struct pt_regs *regs, long error_code) \
b5964405 225{ \
1c326c4d 226 do_error_trap(regs, error_code, str, trapnr, signr); \
1da177e4
LT
227}
228
0eb14833
ON
229DO_ERROR(X86_TRAP_DE, SIGFPE, "divide error", divide_error)
230DO_ERROR(X86_TRAP_OF, SIGSEGV, "overflow", overflow)
231DO_ERROR(X86_TRAP_BR, SIGSEGV, "bounds", bounds)
232DO_ERROR(X86_TRAP_UD, SIGILL, "invalid opcode", invalid_op)
233DO_ERROR(X86_TRAP_OLD_MF, SIGFPE, "coprocessor segment overrun",coprocessor_segment_overrun)
234DO_ERROR(X86_TRAP_TS, SIGSEGV, "invalid TSS", invalid_TSS)
235DO_ERROR(X86_TRAP_NP, SIGBUS, "segment not present", segment_not_present)
081f75bb 236#ifdef CONFIG_X86_32
0eb14833 237DO_ERROR(X86_TRAP_SS, SIGBUS, "stack segment", stack_segment)
081f75bb 238#endif
0eb14833 239DO_ERROR(X86_TRAP_AC, SIGBUS, "alignment check", alignment_check)
1da177e4 240
081f75bb
AH
241#ifdef CONFIG_X86_64
242/* Runs on IST stack */
243dotraplinkage void do_stack_segment(struct pt_regs *regs, long error_code)
244{
6c1e0256
FW
245 enum ctx_state prev_state;
246
247 prev_state = exception_enter();
081f75bb 248 if (notify_die(DIE_TRAP, "stack segment", regs, error_code,
6ba3c97a
FW
249 X86_TRAP_SS, SIGBUS) != NOTIFY_STOP) {
250 preempt_conditional_sti(regs);
251 do_trap(X86_TRAP_SS, SIGBUS, "stack segment", regs, error_code, NULL);
252 preempt_conditional_cli(regs);
253 }
6c1e0256 254 exception_exit(prev_state);
081f75bb
AH
255}
256
257dotraplinkage void do_double_fault(struct pt_regs *regs, long error_code)
258{
259 static const char str[] = "double fault";
260 struct task_struct *tsk = current;
261
af726f21
AL
262#ifdef CONFIG_X86_ESPFIX64
263 extern unsigned char native_irq_return_iret[];
264
265 /*
266 * If IRET takes a non-IST fault on the espfix64 stack, then we
267 * end up promoting it to a doublefault. In that case, modify
268 * the stack to make it look like we just entered the #GP
269 * handler from user space, similar to bad_iret.
270 */
271 if (((long)regs->sp >> PGDIR_SHIFT) == ESPFIX_PGD_ENTRY &&
272 regs->cs == __KERNEL_CS &&
273 regs->ip == (unsigned long)native_irq_return_iret)
274 {
275 struct pt_regs *normal_regs = task_pt_regs(current);
276
277 /* Fake a #GP(0) from userspace. */
278 memmove(&normal_regs->ip, (void *)regs->sp, 5*8);
279 normal_regs->orig_ax = 0; /* Missing (lost) #GP error code */
280 regs->ip = (unsigned long)general_protection;
281 regs->sp = (unsigned long)&normal_regs->orig_ax;
282 return;
283 }
284#endif
285
6c1e0256 286 exception_enter();
081f75bb 287 /* Return not checked because double check cannot be ignored */
c9408265 288 notify_die(DIE_TRAP, str, regs, error_code, X86_TRAP_DF, SIGSEGV);
081f75bb
AH
289
290 tsk->thread.error_code = error_code;
51e7dc70 291 tsk->thread.trap_nr = X86_TRAP_DF;
081f75bb 292
4d067d8e
BP
293#ifdef CONFIG_DOUBLEFAULT
294 df_debug(regs, error_code);
295#endif
bd8b96df
IM
296 /*
297 * This is always a kernel trap and never fixable (and thus must
298 * never return).
299 */
081f75bb
AH
300 for (;;)
301 die(str, regs, error_code);
302}
303#endif
304
9326638c 305dotraplinkage void
13485ab5 306do_general_protection(struct pt_regs *regs, long error_code)
1da177e4 307{
13485ab5 308 struct task_struct *tsk;
6c1e0256 309 enum ctx_state prev_state;
b5964405 310
6c1e0256 311 prev_state = exception_enter();
c6df0d71
AH
312 conditional_sti(regs);
313
081f75bb 314#ifdef CONFIG_X86_32
ef3f6288
FW
315 if (regs->flags & X86_VM_MASK) {
316 local_irq_enable();
317 handle_vm86_fault((struct kernel_vm86_regs *) regs, error_code);
6ba3c97a 318 goto exit;
ef3f6288 319 }
081f75bb 320#endif
1da177e4 321
13485ab5 322 tsk = current;
ef3f6288
FW
323 if (!user_mode(regs)) {
324 if (fixup_exception(regs))
6ba3c97a 325 goto exit;
ef3f6288
FW
326
327 tsk->thread.error_code = error_code;
328 tsk->thread.trap_nr = X86_TRAP_GP;
6ba3c97a
FW
329 if (notify_die(DIE_GPF, "general protection fault", regs, error_code,
330 X86_TRAP_GP, SIGSEGV) != NOTIFY_STOP)
ef3f6288 331 die("general protection fault", regs, error_code);
6ba3c97a 332 goto exit;
ef3f6288 333 }
1da177e4 334
13485ab5 335 tsk->thread.error_code = error_code;
51e7dc70 336 tsk->thread.trap_nr = X86_TRAP_GP;
b5964405 337
13485ab5
AH
338 if (show_unhandled_signals && unhandled_signal(tsk, SIGSEGV) &&
339 printk_ratelimit()) {
c767a54b 340 pr_info("%s[%d] general protection ip:%lx sp:%lx error:%lx",
13485ab5
AH
341 tsk->comm, task_pid_nr(tsk),
342 regs->ip, regs->sp, error_code);
03252919 343 print_vma_addr(" in ", regs->ip);
c767a54b 344 pr_cont("\n");
03252919 345 }
abd4f750 346
38cad57b 347 force_sig_info(SIGSEGV, SEND_SIG_PRIV, tsk);
6ba3c97a 348exit:
6c1e0256 349 exception_exit(prev_state);
1da177e4 350}
9326638c 351NOKPROBE_SYMBOL(do_general_protection);
1da177e4 352
c1d518c8 353/* May run on IST stack. */
9326638c 354dotraplinkage void notrace do_int3(struct pt_regs *regs, long error_code)
1da177e4 355{
6c1e0256
FW
356 enum ctx_state prev_state;
357
08d636b6 358#ifdef CONFIG_DYNAMIC_FTRACE
a192cd04
SR
359 /*
360 * ftrace must be first, everything else may cause a recursive crash.
361 * See note by declaration of modifying_ftrace_code in ftrace.c
362 */
363 if (unlikely(atomic_read(&modifying_ftrace_code)) &&
364 ftrace_int3_handler(regs))
08d636b6
SR
365 return;
366#endif
17f41571
JK
367 if (poke_int3_handler(regs))
368 return;
369
4cdf77a8 370 prev_state = exception_enter();
f503b5ae 371#ifdef CONFIG_KGDB_LOW_LEVEL_TRAP
c9408265
KC
372 if (kgdb_ll_trap(DIE_INT3, "int3", regs, error_code, X86_TRAP_BP,
373 SIGTRAP) == NOTIFY_STOP)
6ba3c97a 374 goto exit;
f503b5ae 375#endif /* CONFIG_KGDB_LOW_LEVEL_TRAP */
cc3a1bf5 376
6f6343f5
MH
377#ifdef CONFIG_KPROBES
378 if (kprobe_int3_handler(regs))
4cdf77a8 379 goto exit;
6f6343f5
MH
380#endif
381
c9408265
KC
382 if (notify_die(DIE_INT3, "int3", regs, error_code, X86_TRAP_BP,
383 SIGTRAP) == NOTIFY_STOP)
6ba3c97a 384 goto exit;
b5964405 385
42181186
SR
386 /*
387 * Let others (NMI) know that the debug stack is in use
388 * as we may switch to the interrupt stack.
389 */
390 debug_stack_usage_inc();
4915a35e 391 preempt_conditional_sti(regs);
c9408265 392 do_trap(X86_TRAP_BP, SIGTRAP, "int3", regs, error_code, NULL);
4915a35e 393 preempt_conditional_cli(regs);
42181186 394 debug_stack_usage_dec();
6ba3c97a 395exit:
6c1e0256 396 exception_exit(prev_state);
1da177e4 397}
9326638c 398NOKPROBE_SYMBOL(do_int3);
1da177e4 399
081f75bb 400#ifdef CONFIG_X86_64
bd8b96df
IM
401/*
402 * Help handler running on IST stack to switch back to user stack
403 * for scheduling or signal handling. The actual stack switch is done in
404 * entry.S
405 */
ec000109 406asmlinkage __visible struct pt_regs *sync_regs(struct pt_regs *eregs)
081f75bb
AH
407{
408 struct pt_regs *regs = eregs;
409 /* Did already sync */
410 if (eregs == (struct pt_regs *)eregs->sp)
411 ;
412 /* Exception from user space */
413 else if (user_mode(eregs))
414 regs = task_pt_regs(current);
bd8b96df
IM
415 /*
416 * Exception from kernel and interrupts are enabled. Move to
417 * kernel process stack.
418 */
081f75bb
AH
419 else if (eregs->flags & X86_EFLAGS_IF)
420 regs = (struct pt_regs *)(eregs->sp -= sizeof(struct pt_regs));
421 if (eregs != regs)
422 *regs = *eregs;
423 return regs;
424}
9326638c 425NOKPROBE_SYMBOL(sync_regs);
081f75bb
AH
426#endif
427
1da177e4
LT
428/*
429 * Our handling of the processor debug registers is non-trivial.
430 * We do not clear them on entry and exit from the kernel. Therefore
431 * it is possible to get a watchpoint trap here from inside the kernel.
432 * However, the code in ./ptrace.c has ensured that the user can
433 * only set watchpoints on userspace addresses. Therefore the in-kernel
434 * watchpoint trap can only occur in code which is reading/writing
435 * from user space. Such code must not hold kernel locks (since it
436 * can equally take a page fault), therefore it is safe to call
437 * force_sig_info even though that claims and releases locks.
b5964405 438 *
1da177e4
LT
439 * Code in ./signal.c ensures that the debug control register
440 * is restored before we deliver any signal, and therefore that
441 * user code runs with the correct debug control register even though
442 * we clear it here.
443 *
444 * Being careful here means that we don't have to be as careful in a
445 * lot of more complicated places (task switching can be a bit lazy
446 * about restoring all the debug state, and ptrace doesn't have to
447 * find every occurrence of the TF bit that could be saved away even
448 * by user code)
c1d518c8
AH
449 *
450 * May run on IST stack.
1da177e4 451 */
9326638c 452dotraplinkage void do_debug(struct pt_regs *regs, long error_code)
1da177e4 453{
1da177e4 454 struct task_struct *tsk = current;
6c1e0256 455 enum ctx_state prev_state;
a1e80faf 456 int user_icebp = 0;
08d68323 457 unsigned long dr6;
da654b74 458 int si_code;
1da177e4 459
4cdf77a8
MH
460 prev_state = exception_enter();
461
08d68323 462 get_debugreg(dr6, 6);
1da177e4 463
40f9249a
P
464 /* Filter out all the reserved bits which are preset to 1 */
465 dr6 &= ~DR6_RESERVED;
466
a1e80faf
FW
467 /*
468 * If dr6 has no reason to give us about the origin of this trap,
469 * then it's very likely the result of an icebp/int01 trap.
470 * User wants a sigtrap for that.
471 */
472 if (!dr6 && user_mode(regs))
473 user_icebp = 1;
474
f8561296 475 /* Catch kmemcheck conditions first of all! */
eadb8a09 476 if ((dr6 & DR_STEP) && kmemcheck_trap(regs))
6ba3c97a 477 goto exit;
f8561296 478
08d68323
P
479 /* DR6 may or may not be cleared by the CPU */
480 set_debugreg(0, 6);
10faa81e 481
ea8e61b7
PZ
482 /*
483 * The processor cleared BTF, so don't mark that we need it set.
484 */
485 clear_tsk_thread_flag(tsk, TIF_BLOCKSTEP);
486
08d68323
P
487 /* Store the virtualized DR6 value */
488 tsk->thread.debugreg6 = dr6;
489
6f6343f5
MH
490#ifdef CONFIG_KPROBES
491 if (kprobe_debug_handler(regs))
492 goto exit;
493#endif
494
5a802e15 495 if (notify_die(DIE_DEBUG, "debug", regs, (long)&dr6, error_code,
62edab90 496 SIGTRAP) == NOTIFY_STOP)
6ba3c97a 497 goto exit;
3d2a71a5 498
42181186
SR
499 /*
500 * Let others (NMI) know that the debug stack is in use
501 * as we may switch to the interrupt stack.
502 */
503 debug_stack_usage_inc();
504
1da177e4 505 /* It's safe to allow irq's after DR6 has been saved */
3d2a71a5 506 preempt_conditional_sti(regs);
1da177e4 507
08d68323 508 if (regs->flags & X86_VM_MASK) {
c9408265
KC
509 handle_vm86_trap((struct kernel_vm86_regs *) regs, error_code,
510 X86_TRAP_DB);
6554287b 511 preempt_conditional_cli(regs);
42181186 512 debug_stack_usage_dec();
6ba3c97a 513 goto exit;
1da177e4
LT
514 }
515
1da177e4 516 /*
08d68323
P
517 * Single-stepping through system calls: ignore any exceptions in
518 * kernel space, but re-enable TF when returning to user mode.
519 *
520 * We already checked v86 mode above, so we can check for kernel mode
521 * by just checking the CPL of CS.
1da177e4 522 */
08d68323
P
523 if ((dr6 & DR_STEP) && !user_mode(regs)) {
524 tsk->thread.debugreg6 &= ~DR_STEP;
525 set_tsk_thread_flag(tsk, TIF_SINGLESTEP);
526 regs->flags &= ~X86_EFLAGS_TF;
1da177e4 527 }
08d68323 528 si_code = get_si_code(tsk->thread.debugreg6);
a1e80faf 529 if (tsk->thread.debugreg6 & (DR_STEP | DR_TRAP_BITS) || user_icebp)
08d68323 530 send_sigtrap(tsk, regs, error_code, si_code);
3d2a71a5 531 preempt_conditional_cli(regs);
42181186 532 debug_stack_usage_dec();
1da177e4 533
6ba3c97a 534exit:
6c1e0256 535 exception_exit(prev_state);
1da177e4 536}
9326638c 537NOKPROBE_SYMBOL(do_debug);
1da177e4
LT
538
539/*
540 * Note that we play around with the 'TS' bit in an attempt to get
541 * the correct behaviour even in the presence of the asynchronous
542 * IRQ13 behaviour
543 */
5e1b05be 544static void math_error(struct pt_regs *regs, int error_code, int trapnr)
1da177e4 545{
e2e75c91 546 struct task_struct *task = current;
1da177e4 547 siginfo_t info;
9b6dba9e 548 unsigned short err;
c9408265
KC
549 char *str = (trapnr == X86_TRAP_MF) ? "fpu exception" :
550 "simd exception";
e2e75c91
BG
551
552 if (notify_die(DIE_TRAP, str, regs, error_code, trapnr, SIGFPE) == NOTIFY_STOP)
553 return;
554 conditional_sti(regs);
555
556 if (!user_mode_vm(regs))
557 {
558 if (!fixup_exception(regs)) {
559 task->thread.error_code = error_code;
51e7dc70 560 task->thread.trap_nr = trapnr;
e2e75c91
BG
561 die(str, regs, error_code);
562 }
563 return;
564 }
1da177e4
LT
565
566 /*
567 * Save the info for the exception handler and clear the error.
568 */
1da177e4 569 save_init_fpu(task);
51e7dc70 570 task->thread.trap_nr = trapnr;
9b6dba9e 571 task->thread.error_code = error_code;
1da177e4
LT
572 info.si_signo = SIGFPE;
573 info.si_errno = 0;
b02ef20a 574 info.si_addr = (void __user *)uprobe_get_trap_addr(regs);
c9408265 575 if (trapnr == X86_TRAP_MF) {
9b6dba9e
BG
576 unsigned short cwd, swd;
577 /*
578 * (~cwd & swd) will mask out exceptions that are not set to unmasked
579 * status. 0x3f is the exception bits in these regs, 0x200 is the
580 * C1 reg you need in case of a stack fault, 0x040 is the stack
581 * fault bit. We should only be taking one exception at a time,
582 * so if this combination doesn't produce any single exception,
583 * then we have a bad program that isn't synchronizing its FPU usage
584 * and it will suffer the consequences since we won't be able to
585 * fully reproduce the context of the exception
586 */
587 cwd = get_fpu_cwd(task);
588 swd = get_fpu_swd(task);
adf77bac 589
9b6dba9e
BG
590 err = swd & ~cwd;
591 } else {
592 /*
593 * The SIMD FPU exceptions are handled a little differently, as there
594 * is only a single status/control register. Thus, to determine which
595 * unmasked exception was caught we must mask the exception mask bits
596 * at 0x1f80, and then use these to mask the exception bits at 0x3f.
597 */
598 unsigned short mxcsr = get_fpu_mxcsr(task);
599 err = ~(mxcsr >> 7) & mxcsr;
600 }
adf77bac
PA
601
602 if (err & 0x001) { /* Invalid op */
b5964405
IM
603 /*
604 * swd & 0x240 == 0x040: Stack Underflow
605 * swd & 0x240 == 0x240: Stack Overflow
606 * User must clear the SF bit (0x40) if set
607 */
608 info.si_code = FPE_FLTINV;
adf77bac 609 } else if (err & 0x004) { /* Divide by Zero */
b5964405 610 info.si_code = FPE_FLTDIV;
adf77bac 611 } else if (err & 0x008) { /* Overflow */
b5964405 612 info.si_code = FPE_FLTOVF;
adf77bac
PA
613 } else if (err & 0x012) { /* Denormal, Underflow */
614 info.si_code = FPE_FLTUND;
615 } else if (err & 0x020) { /* Precision */
b5964405 616 info.si_code = FPE_FLTRES;
adf77bac 617 } else {
bd8b96df 618 /*
c9408265
KC
619 * If we're using IRQ 13, or supposedly even some trap
620 * X86_TRAP_MF implementations, it's possible
621 * we get a spurious trap, which is not an error.
bd8b96df 622 */
c9408265 623 return;
1da177e4
LT
624 }
625 force_sig_info(SIGFPE, &info, task);
626}
627
e407d620 628dotraplinkage void do_coprocessor_error(struct pt_regs *regs, long error_code)
1da177e4 629{
6c1e0256
FW
630 enum ctx_state prev_state;
631
632 prev_state = exception_enter();
c9408265 633 math_error(regs, error_code, X86_TRAP_MF);
6c1e0256 634 exception_exit(prev_state);
1da177e4
LT
635}
636
e407d620
AH
637dotraplinkage void
638do_simd_coprocessor_error(struct pt_regs *regs, long error_code)
1da177e4 639{
6c1e0256
FW
640 enum ctx_state prev_state;
641
642 prev_state = exception_enter();
c9408265 643 math_error(regs, error_code, X86_TRAP_XF);
6c1e0256 644 exception_exit(prev_state);
1da177e4
LT
645}
646
e407d620
AH
647dotraplinkage void
648do_spurious_interrupt_bug(struct pt_regs *regs, long error_code)
1da177e4 649{
cf81978d 650 conditional_sti(regs);
1da177e4
LT
651#if 0
652 /* No need to warn about this any longer. */
c767a54b 653 pr_info("Ignoring P6 Local APIC Spurious Interrupt Bug...\n");
1da177e4
LT
654#endif
655}
656
2605fc21 657asmlinkage __visible void __attribute__((weak)) smp_thermal_interrupt(void)
1da177e4 658{
1da177e4 659}
4efc0670 660
2605fc21 661asmlinkage __visible void __attribute__((weak)) smp_threshold_interrupt(void)
081f75bb
AH
662{
663}
664
1da177e4 665/*
b5964405 666 * 'math_state_restore()' saves the current math information in the
1da177e4
LT
667 * old math state array, and gets the new ones from the current task
668 *
669 * Careful.. There are problems with IBM-designed IRQ13 behaviour.
670 * Don't touch unless you *really* know how it works.
671 *
be98c2cd
LT
672 * Must be called with kernel preemption disabled (eg with local
673 * local interrupts as in the case of do_device_not_available).
1da177e4 674 */
be98c2cd 675void math_state_restore(void)
1da177e4 676{
f94edacf 677 struct task_struct *tsk = current;
1da177e4 678
aa283f49
SS
679 if (!tsk_used_math(tsk)) {
680 local_irq_enable();
681 /*
682 * does a slab alloc which can sleep
683 */
684 if (init_fpu(tsk)) {
685 /*
686 * ran out of memory!
687 */
688 do_group_exit(SIGKILL);
689 return;
690 }
691 local_irq_disable();
692 }
693
f94edacf 694 __thread_fpu_begin(tsk);
304bceda 695
80ab6f1e
LT
696 /*
697 * Paranoid restore. send a SIGSEGV if we fail to restore the state.
698 */
699 if (unlikely(restore_fpu_checking(tsk))) {
304bceda 700 drop_init_fpu(tsk);
38cad57b 701 force_sig_info(SIGSEGV, SEND_SIG_PRIV, tsk);
80ab6f1e
LT
702 return;
703 }
b3b0870e 704
c375f15a 705 tsk->thread.fpu_counter++;
1da177e4 706}
5992b6da 707EXPORT_SYMBOL_GPL(math_state_restore);
1da177e4 708
9326638c 709dotraplinkage void
aa78bcfa 710do_device_not_available(struct pt_regs *regs, long error_code)
7643e9b9 711{
6c1e0256
FW
712 enum ctx_state prev_state;
713
714 prev_state = exception_enter();
5d2bd700 715 BUG_ON(use_eager_fpu());
304bceda 716
a334fe43 717#ifdef CONFIG_MATH_EMULATION
7643e9b9 718 if (read_cr0() & X86_CR0_EM) {
d315760f
TH
719 struct math_emu_info info = { };
720
7643e9b9 721 conditional_sti(regs);
d315760f 722
aa78bcfa 723 info.regs = regs;
d315760f 724 math_emulate(&info);
6c1e0256 725 exception_exit(prev_state);
a334fe43 726 return;
7643e9b9 727 }
a334fe43
BG
728#endif
729 math_state_restore(); /* interrupts still off */
730#ifdef CONFIG_X86_32
731 conditional_sti(regs);
081f75bb 732#endif
6c1e0256 733 exception_exit(prev_state);
7643e9b9 734}
9326638c 735NOKPROBE_SYMBOL(do_device_not_available);
7643e9b9 736
081f75bb 737#ifdef CONFIG_X86_32
e407d620 738dotraplinkage void do_iret_error(struct pt_regs *regs, long error_code)
f8e0870f
AH
739{
740 siginfo_t info;
6c1e0256 741 enum ctx_state prev_state;
6ba3c97a 742
6c1e0256 743 prev_state = exception_enter();
f8e0870f
AH
744 local_irq_enable();
745
746 info.si_signo = SIGILL;
747 info.si_errno = 0;
748 info.si_code = ILL_BADSTK;
fc6fcdfb 749 info.si_addr = NULL;
c9408265 750 if (notify_die(DIE_TRAP, "iret exception", regs, error_code,
6ba3c97a
FW
751 X86_TRAP_IRET, SIGILL) != NOTIFY_STOP) {
752 do_trap(X86_TRAP_IRET, SIGILL, "iret exception", regs, error_code,
753 &info);
754 }
6c1e0256 755 exception_exit(prev_state);
f8e0870f 756}
081f75bb 757#endif
f8e0870f 758
29c84391
JK
759/* Set of traps needed for early debugging. */
760void __init early_trap_init(void)
761{
c9408265 762 set_intr_gate_ist(X86_TRAP_DB, &debug, DEBUG_STACK);
29c84391 763 /* int3 can be called from all */
c9408265 764 set_system_intr_gate_ist(X86_TRAP_BP, &int3, DEBUG_STACK);
8170e6be 765#ifdef CONFIG_X86_32
25c74b10 766 set_intr_gate(X86_TRAP_PF, page_fault);
8170e6be 767#endif
29c84391
JK
768 load_idt(&idt_descr);
769}
770
8170e6be
PA
771void __init early_trap_pf_init(void)
772{
773#ifdef CONFIG_X86_64
25c74b10 774 set_intr_gate(X86_TRAP_PF, page_fault);
8170e6be
PA
775#endif
776}
777
1da177e4
LT
778void __init trap_init(void)
779{
dbeb2be2
RR
780 int i;
781
1da177e4 782#ifdef CONFIG_EISA
927222b1 783 void __iomem *p = early_ioremap(0x0FFFD9, 4);
b5964405
IM
784
785 if (readl(p) == 'E' + ('I'<<8) + ('S'<<16) + ('A'<<24))
1da177e4 786 EISA_bus = 1;
927222b1 787 early_iounmap(p, 4);
1da177e4
LT
788#endif
789
25c74b10 790 set_intr_gate(X86_TRAP_DE, divide_error);
c9408265 791 set_intr_gate_ist(X86_TRAP_NMI, &nmi, NMI_STACK);
699d2937 792 /* int4 can be called from all */
c9408265 793 set_system_intr_gate(X86_TRAP_OF, &overflow);
25c74b10
SA
794 set_intr_gate(X86_TRAP_BR, bounds);
795 set_intr_gate(X86_TRAP_UD, invalid_op);
796 set_intr_gate(X86_TRAP_NM, device_not_available);
081f75bb 797#ifdef CONFIG_X86_32
c9408265 798 set_task_gate(X86_TRAP_DF, GDT_ENTRY_DOUBLEFAULT_TSS);
081f75bb 799#else
c9408265 800 set_intr_gate_ist(X86_TRAP_DF, &double_fault, DOUBLEFAULT_STACK);
081f75bb 801#endif
25c74b10
SA
802 set_intr_gate(X86_TRAP_OLD_MF, coprocessor_segment_overrun);
803 set_intr_gate(X86_TRAP_TS, invalid_TSS);
804 set_intr_gate(X86_TRAP_NP, segment_not_present);
c9408265 805 set_intr_gate_ist(X86_TRAP_SS, &stack_segment, STACKFAULT_STACK);
25c74b10
SA
806 set_intr_gate(X86_TRAP_GP, general_protection);
807 set_intr_gate(X86_TRAP_SPURIOUS, spurious_interrupt_bug);
808 set_intr_gate(X86_TRAP_MF, coprocessor_error);
809 set_intr_gate(X86_TRAP_AC, alignment_check);
1da177e4 810#ifdef CONFIG_X86_MCE
c9408265 811 set_intr_gate_ist(X86_TRAP_MC, &machine_check, MCE_STACK);
1da177e4 812#endif
25c74b10 813 set_intr_gate(X86_TRAP_XF, simd_coprocessor_error);
1da177e4 814
bb3f0b59
YL
815 /* Reserve all the builtin and the syscall vector: */
816 for (i = 0; i < FIRST_EXTERNAL_VECTOR; i++)
817 set_bit(i, used_vectors);
818
081f75bb
AH
819#ifdef CONFIG_IA32_EMULATION
820 set_system_intr_gate(IA32_SYSCALL_VECTOR, ia32_syscall);
bb3f0b59 821 set_bit(IA32_SYSCALL_VECTOR, used_vectors);
081f75bb
AH
822#endif
823
824#ifdef CONFIG_X86_32
699d2937 825 set_system_trap_gate(SYSCALL_VECTOR, &system_call);
dbeb2be2 826 set_bit(SYSCALL_VECTOR, used_vectors);
081f75bb 827#endif
bb3f0b59 828
4eefbe79
KC
829 /*
830 * Set the IDT descriptor to a fixed read-only location, so that the
831 * "sidt" instruction will not leak the location of the kernel, and
832 * to defend the IDT against arbitrary memory write vulnerabilities.
833 * It will be reloaded in cpu_init() */
834 __set_fixmap(FIX_RO_IDT, __pa_symbol(idt_table), PAGE_KERNEL_RO);
835 idt_descr.address = fix_to_virt(FIX_RO_IDT);
836
1da177e4 837 /*
b5964405 838 * Should be a barrier for any external CPU state:
1da177e4
LT
839 */
840 cpu_init();
841
428cf902 842 x86_init.irqs.trap_init();
228bdaa9
SR
843
844#ifdef CONFIG_X86_64
629f4f9d 845 memcpy(&debug_idt_table, &idt_table, IDT_ENTRIES * 16);
c9408265
KC
846 set_nmi_gate(X86_TRAP_DB, &debug);
847 set_nmi_gate(X86_TRAP_BP, &int3);
228bdaa9 848#endif
1da177e4 849}