Merge tag 'media/v3.19-4' of git://git.kernel.org/pub/scm/linux/kernel/git/mchehab...
[linux-2.6-block.git] / arch / x86 / kernel / traps.c
CommitLineData
1da177e4 1/*
1da177e4 2 * Copyright (C) 1991, 1992 Linus Torvalds
a8c1be9d 3 * Copyright (C) 2000, 2001, 2002 Andi Kleen, SuSE Labs
1da177e4
LT
4 *
5 * Pentium III FXSR, SSE support
6 * Gareth Hughes <gareth@valinux.com>, May 2000
7 */
8
9/*
c1d518c8 10 * Handle hardware traps and faults.
1da177e4 11 */
c767a54b
JP
12
13#define pr_fmt(fmt) KBUILD_MODNAME ": " fmt
14
56dd9470 15#include <linux/context_tracking.h>
b5964405
IM
16#include <linux/interrupt.h>
17#include <linux/kallsyms.h>
18#include <linux/spinlock.h>
b5964405
IM
19#include <linux/kprobes.h>
20#include <linux/uaccess.h>
b5964405 21#include <linux/kdebug.h>
f503b5ae 22#include <linux/kgdb.h>
1da177e4 23#include <linux/kernel.h>
b5964405
IM
24#include <linux/module.h>
25#include <linux/ptrace.h>
b02ef20a 26#include <linux/uprobes.h>
1da177e4 27#include <linux/string.h>
b5964405 28#include <linux/delay.h>
1da177e4 29#include <linux/errno.h>
b5964405
IM
30#include <linux/kexec.h>
31#include <linux/sched.h>
1da177e4 32#include <linux/timer.h>
1da177e4 33#include <linux/init.h>
91768d6c 34#include <linux/bug.h>
b5964405
IM
35#include <linux/nmi.h>
36#include <linux/mm.h>
c1d518c8
AH
37#include <linux/smp.h>
38#include <linux/io.h>
1da177e4
LT
39
40#ifdef CONFIG_EISA
41#include <linux/ioport.h>
42#include <linux/eisa.h>
43#endif
44
c0d12172
DJ
45#if defined(CONFIG_EDAC)
46#include <linux/edac.h>
47#endif
48
f8561296 49#include <asm/kmemcheck.h>
b5964405 50#include <asm/stacktrace.h>
1da177e4 51#include <asm/processor.h>
1da177e4 52#include <asm/debugreg.h>
60063497 53#include <linux/atomic.h>
08d636b6 54#include <asm/ftrace.h>
c1d518c8 55#include <asm/traps.h>
1da177e4
LT
56#include <asm/desc.h>
57#include <asm/i387.h>
1361b83a 58#include <asm/fpu-internal.h>
9e55e44e 59#include <asm/mce.h>
4eefbe79 60#include <asm/fixmap.h>
1164dd00 61#include <asm/mach_traps.h>
17f41571 62#include <asm/alternative.h>
fe3d197f 63#include <asm/mpx.h>
c1d518c8 64
081f75bb 65#ifdef CONFIG_X86_64
428cf902 66#include <asm/x86_init.h>
081f75bb
AH
67#include <asm/pgalloc.h>
68#include <asm/proto.h>
4df05f36
KC
69
70/* No need to be aligned, but done to keep all IDTs defined the same way. */
71gate_desc debug_idt_table[NR_VECTORS] __page_aligned_bss;
081f75bb 72#else
c1d518c8 73#include <asm/processor-flags.h>
8e6dafd6 74#include <asm/setup.h>
1da177e4 75
1da177e4 76asmlinkage int system_call(void);
081f75bb 77#endif
1da177e4 78
4df05f36
KC
79/* Must be page-aligned because the real IDT is used in a fixmap. */
80gate_desc idt_table[NR_VECTORS] __page_aligned_bss;
81
b77b881f
YL
82DECLARE_BITMAP(used_vectors, NR_VECTORS);
83EXPORT_SYMBOL_GPL(used_vectors);
84
762db434
AH
85static inline void conditional_sti(struct pt_regs *regs)
86{
87 if (regs->flags & X86_EFLAGS_IF)
88 local_irq_enable();
89}
90
3d2a71a5
AH
91static inline void preempt_conditional_sti(struct pt_regs *regs)
92{
bdb43806 93 preempt_count_inc();
3d2a71a5
AH
94 if (regs->flags & X86_EFLAGS_IF)
95 local_irq_enable();
96}
97
be716615
TG
98static inline void conditional_cli(struct pt_regs *regs)
99{
100 if (regs->flags & X86_EFLAGS_IF)
101 local_irq_disable();
102}
103
3d2a71a5
AH
104static inline void preempt_conditional_cli(struct pt_regs *regs)
105{
106 if (regs->flags & X86_EFLAGS_IF)
107 local_irq_disable();
bdb43806 108 preempt_count_dec();
3d2a71a5
AH
109}
110
9326638c 111static nokprobe_inline int
c416ddf5
FW
112do_trap_no_signal(struct task_struct *tsk, int trapnr, char *str,
113 struct pt_regs *regs, long error_code)
1da177e4 114{
081f75bb 115#ifdef CONFIG_X86_32
6b6891f9 116 if (regs->flags & X86_VM_MASK) {
3c1326f8 117 /*
c416ddf5 118 * Traps 0, 1, 3, 4, and 5 should be forwarded to vm86.
3c1326f8
AH
119 * On nmi (interrupt 2), do_trap should not be called.
120 */
c416ddf5
FW
121 if (trapnr < X86_TRAP_UD) {
122 if (!handle_vm86_trap((struct kernel_vm86_regs *) regs,
123 error_code, trapnr))
124 return 0;
125 }
126 return -1;
1da177e4 127 }
081f75bb 128#endif
c416ddf5
FW
129 if (!user_mode(regs)) {
130 if (!fixup_exception(regs)) {
131 tsk->thread.error_code = error_code;
132 tsk->thread.trap_nr = trapnr;
133 die(str, regs, error_code);
134 }
135 return 0;
136 }
1da177e4 137
c416ddf5
FW
138 return -1;
139}
1da177e4 140
1c326c4d
ON
141static siginfo_t *fill_trap_info(struct pt_regs *regs, int signr, int trapnr,
142 siginfo_t *info)
958d3d72
ON
143{
144 unsigned long siaddr;
145 int sicode;
146
147 switch (trapnr) {
1c326c4d
ON
148 default:
149 return SEND_SIG_PRIV;
150
958d3d72
ON
151 case X86_TRAP_DE:
152 sicode = FPE_INTDIV;
b02ef20a 153 siaddr = uprobe_get_trap_addr(regs);
958d3d72
ON
154 break;
155 case X86_TRAP_UD:
156 sicode = ILL_ILLOPN;
b02ef20a 157 siaddr = uprobe_get_trap_addr(regs);
958d3d72
ON
158 break;
159 case X86_TRAP_AC:
160 sicode = BUS_ADRALN;
161 siaddr = 0;
162 break;
163 }
164
165 info->si_signo = signr;
166 info->si_errno = 0;
167 info->si_code = sicode;
168 info->si_addr = (void __user *)siaddr;
1c326c4d 169 return info;
958d3d72
ON
170}
171
9326638c 172static void
c416ddf5
FW
173do_trap(int trapnr, int signr, char *str, struct pt_regs *regs,
174 long error_code, siginfo_t *info)
175{
176 struct task_struct *tsk = current;
177
178
179 if (!do_trap_no_signal(tsk, trapnr, str, regs, error_code))
180 return;
b5964405 181 /*
51e7dc70 182 * We want error_code and trap_nr set for userspace faults and
b5964405
IM
183 * kernelspace faults which result in die(), but not
184 * kernelspace faults which are fixed up. die() gives the
185 * process no chance to handle the signal and notice the
186 * kernel fault information, so that won't result in polluting
187 * the information about previously queued, but not yet
188 * delivered, faults. See also do_general_protection below.
189 */
190 tsk->thread.error_code = error_code;
51e7dc70 191 tsk->thread.trap_nr = trapnr;
d1895183 192
081f75bb
AH
193#ifdef CONFIG_X86_64
194 if (show_unhandled_signals && unhandled_signal(tsk, signr) &&
195 printk_ratelimit()) {
c767a54b
JP
196 pr_info("%s[%d] trap %s ip:%lx sp:%lx error:%lx",
197 tsk->comm, tsk->pid, str,
198 regs->ip, regs->sp, error_code);
081f75bb 199 print_vma_addr(" in ", regs->ip);
c767a54b 200 pr_cont("\n");
081f75bb
AH
201 }
202#endif
203
38cad57b 204 force_sig_info(signr, info ?: SEND_SIG_PRIV, tsk);
1da177e4 205}
9326638c 206NOKPROBE_SYMBOL(do_trap);
1da177e4 207
dff0796e 208static void do_error_trap(struct pt_regs *regs, long error_code, char *str,
1c326c4d 209 unsigned long trapnr, int signr)
dff0796e
ON
210{
211 enum ctx_state prev_state = exception_enter();
1c326c4d 212 siginfo_t info;
dff0796e
ON
213
214 if (notify_die(DIE_TRAP, str, regs, error_code, trapnr, signr) !=
215 NOTIFY_STOP) {
216 conditional_sti(regs);
1c326c4d
ON
217 do_trap(trapnr, signr, str, regs, error_code,
218 fill_trap_info(regs, signr, trapnr, &info));
dff0796e
ON
219 }
220
221 exception_exit(prev_state);
222}
223
b5964405 224#define DO_ERROR(trapnr, signr, str, name) \
e407d620 225dotraplinkage void do_##name(struct pt_regs *regs, long error_code) \
b5964405 226{ \
1c326c4d 227 do_error_trap(regs, error_code, str, trapnr, signr); \
1da177e4
LT
228}
229
0eb14833
ON
230DO_ERROR(X86_TRAP_DE, SIGFPE, "divide error", divide_error)
231DO_ERROR(X86_TRAP_OF, SIGSEGV, "overflow", overflow)
0eb14833
ON
232DO_ERROR(X86_TRAP_UD, SIGILL, "invalid opcode", invalid_op)
233DO_ERROR(X86_TRAP_OLD_MF, SIGFPE, "coprocessor segment overrun",coprocessor_segment_overrun)
234DO_ERROR(X86_TRAP_TS, SIGSEGV, "invalid TSS", invalid_TSS)
235DO_ERROR(X86_TRAP_NP, SIGBUS, "segment not present", segment_not_present)
0eb14833 236DO_ERROR(X86_TRAP_SS, SIGBUS, "stack segment", stack_segment)
0eb14833 237DO_ERROR(X86_TRAP_AC, SIGBUS, "alignment check", alignment_check)
1da177e4 238
081f75bb
AH
239#ifdef CONFIG_X86_64
240/* Runs on IST stack */
081f75bb
AH
241dotraplinkage void do_double_fault(struct pt_regs *regs, long error_code)
242{
243 static const char str[] = "double fault";
244 struct task_struct *tsk = current;
245
af726f21
AL
246#ifdef CONFIG_X86_ESPFIX64
247 extern unsigned char native_irq_return_iret[];
248
249 /*
250 * If IRET takes a non-IST fault on the espfix64 stack, then we
251 * end up promoting it to a doublefault. In that case, modify
252 * the stack to make it look like we just entered the #GP
253 * handler from user space, similar to bad_iret.
254 */
255 if (((long)regs->sp >> PGDIR_SHIFT) == ESPFIX_PGD_ENTRY &&
256 regs->cs == __KERNEL_CS &&
257 regs->ip == (unsigned long)native_irq_return_iret)
258 {
259 struct pt_regs *normal_regs = task_pt_regs(current);
260
261 /* Fake a #GP(0) from userspace. */
262 memmove(&normal_regs->ip, (void *)regs->sp, 5*8);
263 normal_regs->orig_ax = 0; /* Missing (lost) #GP error code */
264 regs->ip = (unsigned long)general_protection;
265 regs->sp = (unsigned long)&normal_regs->orig_ax;
266 return;
267 }
268#endif
269
6c1e0256 270 exception_enter();
081f75bb 271 /* Return not checked because double check cannot be ignored */
c9408265 272 notify_die(DIE_TRAP, str, regs, error_code, X86_TRAP_DF, SIGSEGV);
081f75bb
AH
273
274 tsk->thread.error_code = error_code;
51e7dc70 275 tsk->thread.trap_nr = X86_TRAP_DF;
081f75bb 276
4d067d8e
BP
277#ifdef CONFIG_DOUBLEFAULT
278 df_debug(regs, error_code);
279#endif
bd8b96df
IM
280 /*
281 * This is always a kernel trap and never fixable (and thus must
282 * never return).
283 */
081f75bb
AH
284 for (;;)
285 die(str, regs, error_code);
286}
287#endif
288
fe3d197f
DH
289dotraplinkage void do_bounds(struct pt_regs *regs, long error_code)
290{
291 struct task_struct *tsk = current;
292 struct xsave_struct *xsave_buf;
293 enum ctx_state prev_state;
294 struct bndcsr *bndcsr;
295 siginfo_t *info;
296
297 prev_state = exception_enter();
298 if (notify_die(DIE_TRAP, "bounds", regs, error_code,
299 X86_TRAP_BR, SIGSEGV) == NOTIFY_STOP)
300 goto exit;
301 conditional_sti(regs);
302
303 if (!user_mode(regs))
304 die("bounds", regs, error_code);
305
306 if (!cpu_feature_enabled(X86_FEATURE_MPX)) {
307 /* The exception is not from Intel MPX */
308 goto exit_trap;
309 }
310
311 /*
312 * We need to look at BNDSTATUS to resolve this exception.
313 * It is not directly accessible, though, so we need to
314 * do an xsave and then pull it out of the xsave buffer.
315 */
316 fpu_save_init(&tsk->thread.fpu);
317 xsave_buf = &(tsk->thread.fpu.state->xsave);
318 bndcsr = get_xsave_addr(xsave_buf, XSTATE_BNDCSR);
319 if (!bndcsr)
320 goto exit_trap;
321
322 /*
323 * The error code field of the BNDSTATUS register communicates status
324 * information of a bound range exception #BR or operation involving
325 * bound directory.
326 */
327 switch (bndcsr->bndstatus & MPX_BNDSTA_ERROR_CODE) {
328 case 2: /* Bound directory has invalid entry. */
329 if (mpx_handle_bd_fault(xsave_buf))
330 goto exit_trap;
331 break; /* Success, it was handled */
332 case 1: /* Bound violation. */
333 info = mpx_generate_siginfo(regs, xsave_buf);
e10abb2f 334 if (IS_ERR(info)) {
fe3d197f
DH
335 /*
336 * We failed to decode the MPX instruction. Act as if
337 * the exception was not caused by MPX.
338 */
339 goto exit_trap;
340 }
341 /*
342 * Success, we decoded the instruction and retrieved
343 * an 'info' containing the address being accessed
344 * which caused the exception. This information
345 * allows and application to possibly handle the
346 * #BR exception itself.
347 */
348 do_trap(X86_TRAP_BR, SIGSEGV, "bounds", regs, error_code, info);
349 kfree(info);
350 break;
351 case 0: /* No exception caused by Intel MPX operations. */
352 goto exit_trap;
353 default:
354 die("bounds", regs, error_code);
355 }
356
357exit:
358 exception_exit(prev_state);
359 return;
360exit_trap:
361 /*
362 * This path out is for all the cases where we could not
363 * handle the exception in some way (like allocating a
364 * table or telling userspace about it. We will also end
365 * up here if the kernel has MPX turned off at compile
366 * time..
367 */
368 do_trap(X86_TRAP_BR, SIGSEGV, "bounds", regs, error_code, NULL);
369 exception_exit(prev_state);
370}
371
9326638c 372dotraplinkage void
13485ab5 373do_general_protection(struct pt_regs *regs, long error_code)
1da177e4 374{
13485ab5 375 struct task_struct *tsk;
6c1e0256 376 enum ctx_state prev_state;
b5964405 377
6c1e0256 378 prev_state = exception_enter();
c6df0d71
AH
379 conditional_sti(regs);
380
081f75bb 381#ifdef CONFIG_X86_32
ef3f6288
FW
382 if (regs->flags & X86_VM_MASK) {
383 local_irq_enable();
384 handle_vm86_fault((struct kernel_vm86_regs *) regs, error_code);
6ba3c97a 385 goto exit;
ef3f6288 386 }
081f75bb 387#endif
1da177e4 388
13485ab5 389 tsk = current;
ef3f6288
FW
390 if (!user_mode(regs)) {
391 if (fixup_exception(regs))
6ba3c97a 392 goto exit;
ef3f6288
FW
393
394 tsk->thread.error_code = error_code;
395 tsk->thread.trap_nr = X86_TRAP_GP;
6ba3c97a
FW
396 if (notify_die(DIE_GPF, "general protection fault", regs, error_code,
397 X86_TRAP_GP, SIGSEGV) != NOTIFY_STOP)
ef3f6288 398 die("general protection fault", regs, error_code);
6ba3c97a 399 goto exit;
ef3f6288 400 }
1da177e4 401
13485ab5 402 tsk->thread.error_code = error_code;
51e7dc70 403 tsk->thread.trap_nr = X86_TRAP_GP;
b5964405 404
13485ab5
AH
405 if (show_unhandled_signals && unhandled_signal(tsk, SIGSEGV) &&
406 printk_ratelimit()) {
c767a54b 407 pr_info("%s[%d] general protection ip:%lx sp:%lx error:%lx",
13485ab5
AH
408 tsk->comm, task_pid_nr(tsk),
409 regs->ip, regs->sp, error_code);
03252919 410 print_vma_addr(" in ", regs->ip);
c767a54b 411 pr_cont("\n");
03252919 412 }
abd4f750 413
38cad57b 414 force_sig_info(SIGSEGV, SEND_SIG_PRIV, tsk);
6ba3c97a 415exit:
6c1e0256 416 exception_exit(prev_state);
1da177e4 417}
9326638c 418NOKPROBE_SYMBOL(do_general_protection);
1da177e4 419
c1d518c8 420/* May run on IST stack. */
9326638c 421dotraplinkage void notrace do_int3(struct pt_regs *regs, long error_code)
1da177e4 422{
6c1e0256
FW
423 enum ctx_state prev_state;
424
08d636b6 425#ifdef CONFIG_DYNAMIC_FTRACE
a192cd04
SR
426 /*
427 * ftrace must be first, everything else may cause a recursive crash.
428 * See note by declaration of modifying_ftrace_code in ftrace.c
429 */
430 if (unlikely(atomic_read(&modifying_ftrace_code)) &&
431 ftrace_int3_handler(regs))
08d636b6
SR
432 return;
433#endif
17f41571
JK
434 if (poke_int3_handler(regs))
435 return;
436
4cdf77a8 437 prev_state = exception_enter();
f503b5ae 438#ifdef CONFIG_KGDB_LOW_LEVEL_TRAP
c9408265
KC
439 if (kgdb_ll_trap(DIE_INT3, "int3", regs, error_code, X86_TRAP_BP,
440 SIGTRAP) == NOTIFY_STOP)
6ba3c97a 441 goto exit;
f503b5ae 442#endif /* CONFIG_KGDB_LOW_LEVEL_TRAP */
cc3a1bf5 443
6f6343f5
MH
444#ifdef CONFIG_KPROBES
445 if (kprobe_int3_handler(regs))
4cdf77a8 446 goto exit;
6f6343f5
MH
447#endif
448
c9408265
KC
449 if (notify_die(DIE_INT3, "int3", regs, error_code, X86_TRAP_BP,
450 SIGTRAP) == NOTIFY_STOP)
6ba3c97a 451 goto exit;
b5964405 452
42181186
SR
453 /*
454 * Let others (NMI) know that the debug stack is in use
455 * as we may switch to the interrupt stack.
456 */
457 debug_stack_usage_inc();
4915a35e 458 preempt_conditional_sti(regs);
c9408265 459 do_trap(X86_TRAP_BP, SIGTRAP, "int3", regs, error_code, NULL);
4915a35e 460 preempt_conditional_cli(regs);
42181186 461 debug_stack_usage_dec();
6ba3c97a 462exit:
6c1e0256 463 exception_exit(prev_state);
1da177e4 464}
9326638c 465NOKPROBE_SYMBOL(do_int3);
1da177e4 466
081f75bb 467#ifdef CONFIG_X86_64
bd8b96df
IM
468/*
469 * Help handler running on IST stack to switch back to user stack
470 * for scheduling or signal handling. The actual stack switch is done in
471 * entry.S
472 */
7ddc6a21 473asmlinkage __visible notrace struct pt_regs *sync_regs(struct pt_regs *eregs)
081f75bb
AH
474{
475 struct pt_regs *regs = eregs;
476 /* Did already sync */
477 if (eregs == (struct pt_regs *)eregs->sp)
478 ;
479 /* Exception from user space */
480 else if (user_mode(eregs))
481 regs = task_pt_regs(current);
bd8b96df
IM
482 /*
483 * Exception from kernel and interrupts are enabled. Move to
484 * kernel process stack.
485 */
081f75bb
AH
486 else if (eregs->flags & X86_EFLAGS_IF)
487 regs = (struct pt_regs *)(eregs->sp -= sizeof(struct pt_regs));
488 if (eregs != regs)
489 *regs = *eregs;
490 return regs;
491}
9326638c 492NOKPROBE_SYMBOL(sync_regs);
b645af2d
AL
493
494struct bad_iret_stack {
495 void *error_entry_ret;
496 struct pt_regs regs;
497};
498
7ddc6a21 499asmlinkage __visible notrace
b645af2d
AL
500struct bad_iret_stack *fixup_bad_iret(struct bad_iret_stack *s)
501{
502 /*
503 * This is called from entry_64.S early in handling a fault
504 * caused by a bad iret to user mode. To handle the fault
505 * correctly, we want move our stack frame to task_pt_regs
506 * and we want to pretend that the exception came from the
507 * iret target.
508 */
509 struct bad_iret_stack *new_stack =
510 container_of(task_pt_regs(current),
511 struct bad_iret_stack, regs);
512
513 /* Copy the IRET target to the new stack. */
514 memmove(&new_stack->regs.ip, (void *)s->regs.sp, 5*8);
515
516 /* Copy the remainder of the stack from the current stack. */
517 memmove(new_stack, s, offsetof(struct bad_iret_stack, regs.ip));
518
519 BUG_ON(!user_mode_vm(&new_stack->regs));
520 return new_stack;
521}
7ddc6a21 522NOKPROBE_SYMBOL(fixup_bad_iret);
081f75bb
AH
523#endif
524
1da177e4
LT
525/*
526 * Our handling of the processor debug registers is non-trivial.
527 * We do not clear them on entry and exit from the kernel. Therefore
528 * it is possible to get a watchpoint trap here from inside the kernel.
529 * However, the code in ./ptrace.c has ensured that the user can
530 * only set watchpoints on userspace addresses. Therefore the in-kernel
531 * watchpoint trap can only occur in code which is reading/writing
532 * from user space. Such code must not hold kernel locks (since it
533 * can equally take a page fault), therefore it is safe to call
534 * force_sig_info even though that claims and releases locks.
b5964405 535 *
1da177e4
LT
536 * Code in ./signal.c ensures that the debug control register
537 * is restored before we deliver any signal, and therefore that
538 * user code runs with the correct debug control register even though
539 * we clear it here.
540 *
541 * Being careful here means that we don't have to be as careful in a
542 * lot of more complicated places (task switching can be a bit lazy
543 * about restoring all the debug state, and ptrace doesn't have to
544 * find every occurrence of the TF bit that could be saved away even
545 * by user code)
c1d518c8
AH
546 *
547 * May run on IST stack.
1da177e4 548 */
9326638c 549dotraplinkage void do_debug(struct pt_regs *regs, long error_code)
1da177e4 550{
1da177e4 551 struct task_struct *tsk = current;
6c1e0256 552 enum ctx_state prev_state;
a1e80faf 553 int user_icebp = 0;
08d68323 554 unsigned long dr6;
da654b74 555 int si_code;
1da177e4 556
4cdf77a8
MH
557 prev_state = exception_enter();
558
08d68323 559 get_debugreg(dr6, 6);
1da177e4 560
40f9249a
P
561 /* Filter out all the reserved bits which are preset to 1 */
562 dr6 &= ~DR6_RESERVED;
563
a1e80faf
FW
564 /*
565 * If dr6 has no reason to give us about the origin of this trap,
566 * then it's very likely the result of an icebp/int01 trap.
567 * User wants a sigtrap for that.
568 */
569 if (!dr6 && user_mode(regs))
570 user_icebp = 1;
571
f8561296 572 /* Catch kmemcheck conditions first of all! */
eadb8a09 573 if ((dr6 & DR_STEP) && kmemcheck_trap(regs))
6ba3c97a 574 goto exit;
f8561296 575
08d68323
P
576 /* DR6 may or may not be cleared by the CPU */
577 set_debugreg(0, 6);
10faa81e 578
ea8e61b7
PZ
579 /*
580 * The processor cleared BTF, so don't mark that we need it set.
581 */
582 clear_tsk_thread_flag(tsk, TIF_BLOCKSTEP);
583
08d68323
P
584 /* Store the virtualized DR6 value */
585 tsk->thread.debugreg6 = dr6;
586
6f6343f5
MH
587#ifdef CONFIG_KPROBES
588 if (kprobe_debug_handler(regs))
589 goto exit;
590#endif
591
5a802e15 592 if (notify_die(DIE_DEBUG, "debug", regs, (long)&dr6, error_code,
62edab90 593 SIGTRAP) == NOTIFY_STOP)
6ba3c97a 594 goto exit;
3d2a71a5 595
42181186
SR
596 /*
597 * Let others (NMI) know that the debug stack is in use
598 * as we may switch to the interrupt stack.
599 */
600 debug_stack_usage_inc();
601
1da177e4 602 /* It's safe to allow irq's after DR6 has been saved */
3d2a71a5 603 preempt_conditional_sti(regs);
1da177e4 604
08d68323 605 if (regs->flags & X86_VM_MASK) {
c9408265
KC
606 handle_vm86_trap((struct kernel_vm86_regs *) regs, error_code,
607 X86_TRAP_DB);
6554287b 608 preempt_conditional_cli(regs);
42181186 609 debug_stack_usage_dec();
6ba3c97a 610 goto exit;
1da177e4
LT
611 }
612
1da177e4 613 /*
08d68323
P
614 * Single-stepping through system calls: ignore any exceptions in
615 * kernel space, but re-enable TF when returning to user mode.
616 *
617 * We already checked v86 mode above, so we can check for kernel mode
618 * by just checking the CPL of CS.
1da177e4 619 */
08d68323
P
620 if ((dr6 & DR_STEP) && !user_mode(regs)) {
621 tsk->thread.debugreg6 &= ~DR_STEP;
622 set_tsk_thread_flag(tsk, TIF_SINGLESTEP);
623 regs->flags &= ~X86_EFLAGS_TF;
1da177e4 624 }
08d68323 625 si_code = get_si_code(tsk->thread.debugreg6);
a1e80faf 626 if (tsk->thread.debugreg6 & (DR_STEP | DR_TRAP_BITS) || user_icebp)
08d68323 627 send_sigtrap(tsk, regs, error_code, si_code);
3d2a71a5 628 preempt_conditional_cli(regs);
42181186 629 debug_stack_usage_dec();
1da177e4 630
6ba3c97a 631exit:
6c1e0256 632 exception_exit(prev_state);
1da177e4 633}
9326638c 634NOKPROBE_SYMBOL(do_debug);
1da177e4
LT
635
636/*
637 * Note that we play around with the 'TS' bit in an attempt to get
638 * the correct behaviour even in the presence of the asynchronous
639 * IRQ13 behaviour
640 */
5e1b05be 641static void math_error(struct pt_regs *regs, int error_code, int trapnr)
1da177e4 642{
e2e75c91 643 struct task_struct *task = current;
1da177e4 644 siginfo_t info;
9b6dba9e 645 unsigned short err;
c9408265
KC
646 char *str = (trapnr == X86_TRAP_MF) ? "fpu exception" :
647 "simd exception";
e2e75c91
BG
648
649 if (notify_die(DIE_TRAP, str, regs, error_code, trapnr, SIGFPE) == NOTIFY_STOP)
650 return;
651 conditional_sti(regs);
652
653 if (!user_mode_vm(regs))
654 {
655 if (!fixup_exception(regs)) {
656 task->thread.error_code = error_code;
51e7dc70 657 task->thread.trap_nr = trapnr;
e2e75c91
BG
658 die(str, regs, error_code);
659 }
660 return;
661 }
1da177e4
LT
662
663 /*
664 * Save the info for the exception handler and clear the error.
665 */
1da177e4 666 save_init_fpu(task);
51e7dc70 667 task->thread.trap_nr = trapnr;
9b6dba9e 668 task->thread.error_code = error_code;
1da177e4
LT
669 info.si_signo = SIGFPE;
670 info.si_errno = 0;
b02ef20a 671 info.si_addr = (void __user *)uprobe_get_trap_addr(regs);
c9408265 672 if (trapnr == X86_TRAP_MF) {
9b6dba9e
BG
673 unsigned short cwd, swd;
674 /*
675 * (~cwd & swd) will mask out exceptions that are not set to unmasked
676 * status. 0x3f is the exception bits in these regs, 0x200 is the
677 * C1 reg you need in case of a stack fault, 0x040 is the stack
678 * fault bit. We should only be taking one exception at a time,
679 * so if this combination doesn't produce any single exception,
680 * then we have a bad program that isn't synchronizing its FPU usage
681 * and it will suffer the consequences since we won't be able to
682 * fully reproduce the context of the exception
683 */
684 cwd = get_fpu_cwd(task);
685 swd = get_fpu_swd(task);
adf77bac 686
9b6dba9e
BG
687 err = swd & ~cwd;
688 } else {
689 /*
690 * The SIMD FPU exceptions are handled a little differently, as there
691 * is only a single status/control register. Thus, to determine which
692 * unmasked exception was caught we must mask the exception mask bits
693 * at 0x1f80, and then use these to mask the exception bits at 0x3f.
694 */
695 unsigned short mxcsr = get_fpu_mxcsr(task);
696 err = ~(mxcsr >> 7) & mxcsr;
697 }
adf77bac
PA
698
699 if (err & 0x001) { /* Invalid op */
b5964405
IM
700 /*
701 * swd & 0x240 == 0x040: Stack Underflow
702 * swd & 0x240 == 0x240: Stack Overflow
703 * User must clear the SF bit (0x40) if set
704 */
705 info.si_code = FPE_FLTINV;
adf77bac 706 } else if (err & 0x004) { /* Divide by Zero */
b5964405 707 info.si_code = FPE_FLTDIV;
adf77bac 708 } else if (err & 0x008) { /* Overflow */
b5964405 709 info.si_code = FPE_FLTOVF;
adf77bac
PA
710 } else if (err & 0x012) { /* Denormal, Underflow */
711 info.si_code = FPE_FLTUND;
712 } else if (err & 0x020) { /* Precision */
b5964405 713 info.si_code = FPE_FLTRES;
adf77bac 714 } else {
bd8b96df 715 /*
c9408265
KC
716 * If we're using IRQ 13, or supposedly even some trap
717 * X86_TRAP_MF implementations, it's possible
718 * we get a spurious trap, which is not an error.
bd8b96df 719 */
c9408265 720 return;
1da177e4
LT
721 }
722 force_sig_info(SIGFPE, &info, task);
723}
724
e407d620 725dotraplinkage void do_coprocessor_error(struct pt_regs *regs, long error_code)
1da177e4 726{
6c1e0256
FW
727 enum ctx_state prev_state;
728
729 prev_state = exception_enter();
c9408265 730 math_error(regs, error_code, X86_TRAP_MF);
6c1e0256 731 exception_exit(prev_state);
1da177e4
LT
732}
733
e407d620
AH
734dotraplinkage void
735do_simd_coprocessor_error(struct pt_regs *regs, long error_code)
1da177e4 736{
6c1e0256
FW
737 enum ctx_state prev_state;
738
739 prev_state = exception_enter();
c9408265 740 math_error(regs, error_code, X86_TRAP_XF);
6c1e0256 741 exception_exit(prev_state);
1da177e4
LT
742}
743
e407d620
AH
744dotraplinkage void
745do_spurious_interrupt_bug(struct pt_regs *regs, long error_code)
1da177e4 746{
cf81978d 747 conditional_sti(regs);
1da177e4
LT
748#if 0
749 /* No need to warn about this any longer. */
c767a54b 750 pr_info("Ignoring P6 Local APIC Spurious Interrupt Bug...\n");
1da177e4
LT
751#endif
752}
753
2605fc21 754asmlinkage __visible void __attribute__((weak)) smp_thermal_interrupt(void)
1da177e4 755{
1da177e4 756}
4efc0670 757
2605fc21 758asmlinkage __visible void __attribute__((weak)) smp_threshold_interrupt(void)
081f75bb
AH
759{
760}
761
1da177e4 762/*
b5964405 763 * 'math_state_restore()' saves the current math information in the
1da177e4
LT
764 * old math state array, and gets the new ones from the current task
765 *
766 * Careful.. There are problems with IBM-designed IRQ13 behaviour.
767 * Don't touch unless you *really* know how it works.
768 *
be98c2cd
LT
769 * Must be called with kernel preemption disabled (eg with local
770 * local interrupts as in the case of do_device_not_available).
1da177e4 771 */
be98c2cd 772void math_state_restore(void)
1da177e4 773{
f94edacf 774 struct task_struct *tsk = current;
1da177e4 775
aa283f49
SS
776 if (!tsk_used_math(tsk)) {
777 local_irq_enable();
778 /*
779 * does a slab alloc which can sleep
780 */
781 if (init_fpu(tsk)) {
782 /*
783 * ran out of memory!
784 */
785 do_group_exit(SIGKILL);
786 return;
787 }
788 local_irq_disable();
789 }
790
f94edacf 791 __thread_fpu_begin(tsk);
304bceda 792
80ab6f1e
LT
793 /*
794 * Paranoid restore. send a SIGSEGV if we fail to restore the state.
795 */
796 if (unlikely(restore_fpu_checking(tsk))) {
304bceda 797 drop_init_fpu(tsk);
38cad57b 798 force_sig_info(SIGSEGV, SEND_SIG_PRIV, tsk);
80ab6f1e
LT
799 return;
800 }
b3b0870e 801
c375f15a 802 tsk->thread.fpu_counter++;
1da177e4 803}
5992b6da 804EXPORT_SYMBOL_GPL(math_state_restore);
1da177e4 805
9326638c 806dotraplinkage void
aa78bcfa 807do_device_not_available(struct pt_regs *regs, long error_code)
7643e9b9 808{
6c1e0256
FW
809 enum ctx_state prev_state;
810
811 prev_state = exception_enter();
5d2bd700 812 BUG_ON(use_eager_fpu());
304bceda 813
a334fe43 814#ifdef CONFIG_MATH_EMULATION
7643e9b9 815 if (read_cr0() & X86_CR0_EM) {
d315760f
TH
816 struct math_emu_info info = { };
817
7643e9b9 818 conditional_sti(regs);
d315760f 819
aa78bcfa 820 info.regs = regs;
d315760f 821 math_emulate(&info);
6c1e0256 822 exception_exit(prev_state);
a334fe43 823 return;
7643e9b9 824 }
a334fe43
BG
825#endif
826 math_state_restore(); /* interrupts still off */
827#ifdef CONFIG_X86_32
828 conditional_sti(regs);
081f75bb 829#endif
6c1e0256 830 exception_exit(prev_state);
7643e9b9 831}
9326638c 832NOKPROBE_SYMBOL(do_device_not_available);
7643e9b9 833
081f75bb 834#ifdef CONFIG_X86_32
e407d620 835dotraplinkage void do_iret_error(struct pt_regs *regs, long error_code)
f8e0870f
AH
836{
837 siginfo_t info;
6c1e0256 838 enum ctx_state prev_state;
6ba3c97a 839
6c1e0256 840 prev_state = exception_enter();
f8e0870f
AH
841 local_irq_enable();
842
843 info.si_signo = SIGILL;
844 info.si_errno = 0;
845 info.si_code = ILL_BADSTK;
fc6fcdfb 846 info.si_addr = NULL;
c9408265 847 if (notify_die(DIE_TRAP, "iret exception", regs, error_code,
6ba3c97a
FW
848 X86_TRAP_IRET, SIGILL) != NOTIFY_STOP) {
849 do_trap(X86_TRAP_IRET, SIGILL, "iret exception", regs, error_code,
850 &info);
851 }
6c1e0256 852 exception_exit(prev_state);
f8e0870f 853}
081f75bb 854#endif
f8e0870f 855
29c84391
JK
856/* Set of traps needed for early debugging. */
857void __init early_trap_init(void)
858{
c9408265 859 set_intr_gate_ist(X86_TRAP_DB, &debug, DEBUG_STACK);
29c84391 860 /* int3 can be called from all */
c9408265 861 set_system_intr_gate_ist(X86_TRAP_BP, &int3, DEBUG_STACK);
8170e6be 862#ifdef CONFIG_X86_32
25c74b10 863 set_intr_gate(X86_TRAP_PF, page_fault);
8170e6be 864#endif
29c84391
JK
865 load_idt(&idt_descr);
866}
867
8170e6be
PA
868void __init early_trap_pf_init(void)
869{
870#ifdef CONFIG_X86_64
25c74b10 871 set_intr_gate(X86_TRAP_PF, page_fault);
8170e6be
PA
872#endif
873}
874
1da177e4
LT
875void __init trap_init(void)
876{
dbeb2be2
RR
877 int i;
878
1da177e4 879#ifdef CONFIG_EISA
927222b1 880 void __iomem *p = early_ioremap(0x0FFFD9, 4);
b5964405
IM
881
882 if (readl(p) == 'E' + ('I'<<8) + ('S'<<16) + ('A'<<24))
1da177e4 883 EISA_bus = 1;
927222b1 884 early_iounmap(p, 4);
1da177e4
LT
885#endif
886
25c74b10 887 set_intr_gate(X86_TRAP_DE, divide_error);
c9408265 888 set_intr_gate_ist(X86_TRAP_NMI, &nmi, NMI_STACK);
699d2937 889 /* int4 can be called from all */
c9408265 890 set_system_intr_gate(X86_TRAP_OF, &overflow);
25c74b10
SA
891 set_intr_gate(X86_TRAP_BR, bounds);
892 set_intr_gate(X86_TRAP_UD, invalid_op);
893 set_intr_gate(X86_TRAP_NM, device_not_available);
081f75bb 894#ifdef CONFIG_X86_32
c9408265 895 set_task_gate(X86_TRAP_DF, GDT_ENTRY_DOUBLEFAULT_TSS);
081f75bb 896#else
c9408265 897 set_intr_gate_ist(X86_TRAP_DF, &double_fault, DOUBLEFAULT_STACK);
081f75bb 898#endif
25c74b10
SA
899 set_intr_gate(X86_TRAP_OLD_MF, coprocessor_segment_overrun);
900 set_intr_gate(X86_TRAP_TS, invalid_TSS);
901 set_intr_gate(X86_TRAP_NP, segment_not_present);
6f442be2 902 set_intr_gate(X86_TRAP_SS, stack_segment);
25c74b10
SA
903 set_intr_gate(X86_TRAP_GP, general_protection);
904 set_intr_gate(X86_TRAP_SPURIOUS, spurious_interrupt_bug);
905 set_intr_gate(X86_TRAP_MF, coprocessor_error);
906 set_intr_gate(X86_TRAP_AC, alignment_check);
1da177e4 907#ifdef CONFIG_X86_MCE
c9408265 908 set_intr_gate_ist(X86_TRAP_MC, &machine_check, MCE_STACK);
1da177e4 909#endif
25c74b10 910 set_intr_gate(X86_TRAP_XF, simd_coprocessor_error);
1da177e4 911
bb3f0b59
YL
912 /* Reserve all the builtin and the syscall vector: */
913 for (i = 0; i < FIRST_EXTERNAL_VECTOR; i++)
914 set_bit(i, used_vectors);
915
081f75bb
AH
916#ifdef CONFIG_IA32_EMULATION
917 set_system_intr_gate(IA32_SYSCALL_VECTOR, ia32_syscall);
bb3f0b59 918 set_bit(IA32_SYSCALL_VECTOR, used_vectors);
081f75bb
AH
919#endif
920
921#ifdef CONFIG_X86_32
699d2937 922 set_system_trap_gate(SYSCALL_VECTOR, &system_call);
dbeb2be2 923 set_bit(SYSCALL_VECTOR, used_vectors);
081f75bb 924#endif
bb3f0b59 925
4eefbe79
KC
926 /*
927 * Set the IDT descriptor to a fixed read-only location, so that the
928 * "sidt" instruction will not leak the location of the kernel, and
929 * to defend the IDT against arbitrary memory write vulnerabilities.
930 * It will be reloaded in cpu_init() */
931 __set_fixmap(FIX_RO_IDT, __pa_symbol(idt_table), PAGE_KERNEL_RO);
932 idt_descr.address = fix_to_virt(FIX_RO_IDT);
933
1da177e4 934 /*
b5964405 935 * Should be a barrier for any external CPU state:
1da177e4
LT
936 */
937 cpu_init();
938
428cf902 939 x86_init.irqs.trap_init();
228bdaa9
SR
940
941#ifdef CONFIG_X86_64
629f4f9d 942 memcpy(&debug_idt_table, &idt_table, IDT_ENTRIES * 16);
c9408265
KC
943 set_nmi_gate(X86_TRAP_DB, &debug);
944 set_nmi_gate(X86_TRAP_BP, &int3);
228bdaa9 945#endif
1da177e4 946}