[linux-2.6-block.git] / arch / x86 / kernel / time.c

// SPDX-License-Identifier: GPL-2.0
/*
 *  Copyright (c) 1991,1992,1995  Linus Torvalds
 *  Copyright (c) 1994  Alan Modra
 *  Copyright (c) 1995  Markus Kuhn
 *  Copyright (c) 1996  Ingo Molnar
 *  Copyright (c) 1998  Andrea Arcangeli
 *  Copyright (c) 2002,2006  Vojtech Pavlik
 *  Copyright (c) 2003  Andi Kleen
 *
 */

#include <linux/clockchips.h>
#include <linux/interrupt.h>
#include <linux/i8253.h>
#include <linux/time.h>
#include <linux/export.h>

#include <asm/vsyscall.h>
#include <asm/x86_init.h>
#include <asm/i8259.h>
#include <asm/timer.h>
#include <asm/hpet.h>
#include <asm/time.h>

#ifdef CONFIG_X86_64
__visible volatile unsigned long jiffies __cacheline_aligned = INITIAL_JIFFIES;
#endif

unsigned long profile_pc(struct pt_regs *regs)
{
	unsigned long pc = instruction_pointer(regs);

	if (!user_mode(regs) && in_lock_functions(pc)) {
#ifdef CONFIG_FRAME_POINTER
		return *(unsigned long *)(regs->bp + sizeof(long));
#else
		unsigned long *sp =
			(unsigned long *)kernel_stack_pointer(regs);
		/*
		 * Return address is either directly at stack pointer
		 * or above a saved flags. Eflags has bits 22-31 zero,
		 * kernel addresses don't.
		 */
		if (sp[0] >> 22)
			return sp[0];
		if (sp[1] >> 22)
			return sp[1];
#endif
	}
	return pc;
}
EXPORT_SYMBOL(profile_pc);

/*
 * Default timer interrupt handler for PIT/HPET
 */
static irqreturn_t timer_interrupt(int irq, void *dev_id)
{
	global_clock_event->event_handler(global_clock_event);
	return IRQ_HANDLED;
}

static struct irqaction irq0  = {
	.handler = timer_interrupt,
	.flags = IRQF_NOBALANCING | IRQF_IRQPOLL | IRQF_TIMER,
	.name = "timer"
};

static void __init setup_default_timer_irq(void)
{
	/*
	 * Unconditionally register the legacy timer; even without legacy
	 * PIC/PIT we need this for the HPET0 in legacy replacement mode.
	 */
	if (setup_irq(0, &irq0))
		pr_info("Failed to register legacy timer interrupt\n");
}

/* Default timer init function */
void __init hpet_time_init(void)
{
	if (!hpet_enable())
		setup_pit_timer();
	setup_default_timer_irq();
}

static __init void x86_late_time_init(void)
{
	x86_init.timers.timer_init();
	/*
	 * After PIT/HPET timers init, select and setup
	 * the final interrupt mode for delivering IRQs.
	 */
	x86_init.irqs.intr_mode_init();
	tsc_init();
}

/*
 * Initialize TSC and delay the periodic timer init to
 * late x86_late_time_init() so ioremap works.
 */
void __init time_init(void)
{
	late_time_init = x86_late_time_init;
}
Commit	Line	Data
b2441318	1	// SPDX-License-Identifier: GPL-2.0
1da177e4	2	/*
dd3e6e8c TG	3	* Copyright (c) 1991,1992,1995 Linus Torvalds
	4	* Copyright (c) 1994 Alan Modra
	5	* Copyright (c) 1995 Markus Kuhn
	6	* Copyright (c) 1996 Ingo Molnar
	7	* Copyright (c) 1998 Andrea Arcangeli
	8	* Copyright (c) 2002,2006 Vojtech Pavlik
	9	* Copyright (c) 2003 Andi Kleen
1da177e4	10	*
1da177e4 LT	11	*/
1da177e4 LT	12
ecce8508	13	#include <linux/clockchips.h>
1da177e4	14	#include <linux/interrupt.h>
334955ef	15	#include <linux/i8253.h>
1da177e4	16	#include <linux/time.h>
69c60c88	17	#include <linux/export.h>
1da177e4	18
dd3e6e8c TG	19	#include <asm/vsyscall.h>
dd3e6e8c TG	20	#include <asm/x86_init.h>
ecce8508	21	#include <asm/i8259.h>
dd3e6e8c TG	22	#include <asm/timer.h>
	23	#include <asm/hpet.h>
	24	#include <asm/time.h>
1da177e4	25
454ede7e	26	#ifdef CONFIG_X86_64
61a492fb	27	__visible volatile unsigned long jiffies __cacheline_aligned = INITIAL_JIFFIES;
454ede7e TG	28	#endif
454ede7e TG	29
1da177e4 LT	30	unsigned long profile_pc(struct pt_regs *regs)
	31	{
	32	unsigned long pc = instruction_pointer(regs);
	33
f39b6f0e	34	if (!user_mode(regs) && in_lock_functions(pc)) {
0cb91a22	35	#ifdef CONFIG_FRAME_POINTER
2c460d0b	36	return (unsigned long )(regs->bp + sizeof(long));
0cb91a22	37	#else
d1705c55 PA	38	unsigned long *sp =
d1705c55 PA	39	(unsigned long *)kernel_stack_pointer(regs);
ef451288 TG	40	/*
	41	* Return address is either directly at stack pointer
	42	* or above a saved flags. Eflags has bits 22-31 zero,
	43	* kernel addresses don't.
	44	*/
fe599f9f	45	if (sp[0] >> 22)
0cb91a22 AK	46	return sp[0];
	47	if (sp[1] >> 22)
	48	return sp[1];
	49	#endif
	50	}
1da177e4 LT	51	return pc;
	52	}
	53	EXPORT_SYMBOL(profile_pc);
1da177e4 LT	54
1da177e4 LT	55	/*
454ede7e	56	* Default timer interrupt handler for PIT/HPET
1da177e4	57	*/
845b3944	58	static irqreturn_t timer_interrupt(int irq, void *dev_id)
1da177e4	59	{
ecce8508	60	global_clock_event->event_handler(global_clock_event);
1da177e4 LT	61	return IRQ_HANDLED;
	62	}
	63
845b3944 TG	64	static struct irqaction irq0 = {
845b3944 TG	65	.handler = timer_interrupt,
d20d2efb	66	.flags = IRQF_NOBALANCING \| IRQF_IRQPOLL \| IRQF_TIMER,
845b3944 TG	67	.name = "timer"
	68	};
	69
b1b4f2fe	70	static void __init setup_default_timer_irq(void)
845b3944	71	{
6d671e1b PZ	72	/*
	73	* Unconditionally register the legacy timer; even without legacy
	74	* PIC/PIT we need this for the HPET0 in legacy replacement mode.
	75	*/
	76	if (setup_irq(0, &irq0))
	77	pr_info("Failed to register legacy timer interrupt\n");
845b3944 TG	78	}
	79
	80	/* Default timer init function */
e30fab3a	81	void __init hpet_time_init(void)
1da177e4	82	{
e9e2cdb4 TG	83	if (!hpet_enable())
e9e2cdb4 TG	84	setup_pit_timer();
845b3944 TG	85	setup_default_timer_irq();
	86	}
	87
54e2603f	88	static __init void x86_late_time_init(void)
845b3944 TG	89	{
845b3944 TG	90	x86_init.timers.timer_init();
935356ce DL	91	/*
	92	* After PIT/HPET timers init, select and setup
	93	* the final interrupt mode for delivering IRQs.
	94	*/
	95	x86_init.irqs.intr_mode_init();
dd0a70c8	96	tsc_init();
1da177e4	97	}
1da177e4	98
e30fab3a	99	/*
845b3944 TG	100	* Initialize TSC and delay the periodic timer init to
845b3944 TG	101	* late x86_late_time_init() so ioremap works.
e30fab3a	102	*/
1da177e4 LT	103	void __init time_init(void)
1da177e4 LT	104	{
845b3944	105	late_time_init = x86_late_time_init;
1da177e4	106	}