Commit | Line | Data |
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1da177e4 LT |
1 | /* |
2 | * X86-64 specific CPU setup. | |
3 | * Copyright (C) 1995 Linus Torvalds | |
4 | * Copyright 2001, 2002, 2003 SuSE Labs / Andi Kleen. | |
5 | * See setup.c for older changelog. | |
1da177e4 | 6 | */ |
1da177e4 LT |
7 | #include <linux/init.h> |
8 | #include <linux/kernel.h> | |
9 | #include <linux/sched.h> | |
10 | #include <linux/string.h> | |
11 | #include <linux/bootmem.h> | |
12 | #include <linux/bitops.h> | |
a940199f | 13 | #include <linux/module.h> |
1da177e4 LT |
14 | #include <asm/pda.h> |
15 | #include <asm/pgtable.h> | |
16 | #include <asm/processor.h> | |
17 | #include <asm/desc.h> | |
18 | #include <asm/atomic.h> | |
19 | #include <asm/mmu_context.h> | |
20 | #include <asm/smp.h> | |
21 | #include <asm/i387.h> | |
22 | #include <asm/percpu.h> | |
1da177e4 | 23 | #include <asm/proto.h> |
a940199f | 24 | #include <asm/sections.h> |
30c82645 | 25 | #include <asm/setup.h> |
1da177e4 | 26 | |
6d7d7433 | 27 | #ifndef CONFIG_DEBUG_BOOT_PARAMS |
30c82645 | 28 | struct boot_params __initdata boot_params; |
6d7d7433 HY |
29 | #else |
30 | struct boot_params boot_params; | |
31 | #endif | |
1da177e4 | 32 | |
e6982c67 | 33 | cpumask_t cpu_initialized __cpuinitdata = CPU_MASK_NONE; |
1da177e4 | 34 | |
365ba917 | 35 | struct x8664_pda *_cpu_pda[NR_CPUS] __read_mostly; |
2ee60e17 | 36 | EXPORT_SYMBOL(_cpu_pda); |
365ba917 | 37 | struct x8664_pda boot_cpu_pda[NR_CPUS] __cacheline_aligned; |
1da177e4 | 38 | |
e57113bc | 39 | struct desc_ptr idt_descr = { 256 * 16 - 1, (unsigned long) idt_table }; |
1da177e4 LT |
40 | |
41 | char boot_cpu_stack[IRQSTACKSIZE] __attribute__((section(".bss.page_aligned"))); | |
42 | ||
6c231b7b | 43 | unsigned long __supported_pte_mask __read_mostly = ~0UL; |
142a64a6 | 44 | static int do_not_nx __cpuinitdata = 0; |
1da177e4 LT |
45 | |
46 | /* noexec=on|off | |
47 | Control non executable mappings for 64bit processes. | |
48 | ||
49 | on Enable(default) | |
50 | off Disable | |
51 | */ | |
2c8c0e6b | 52 | static int __init nonx_setup(char *str) |
1da177e4 | 53 | { |
2c8c0e6b AK |
54 | if (!str) |
55 | return -EINVAL; | |
1da177e4 LT |
56 | if (!strncmp(str, "on", 2)) { |
57 | __supported_pte_mask |= _PAGE_NX; | |
58 | do_not_nx = 0; | |
59 | } else if (!strncmp(str, "off", 3)) { | |
60 | do_not_nx = 1; | |
61 | __supported_pte_mask &= ~_PAGE_NX; | |
62 | } | |
2c8c0e6b | 63 | return 0; |
1da177e4 | 64 | } |
2c8c0e6b | 65 | early_param("noexec", nonx_setup); |
1da177e4 | 66 | |
7682968b | 67 | int force_personality32 = 0; |
1da177e4 LT |
68 | |
69 | /* noexec32=on|off | |
70 | Control non executable heap for 32bit processes. | |
71 | To control the stack too use noexec=off | |
72 | ||
73 | on PROT_READ does not imply PROT_EXEC for 32bit processes | |
74 | off PROT_READ implies PROT_EXEC (default) | |
75 | */ | |
76 | static int __init nonx32_setup(char *str) | |
77 | { | |
78 | if (!strcmp(str, "on")) | |
79 | force_personality32 &= ~READ_IMPLIES_EXEC; | |
80 | else if (!strcmp(str, "off")) | |
81 | force_personality32 |= READ_IMPLIES_EXEC; | |
9b41046c | 82 | return 1; |
1da177e4 LT |
83 | } |
84 | __setup("noexec32=", nonx32_setup); | |
85 | ||
86 | /* | |
87 | * Great future plan: | |
88 | * Declare PDA itself and support (irqstack,tss,pgd) as per cpu data. | |
89 | * Always point %gs to its beginning | |
90 | */ | |
91 | void __init setup_per_cpu_areas(void) | |
92 | { | |
93 | int i; | |
94 | unsigned long size; | |
95 | ||
421c7ce6 AK |
96 | #ifdef CONFIG_HOTPLUG_CPU |
97 | prefill_possible_map(); | |
98 | #endif | |
99 | ||
1da177e4 | 100 | /* Copy section for each CPU (we discard the original) */ |
ba4d40bb | 101 | size = PERCPU_ENOUGH_ROOM; |
1da177e4 | 102 | |
ba4d40bb | 103 | printk(KERN_INFO "PERCPU: Allocating %lu bytes of per cpu data\n", size); |
e99b861a | 104 | for_each_cpu_mask (i, cpu_possible_map) { |
a940199f | 105 | char *ptr; |
1da177e4 LT |
106 | |
107 | if (!NODE_DATA(cpu_to_node(i))) { | |
108 | printk("cpu with no node %d, num_online_nodes %d\n", | |
109 | i, num_online_nodes()); | |
b6e3590f | 110 | ptr = alloc_bootmem_pages(size); |
1da177e4 | 111 | } else { |
b6e3590f | 112 | ptr = alloc_bootmem_pages_node(NODE_DATA(cpu_to_node(i)), size); |
1da177e4 LT |
113 | } |
114 | if (!ptr) | |
115 | panic("Cannot allocate cpu data for CPU %d\n", i); | |
df79efde | 116 | cpu_pda(i)->data_offset = ptr - __per_cpu_start; |
1da177e4 LT |
117 | memcpy(ptr, __per_cpu_start, __per_cpu_end - __per_cpu_start); |
118 | } | |
119 | } | |
120 | ||
121 | void pda_init(int cpu) | |
122 | { | |
df79efde | 123 | struct x8664_pda *pda = cpu_pda(cpu); |
1da177e4 LT |
124 | |
125 | /* Setup up data that may be needed in __get_free_pages early */ | |
126 | asm volatile("movl %0,%%fs ; movl %0,%%gs" :: "r" (0)); | |
53ee11ae AK |
127 | /* Memory clobbers used to order PDA accessed */ |
128 | mb(); | |
df79efde | 129 | wrmsrl(MSR_GS_BASE, pda); |
53ee11ae | 130 | mb(); |
1da177e4 | 131 | |
1da177e4 LT |
132 | pda->cpunumber = cpu; |
133 | pda->irqcount = -1; | |
134 | pda->kernelstack = | |
135 | (unsigned long)stack_thread_info() - PDA_STACKOFFSET + THREAD_SIZE; | |
136 | pda->active_mm = &init_mm; | |
137 | pda->mmu_state = 0; | |
138 | ||
139 | if (cpu == 0) { | |
140 | /* others are initialized in smpboot.c */ | |
141 | pda->pcurrent = &init_task; | |
142 | pda->irqstackptr = boot_cpu_stack; | |
143 | } else { | |
144 | pda->irqstackptr = (char *) | |
145 | __get_free_pages(GFP_ATOMIC, IRQSTACK_ORDER); | |
146 | if (!pda->irqstackptr) | |
147 | panic("cannot allocate irqstack for cpu %d", cpu); | |
148 | } | |
149 | ||
1da177e4 LT |
150 | |
151 | pda->irqstackptr += IRQSTACKSIZE-64; | |
152 | } | |
153 | ||
ab26a20b | 154 | char boot_exception_stacks[(N_EXCEPTION_STACKS - 1) * EXCEPTION_STKSZ + DEBUG_STKSZ] |
1da177e4 LT |
155 | __attribute__((section(".bss.page_aligned"))); |
156 | ||
75154f40 AK |
157 | extern asmlinkage void ignore_sysret(void); |
158 | ||
1da177e4 LT |
159 | /* May not be marked __init: used by software suspend */ |
160 | void syscall_init(void) | |
161 | { | |
162 | /* | |
163 | * LSTAR and STAR live in a bit strange symbiosis. | |
164 | * They both write to the same internal register. STAR allows to set CS/DS | |
165 | * but only a 32bit target. LSTAR sets the 64bit rip. | |
166 | */ | |
167 | wrmsrl(MSR_STAR, ((u64)__USER32_CS)<<48 | ((u64)__KERNEL_CS)<<32); | |
168 | wrmsrl(MSR_LSTAR, system_call); | |
75154f40 | 169 | wrmsrl(MSR_CSTAR, ignore_sysret); |
1da177e4 LT |
170 | |
171 | #ifdef CONFIG_IA32_EMULATION | |
172 | syscall32_cpu_init (); | |
173 | #endif | |
174 | ||
175 | /* Flags to clear on syscall */ | |
a46ff73d RM |
176 | wrmsrl(MSR_SYSCALL_MASK, |
177 | X86_EFLAGS_TF|X86_EFLAGS_DF|X86_EFLAGS_IF|X86_EFLAGS_IOPL); | |
1da177e4 LT |
178 | } |
179 | ||
e6982c67 | 180 | void __cpuinit check_efer(void) |
1da177e4 LT |
181 | { |
182 | unsigned long efer; | |
183 | ||
184 | rdmsrl(MSR_EFER, efer); | |
185 | if (!(efer & EFER_NX) || do_not_nx) { | |
186 | __supported_pte_mask &= ~_PAGE_NX; | |
187 | } | |
188 | } | |
189 | ||
658fdbef AK |
190 | unsigned long kernel_eflags; |
191 | ||
77788878 HS |
192 | /* |
193 | * Copies of the original ist values from the tss are only accessed during | |
194 | * debugging, no special alignment required. | |
195 | */ | |
196 | DEFINE_PER_CPU(struct orig_ist, orig_ist); | |
197 | ||
1da177e4 LT |
198 | /* |
199 | * cpu_init() initializes state that is per-CPU. Some data is already | |
200 | * initialized (naturally) in the bootstrap process, such as the GDT | |
201 | * and IDT. We reload them nevertheless, this function acts as a | |
202 | * 'CPU state barrier', nothing should get across. | |
203 | * A lot of state is already set up in PDA init. | |
204 | */ | |
e6982c67 | 205 | void __cpuinit cpu_init (void) |
1da177e4 | 206 | { |
1da177e4 | 207 | int cpu = stack_smp_processor_id(); |
1da177e4 | 208 | struct tss_struct *t = &per_cpu(init_tss, cpu); |
01ebb77b | 209 | struct orig_ist *orig_ist = &per_cpu(orig_ist, cpu); |
1da177e4 LT |
210 | unsigned long v; |
211 | char *estacks = NULL; | |
212 | struct task_struct *me; | |
213 | int i; | |
214 | ||
215 | /* CPU 0 is initialised in head64.c */ | |
216 | if (cpu != 0) { | |
217 | pda_init(cpu); | |
218 | } else | |
219 | estacks = boot_exception_stacks; | |
220 | ||
221 | me = current; | |
222 | ||
223 | if (cpu_test_and_set(cpu, cpu_initialized)) | |
224 | panic("CPU#%d already initialized!\n", cpu); | |
225 | ||
226 | printk("Initializing CPU#%d\n", cpu); | |
227 | ||
a940199f | 228 | clear_in_cr4(X86_CR4_VME|X86_CR4_PVI|X86_CR4_TSD|X86_CR4_DE); |
1da177e4 LT |
229 | |
230 | /* | |
231 | * Initialize the per-CPU GDT with the boot GDT, | |
232 | * and set up the GDT descriptor: | |
233 | */ | |
c11efdf9 | 234 | if (cpu) |
f6dc247c | 235 | memcpy(get_cpu_gdt_table(cpu), cpu_gdt_table, GDT_SIZE); |
1da177e4 LT |
236 | |
237 | cpu_gdt_descr[cpu].size = GDT_SIZE; | |
9d1c6e7c GOC |
238 | load_gdt((const struct desc_ptr *)&cpu_gdt_descr[cpu]); |
239 | load_idt((const struct desc_ptr *)&idt_descr); | |
1da177e4 | 240 | |
c11efdf9 | 241 | memset(me->thread.tls_array, 0, GDT_ENTRY_TLS_ENTRIES * 8); |
1da177e4 LT |
242 | syscall_init(); |
243 | ||
244 | wrmsrl(MSR_FS_BASE, 0); | |
245 | wrmsrl(MSR_KERNEL_GS_BASE, 0); | |
246 | barrier(); | |
247 | ||
248 | check_efer(); | |
249 | ||
250 | /* | |
251 | * set up and load the per-CPU TSS | |
252 | */ | |
253 | for (v = 0; v < N_EXCEPTION_STACKS; v++) { | |
f5741644 KO |
254 | static const unsigned int order[N_EXCEPTION_STACKS] = { |
255 | [0 ... N_EXCEPTION_STACKS - 1] = EXCEPTION_STACK_ORDER, | |
256 | [DEBUG_STACK - 1] = DEBUG_STACK_ORDER | |
257 | }; | |
1da177e4 | 258 | if (cpu) { |
b556b35e | 259 | estacks = (char *)__get_free_pages(GFP_ATOMIC, order[v]); |
1da177e4 LT |
260 | if (!estacks) |
261 | panic("Cannot allocate exception stack %ld %d\n", | |
262 | v, cpu); | |
263 | } | |
f5741644 | 264 | estacks += PAGE_SIZE << order[v]; |
ca241c75 | 265 | orig_ist->ist[v] = t->x86_tss.ist[v] = (unsigned long)estacks; |
1da177e4 LT |
266 | } |
267 | ||
ca241c75 | 268 | t->x86_tss.io_bitmap_base = offsetof(struct tss_struct, io_bitmap); |
1da177e4 LT |
269 | /* |
270 | * <= is required because the CPU will access up to | |
271 | * 8 bits beyond the end of the IO permission bitmap. | |
272 | */ | |
273 | for (i = 0; i <= IO_BITMAP_LONGS; i++) | |
274 | t->io_bitmap[i] = ~0UL; | |
275 | ||
276 | atomic_inc(&init_mm.mm_count); | |
277 | me->active_mm = &init_mm; | |
278 | if (me->mm) | |
279 | BUG(); | |
280 | enter_lazy_tlb(&init_mm, me); | |
281 | ||
282 | set_tss_desc(cpu, t); | |
283 | load_TR_desc(); | |
284 | load_LDT(&init_mm.context); | |
285 | ||
286 | /* | |
287 | * Clear all 6 debug registers: | |
288 | */ | |
289 | ||
2b514e74 JB |
290 | set_debugreg(0UL, 0); |
291 | set_debugreg(0UL, 1); | |
292 | set_debugreg(0UL, 2); | |
293 | set_debugreg(0UL, 3); | |
294 | set_debugreg(0UL, 6); | |
295 | set_debugreg(0UL, 7); | |
1da177e4 LT |
296 | |
297 | fpu_init(); | |
658fdbef AK |
298 | |
299 | raw_local_save_flags(kernel_eflags); | |
1da177e4 | 300 | } |