Commit | Line | Data |
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1da177e4 | 1 | #include <linux/module.h> |
cd6ed525 | 2 | #include <linux/reboot.h> |
4d022e35 MB |
3 | #include <linux/init.h> |
4 | #include <linux/pm.h> | |
5 | #include <linux/efi.h> | |
6c6c51e4 | 6 | #include <linux/dmi.h> |
4d022e35 MB |
7 | #include <acpi/reboot.h> |
8 | #include <asm/io.h> | |
1da177e4 | 9 | #include <asm/apic.h> |
4d37e7e3 | 10 | #include <asm/desc.h> |
4d022e35 | 11 | #include <asm/hpet.h> |
68db065c | 12 | #include <asm/pgtable.h> |
4412620f | 13 | #include <asm/proto.h> |
973efae2 | 14 | #include <asm/reboot_fixups.h> |
07f3331c | 15 | #include <asm/reboot.h> |
82487711 | 16 | #include <asm/pci_x86.h> |
d176720d | 17 | #include <asm/virtext.h> |
96b89dc6 | 18 | #include <asm/cpu.h> |
1da177e4 | 19 | |
4d022e35 | 20 | #ifdef CONFIG_X86_32 |
4d022e35 MB |
21 | # include <linux/ctype.h> |
22 | # include <linux/mc146818rtc.h> | |
4d022e35 MB |
23 | #else |
24 | # include <asm/iommu.h> | |
25 | #endif | |
26 | ||
1da177e4 LT |
27 | /* |
28 | * Power off function, if any | |
29 | */ | |
30 | void (*pm_power_off)(void); | |
129f6946 | 31 | EXPORT_SYMBOL(pm_power_off); |
1da177e4 | 32 | |
ebdd561a | 33 | static const struct desc_ptr no_idt = {}; |
1da177e4 | 34 | static int reboot_mode; |
8d00450d | 35 | enum reboot_type reboot_type = BOOT_KBD; |
4d022e35 | 36 | int reboot_force; |
1da177e4 | 37 | |
4d022e35 | 38 | #if defined(CONFIG_X86_32) && defined(CONFIG_SMP) |
1da177e4 | 39 | static int reboot_cpu = -1; |
1da177e4 | 40 | #endif |
4d022e35 | 41 | |
d176720d EH |
42 | /* This is set if we need to go through the 'emergency' path. |
43 | * When machine_emergency_restart() is called, we may be on | |
44 | * an inconsistent state and won't be able to do a clean cleanup | |
45 | */ | |
46 | static int reboot_emergency; | |
47 | ||
14d7ca5c PA |
48 | /* This is set by the PCI code if either type 1 or type 2 PCI is detected */ |
49 | bool port_cf9_safe = false; | |
50 | ||
51 | /* reboot=b[ios] | s[mp] | t[riple] | k[bd] | e[fi] [, [w]arm | [c]old] | p[ci] | |
4d022e35 MB |
52 | warm Don't set the cold reboot flag |
53 | cold Set the cold reboot flag | |
54 | bios Reboot by jumping through the BIOS (only for X86_32) | |
55 | smp Reboot by executing reset on BSP or other CPU (only for X86_32) | |
56 | triple Force a triple fault (init) | |
57 | kbd Use the keyboard controller. cold reset (default) | |
58 | acpi Use the RESET_REG in the FADT | |
59 | efi Use efi reset_system runtime service | |
14d7ca5c | 60 | pci Use the so-called "PCI reset register", CF9 |
4d022e35 MB |
61 | force Avoid anything that could hang. |
62 | */ | |
1da177e4 LT |
63 | static int __init reboot_setup(char *str) |
64 | { | |
4d022e35 | 65 | for (;;) { |
1da177e4 | 66 | switch (*str) { |
4d022e35 | 67 | case 'w': |
1da177e4 LT |
68 | reboot_mode = 0x1234; |
69 | break; | |
4d022e35 MB |
70 | |
71 | case 'c': | |
72 | reboot_mode = 0; | |
1da177e4 | 73 | break; |
4d022e35 MB |
74 | |
75 | #ifdef CONFIG_X86_32 | |
1da177e4 | 76 | #ifdef CONFIG_SMP |
4d022e35 | 77 | case 's': |
6f673d83 | 78 | if (isdigit(*(str+1))) { |
1da177e4 | 79 | reboot_cpu = (int) (*(str+1) - '0'); |
6f673d83 | 80 | if (isdigit(*(str+2))) |
1da177e4 LT |
81 | reboot_cpu = reboot_cpu*10 + (int)(*(str+2) - '0'); |
82 | } | |
4d022e35 MB |
83 | /* we will leave sorting out the final value |
84 | when we are ready to reboot, since we might not | |
85 | have set up boot_cpu_id or smp_num_cpu */ | |
1da177e4 | 86 | break; |
4d022e35 MB |
87 | #endif /* CONFIG_SMP */ |
88 | ||
89 | case 'b': | |
1da177e4 | 90 | #endif |
4d022e35 MB |
91 | case 'a': |
92 | case 'k': | |
93 | case 't': | |
94 | case 'e': | |
14d7ca5c | 95 | case 'p': |
4d022e35 MB |
96 | reboot_type = *str; |
97 | break; | |
98 | ||
99 | case 'f': | |
100 | reboot_force = 1; | |
101 | break; | |
1da177e4 | 102 | } |
4d022e35 MB |
103 | |
104 | str = strchr(str, ','); | |
105 | if (str) | |
1da177e4 LT |
106 | str++; |
107 | else | |
108 | break; | |
109 | } | |
110 | return 1; | |
111 | } | |
112 | ||
113 | __setup("reboot=", reboot_setup); | |
114 | ||
4d022e35 MB |
115 | |
116 | #ifdef CONFIG_X86_32 | |
1da177e4 LT |
117 | /* |
118 | * Reboot options and system auto-detection code provided by | |
119 | * Dell Inc. so their systems "just work". :-) | |
120 | */ | |
121 | ||
122 | /* | |
4d022e35 MB |
123 | * Some machines require the "reboot=b" commandline option, |
124 | * this quirk makes that automatic. | |
1da177e4 | 125 | */ |
1855256c | 126 | static int __init set_bios_reboot(const struct dmi_system_id *d) |
1da177e4 | 127 | { |
4d022e35 MB |
128 | if (reboot_type != BOOT_BIOS) { |
129 | reboot_type = BOOT_BIOS; | |
1da177e4 LT |
130 | printk(KERN_INFO "%s series board detected. Selecting BIOS-method for reboots.\n", d->ident); |
131 | } | |
132 | return 0; | |
133 | } | |
134 | ||
1da177e4 | 135 | static struct dmi_system_id __initdata reboot_dmi_table[] = { |
b9e82af8 TG |
136 | { /* Handle problems with rebooting on Dell E520's */ |
137 | .callback = set_bios_reboot, | |
138 | .ident = "Dell E520", | |
139 | .matches = { | |
140 | DMI_MATCH(DMI_SYS_VENDOR, "Dell Inc."), | |
141 | DMI_MATCH(DMI_PRODUCT_NAME, "Dell DM061"), | |
142 | }, | |
143 | }, | |
1da177e4 | 144 | { /* Handle problems with rebooting on Dell 1300's */ |
dd2a1305 | 145 | .callback = set_bios_reboot, |
1da177e4 LT |
146 | .ident = "Dell PowerEdge 1300", |
147 | .matches = { | |
148 | DMI_MATCH(DMI_SYS_VENDOR, "Dell Computer Corporation"), | |
149 | DMI_MATCH(DMI_PRODUCT_NAME, "PowerEdge 1300/"), | |
150 | }, | |
151 | }, | |
152 | { /* Handle problems with rebooting on Dell 300's */ | |
153 | .callback = set_bios_reboot, | |
154 | .ident = "Dell PowerEdge 300", | |
155 | .matches = { | |
156 | DMI_MATCH(DMI_SYS_VENDOR, "Dell Computer Corporation"), | |
157 | DMI_MATCH(DMI_PRODUCT_NAME, "PowerEdge 300/"), | |
158 | }, | |
159 | }, | |
df2edcf3 JJ |
160 | { /* Handle problems with rebooting on Dell Optiplex 745's SFF*/ |
161 | .callback = set_bios_reboot, | |
162 | .ident = "Dell OptiPlex 745", | |
163 | .matches = { | |
164 | DMI_MATCH(DMI_SYS_VENDOR, "Dell Inc."), | |
165 | DMI_MATCH(DMI_PRODUCT_NAME, "OptiPlex 745"), | |
df2edcf3 JJ |
166 | }, |
167 | }, | |
fc115bf1 CK |
168 | { /* Handle problems with rebooting on Dell Optiplex 745's DFF*/ |
169 | .callback = set_bios_reboot, | |
170 | .ident = "Dell OptiPlex 745", | |
171 | .matches = { | |
172 | DMI_MATCH(DMI_SYS_VENDOR, "Dell Inc."), | |
173 | DMI_MATCH(DMI_PRODUCT_NAME, "OptiPlex 745"), | |
174 | DMI_MATCH(DMI_BOARD_NAME, "0MM599"), | |
175 | }, | |
176 | }, | |
fc1c8925 HAA |
177 | { /* Handle problems with rebooting on Dell Optiplex 745 with 0KW626 */ |
178 | .callback = set_bios_reboot, | |
179 | .ident = "Dell OptiPlex 745", | |
180 | .matches = { | |
181 | DMI_MATCH(DMI_SYS_VENDOR, "Dell Inc."), | |
182 | DMI_MATCH(DMI_PRODUCT_NAME, "OptiPlex 745"), | |
183 | DMI_MATCH(DMI_BOARD_NAME, "0KW626"), | |
184 | }, | |
185 | }, | |
093bac15 SC |
186 | { /* Handle problems with rebooting on Dell Optiplex 330 with 0KP561 */ |
187 | .callback = set_bios_reboot, | |
188 | .ident = "Dell OptiPlex 330", | |
189 | .matches = { | |
190 | DMI_MATCH(DMI_SYS_VENDOR, "Dell Inc."), | |
191 | DMI_MATCH(DMI_PRODUCT_NAME, "OptiPlex 330"), | |
192 | DMI_MATCH(DMI_BOARD_NAME, "0KP561"), | |
193 | }, | |
194 | }, | |
4a4aca64 JD |
195 | { /* Handle problems with rebooting on Dell Optiplex 360 with 0T656F */ |
196 | .callback = set_bios_reboot, | |
197 | .ident = "Dell OptiPlex 360", | |
198 | .matches = { | |
199 | DMI_MATCH(DMI_SYS_VENDOR, "Dell Inc."), | |
200 | DMI_MATCH(DMI_PRODUCT_NAME, "OptiPlex 360"), | |
201 | DMI_MATCH(DMI_BOARD_NAME, "0T656F"), | |
202 | }, | |
203 | }, | |
1da177e4 LT |
204 | { /* Handle problems with rebooting on Dell 2400's */ |
205 | .callback = set_bios_reboot, | |
206 | .ident = "Dell PowerEdge 2400", | |
207 | .matches = { | |
208 | DMI_MATCH(DMI_SYS_VENDOR, "Dell Computer Corporation"), | |
209 | DMI_MATCH(DMI_PRODUCT_NAME, "PowerEdge 2400"), | |
210 | }, | |
211 | }, | |
fab3b58d IM |
212 | { /* Handle problems with rebooting on Dell T5400's */ |
213 | .callback = set_bios_reboot, | |
214 | .ident = "Dell Precision T5400", | |
215 | .matches = { | |
216 | DMI_MATCH(DMI_SYS_VENDOR, "Dell Inc."), | |
217 | DMI_MATCH(DMI_PRODUCT_NAME, "Precision WorkStation T5400"), | |
218 | }, | |
219 | }, | |
766c3f94 | 220 | { /* Handle problems with rebooting on HP laptops */ |
d91b14c4 | 221 | .callback = set_bios_reboot, |
766c3f94 | 222 | .ident = "HP Compaq Laptop", |
d91b14c4 TV |
223 | .matches = { |
224 | DMI_MATCH(DMI_SYS_VENDOR, "Hewlett-Packard"), | |
766c3f94 | 225 | DMI_MATCH(DMI_PRODUCT_NAME, "HP Compaq"), |
d91b14c4 TV |
226 | }, |
227 | }, | |
dd4124a8 LO |
228 | { /* Handle problems with rebooting on Dell XPS710 */ |
229 | .callback = set_bios_reboot, | |
230 | .ident = "Dell XPS710", | |
231 | .matches = { | |
232 | DMI_MATCH(DMI_SYS_VENDOR, "Dell Inc."), | |
233 | DMI_MATCH(DMI_PRODUCT_NAME, "Dell XPS710"), | |
234 | }, | |
235 | }, | |
c5da9a2b AC |
236 | { /* Handle problems with rebooting on Dell DXP061 */ |
237 | .callback = set_bios_reboot, | |
238 | .ident = "Dell DXP061", | |
239 | .matches = { | |
240 | DMI_MATCH(DMI_SYS_VENDOR, "Dell Inc."), | |
241 | DMI_MATCH(DMI_PRODUCT_NAME, "Dell DXP061"), | |
242 | }, | |
243 | }, | |
88dff493 ZR |
244 | { /* Handle problems with rebooting on Sony VGN-Z540N */ |
245 | .callback = set_bios_reboot, | |
246 | .ident = "Sony VGN-Z540N", | |
247 | .matches = { | |
248 | DMI_MATCH(DMI_SYS_VENDOR, "Sony Corporation"), | |
249 | DMI_MATCH(DMI_PRODUCT_NAME, "VGN-Z540N"), | |
250 | }, | |
251 | }, | |
77f32dfd DT |
252 | { /* Handle problems with rebooting on CompuLab SBC-FITPC2 */ |
253 | .callback = set_bios_reboot, | |
254 | .ident = "CompuLab SBC-FITPC2", | |
255 | .matches = { | |
256 | DMI_MATCH(DMI_SYS_VENDOR, "CompuLab"), | |
257 | DMI_MATCH(DMI_PRODUCT_NAME, "SBC-FITPC2"), | |
258 | }, | |
259 | }, | |
1da177e4 LT |
260 | { } |
261 | }; | |
262 | ||
263 | static int __init reboot_init(void) | |
264 | { | |
265 | dmi_check_system(reboot_dmi_table); | |
266 | return 0; | |
267 | } | |
1da177e4 LT |
268 | core_initcall(reboot_init); |
269 | ||
270 | /* The following code and data reboots the machine by switching to real | |
271 | mode and jumping to the BIOS reset entry point, as if the CPU has | |
272 | really been reset. The previous version asked the keyboard | |
273 | controller to pulse the CPU reset line, which is more thorough, but | |
274 | doesn't work with at least one type of 486 motherboard. It is easy | |
275 | to stop this code working; hence the copious comments. */ | |
ebdd561a | 276 | static const unsigned long long |
1da177e4 LT |
277 | real_mode_gdt_entries [3] = |
278 | { | |
279 | 0x0000000000000000ULL, /* Null descriptor */ | |
ebdd561a JB |
280 | 0x00009b000000ffffULL, /* 16-bit real-mode 64k code at 0x00000000 */ |
281 | 0x000093000100ffffULL /* 16-bit real-mode 64k data at 0x00000100 */ | |
1da177e4 LT |
282 | }; |
283 | ||
ebdd561a | 284 | static const struct desc_ptr |
05f4a3ec | 285 | real_mode_gdt = { sizeof (real_mode_gdt_entries) - 1, (long)real_mode_gdt_entries }, |
4d022e35 | 286 | real_mode_idt = { 0x3ff, 0 }; |
1da177e4 LT |
287 | |
288 | /* This is 16-bit protected mode code to disable paging and the cache, | |
289 | switch to real mode and jump to the BIOS reset code. | |
290 | ||
291 | The instruction that switches to real mode by writing to CR0 must be | |
292 | followed immediately by a far jump instruction, which set CS to a | |
293 | valid value for real mode, and flushes the prefetch queue to avoid | |
294 | running instructions that have already been decoded in protected | |
295 | mode. | |
296 | ||
297 | Clears all the flags except ET, especially PG (paging), PE | |
298 | (protected-mode enable) and TS (task switch for coprocessor state | |
299 | save). Flushes the TLB after paging has been disabled. Sets CD and | |
300 | NW, to disable the cache on a 486, and invalidates the cache. This | |
301 | is more like the state of a 486 after reset. I don't know if | |
302 | something else should be done for other chips. | |
303 | ||
304 | More could be done here to set up the registers as if a CPU reset had | |
305 | occurred; hopefully real BIOSs don't assume much. */ | |
ebdd561a | 306 | static const unsigned char real_mode_switch [] = |
1da177e4 LT |
307 | { |
308 | 0x66, 0x0f, 0x20, 0xc0, /* movl %cr0,%eax */ | |
309 | 0x66, 0x83, 0xe0, 0x11, /* andl $0x00000011,%eax */ | |
310 | 0x66, 0x0d, 0x00, 0x00, 0x00, 0x60, /* orl $0x60000000,%eax */ | |
311 | 0x66, 0x0f, 0x22, 0xc0, /* movl %eax,%cr0 */ | |
312 | 0x66, 0x0f, 0x22, 0xd8, /* movl %eax,%cr3 */ | |
313 | 0x66, 0x0f, 0x20, 0xc3, /* movl %cr0,%ebx */ | |
314 | 0x66, 0x81, 0xe3, 0x00, 0x00, 0x00, 0x60, /* andl $0x60000000,%ebx */ | |
315 | 0x74, 0x02, /* jz f */ | |
316 | 0x0f, 0x09, /* wbinvd */ | |
317 | 0x24, 0x10, /* f: andb $0x10,al */ | |
318 | 0x66, 0x0f, 0x22, 0xc0 /* movl %eax,%cr0 */ | |
319 | }; | |
ebdd561a | 320 | static const unsigned char jump_to_bios [] = |
1da177e4 LT |
321 | { |
322 | 0xea, 0x00, 0x00, 0xff, 0xff /* ljmp $0xffff,$0x0000 */ | |
323 | }; | |
324 | ||
325 | /* | |
326 | * Switch to real mode and then execute the code | |
327 | * specified by the code and length parameters. | |
328 | * We assume that length will aways be less that 100! | |
329 | */ | |
ebdd561a | 330 | void machine_real_restart(const unsigned char *code, int length) |
1da177e4 | 331 | { |
1da177e4 LT |
332 | local_irq_disable(); |
333 | ||
334 | /* Write zero to CMOS register number 0x0f, which the BIOS POST | |
335 | routine will recognize as telling it to do a proper reboot. (Well | |
336 | that's what this book in front of me says -- it may only apply to | |
337 | the Phoenix BIOS though, it's not clear). At the same time, | |
338 | disable NMIs by setting the top bit in the CMOS address register, | |
339 | as we're about to do peculiar things to the CPU. I'm not sure if | |
340 | `outb_p' is needed instead of just `outb'. Use it to be on the | |
341 | safe side. (Yes, CMOS_WRITE does outb_p's. - Paul G.) | |
342 | */ | |
62dbc210 | 343 | spin_lock(&rtc_lock); |
1da177e4 | 344 | CMOS_WRITE(0x00, 0x8f); |
62dbc210 | 345 | spin_unlock(&rtc_lock); |
1da177e4 LT |
346 | |
347 | /* Remap the kernel at virtual address zero, as well as offset zero | |
348 | from the kernel segment. This assumes the kernel segment starts at | |
349 | virtual address PAGE_OFFSET. */ | |
68db065c | 350 | memcpy(swapper_pg_dir, swapper_pg_dir + KERNEL_PGD_BOUNDARY, |
4d022e35 | 351 | sizeof(swapper_pg_dir [0]) * KERNEL_PGD_PTRS); |
1da177e4 LT |
352 | |
353 | /* | |
354 | * Use `swapper_pg_dir' as our page directory. | |
355 | */ | |
356 | load_cr3(swapper_pg_dir); | |
357 | ||
358 | /* Write 0x1234 to absolute memory location 0x472. The BIOS reads | |
359 | this on booting to tell it to "Bypass memory test (also warm | |
360 | boot)". This seems like a fairly standard thing that gets set by | |
361 | REBOOT.COM programs, and the previous reset routine did this | |
362 | too. */ | |
1da177e4 LT |
363 | *((unsigned short *)0x472) = reboot_mode; |
364 | ||
365 | /* For the switch to real mode, copy some code to low memory. It has | |
366 | to be in the first 64k because it is running in 16-bit mode, and it | |
367 | has to have the same physical and virtual address, because it turns | |
368 | off paging. Copy it near the end of the first page, out of the way | |
369 | of BIOS variables. */ | |
4d022e35 | 370 | memcpy((void *)(0x1000 - sizeof(real_mode_switch) - 100), |
1da177e4 | 371 | real_mode_switch, sizeof (real_mode_switch)); |
4d022e35 | 372 | memcpy((void *)(0x1000 - 100), code, length); |
1da177e4 LT |
373 | |
374 | /* Set up the IDT for real mode. */ | |
4d37e7e3 | 375 | load_idt(&real_mode_idt); |
1da177e4 LT |
376 | |
377 | /* Set up a GDT from which we can load segment descriptors for real | |
378 | mode. The GDT is not used in real mode; it is just needed here to | |
379 | prepare the descriptors. */ | |
4d37e7e3 | 380 | load_gdt(&real_mode_gdt); |
1da177e4 LT |
381 | |
382 | /* Load the data segment registers, and thus the descriptors ready for | |
383 | real mode. The base address of each segment is 0x100, 16 times the | |
384 | selector value being loaded here. This is so that the segment | |
385 | registers don't have to be reloaded after switching to real mode: | |
386 | the values are consistent for real mode operation already. */ | |
1da177e4 LT |
387 | __asm__ __volatile__ ("movl $0x0010,%%eax\n" |
388 | "\tmovl %%eax,%%ds\n" | |
389 | "\tmovl %%eax,%%es\n" | |
390 | "\tmovl %%eax,%%fs\n" | |
391 | "\tmovl %%eax,%%gs\n" | |
392 | "\tmovl %%eax,%%ss" : : : "eax"); | |
393 | ||
394 | /* Jump to the 16-bit code that we copied earlier. It disables paging | |
395 | and the cache, switches to real mode, and jumps to the BIOS reset | |
396 | entry point. */ | |
1da177e4 LT |
397 | __asm__ __volatile__ ("ljmp $0x0008,%0" |
398 | : | |
4d022e35 | 399 | : "i" ((void *)(0x1000 - sizeof (real_mode_switch) - 100))); |
1da177e4 | 400 | } |
129f6946 AD |
401 | #ifdef CONFIG_APM_MODULE |
402 | EXPORT_SYMBOL(machine_real_restart); | |
403 | #endif | |
1da177e4 | 404 | |
4d022e35 MB |
405 | #endif /* CONFIG_X86_32 */ |
406 | ||
6c6c51e4 | 407 | /* |
498cdbfb | 408 | * Some Apple MacBook and MacBookPro's needs reboot=p to be able to reboot |
6c6c51e4 PM |
409 | */ |
410 | static int __init set_pci_reboot(const struct dmi_system_id *d) | |
411 | { | |
412 | if (reboot_type != BOOT_CF9) { | |
413 | reboot_type = BOOT_CF9; | |
414 | printk(KERN_INFO "%s series board detected. " | |
415 | "Selecting PCI-method for reboots.\n", d->ident); | |
416 | } | |
417 | return 0; | |
418 | } | |
419 | ||
420 | static struct dmi_system_id __initdata pci_reboot_dmi_table[] = { | |
421 | { /* Handle problems with rebooting on Apple MacBook5,2 */ | |
422 | .callback = set_pci_reboot, | |
423 | .ident = "Apple MacBook", | |
424 | .matches = { | |
425 | DMI_MATCH(DMI_SYS_VENDOR, "Apple Inc."), | |
426 | DMI_MATCH(DMI_PRODUCT_NAME, "MacBook5,2"), | |
427 | }, | |
428 | }, | |
498cdbfb OÇ |
429 | { /* Handle problems with rebooting on Apple MacBookPro5,1 */ |
430 | .callback = set_pci_reboot, | |
431 | .ident = "Apple MacBookPro5,1", | |
432 | .matches = { | |
433 | DMI_MATCH(DMI_SYS_VENDOR, "Apple Inc."), | |
434 | DMI_MATCH(DMI_PRODUCT_NAME, "MacBookPro5,1"), | |
435 | }, | |
436 | }, | |
6c6c51e4 PM |
437 | { } |
438 | }; | |
439 | ||
440 | static int __init pci_reboot_init(void) | |
441 | { | |
442 | dmi_check_system(pci_reboot_dmi_table); | |
443 | return 0; | |
444 | } | |
445 | core_initcall(pci_reboot_init); | |
446 | ||
4d022e35 MB |
447 | static inline void kb_wait(void) |
448 | { | |
449 | int i; | |
450 | ||
c84d6af8 AC |
451 | for (i = 0; i < 0x10000; i++) { |
452 | if ((inb(0x64) & 0x02) == 0) | |
4d022e35 | 453 | break; |
c84d6af8 AC |
454 | udelay(2); |
455 | } | |
4d022e35 MB |
456 | } |
457 | ||
d176720d EH |
458 | static void vmxoff_nmi(int cpu, struct die_args *args) |
459 | { | |
460 | cpu_emergency_vmxoff(); | |
461 | } | |
462 | ||
463 | /* Use NMIs as IPIs to tell all CPUs to disable virtualization | |
464 | */ | |
465 | static void emergency_vmx_disable_all(void) | |
466 | { | |
467 | /* Just make sure we won't change CPUs while doing this */ | |
468 | local_irq_disable(); | |
469 | ||
470 | /* We need to disable VMX on all CPUs before rebooting, otherwise | |
471 | * we risk hanging up the machine, because the CPU ignore INIT | |
472 | * signals when VMX is enabled. | |
473 | * | |
474 | * We can't take any locks and we may be on an inconsistent | |
475 | * state, so we use NMIs as IPIs to tell the other CPUs to disable | |
476 | * VMX and halt. | |
477 | * | |
478 | * For safety, we will avoid running the nmi_shootdown_cpus() | |
479 | * stuff unnecessarily, but we don't have a way to check | |
480 | * if other CPUs have VMX enabled. So we will call it only if the | |
481 | * CPU we are running on has VMX enabled. | |
482 | * | |
483 | * We will miss cases where VMX is not enabled on all CPUs. This | |
484 | * shouldn't do much harm because KVM always enable VMX on all | |
485 | * CPUs anyway. But we can miss it on the small window where KVM | |
486 | * is still enabling VMX. | |
487 | */ | |
488 | if (cpu_has_vmx() && cpu_vmx_enabled()) { | |
489 | /* Disable VMX on this CPU. | |
490 | */ | |
491 | cpu_vmxoff(); | |
492 | ||
493 | /* Halt and disable VMX on the other CPUs */ | |
494 | nmi_shootdown_cpus(vmxoff_nmi); | |
495 | ||
496 | } | |
497 | } | |
498 | ||
499 | ||
7432d149 IM |
500 | void __attribute__((weak)) mach_reboot_fixups(void) |
501 | { | |
502 | } | |
503 | ||
416e2d63 | 504 | static void native_machine_emergency_restart(void) |
1da177e4 | 505 | { |
4d022e35 MB |
506 | int i; |
507 | ||
d176720d EH |
508 | if (reboot_emergency) |
509 | emergency_vmx_disable_all(); | |
510 | ||
4d022e35 MB |
511 | /* Tell the BIOS if we want cold or warm reboot */ |
512 | *((unsigned short *)__va(0x472)) = reboot_mode; | |
513 | ||
514 | for (;;) { | |
515 | /* Could also try the reset bit in the Hammer NB */ | |
516 | switch (reboot_type) { | |
517 | case BOOT_KBD: | |
7432d149 IM |
518 | mach_reboot_fixups(); /* for board specific fixups */ |
519 | ||
4d022e35 MB |
520 | for (i = 0; i < 10; i++) { |
521 | kb_wait(); | |
522 | udelay(50); | |
523 | outb(0xfe, 0x64); /* pulse reset low */ | |
524 | udelay(50); | |
525 | } | |
526 | ||
527 | case BOOT_TRIPLE: | |
ebdd561a | 528 | load_idt(&no_idt); |
4d022e35 MB |
529 | __asm__ __volatile__("int3"); |
530 | ||
531 | reboot_type = BOOT_KBD; | |
532 | break; | |
533 | ||
534 | #ifdef CONFIG_X86_32 | |
535 | case BOOT_BIOS: | |
536 | machine_real_restart(jump_to_bios, sizeof(jump_to_bios)); | |
537 | ||
538 | reboot_type = BOOT_KBD; | |
539 | break; | |
540 | #endif | |
541 | ||
542 | case BOOT_ACPI: | |
543 | acpi_reboot(); | |
544 | reboot_type = BOOT_KBD; | |
545 | break; | |
546 | ||
4d022e35 MB |
547 | case BOOT_EFI: |
548 | if (efi_enabled) | |
14d7ca5c PA |
549 | efi.reset_system(reboot_mode ? |
550 | EFI_RESET_WARM : | |
551 | EFI_RESET_COLD, | |
4d022e35 | 552 | EFI_SUCCESS, 0, NULL); |
b47b9288 | 553 | reboot_type = BOOT_KBD; |
14d7ca5c | 554 | break; |
4d022e35 | 555 | |
14d7ca5c PA |
556 | case BOOT_CF9: |
557 | port_cf9_safe = true; | |
558 | /* fall through */ | |
4d022e35 | 559 | |
14d7ca5c PA |
560 | case BOOT_CF9_COND: |
561 | if (port_cf9_safe) { | |
562 | u8 cf9 = inb(0xcf9) & ~6; | |
563 | outb(cf9|2, 0xcf9); /* Request hard reset */ | |
564 | udelay(50); | |
565 | outb(cf9|6, 0xcf9); /* Actually do the reset */ | |
566 | udelay(50); | |
567 | } | |
4d022e35 MB |
568 | reboot_type = BOOT_KBD; |
569 | break; | |
570 | } | |
571 | } | |
572 | } | |
573 | ||
3c62c625 | 574 | void native_machine_shutdown(void) |
4d022e35 MB |
575 | { |
576 | /* Stop the cpus and apics */ | |
1da177e4 | 577 | #ifdef CONFIG_SMP |
dd2a1305 EB |
578 | |
579 | /* The boot cpu is always logical cpu 0 */ | |
65c01184 | 580 | int reboot_cpu_id = 0; |
dd2a1305 | 581 | |
4d022e35 | 582 | #ifdef CONFIG_X86_32 |
dd2a1305 | 583 | /* See if there has been given a command line override */ |
9628937d | 584 | if ((reboot_cpu != -1) && (reboot_cpu < nr_cpu_ids) && |
0bc3cc03 | 585 | cpu_online(reboot_cpu)) |
dd2a1305 | 586 | reboot_cpu_id = reboot_cpu; |
4d022e35 | 587 | #endif |
1da177e4 | 588 | |
4d022e35 | 589 | /* Make certain the cpu I'm about to reboot on is online */ |
0bc3cc03 | 590 | if (!cpu_online(reboot_cpu_id)) |
dd2a1305 | 591 | reboot_cpu_id = smp_processor_id(); |
dd2a1305 EB |
592 | |
593 | /* Make certain I only run on the appropriate processor */ | |
9628937d | 594 | set_cpus_allowed_ptr(current, cpumask_of(reboot_cpu_id)); |
dd2a1305 | 595 | |
4d022e35 MB |
596 | /* O.K Now that I'm on the appropriate processor, |
597 | * stop all of the others. | |
1da177e4 LT |
598 | */ |
599 | smp_send_stop(); | |
4d022e35 | 600 | #endif |
1da177e4 LT |
601 | |
602 | lapic_shutdown(); | |
603 | ||
604 | #ifdef CONFIG_X86_IO_APIC | |
605 | disable_IO_APIC(); | |
606 | #endif | |
4d022e35 | 607 | |
c86c7fbc OH |
608 | #ifdef CONFIG_HPET_TIMER |
609 | hpet_disable(); | |
610 | #endif | |
dd2a1305 | 611 | |
4d022e35 MB |
612 | #ifdef CONFIG_X86_64 |
613 | pci_iommu_shutdown(); | |
614 | #endif | |
973efae2 JF |
615 | } |
616 | ||
d176720d EH |
617 | static void __machine_emergency_restart(int emergency) |
618 | { | |
619 | reboot_emergency = emergency; | |
620 | machine_ops.emergency_restart(); | |
621 | } | |
622 | ||
416e2d63 | 623 | static void native_machine_restart(char *__unused) |
dd2a1305 | 624 | { |
4d022e35 | 625 | printk("machine restart\n"); |
1da177e4 | 626 | |
4d022e35 MB |
627 | if (!reboot_force) |
628 | machine_shutdown(); | |
d176720d | 629 | __machine_emergency_restart(0); |
4a1421f8 EB |
630 | } |
631 | ||
416e2d63 | 632 | static void native_machine_halt(void) |
1da177e4 | 633 | { |
d3ec5cae IV |
634 | /* stop other cpus and apics */ |
635 | machine_shutdown(); | |
636 | ||
637 | /* stop this cpu */ | |
638 | stop_this_cpu(NULL); | |
1da177e4 LT |
639 | } |
640 | ||
416e2d63 | 641 | static void native_machine_power_off(void) |
1da177e4 | 642 | { |
6e3fbee5 | 643 | if (pm_power_off) { |
4d022e35 MB |
644 | if (!reboot_force) |
645 | machine_shutdown(); | |
1da177e4 | 646 | pm_power_off(); |
6e3fbee5 | 647 | } |
1da177e4 LT |
648 | } |
649 | ||
07f3331c | 650 | struct machine_ops machine_ops = { |
416e2d63 JB |
651 | .power_off = native_machine_power_off, |
652 | .shutdown = native_machine_shutdown, | |
653 | .emergency_restart = native_machine_emergency_restart, | |
654 | .restart = native_machine_restart, | |
ed23dc6f GC |
655 | .halt = native_machine_halt, |
656 | #ifdef CONFIG_KEXEC | |
657 | .crash_shutdown = native_machine_crash_shutdown, | |
658 | #endif | |
07f3331c | 659 | }; |
416e2d63 JB |
660 | |
661 | void machine_power_off(void) | |
662 | { | |
663 | machine_ops.power_off(); | |
664 | } | |
665 | ||
666 | void machine_shutdown(void) | |
667 | { | |
668 | machine_ops.shutdown(); | |
669 | } | |
670 | ||
671 | void machine_emergency_restart(void) | |
672 | { | |
d176720d | 673 | __machine_emergency_restart(1); |
416e2d63 JB |
674 | } |
675 | ||
676 | void machine_restart(char *cmd) | |
677 | { | |
678 | machine_ops.restart(cmd); | |
679 | } | |
680 | ||
681 | void machine_halt(void) | |
682 | { | |
683 | machine_ops.halt(); | |
684 | } | |
685 | ||
ed23dc6f GC |
686 | #ifdef CONFIG_KEXEC |
687 | void machine_crash_shutdown(struct pt_regs *regs) | |
688 | { | |
689 | machine_ops.crash_shutdown(regs); | |
690 | } | |
691 | #endif | |
2ddded21 EH |
692 | |
693 | ||
bb8dd270 | 694 | #if defined(CONFIG_SMP) |
2ddded21 EH |
695 | |
696 | /* This keeps a track of which one is crashing cpu. */ | |
697 | static int crashing_cpu; | |
698 | static nmi_shootdown_cb shootdown_callback; | |
699 | ||
700 | static atomic_t waiting_for_crash_ipi; | |
701 | ||
702 | static int crash_nmi_callback(struct notifier_block *self, | |
703 | unsigned long val, void *data) | |
704 | { | |
705 | int cpu; | |
706 | ||
707 | if (val != DIE_NMI_IPI) | |
708 | return NOTIFY_OK; | |
709 | ||
710 | cpu = raw_smp_processor_id(); | |
711 | ||
712 | /* Don't do anything if this handler is invoked on crashing cpu. | |
713 | * Otherwise, system will completely hang. Crashing cpu can get | |
714 | * an NMI if system was initially booted with nmi_watchdog parameter. | |
715 | */ | |
716 | if (cpu == crashing_cpu) | |
717 | return NOTIFY_STOP; | |
718 | local_irq_disable(); | |
719 | ||
720 | shootdown_callback(cpu, (struct die_args *)data); | |
721 | ||
722 | atomic_dec(&waiting_for_crash_ipi); | |
723 | /* Assume hlt works */ | |
724 | halt(); | |
725 | for (;;) | |
726 | cpu_relax(); | |
727 | ||
728 | return 1; | |
729 | } | |
730 | ||
731 | static void smp_send_nmi_allbutself(void) | |
732 | { | |
dac5f412 | 733 | apic->send_IPI_allbutself(NMI_VECTOR); |
2ddded21 EH |
734 | } |
735 | ||
736 | static struct notifier_block crash_nmi_nb = { | |
737 | .notifier_call = crash_nmi_callback, | |
738 | }; | |
739 | ||
bb8dd270 EH |
740 | /* Halt all other CPUs, calling the specified function on each of them |
741 | * | |
742 | * This function can be used to halt all other CPUs on crash | |
743 | * or emergency reboot time. The function passed as parameter | |
744 | * will be called inside a NMI handler on all CPUs. | |
745 | */ | |
2ddded21 EH |
746 | void nmi_shootdown_cpus(nmi_shootdown_cb callback) |
747 | { | |
748 | unsigned long msecs; | |
c415b3dc | 749 | local_irq_disable(); |
2ddded21 EH |
750 | |
751 | /* Make a note of crashing cpu. Will be used in NMI callback.*/ | |
752 | crashing_cpu = safe_smp_processor_id(); | |
753 | ||
754 | shootdown_callback = callback; | |
755 | ||
756 | atomic_set(&waiting_for_crash_ipi, num_online_cpus() - 1); | |
757 | /* Would it be better to replace the trap vector here? */ | |
758 | if (register_die_notifier(&crash_nmi_nb)) | |
759 | return; /* return what? */ | |
760 | /* Ensure the new callback function is set before sending | |
761 | * out the NMI | |
762 | */ | |
763 | wmb(); | |
764 | ||
765 | smp_send_nmi_allbutself(); | |
766 | ||
767 | msecs = 1000; /* Wait at most a second for the other cpus to stop */ | |
768 | while ((atomic_read(&waiting_for_crash_ipi) > 0) && msecs) { | |
769 | mdelay(1); | |
770 | msecs--; | |
771 | } | |
772 | ||
773 | /* Leave the nmi callback set */ | |
774 | } | |
bb8dd270 EH |
775 | #else /* !CONFIG_SMP */ |
776 | void nmi_shootdown_cpus(nmi_shootdown_cb callback) | |
777 | { | |
778 | /* No other CPUs to shoot down */ | |
779 | } | |
2ddded21 | 780 | #endif |