Commit | Line | Data |
---|---|---|
1da177e4 | 1 | #include <linux/module.h> |
cd6ed525 | 2 | #include <linux/reboot.h> |
4d022e35 MB |
3 | #include <linux/init.h> |
4 | #include <linux/pm.h> | |
5 | #include <linux/efi.h> | |
6c6c51e4 | 6 | #include <linux/dmi.h> |
69575d38 | 7 | #include <linux/tboot.h> |
4d022e35 MB |
8 | #include <acpi/reboot.h> |
9 | #include <asm/io.h> | |
1da177e4 | 10 | #include <asm/apic.h> |
4d37e7e3 | 11 | #include <asm/desc.h> |
4d022e35 | 12 | #include <asm/hpet.h> |
68db065c | 13 | #include <asm/pgtable.h> |
4412620f | 14 | #include <asm/proto.h> |
973efae2 | 15 | #include <asm/reboot_fixups.h> |
07f3331c | 16 | #include <asm/reboot.h> |
82487711 | 17 | #include <asm/pci_x86.h> |
d176720d | 18 | #include <asm/virtext.h> |
96b89dc6 | 19 | #include <asm/cpu.h> |
1da177e4 | 20 | |
4d022e35 | 21 | #ifdef CONFIG_X86_32 |
4d022e35 MB |
22 | # include <linux/ctype.h> |
23 | # include <linux/mc146818rtc.h> | |
4d022e35 MB |
24 | #else |
25 | # include <asm/iommu.h> | |
26 | #endif | |
27 | ||
1da177e4 LT |
28 | /* |
29 | * Power off function, if any | |
30 | */ | |
31 | void (*pm_power_off)(void); | |
129f6946 | 32 | EXPORT_SYMBOL(pm_power_off); |
1da177e4 | 33 | |
ebdd561a | 34 | static const struct desc_ptr no_idt = {}; |
1da177e4 | 35 | static int reboot_mode; |
8d00450d | 36 | enum reboot_type reboot_type = BOOT_KBD; |
4d022e35 | 37 | int reboot_force; |
1da177e4 | 38 | |
4d022e35 | 39 | #if defined(CONFIG_X86_32) && defined(CONFIG_SMP) |
1da177e4 | 40 | static int reboot_cpu = -1; |
1da177e4 | 41 | #endif |
4d022e35 | 42 | |
d176720d EH |
43 | /* This is set if we need to go through the 'emergency' path. |
44 | * When machine_emergency_restart() is called, we may be on | |
45 | * an inconsistent state and won't be able to do a clean cleanup | |
46 | */ | |
47 | static int reboot_emergency; | |
48 | ||
14d7ca5c PA |
49 | /* This is set by the PCI code if either type 1 or type 2 PCI is detected */ |
50 | bool port_cf9_safe = false; | |
51 | ||
52 | /* reboot=b[ios] | s[mp] | t[riple] | k[bd] | e[fi] [, [w]arm | [c]old] | p[ci] | |
4d022e35 MB |
53 | warm Don't set the cold reboot flag |
54 | cold Set the cold reboot flag | |
55 | bios Reboot by jumping through the BIOS (only for X86_32) | |
56 | smp Reboot by executing reset on BSP or other CPU (only for X86_32) | |
57 | triple Force a triple fault (init) | |
58 | kbd Use the keyboard controller. cold reset (default) | |
59 | acpi Use the RESET_REG in the FADT | |
60 | efi Use efi reset_system runtime service | |
14d7ca5c | 61 | pci Use the so-called "PCI reset register", CF9 |
4d022e35 MB |
62 | force Avoid anything that could hang. |
63 | */ | |
1da177e4 LT |
64 | static int __init reboot_setup(char *str) |
65 | { | |
4d022e35 | 66 | for (;;) { |
1da177e4 | 67 | switch (*str) { |
4d022e35 | 68 | case 'w': |
1da177e4 LT |
69 | reboot_mode = 0x1234; |
70 | break; | |
4d022e35 MB |
71 | |
72 | case 'c': | |
73 | reboot_mode = 0; | |
1da177e4 | 74 | break; |
4d022e35 MB |
75 | |
76 | #ifdef CONFIG_X86_32 | |
1da177e4 | 77 | #ifdef CONFIG_SMP |
4d022e35 | 78 | case 's': |
6f673d83 | 79 | if (isdigit(*(str+1))) { |
1da177e4 | 80 | reboot_cpu = (int) (*(str+1) - '0'); |
6f673d83 | 81 | if (isdigit(*(str+2))) |
1da177e4 LT |
82 | reboot_cpu = reboot_cpu*10 + (int)(*(str+2) - '0'); |
83 | } | |
4d022e35 MB |
84 | /* we will leave sorting out the final value |
85 | when we are ready to reboot, since we might not | |
86 | have set up boot_cpu_id or smp_num_cpu */ | |
1da177e4 | 87 | break; |
4d022e35 MB |
88 | #endif /* CONFIG_SMP */ |
89 | ||
90 | case 'b': | |
1da177e4 | 91 | #endif |
4d022e35 MB |
92 | case 'a': |
93 | case 'k': | |
94 | case 't': | |
95 | case 'e': | |
14d7ca5c | 96 | case 'p': |
4d022e35 MB |
97 | reboot_type = *str; |
98 | break; | |
99 | ||
100 | case 'f': | |
101 | reboot_force = 1; | |
102 | break; | |
1da177e4 | 103 | } |
4d022e35 MB |
104 | |
105 | str = strchr(str, ','); | |
106 | if (str) | |
1da177e4 LT |
107 | str++; |
108 | else | |
109 | break; | |
110 | } | |
111 | return 1; | |
112 | } | |
113 | ||
114 | __setup("reboot=", reboot_setup); | |
115 | ||
4d022e35 MB |
116 | |
117 | #ifdef CONFIG_X86_32 | |
1da177e4 LT |
118 | /* |
119 | * Reboot options and system auto-detection code provided by | |
120 | * Dell Inc. so their systems "just work". :-) | |
121 | */ | |
122 | ||
123 | /* | |
4d022e35 MB |
124 | * Some machines require the "reboot=b" commandline option, |
125 | * this quirk makes that automatic. | |
1da177e4 | 126 | */ |
1855256c | 127 | static int __init set_bios_reboot(const struct dmi_system_id *d) |
1da177e4 | 128 | { |
4d022e35 MB |
129 | if (reboot_type != BOOT_BIOS) { |
130 | reboot_type = BOOT_BIOS; | |
1da177e4 LT |
131 | printk(KERN_INFO "%s series board detected. Selecting BIOS-method for reboots.\n", d->ident); |
132 | } | |
133 | return 0; | |
134 | } | |
135 | ||
1da177e4 | 136 | static struct dmi_system_id __initdata reboot_dmi_table[] = { |
b9e82af8 TG |
137 | { /* Handle problems with rebooting on Dell E520's */ |
138 | .callback = set_bios_reboot, | |
139 | .ident = "Dell E520", | |
140 | .matches = { | |
141 | DMI_MATCH(DMI_SYS_VENDOR, "Dell Inc."), | |
142 | DMI_MATCH(DMI_PRODUCT_NAME, "Dell DM061"), | |
143 | }, | |
144 | }, | |
1da177e4 | 145 | { /* Handle problems with rebooting on Dell 1300's */ |
dd2a1305 | 146 | .callback = set_bios_reboot, |
1da177e4 LT |
147 | .ident = "Dell PowerEdge 1300", |
148 | .matches = { | |
149 | DMI_MATCH(DMI_SYS_VENDOR, "Dell Computer Corporation"), | |
150 | DMI_MATCH(DMI_PRODUCT_NAME, "PowerEdge 1300/"), | |
151 | }, | |
152 | }, | |
153 | { /* Handle problems with rebooting on Dell 300's */ | |
154 | .callback = set_bios_reboot, | |
155 | .ident = "Dell PowerEdge 300", | |
156 | .matches = { | |
157 | DMI_MATCH(DMI_SYS_VENDOR, "Dell Computer Corporation"), | |
158 | DMI_MATCH(DMI_PRODUCT_NAME, "PowerEdge 300/"), | |
159 | }, | |
160 | }, | |
df2edcf3 JJ |
161 | { /* Handle problems with rebooting on Dell Optiplex 745's SFF*/ |
162 | .callback = set_bios_reboot, | |
163 | .ident = "Dell OptiPlex 745", | |
164 | .matches = { | |
165 | DMI_MATCH(DMI_SYS_VENDOR, "Dell Inc."), | |
166 | DMI_MATCH(DMI_PRODUCT_NAME, "OptiPlex 745"), | |
df2edcf3 JJ |
167 | }, |
168 | }, | |
fc115bf1 CK |
169 | { /* Handle problems with rebooting on Dell Optiplex 745's DFF*/ |
170 | .callback = set_bios_reboot, | |
171 | .ident = "Dell OptiPlex 745", | |
172 | .matches = { | |
173 | DMI_MATCH(DMI_SYS_VENDOR, "Dell Inc."), | |
174 | DMI_MATCH(DMI_PRODUCT_NAME, "OptiPlex 745"), | |
175 | DMI_MATCH(DMI_BOARD_NAME, "0MM599"), | |
176 | }, | |
177 | }, | |
fc1c8925 HAA |
178 | { /* Handle problems with rebooting on Dell Optiplex 745 with 0KW626 */ |
179 | .callback = set_bios_reboot, | |
180 | .ident = "Dell OptiPlex 745", | |
181 | .matches = { | |
182 | DMI_MATCH(DMI_SYS_VENDOR, "Dell Inc."), | |
183 | DMI_MATCH(DMI_PRODUCT_NAME, "OptiPlex 745"), | |
184 | DMI_MATCH(DMI_BOARD_NAME, "0KW626"), | |
185 | }, | |
186 | }, | |
093bac15 SC |
187 | { /* Handle problems with rebooting on Dell Optiplex 330 with 0KP561 */ |
188 | .callback = set_bios_reboot, | |
189 | .ident = "Dell OptiPlex 330", | |
190 | .matches = { | |
191 | DMI_MATCH(DMI_SYS_VENDOR, "Dell Inc."), | |
192 | DMI_MATCH(DMI_PRODUCT_NAME, "OptiPlex 330"), | |
193 | DMI_MATCH(DMI_BOARD_NAME, "0KP561"), | |
194 | }, | |
195 | }, | |
4a4aca64 JD |
196 | { /* Handle problems with rebooting on Dell Optiplex 360 with 0T656F */ |
197 | .callback = set_bios_reboot, | |
198 | .ident = "Dell OptiPlex 360", | |
199 | .matches = { | |
200 | DMI_MATCH(DMI_SYS_VENDOR, "Dell Inc."), | |
201 | DMI_MATCH(DMI_PRODUCT_NAME, "OptiPlex 360"), | |
202 | DMI_MATCH(DMI_BOARD_NAME, "0T656F"), | |
203 | }, | |
204 | }, | |
1da177e4 LT |
205 | { /* Handle problems with rebooting on Dell 2400's */ |
206 | .callback = set_bios_reboot, | |
207 | .ident = "Dell PowerEdge 2400", | |
208 | .matches = { | |
209 | DMI_MATCH(DMI_SYS_VENDOR, "Dell Computer Corporation"), | |
210 | DMI_MATCH(DMI_PRODUCT_NAME, "PowerEdge 2400"), | |
211 | }, | |
212 | }, | |
fab3b58d IM |
213 | { /* Handle problems with rebooting on Dell T5400's */ |
214 | .callback = set_bios_reboot, | |
215 | .ident = "Dell Precision T5400", | |
216 | .matches = { | |
217 | DMI_MATCH(DMI_SYS_VENDOR, "Dell Inc."), | |
218 | DMI_MATCH(DMI_PRODUCT_NAME, "Precision WorkStation T5400"), | |
219 | }, | |
220 | }, | |
766c3f94 | 221 | { /* Handle problems with rebooting on HP laptops */ |
d91b14c4 | 222 | .callback = set_bios_reboot, |
766c3f94 | 223 | .ident = "HP Compaq Laptop", |
d91b14c4 TV |
224 | .matches = { |
225 | DMI_MATCH(DMI_SYS_VENDOR, "Hewlett-Packard"), | |
766c3f94 | 226 | DMI_MATCH(DMI_PRODUCT_NAME, "HP Compaq"), |
d91b14c4 TV |
227 | }, |
228 | }, | |
dd4124a8 LO |
229 | { /* Handle problems with rebooting on Dell XPS710 */ |
230 | .callback = set_bios_reboot, | |
231 | .ident = "Dell XPS710", | |
232 | .matches = { | |
233 | DMI_MATCH(DMI_SYS_VENDOR, "Dell Inc."), | |
234 | DMI_MATCH(DMI_PRODUCT_NAME, "Dell XPS710"), | |
235 | }, | |
236 | }, | |
c5da9a2b AC |
237 | { /* Handle problems with rebooting on Dell DXP061 */ |
238 | .callback = set_bios_reboot, | |
239 | .ident = "Dell DXP061", | |
240 | .matches = { | |
241 | DMI_MATCH(DMI_SYS_VENDOR, "Dell Inc."), | |
242 | DMI_MATCH(DMI_PRODUCT_NAME, "Dell DXP061"), | |
243 | }, | |
244 | }, | |
88dff493 ZR |
245 | { /* Handle problems with rebooting on Sony VGN-Z540N */ |
246 | .callback = set_bios_reboot, | |
247 | .ident = "Sony VGN-Z540N", | |
248 | .matches = { | |
249 | DMI_MATCH(DMI_SYS_VENDOR, "Sony Corporation"), | |
250 | DMI_MATCH(DMI_PRODUCT_NAME, "VGN-Z540N"), | |
251 | }, | |
252 | }, | |
77f32dfd DT |
253 | { /* Handle problems with rebooting on CompuLab SBC-FITPC2 */ |
254 | .callback = set_bios_reboot, | |
255 | .ident = "CompuLab SBC-FITPC2", | |
256 | .matches = { | |
257 | DMI_MATCH(DMI_SYS_VENDOR, "CompuLab"), | |
258 | DMI_MATCH(DMI_PRODUCT_NAME, "SBC-FITPC2"), | |
259 | }, | |
260 | }, | |
1da177e4 LT |
261 | { } |
262 | }; | |
263 | ||
264 | static int __init reboot_init(void) | |
265 | { | |
266 | dmi_check_system(reboot_dmi_table); | |
267 | return 0; | |
268 | } | |
1da177e4 LT |
269 | core_initcall(reboot_init); |
270 | ||
271 | /* The following code and data reboots the machine by switching to real | |
272 | mode and jumping to the BIOS reset entry point, as if the CPU has | |
273 | really been reset. The previous version asked the keyboard | |
274 | controller to pulse the CPU reset line, which is more thorough, but | |
275 | doesn't work with at least one type of 486 motherboard. It is easy | |
276 | to stop this code working; hence the copious comments. */ | |
ebdd561a | 277 | static const unsigned long long |
1da177e4 LT |
278 | real_mode_gdt_entries [3] = |
279 | { | |
280 | 0x0000000000000000ULL, /* Null descriptor */ | |
ebdd561a JB |
281 | 0x00009b000000ffffULL, /* 16-bit real-mode 64k code at 0x00000000 */ |
282 | 0x000093000100ffffULL /* 16-bit real-mode 64k data at 0x00000100 */ | |
1da177e4 LT |
283 | }; |
284 | ||
ebdd561a | 285 | static const struct desc_ptr |
05f4a3ec | 286 | real_mode_gdt = { sizeof (real_mode_gdt_entries) - 1, (long)real_mode_gdt_entries }, |
4d022e35 | 287 | real_mode_idt = { 0x3ff, 0 }; |
1da177e4 LT |
288 | |
289 | /* This is 16-bit protected mode code to disable paging and the cache, | |
290 | switch to real mode and jump to the BIOS reset code. | |
291 | ||
292 | The instruction that switches to real mode by writing to CR0 must be | |
293 | followed immediately by a far jump instruction, which set CS to a | |
294 | valid value for real mode, and flushes the prefetch queue to avoid | |
295 | running instructions that have already been decoded in protected | |
296 | mode. | |
297 | ||
298 | Clears all the flags except ET, especially PG (paging), PE | |
299 | (protected-mode enable) and TS (task switch for coprocessor state | |
300 | save). Flushes the TLB after paging has been disabled. Sets CD and | |
301 | NW, to disable the cache on a 486, and invalidates the cache. This | |
302 | is more like the state of a 486 after reset. I don't know if | |
303 | something else should be done for other chips. | |
304 | ||
305 | More could be done here to set up the registers as if a CPU reset had | |
306 | occurred; hopefully real BIOSs don't assume much. */ | |
ebdd561a | 307 | static const unsigned char real_mode_switch [] = |
1da177e4 LT |
308 | { |
309 | 0x66, 0x0f, 0x20, 0xc0, /* movl %cr0,%eax */ | |
310 | 0x66, 0x83, 0xe0, 0x11, /* andl $0x00000011,%eax */ | |
311 | 0x66, 0x0d, 0x00, 0x00, 0x00, 0x60, /* orl $0x60000000,%eax */ | |
312 | 0x66, 0x0f, 0x22, 0xc0, /* movl %eax,%cr0 */ | |
313 | 0x66, 0x0f, 0x22, 0xd8, /* movl %eax,%cr3 */ | |
314 | 0x66, 0x0f, 0x20, 0xc3, /* movl %cr0,%ebx */ | |
315 | 0x66, 0x81, 0xe3, 0x00, 0x00, 0x00, 0x60, /* andl $0x60000000,%ebx */ | |
316 | 0x74, 0x02, /* jz f */ | |
317 | 0x0f, 0x09, /* wbinvd */ | |
318 | 0x24, 0x10, /* f: andb $0x10,al */ | |
319 | 0x66, 0x0f, 0x22, 0xc0 /* movl %eax,%cr0 */ | |
320 | }; | |
ebdd561a | 321 | static const unsigned char jump_to_bios [] = |
1da177e4 LT |
322 | { |
323 | 0xea, 0x00, 0x00, 0xff, 0xff /* ljmp $0xffff,$0x0000 */ | |
324 | }; | |
325 | ||
326 | /* | |
327 | * Switch to real mode and then execute the code | |
328 | * specified by the code and length parameters. | |
329 | * We assume that length will aways be less that 100! | |
330 | */ | |
ebdd561a | 331 | void machine_real_restart(const unsigned char *code, int length) |
1da177e4 | 332 | { |
1da177e4 LT |
333 | local_irq_disable(); |
334 | ||
335 | /* Write zero to CMOS register number 0x0f, which the BIOS POST | |
336 | routine will recognize as telling it to do a proper reboot. (Well | |
337 | that's what this book in front of me says -- it may only apply to | |
338 | the Phoenix BIOS though, it's not clear). At the same time, | |
339 | disable NMIs by setting the top bit in the CMOS address register, | |
340 | as we're about to do peculiar things to the CPU. I'm not sure if | |
341 | `outb_p' is needed instead of just `outb'. Use it to be on the | |
342 | safe side. (Yes, CMOS_WRITE does outb_p's. - Paul G.) | |
343 | */ | |
62dbc210 | 344 | spin_lock(&rtc_lock); |
1da177e4 | 345 | CMOS_WRITE(0x00, 0x8f); |
62dbc210 | 346 | spin_unlock(&rtc_lock); |
1da177e4 LT |
347 | |
348 | /* Remap the kernel at virtual address zero, as well as offset zero | |
349 | from the kernel segment. This assumes the kernel segment starts at | |
350 | virtual address PAGE_OFFSET. */ | |
68db065c | 351 | memcpy(swapper_pg_dir, swapper_pg_dir + KERNEL_PGD_BOUNDARY, |
4d022e35 | 352 | sizeof(swapper_pg_dir [0]) * KERNEL_PGD_PTRS); |
1da177e4 LT |
353 | |
354 | /* | |
355 | * Use `swapper_pg_dir' as our page directory. | |
356 | */ | |
357 | load_cr3(swapper_pg_dir); | |
358 | ||
359 | /* Write 0x1234 to absolute memory location 0x472. The BIOS reads | |
360 | this on booting to tell it to "Bypass memory test (also warm | |
361 | boot)". This seems like a fairly standard thing that gets set by | |
362 | REBOOT.COM programs, and the previous reset routine did this | |
363 | too. */ | |
1da177e4 LT |
364 | *((unsigned short *)0x472) = reboot_mode; |
365 | ||
366 | /* For the switch to real mode, copy some code to low memory. It has | |
367 | to be in the first 64k because it is running in 16-bit mode, and it | |
368 | has to have the same physical and virtual address, because it turns | |
369 | off paging. Copy it near the end of the first page, out of the way | |
370 | of BIOS variables. */ | |
4d022e35 | 371 | memcpy((void *)(0x1000 - sizeof(real_mode_switch) - 100), |
1da177e4 | 372 | real_mode_switch, sizeof (real_mode_switch)); |
4d022e35 | 373 | memcpy((void *)(0x1000 - 100), code, length); |
1da177e4 LT |
374 | |
375 | /* Set up the IDT for real mode. */ | |
4d37e7e3 | 376 | load_idt(&real_mode_idt); |
1da177e4 LT |
377 | |
378 | /* Set up a GDT from which we can load segment descriptors for real | |
379 | mode. The GDT is not used in real mode; it is just needed here to | |
380 | prepare the descriptors. */ | |
4d37e7e3 | 381 | load_gdt(&real_mode_gdt); |
1da177e4 LT |
382 | |
383 | /* Load the data segment registers, and thus the descriptors ready for | |
384 | real mode. The base address of each segment is 0x100, 16 times the | |
385 | selector value being loaded here. This is so that the segment | |
386 | registers don't have to be reloaded after switching to real mode: | |
387 | the values are consistent for real mode operation already. */ | |
1da177e4 LT |
388 | __asm__ __volatile__ ("movl $0x0010,%%eax\n" |
389 | "\tmovl %%eax,%%ds\n" | |
390 | "\tmovl %%eax,%%es\n" | |
391 | "\tmovl %%eax,%%fs\n" | |
392 | "\tmovl %%eax,%%gs\n" | |
393 | "\tmovl %%eax,%%ss" : : : "eax"); | |
394 | ||
395 | /* Jump to the 16-bit code that we copied earlier. It disables paging | |
396 | and the cache, switches to real mode, and jumps to the BIOS reset | |
397 | entry point. */ | |
1da177e4 LT |
398 | __asm__ __volatile__ ("ljmp $0x0008,%0" |
399 | : | |
4d022e35 | 400 | : "i" ((void *)(0x1000 - sizeof (real_mode_switch) - 100))); |
1da177e4 | 401 | } |
129f6946 AD |
402 | #ifdef CONFIG_APM_MODULE |
403 | EXPORT_SYMBOL(machine_real_restart); | |
404 | #endif | |
1da177e4 | 405 | |
4d022e35 MB |
406 | #endif /* CONFIG_X86_32 */ |
407 | ||
6c6c51e4 | 408 | /* |
498cdbfb | 409 | * Some Apple MacBook and MacBookPro's needs reboot=p to be able to reboot |
6c6c51e4 PM |
410 | */ |
411 | static int __init set_pci_reboot(const struct dmi_system_id *d) | |
412 | { | |
413 | if (reboot_type != BOOT_CF9) { | |
414 | reboot_type = BOOT_CF9; | |
415 | printk(KERN_INFO "%s series board detected. " | |
416 | "Selecting PCI-method for reboots.\n", d->ident); | |
417 | } | |
418 | return 0; | |
419 | } | |
420 | ||
421 | static struct dmi_system_id __initdata pci_reboot_dmi_table[] = { | |
3e03bbea | 422 | { /* Handle problems with rebooting on Apple MacBook5 */ |
6c6c51e4 | 423 | .callback = set_pci_reboot, |
3e03bbea | 424 | .ident = "Apple MacBook5", |
6c6c51e4 PM |
425 | .matches = { |
426 | DMI_MATCH(DMI_SYS_VENDOR, "Apple Inc."), | |
3e03bbea | 427 | DMI_MATCH(DMI_PRODUCT_NAME, "MacBook5"), |
6c6c51e4 PM |
428 | }, |
429 | }, | |
3e03bbea | 430 | { /* Handle problems with rebooting on Apple MacBookPro5 */ |
498cdbfb | 431 | .callback = set_pci_reboot, |
3e03bbea | 432 | .ident = "Apple MacBookPro5", |
498cdbfb OÇ |
433 | .matches = { |
434 | DMI_MATCH(DMI_SYS_VENDOR, "Apple Inc."), | |
3e03bbea | 435 | DMI_MATCH(DMI_PRODUCT_NAME, "MacBookPro5"), |
498cdbfb OÇ |
436 | }, |
437 | }, | |
6c6c51e4 PM |
438 | { } |
439 | }; | |
440 | ||
441 | static int __init pci_reboot_init(void) | |
442 | { | |
443 | dmi_check_system(pci_reboot_dmi_table); | |
444 | return 0; | |
445 | } | |
446 | core_initcall(pci_reboot_init); | |
447 | ||
4d022e35 MB |
448 | static inline void kb_wait(void) |
449 | { | |
450 | int i; | |
451 | ||
c84d6af8 AC |
452 | for (i = 0; i < 0x10000; i++) { |
453 | if ((inb(0x64) & 0x02) == 0) | |
4d022e35 | 454 | break; |
c84d6af8 AC |
455 | udelay(2); |
456 | } | |
4d022e35 MB |
457 | } |
458 | ||
d176720d EH |
459 | static void vmxoff_nmi(int cpu, struct die_args *args) |
460 | { | |
461 | cpu_emergency_vmxoff(); | |
462 | } | |
463 | ||
464 | /* Use NMIs as IPIs to tell all CPUs to disable virtualization | |
465 | */ | |
466 | static void emergency_vmx_disable_all(void) | |
467 | { | |
468 | /* Just make sure we won't change CPUs while doing this */ | |
469 | local_irq_disable(); | |
470 | ||
471 | /* We need to disable VMX on all CPUs before rebooting, otherwise | |
472 | * we risk hanging up the machine, because the CPU ignore INIT | |
473 | * signals when VMX is enabled. | |
474 | * | |
475 | * We can't take any locks and we may be on an inconsistent | |
476 | * state, so we use NMIs as IPIs to tell the other CPUs to disable | |
477 | * VMX and halt. | |
478 | * | |
479 | * For safety, we will avoid running the nmi_shootdown_cpus() | |
480 | * stuff unnecessarily, but we don't have a way to check | |
481 | * if other CPUs have VMX enabled. So we will call it only if the | |
482 | * CPU we are running on has VMX enabled. | |
483 | * | |
484 | * We will miss cases where VMX is not enabled on all CPUs. This | |
485 | * shouldn't do much harm because KVM always enable VMX on all | |
486 | * CPUs anyway. But we can miss it on the small window where KVM | |
487 | * is still enabling VMX. | |
488 | */ | |
489 | if (cpu_has_vmx() && cpu_vmx_enabled()) { | |
490 | /* Disable VMX on this CPU. | |
491 | */ | |
492 | cpu_vmxoff(); | |
493 | ||
494 | /* Halt and disable VMX on the other CPUs */ | |
495 | nmi_shootdown_cpus(vmxoff_nmi); | |
496 | ||
497 | } | |
498 | } | |
499 | ||
500 | ||
7432d149 IM |
501 | void __attribute__((weak)) mach_reboot_fixups(void) |
502 | { | |
503 | } | |
504 | ||
416e2d63 | 505 | static void native_machine_emergency_restart(void) |
1da177e4 | 506 | { |
4d022e35 MB |
507 | int i; |
508 | ||
d176720d EH |
509 | if (reboot_emergency) |
510 | emergency_vmx_disable_all(); | |
511 | ||
840c2baf JC |
512 | tboot_shutdown(TB_SHUTDOWN_REBOOT); |
513 | ||
4d022e35 MB |
514 | /* Tell the BIOS if we want cold or warm reboot */ |
515 | *((unsigned short *)__va(0x472)) = reboot_mode; | |
516 | ||
517 | for (;;) { | |
518 | /* Could also try the reset bit in the Hammer NB */ | |
519 | switch (reboot_type) { | |
520 | case BOOT_KBD: | |
7432d149 IM |
521 | mach_reboot_fixups(); /* for board specific fixups */ |
522 | ||
4d022e35 MB |
523 | for (i = 0; i < 10; i++) { |
524 | kb_wait(); | |
525 | udelay(50); | |
526 | outb(0xfe, 0x64); /* pulse reset low */ | |
527 | udelay(50); | |
528 | } | |
529 | ||
530 | case BOOT_TRIPLE: | |
ebdd561a | 531 | load_idt(&no_idt); |
4d022e35 MB |
532 | __asm__ __volatile__("int3"); |
533 | ||
534 | reboot_type = BOOT_KBD; | |
535 | break; | |
536 | ||
537 | #ifdef CONFIG_X86_32 | |
538 | case BOOT_BIOS: | |
539 | machine_real_restart(jump_to_bios, sizeof(jump_to_bios)); | |
540 | ||
541 | reboot_type = BOOT_KBD; | |
542 | break; | |
543 | #endif | |
544 | ||
545 | case BOOT_ACPI: | |
546 | acpi_reboot(); | |
547 | reboot_type = BOOT_KBD; | |
548 | break; | |
549 | ||
4d022e35 MB |
550 | case BOOT_EFI: |
551 | if (efi_enabled) | |
14d7ca5c PA |
552 | efi.reset_system(reboot_mode ? |
553 | EFI_RESET_WARM : | |
554 | EFI_RESET_COLD, | |
4d022e35 | 555 | EFI_SUCCESS, 0, NULL); |
b47b9288 | 556 | reboot_type = BOOT_KBD; |
14d7ca5c | 557 | break; |
4d022e35 | 558 | |
14d7ca5c PA |
559 | case BOOT_CF9: |
560 | port_cf9_safe = true; | |
561 | /* fall through */ | |
4d022e35 | 562 | |
14d7ca5c PA |
563 | case BOOT_CF9_COND: |
564 | if (port_cf9_safe) { | |
565 | u8 cf9 = inb(0xcf9) & ~6; | |
566 | outb(cf9|2, 0xcf9); /* Request hard reset */ | |
567 | udelay(50); | |
568 | outb(cf9|6, 0xcf9); /* Actually do the reset */ | |
569 | udelay(50); | |
570 | } | |
4d022e35 MB |
571 | reboot_type = BOOT_KBD; |
572 | break; | |
573 | } | |
574 | } | |
575 | } | |
576 | ||
3c62c625 | 577 | void native_machine_shutdown(void) |
4d022e35 MB |
578 | { |
579 | /* Stop the cpus and apics */ | |
1da177e4 | 580 | #ifdef CONFIG_SMP |
dd2a1305 EB |
581 | |
582 | /* The boot cpu is always logical cpu 0 */ | |
65c01184 | 583 | int reboot_cpu_id = 0; |
dd2a1305 | 584 | |
4d022e35 | 585 | #ifdef CONFIG_X86_32 |
dd2a1305 | 586 | /* See if there has been given a command line override */ |
9628937d | 587 | if ((reboot_cpu != -1) && (reboot_cpu < nr_cpu_ids) && |
0bc3cc03 | 588 | cpu_online(reboot_cpu)) |
dd2a1305 | 589 | reboot_cpu_id = reboot_cpu; |
4d022e35 | 590 | #endif |
1da177e4 | 591 | |
4d022e35 | 592 | /* Make certain the cpu I'm about to reboot on is online */ |
0bc3cc03 | 593 | if (!cpu_online(reboot_cpu_id)) |
dd2a1305 | 594 | reboot_cpu_id = smp_processor_id(); |
dd2a1305 EB |
595 | |
596 | /* Make certain I only run on the appropriate processor */ | |
9628937d | 597 | set_cpus_allowed_ptr(current, cpumask_of(reboot_cpu_id)); |
dd2a1305 | 598 | |
4d022e35 MB |
599 | /* O.K Now that I'm on the appropriate processor, |
600 | * stop all of the others. | |
1da177e4 LT |
601 | */ |
602 | smp_send_stop(); | |
4d022e35 | 603 | #endif |
1da177e4 LT |
604 | |
605 | lapic_shutdown(); | |
606 | ||
607 | #ifdef CONFIG_X86_IO_APIC | |
608 | disable_IO_APIC(); | |
609 | #endif | |
4d022e35 | 610 | |
c86c7fbc OH |
611 | #ifdef CONFIG_HPET_TIMER |
612 | hpet_disable(); | |
613 | #endif | |
dd2a1305 | 614 | |
4d022e35 MB |
615 | #ifdef CONFIG_X86_64 |
616 | pci_iommu_shutdown(); | |
617 | #endif | |
973efae2 JF |
618 | } |
619 | ||
d176720d EH |
620 | static void __machine_emergency_restart(int emergency) |
621 | { | |
622 | reboot_emergency = emergency; | |
623 | machine_ops.emergency_restart(); | |
624 | } | |
625 | ||
416e2d63 | 626 | static void native_machine_restart(char *__unused) |
dd2a1305 | 627 | { |
4d022e35 | 628 | printk("machine restart\n"); |
1da177e4 | 629 | |
4d022e35 MB |
630 | if (!reboot_force) |
631 | machine_shutdown(); | |
d176720d | 632 | __machine_emergency_restart(0); |
4a1421f8 EB |
633 | } |
634 | ||
416e2d63 | 635 | static void native_machine_halt(void) |
1da177e4 | 636 | { |
d3ec5cae IV |
637 | /* stop other cpus and apics */ |
638 | machine_shutdown(); | |
639 | ||
840c2baf JC |
640 | tboot_shutdown(TB_SHUTDOWN_HALT); |
641 | ||
d3ec5cae IV |
642 | /* stop this cpu */ |
643 | stop_this_cpu(NULL); | |
1da177e4 LT |
644 | } |
645 | ||
416e2d63 | 646 | static void native_machine_power_off(void) |
1da177e4 | 647 | { |
6e3fbee5 | 648 | if (pm_power_off) { |
4d022e35 MB |
649 | if (!reboot_force) |
650 | machine_shutdown(); | |
1da177e4 | 651 | pm_power_off(); |
6e3fbee5 | 652 | } |
840c2baf JC |
653 | /* a fallback in case there is no PM info available */ |
654 | tboot_shutdown(TB_SHUTDOWN_HALT); | |
1da177e4 LT |
655 | } |
656 | ||
07f3331c | 657 | struct machine_ops machine_ops = { |
416e2d63 JB |
658 | .power_off = native_machine_power_off, |
659 | .shutdown = native_machine_shutdown, | |
660 | .emergency_restart = native_machine_emergency_restart, | |
661 | .restart = native_machine_restart, | |
ed23dc6f GC |
662 | .halt = native_machine_halt, |
663 | #ifdef CONFIG_KEXEC | |
664 | .crash_shutdown = native_machine_crash_shutdown, | |
665 | #endif | |
07f3331c | 666 | }; |
416e2d63 JB |
667 | |
668 | void machine_power_off(void) | |
669 | { | |
670 | machine_ops.power_off(); | |
671 | } | |
672 | ||
673 | void machine_shutdown(void) | |
674 | { | |
675 | machine_ops.shutdown(); | |
676 | } | |
677 | ||
678 | void machine_emergency_restart(void) | |
679 | { | |
d176720d | 680 | __machine_emergency_restart(1); |
416e2d63 JB |
681 | } |
682 | ||
683 | void machine_restart(char *cmd) | |
684 | { | |
685 | machine_ops.restart(cmd); | |
686 | } | |
687 | ||
688 | void machine_halt(void) | |
689 | { | |
690 | machine_ops.halt(); | |
691 | } | |
692 | ||
ed23dc6f GC |
693 | #ifdef CONFIG_KEXEC |
694 | void machine_crash_shutdown(struct pt_regs *regs) | |
695 | { | |
696 | machine_ops.crash_shutdown(regs); | |
697 | } | |
698 | #endif | |
2ddded21 EH |
699 | |
700 | ||
bb8dd270 | 701 | #if defined(CONFIG_SMP) |
2ddded21 EH |
702 | |
703 | /* This keeps a track of which one is crashing cpu. */ | |
704 | static int crashing_cpu; | |
705 | static nmi_shootdown_cb shootdown_callback; | |
706 | ||
707 | static atomic_t waiting_for_crash_ipi; | |
708 | ||
709 | static int crash_nmi_callback(struct notifier_block *self, | |
710 | unsigned long val, void *data) | |
711 | { | |
712 | int cpu; | |
713 | ||
714 | if (val != DIE_NMI_IPI) | |
715 | return NOTIFY_OK; | |
716 | ||
717 | cpu = raw_smp_processor_id(); | |
718 | ||
719 | /* Don't do anything if this handler is invoked on crashing cpu. | |
720 | * Otherwise, system will completely hang. Crashing cpu can get | |
721 | * an NMI if system was initially booted with nmi_watchdog parameter. | |
722 | */ | |
723 | if (cpu == crashing_cpu) | |
724 | return NOTIFY_STOP; | |
725 | local_irq_disable(); | |
726 | ||
727 | shootdown_callback(cpu, (struct die_args *)data); | |
728 | ||
729 | atomic_dec(&waiting_for_crash_ipi); | |
730 | /* Assume hlt works */ | |
731 | halt(); | |
732 | for (;;) | |
733 | cpu_relax(); | |
734 | ||
735 | return 1; | |
736 | } | |
737 | ||
738 | static void smp_send_nmi_allbutself(void) | |
739 | { | |
dac5f412 | 740 | apic->send_IPI_allbutself(NMI_VECTOR); |
2ddded21 EH |
741 | } |
742 | ||
743 | static struct notifier_block crash_nmi_nb = { | |
744 | .notifier_call = crash_nmi_callback, | |
745 | }; | |
746 | ||
bb8dd270 EH |
747 | /* Halt all other CPUs, calling the specified function on each of them |
748 | * | |
749 | * This function can be used to halt all other CPUs on crash | |
750 | * or emergency reboot time. The function passed as parameter | |
751 | * will be called inside a NMI handler on all CPUs. | |
752 | */ | |
2ddded21 EH |
753 | void nmi_shootdown_cpus(nmi_shootdown_cb callback) |
754 | { | |
755 | unsigned long msecs; | |
c415b3dc | 756 | local_irq_disable(); |
2ddded21 EH |
757 | |
758 | /* Make a note of crashing cpu. Will be used in NMI callback.*/ | |
759 | crashing_cpu = safe_smp_processor_id(); | |
760 | ||
761 | shootdown_callback = callback; | |
762 | ||
763 | atomic_set(&waiting_for_crash_ipi, num_online_cpus() - 1); | |
764 | /* Would it be better to replace the trap vector here? */ | |
765 | if (register_die_notifier(&crash_nmi_nb)) | |
766 | return; /* return what? */ | |
767 | /* Ensure the new callback function is set before sending | |
768 | * out the NMI | |
769 | */ | |
770 | wmb(); | |
771 | ||
772 | smp_send_nmi_allbutself(); | |
773 | ||
774 | msecs = 1000; /* Wait at most a second for the other cpus to stop */ | |
775 | while ((atomic_read(&waiting_for_crash_ipi) > 0) && msecs) { | |
776 | mdelay(1); | |
777 | msecs--; | |
778 | } | |
779 | ||
780 | /* Leave the nmi callback set */ | |
781 | } | |
bb8dd270 EH |
782 | #else /* !CONFIG_SMP */ |
783 | void nmi_shootdown_cpus(nmi_shootdown_cb callback) | |
784 | { | |
785 | /* No other CPUs to shoot down */ | |
786 | } | |
2ddded21 | 787 | #endif |