Merge branch 'x86-irq-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git...
[linux-2.6-block.git] / arch / x86 / kernel / process_64.c
CommitLineData
1da177e4 1/*
1da177e4
LT
2 * Copyright (C) 1995 Linus Torvalds
3 *
4 * Pentium III FXSR, SSE support
5 * Gareth Hughes <gareth@valinux.com>, May 2000
6612538c 6 *
1da177e4
LT
7 * X86-64 port
8 * Andi Kleen.
76e4f660
AR
9 *
10 * CPU hotplug support - ashok.raj@intel.com
1da177e4
LT
11 */
12
13/*
14 * This file handles the architecture-dependent parts of process handling..
15 */
16
42059429 17#include <linux/stackprotector.h>
76e4f660 18#include <linux/cpu.h>
1da177e4
LT
19#include <linux/errno.h>
20#include <linux/sched.h>
6612538c 21#include <linux/fs.h>
1da177e4
LT
22#include <linux/kernel.h>
23#include <linux/mm.h>
24#include <linux/elfcore.h>
25#include <linux/smp.h>
26#include <linux/slab.h>
27#include <linux/user.h>
1da177e4
LT
28#include <linux/interrupt.h>
29#include <linux/delay.h>
6612538c 30#include <linux/module.h>
1da177e4 31#include <linux/ptrace.h>
95833c83 32#include <linux/notifier.h>
c6fd91f0 33#include <linux/kprobes.h>
1eeb66a1 34#include <linux/kdebug.h>
02290683 35#include <linux/tick.h>
529e25f6 36#include <linux/prctl.h>
7de08b4e
GP
37#include <linux/uaccess.h>
38#include <linux/io.h>
8b96f011 39#include <linux/ftrace.h>
1da177e4 40
1da177e4
LT
41#include <asm/pgtable.h>
42#include <asm/system.h>
1da177e4
LT
43#include <asm/processor.h>
44#include <asm/i387.h>
45#include <asm/mmu_context.h>
1da177e4 46#include <asm/prctl.h>
1da177e4
LT
47#include <asm/desc.h>
48#include <asm/proto.h>
49#include <asm/ia32.h>
95833c83 50#include <asm/idle.h>
bbc1f698 51#include <asm/syscalls.h>
66cb5917 52#include <asm/debugreg.h>
1da177e4
LT
53
54asmlinkage extern void ret_from_fork(void);
55
3d1e42a7 56DEFINE_PER_CPU(unsigned long, old_rsp);
c2558e0e 57static DEFINE_PER_CPU(unsigned char, is_idle);
3d1e42a7 58
e041c683 59static ATOMIC_NOTIFIER_HEAD(idle_notifier);
95833c83
AK
60
61void idle_notifier_register(struct notifier_block *n)
62{
e041c683 63 atomic_notifier_chain_register(&idle_notifier, n);
95833c83 64}
c7d87d79
VP
65EXPORT_SYMBOL_GPL(idle_notifier_register);
66
67void idle_notifier_unregister(struct notifier_block *n)
68{
69 atomic_notifier_chain_unregister(&idle_notifier, n);
70}
71EXPORT_SYMBOL_GPL(idle_notifier_unregister);
95833c83 72
95833c83
AK
73void enter_idle(void)
74{
c2558e0e 75 percpu_write(is_idle, 1);
e041c683 76 atomic_notifier_call_chain(&idle_notifier, IDLE_START, NULL);
95833c83
AK
77}
78
79static void __exit_idle(void)
80{
c2558e0e 81 if (x86_test_and_clear_bit_percpu(0, is_idle) == 0)
a15da49d 82 return;
e041c683 83 atomic_notifier_call_chain(&idle_notifier, IDLE_END, NULL);
95833c83
AK
84}
85
86/* Called from interrupts to signify idle end */
87void exit_idle(void)
88{
a15da49d
AK
89 /* idle loop has pid 0 */
90 if (current->pid)
95833c83
AK
91 return;
92 __exit_idle();
93}
94
913da64b 95#ifndef CONFIG_SMP
76e4f660
AR
96static inline void play_dead(void)
97{
98 BUG();
99}
913da64b 100#endif
76e4f660 101
1da177e4
LT
102/*
103 * The idle thread. There's no useful work to be
104 * done, so just try to conserve power and have a
105 * low exit latency (ie sit in a loop waiting for
106 * somebody to say that they'd like to reschedule)
107 */
b10db7f0 108void cpu_idle(void)
1da177e4 109{
495ab9c0 110 current_thread_info()->status |= TS_POLLING;
ce22bd92 111
ce22bd92 112 /*
5c79d2a5
TH
113 * If we're the non-boot CPU, nothing set the stack canary up
114 * for us. CPU0 already has it initialized but no harm in
115 * doing it again. This is a good place for updating it, as
116 * we wont ever return from this function (so the invalid
117 * canaries already on the stack wont ever trigger).
ce22bd92 118 */
18aa8bb1
IM
119 boot_init_stack_canary();
120
1da177e4
LT
121 /* endless idle loop with no priority at all */
122 while (1) {
b8f8c3cf 123 tick_nohz_stop_sched_tick(1);
1da177e4 124 while (!need_resched()) {
1da177e4 125
1da177e4 126 rmb();
6ddd2a27 127
76e4f660
AR
128 if (cpu_is_offline(smp_processor_id()))
129 play_dead();
d331e739
VP
130 /*
131 * Idle routines should keep interrupts disabled
132 * from here on, until they go to idle.
133 * Otherwise, idle callbacks can misfire.
134 */
135 local_irq_disable();
95833c83 136 enter_idle();
81d68a96
SR
137 /* Don't trace irqs off for idle */
138 stop_critical_timings();
6ddd2a27 139 pm_idle();
81d68a96 140 start_critical_timings();
a15da49d
AK
141 /* In many cases the interrupt that ended idle
142 has already called exit_idle. But some idle
143 loops can be woken up without interrupt. */
95833c83 144 __exit_idle();
1da177e4
LT
145 }
146
02290683 147 tick_nohz_restart_sched_tick();
5bfb5d69 148 preempt_enable_no_resched();
1da177e4 149 schedule();
5bfb5d69 150 preempt_disable();
1da177e4
LT
151 }
152}
153
6612538c 154/* Prints also some state that isn't saved in the pt_regs */
e2ce07c8 155void __show_regs(struct pt_regs *regs, int all)
1da177e4
LT
156{
157 unsigned long cr0 = 0L, cr2 = 0L, cr3 = 0L, cr4 = 0L, fs, gs, shadowgs;
bb1995d5 158 unsigned long d0, d1, d2, d3, d6, d7;
6612538c
HS
159 unsigned int fsindex, gsindex;
160 unsigned int ds, cs, es;
814e2c84
AI
161
162 show_regs_common();
d015a092 163 printk(KERN_DEFAULT "RIP: %04lx:[<%016lx>] ", regs->cs & 0xffff, regs->ip);
aafbd7eb 164 printk_address(regs->ip, 1);
d015a092 165 printk(KERN_DEFAULT "RSP: %04lx:%016lx EFLAGS: %08lx\n", regs->ss,
8092c654 166 regs->sp, regs->flags);
d015a092 167 printk(KERN_DEFAULT "RAX: %016lx RBX: %016lx RCX: %016lx\n",
65ea5b03 168 regs->ax, regs->bx, regs->cx);
d015a092 169 printk(KERN_DEFAULT "RDX: %016lx RSI: %016lx RDI: %016lx\n",
65ea5b03 170 regs->dx, regs->si, regs->di);
d015a092 171 printk(KERN_DEFAULT "RBP: %016lx R08: %016lx R09: %016lx\n",
65ea5b03 172 regs->bp, regs->r8, regs->r9);
d015a092 173 printk(KERN_DEFAULT "R10: %016lx R11: %016lx R12: %016lx\n",
7de08b4e 174 regs->r10, regs->r11, regs->r12);
d015a092 175 printk(KERN_DEFAULT "R13: %016lx R14: %016lx R15: %016lx\n",
7de08b4e 176 regs->r13, regs->r14, regs->r15);
1da177e4 177
7de08b4e
GP
178 asm("movl %%ds,%0" : "=r" (ds));
179 asm("movl %%cs,%0" : "=r" (cs));
180 asm("movl %%es,%0" : "=r" (es));
1da177e4
LT
181 asm("movl %%fs,%0" : "=r" (fsindex));
182 asm("movl %%gs,%0" : "=r" (gsindex));
183
184 rdmsrl(MSR_FS_BASE, fs);
7de08b4e
GP
185 rdmsrl(MSR_GS_BASE, gs);
186 rdmsrl(MSR_KERNEL_GS_BASE, shadowgs);
1da177e4 187
e2ce07c8
PE
188 if (!all)
189 return;
1da177e4 190
f51c9452
GOC
191 cr0 = read_cr0();
192 cr2 = read_cr2();
193 cr3 = read_cr3();
194 cr4 = read_cr4();
1da177e4 195
d015a092 196 printk(KERN_DEFAULT "FS: %016lx(%04x) GS:%016lx(%04x) knlGS:%016lx\n",
7de08b4e 197 fs, fsindex, gs, gsindex, shadowgs);
d015a092 198 printk(KERN_DEFAULT "CS: %04x DS: %04x ES: %04x CR0: %016lx\n", cs, ds,
8092c654 199 es, cr0);
d015a092 200 printk(KERN_DEFAULT "CR2: %016lx CR3: %016lx CR4: %016lx\n", cr2, cr3,
8092c654 201 cr4);
bb1995d5
AS
202
203 get_debugreg(d0, 0);
204 get_debugreg(d1, 1);
205 get_debugreg(d2, 2);
d015a092 206 printk(KERN_DEFAULT "DR0: %016lx DR1: %016lx DR2: %016lx\n", d0, d1, d2);
bb1995d5
AS
207 get_debugreg(d3, 3);
208 get_debugreg(d6, 6);
209 get_debugreg(d7, 7);
d015a092 210 printk(KERN_DEFAULT "DR3: %016lx DR6: %016lx DR7: %016lx\n", d3, d6, d7);
1da177e4
LT
211}
212
1da177e4
LT
213void release_thread(struct task_struct *dead_task)
214{
215 if (dead_task->mm) {
216 if (dead_task->mm->context.size) {
217 printk("WARNING: dead process %8s still has LDT? <%p/%d>\n",
218 dead_task->comm,
219 dead_task->mm->context.ldt,
220 dead_task->mm->context.size);
221 BUG();
222 }
223 }
224}
225
226static inline void set_32bit_tls(struct task_struct *t, int tls, u32 addr)
227{
6612538c 228 struct user_desc ud = {
1da177e4
LT
229 .base_addr = addr,
230 .limit = 0xfffff,
231 .seg_32bit = 1,
232 .limit_in_pages = 1,
233 .useable = 1,
234 };
ade1af77 235 struct desc_struct *desc = t->thread.tls_array;
1da177e4 236 desc += tls;
80fbb69a 237 fill_ldt(desc, &ud);
1da177e4
LT
238}
239
240static inline u32 read_32bit_tls(struct task_struct *t, int tls)
241{
91394eb0 242 return get_desc_base(&t->thread.tls_array[tls]);
1da177e4
LT
243}
244
245/*
246 * This gets called before we allocate a new thread and copy
247 * the current task into it.
248 */
249void prepare_to_copy(struct task_struct *tsk)
250{
251 unlazy_fpu(tsk);
252}
253
6f2c55b8 254int copy_thread(unsigned long clone_flags, unsigned long sp,
1da177e4 255 unsigned long unused,
7de08b4e 256 struct task_struct *p, struct pt_regs *regs)
1da177e4
LT
257{
258 int err;
7de08b4e 259 struct pt_regs *childregs;
1da177e4
LT
260 struct task_struct *me = current;
261
a88cde13 262 childregs = ((struct pt_regs *)
57eafdc2 263 (THREAD_SIZE + task_stack_page(p))) - 1;
1da177e4
LT
264 *childregs = *regs;
265
65ea5b03 266 childregs->ax = 0;
fa4b8f84
BG
267 if (user_mode(regs))
268 childregs->sp = sp;
269 else
65ea5b03 270 childregs->sp = (unsigned long)childregs;
1da177e4 271
faca6227
PA
272 p->thread.sp = (unsigned long) childregs;
273 p->thread.sp0 = (unsigned long) (childregs+1);
274 p->thread.usersp = me->thread.usersp;
1da177e4 275
e4f17c43 276 set_tsk_thread_flag(p, TIF_FORK);
1da177e4 277
66cb5917 278 p->thread.io_bitmap_ptr = NULL;
1da177e4 279
ada85708 280 savesegment(gs, p->thread.gsindex);
7ce5a2b9 281 p->thread.gs = p->thread.gsindex ? 0 : me->thread.gs;
ada85708 282 savesegment(fs, p->thread.fsindex);
7ce5a2b9 283 p->thread.fs = p->thread.fsindex ? 0 : me->thread.fs;
ada85708
JF
284 savesegment(es, p->thread.es);
285 savesegment(ds, p->thread.ds);
1da177e4 286
66cb5917 287 err = -ENOMEM;
24f1e32c 288 memset(p->thread.ptrace_bps, 0, sizeof(p->thread.ptrace_bps));
66cb5917 289
d3a4f48d 290 if (unlikely(test_tsk_thread_flag(me, TIF_IO_BITMAP))) {
1da177e4
LT
291 p->thread.io_bitmap_ptr = kmalloc(IO_BITMAP_BYTES, GFP_KERNEL);
292 if (!p->thread.io_bitmap_ptr) {
293 p->thread.io_bitmap_max = 0;
294 return -ENOMEM;
295 }
a88cde13
AK
296 memcpy(p->thread.io_bitmap_ptr, me->thread.io_bitmap_ptr,
297 IO_BITMAP_BYTES);
d3a4f48d 298 set_tsk_thread_flag(p, TIF_IO_BITMAP);
6612538c 299 }
1da177e4
LT
300
301 /*
302 * Set a new TLS for the child thread?
303 */
304 if (clone_flags & CLONE_SETTLS) {
305#ifdef CONFIG_IA32_EMULATION
306 if (test_thread_flag(TIF_IA32))
efd1ca52 307 err = do_set_thread_area(p, -1,
65ea5b03 308 (struct user_desc __user *)childregs->si, 0);
7de08b4e
GP
309 else
310#endif
311 err = do_arch_prctl(p, ARCH_SET_FS, childregs->r8);
312 if (err)
1da177e4
LT
313 goto out;
314 }
315 err = 0;
316out:
317 if (err && p->thread.io_bitmap_ptr) {
318 kfree(p->thread.io_bitmap_ptr);
319 p->thread.io_bitmap_max = 0;
320 }
66cb5917 321
1da177e4
LT
322 return err;
323}
324
e634d8fc
PA
325static void
326start_thread_common(struct pt_regs *regs, unsigned long new_ip,
327 unsigned long new_sp,
328 unsigned int _cs, unsigned int _ss, unsigned int _ds)
513ad84b 329{
ada85708 330 loadsegment(fs, 0);
e634d8fc
PA
331 loadsegment(es, _ds);
332 loadsegment(ds, _ds);
513ad84b
IM
333 load_gs_index(0);
334 regs->ip = new_ip;
335 regs->sp = new_sp;
3d1e42a7 336 percpu_write(old_rsp, new_sp);
e634d8fc
PA
337 regs->cs = _cs;
338 regs->ss = _ss;
a6f05a6a 339 regs->flags = X86_EFLAGS_IF;
513ad84b 340 set_fs(USER_DS);
aa283f49
SS
341 /*
342 * Free the old FP and other extended state
343 */
344 free_thread_xstate(current);
513ad84b 345}
e634d8fc
PA
346
347void
348start_thread(struct pt_regs *regs, unsigned long new_ip, unsigned long new_sp)
349{
350 start_thread_common(regs, new_ip, new_sp,
351 __USER_CS, __USER_DS, 0);
352}
513ad84b 353
a6f05a6a
PA
354#ifdef CONFIG_IA32_EMULATION
355void start_thread_ia32(struct pt_regs *regs, u32 new_ip, u32 new_sp)
356{
e634d8fc
PA
357 start_thread_common(regs, new_ip, new_sp,
358 __USER32_CS, __USER32_DS, __USER32_DS);
a6f05a6a
PA
359}
360#endif
513ad84b 361
1da177e4
LT
362/*
363 * switch_to(x,y) should switch tasks from x to y.
364 *
6612538c 365 * This could still be optimized:
1da177e4
LT
366 * - fold all the options into a flag word and test it with a single test.
367 * - could test fs/gs bitsliced
099f318b
AK
368 *
369 * Kprobes not supported here. Set the probe on schedule instead.
8b96f011 370 * Function graph tracer not supported too.
1da177e4 371 */
8b96f011 372__notrace_funcgraph struct task_struct *
a88cde13 373__switch_to(struct task_struct *prev_p, struct task_struct *next_p)
1da177e4 374{
87b935a0
JF
375 struct thread_struct *prev = &prev_p->thread;
376 struct thread_struct *next = &next_p->thread;
6612538c 377 int cpu = smp_processor_id();
1da177e4 378 struct tss_struct *tss = &per_cpu(init_tss, cpu);
478de5a9 379 unsigned fsindex, gsindex;
17950c5b
JF
380 bool preload_fpu;
381
382 /*
383 * If the task has used fpu the last 5 timeslices, just do a full
384 * restore of the math state immediately to avoid the trap; the
385 * chances of needing FPU soon are obviously high now
386 */
387 preload_fpu = tsk_used_math(next_p) && next_p->fpu_counter > 5;
1da177e4 388
e07e23e1 389 /* we're going to use this soon, after a few expensive things */
17950c5b 390 if (preload_fpu)
86603283 391 prefetch(next->fpu.state);
e07e23e1 392
1da177e4
LT
393 /*
394 * Reload esp0, LDT and the page table pointer:
395 */
7818a1e0 396 load_sp0(tss, next);
1da177e4 397
7de08b4e 398 /*
1da177e4
LT
399 * Switch DS and ES.
400 * This won't pick up thread selector changes, but I guess that is ok.
401 */
ada85708 402 savesegment(es, prev->es);
1da177e4 403 if (unlikely(next->es | prev->es))
7de08b4e 404 loadsegment(es, next->es);
ada85708
JF
405
406 savesegment(ds, prev->ds);
1da177e4
LT
407 if (unlikely(next->ds | prev->ds))
408 loadsegment(ds, next->ds);
409
478de5a9
JF
410
411 /* We must save %fs and %gs before load_TLS() because
412 * %fs and %gs may be cleared by load_TLS().
413 *
414 * (e.g. xen_load_tls())
415 */
416 savesegment(fs, fsindex);
417 savesegment(gs, gsindex);
418
1da177e4
LT
419 load_TLS(next, cpu);
420
16d9dbf0
JF
421 /* Must be after DS reload */
422 unlazy_fpu(prev_p);
423
17950c5b
JF
424 /* Make sure cpu is ready for new context */
425 if (preload_fpu)
426 clts();
427
3fe0a63e
JF
428 /*
429 * Leave lazy mode, flushing any hypercalls made here.
430 * This must be done before restoring TLS segments so
431 * the GDT and LDT are properly updated, and must be
432 * done before math_state_restore, so the TS bit is up
433 * to date.
434 */
224101ed 435 arch_end_context_switch(next_p);
3fe0a63e 436
7de08b4e 437 /*
1da177e4 438 * Switch FS and GS.
87b935a0
JF
439 *
440 * Segment register != 0 always requires a reload. Also
441 * reload when it has changed. When prev process used 64bit
442 * base always reload to avoid an information leak.
1da177e4 443 */
87b935a0
JF
444 if (unlikely(fsindex | next->fsindex | prev->fs)) {
445 loadsegment(fs, next->fsindex);
7de08b4e 446 /*
87b935a0
JF
447 * Check if the user used a selector != 0; if yes
448 * clear 64bit base, since overloaded base is always
449 * mapped to the Null selector
450 */
451 if (fsindex)
7de08b4e 452 prev->fs = 0;
1da177e4 453 }
87b935a0
JF
454 /* when next process has a 64bit base use it */
455 if (next->fs)
456 wrmsrl(MSR_FS_BASE, next->fs);
457 prev->fsindex = fsindex;
458
459 if (unlikely(gsindex | next->gsindex | prev->gs)) {
460 load_gs_index(next->gsindex);
461 if (gsindex)
7de08b4e 462 prev->gs = 0;
1da177e4 463 }
87b935a0
JF
464 if (next->gs)
465 wrmsrl(MSR_KERNEL_GS_BASE, next->gs);
466 prev->gsindex = gsindex;
1da177e4 467
7de08b4e 468 /*
45948d77 469 * Switch the PDA and FPU contexts.
1da177e4 470 */
3d1e42a7
BG
471 prev->usersp = percpu_read(old_rsp);
472 percpu_write(old_rsp, next->usersp);
c6f5e0ac 473 percpu_write(current_task, next_p);
18bd057b 474
9af45651 475 percpu_write(kernel_stack,
87b935a0 476 (unsigned long)task_stack_page(next_p) +
9af45651 477 THREAD_SIZE - KERNEL_STACK_OFFSET);
1da177e4
LT
478
479 /*
d3a4f48d 480 * Now maybe reload the debug registers and handle I/O bitmaps
1da177e4 481 */
eee3af4a
MM
482 if (unlikely(task_thread_info(next_p)->flags & _TIF_WORK_CTXSW_NEXT ||
483 task_thread_info(prev_p)->flags & _TIF_WORK_CTXSW_PREV))
d3a4f48d 484 __switch_to_xtra(prev_p, next_p, tss);
1da177e4 485
17950c5b
JF
486 /*
487 * Preload the FPU context, now that we've determined that the
488 * task is likely to be using it.
e07e23e1 489 */
17950c5b
JF
490 if (preload_fpu)
491 __math_state_restore();
66cb5917 492
1da177e4
LT
493 return prev_p;
494}
495
1da177e4
LT
496void set_personality_64bit(void)
497{
498 /* inherit personality from parent */
499
500 /* Make sure to be in 64bit mode */
6612538c 501 clear_thread_flag(TIF_IA32);
1da177e4
LT
502
503 /* TBD: overwrites user setup. Should have two bits.
504 But 64bit processes have always behaved this way,
505 so it's not too bad. The main problem is just that
6612538c 506 32bit childs are affected again. */
1da177e4
LT
507 current->personality &= ~READ_IMPLIES_EXEC;
508}
509
05d43ed8
PA
510void set_personality_ia32(void)
511{
512 /* inherit personality from parent */
513
514 /* Make sure to be in 32bit mode */
515 set_thread_flag(TIF_IA32);
1252f238 516 current->personality |= force_personality32;
05d43ed8
PA
517
518 /* Prepare the first "return" to user space */
519 current_thread_info()->status |= TS_COMPAT;
520}
521
1da177e4
LT
522unsigned long get_wchan(struct task_struct *p)
523{
524 unsigned long stack;
7de08b4e 525 u64 fp, ip;
1da177e4
LT
526 int count = 0;
527
7de08b4e
GP
528 if (!p || p == current || p->state == TASK_RUNNING)
529 return 0;
57eafdc2 530 stack = (unsigned long)task_stack_page(p);
e1e23bb0 531 if (p->thread.sp < stack || p->thread.sp >= stack+THREAD_SIZE)
1da177e4 532 return 0;
faca6227 533 fp = *(u64 *)(p->thread.sp);
7de08b4e 534 do {
a88cde13 535 if (fp < (unsigned long)stack ||
e1e23bb0 536 fp >= (unsigned long)stack+THREAD_SIZE)
7de08b4e 537 return 0;
65ea5b03
PA
538 ip = *(u64 *)(fp+8);
539 if (!in_sched_functions(ip))
540 return ip;
7de08b4e
GP
541 fp = *(u64 *)fp;
542 } while (count++ < 16);
1da177e4
LT
543 return 0;
544}
545
546long do_arch_prctl(struct task_struct *task, int code, unsigned long addr)
7de08b4e
GP
547{
548 int ret = 0;
1da177e4
LT
549 int doit = task == current;
550 int cpu;
551
7de08b4e 552 switch (code) {
1da177e4 553 case ARCH_SET_GS:
84929801 554 if (addr >= TASK_SIZE_OF(task))
7de08b4e 555 return -EPERM;
1da177e4 556 cpu = get_cpu();
7de08b4e 557 /* handle small bases via the GDT because that's faster to
1da177e4 558 switch. */
7de08b4e
GP
559 if (addr <= 0xffffffff) {
560 set_32bit_tls(task, GS_TLS, addr);
561 if (doit) {
1da177e4 562 load_TLS(&task->thread, cpu);
7de08b4e 563 load_gs_index(GS_TLS_SEL);
1da177e4 564 }
7de08b4e 565 task->thread.gsindex = GS_TLS_SEL;
1da177e4 566 task->thread.gs = 0;
7de08b4e 567 } else {
1da177e4
LT
568 task->thread.gsindex = 0;
569 task->thread.gs = addr;
570 if (doit) {
a88cde13
AK
571 load_gs_index(0);
572 ret = checking_wrmsrl(MSR_KERNEL_GS_BASE, addr);
7de08b4e 573 }
1da177e4
LT
574 }
575 put_cpu();
576 break;
577 case ARCH_SET_FS:
578 /* Not strictly needed for fs, but do it for symmetry
579 with gs */
84929801 580 if (addr >= TASK_SIZE_OF(task))
6612538c 581 return -EPERM;
1da177e4 582 cpu = get_cpu();
6612538c 583 /* handle small bases via the GDT because that's faster to
1da177e4 584 switch. */
6612538c 585 if (addr <= 0xffffffff) {
1da177e4 586 set_32bit_tls(task, FS_TLS, addr);
6612538c
HS
587 if (doit) {
588 load_TLS(&task->thread, cpu);
ada85708 589 loadsegment(fs, FS_TLS_SEL);
1da177e4
LT
590 }
591 task->thread.fsindex = FS_TLS_SEL;
592 task->thread.fs = 0;
6612538c 593 } else {
1da177e4
LT
594 task->thread.fsindex = 0;
595 task->thread.fs = addr;
596 if (doit) {
597 /* set the selector to 0 to not confuse
598 __switch_to */
ada85708 599 loadsegment(fs, 0);
a88cde13 600 ret = checking_wrmsrl(MSR_FS_BASE, addr);
1da177e4
LT
601 }
602 }
603 put_cpu();
604 break;
6612538c
HS
605 case ARCH_GET_FS: {
606 unsigned long base;
1da177e4
LT
607 if (task->thread.fsindex == FS_TLS_SEL)
608 base = read_32bit_tls(task, FS_TLS);
a88cde13 609 else if (doit)
1da177e4 610 rdmsrl(MSR_FS_BASE, base);
a88cde13 611 else
1da177e4 612 base = task->thread.fs;
6612538c
HS
613 ret = put_user(base, (unsigned long __user *)addr);
614 break;
1da177e4 615 }
6612538c 616 case ARCH_GET_GS: {
1da177e4 617 unsigned long base;
97c2803c 618 unsigned gsindex;
1da177e4
LT
619 if (task->thread.gsindex == GS_TLS_SEL)
620 base = read_32bit_tls(task, GS_TLS);
97c2803c 621 else if (doit) {
ada85708 622 savesegment(gs, gsindex);
97c2803c
JB
623 if (gsindex)
624 rdmsrl(MSR_KERNEL_GS_BASE, base);
625 else
626 base = task->thread.gs;
7de08b4e 627 } else
1da177e4 628 base = task->thread.gs;
6612538c 629 ret = put_user(base, (unsigned long __user *)addr);
1da177e4
LT
630 break;
631 }
632
633 default:
634 ret = -EINVAL;
635 break;
6612538c 636 }
1da177e4 637
6612538c
HS
638 return ret;
639}
1da177e4
LT
640
641long sys_arch_prctl(int code, unsigned long addr)
642{
643 return do_arch_prctl(current, code, addr);
1da177e4
LT
644}
645
89240ba0
SS
646unsigned long KSTK_ESP(struct task_struct *task)
647{
648 return (test_tsk_thread_flag(task, TIF_IA32)) ?
649 (task_pt_regs(task)->sp) : ((task)->thread.usersp);
650}