Merge branches 'amd-iommu/fixes' and 'dma-debug/fixes' into iommu/fixes
[linux-2.6-block.git] / arch / x86 / kernel / process_32.c
CommitLineData
1da177e4 1/*
1da177e4
LT
2 * Copyright (C) 1995 Linus Torvalds
3 *
4 * Pentium III FXSR, SSE support
5 * Gareth Hughes <gareth@valinux.com>, May 2000
6 */
7
8/*
9 * This file handles the architecture-dependent parts of process handling..
10 */
11
5c79d2a5 12#include <linux/stackprotector.h>
f3705136 13#include <linux/cpu.h>
1da177e4
LT
14#include <linux/errno.h>
15#include <linux/sched.h>
16#include <linux/fs.h>
17#include <linux/kernel.h>
18#include <linux/mm.h>
19#include <linux/elfcore.h>
20#include <linux/smp.h>
1da177e4
LT
21#include <linux/stddef.h>
22#include <linux/slab.h>
23#include <linux/vmalloc.h>
24#include <linux/user.h>
1da177e4 25#include <linux/interrupt.h>
1da177e4
LT
26#include <linux/delay.h>
27#include <linux/reboot.h>
28#include <linux/init.h>
29#include <linux/mc146818rtc.h>
30#include <linux/module.h>
31#include <linux/kallsyms.h>
32#include <linux/ptrace.h>
c16b63e0 33#include <linux/personality.h>
74167347 34#include <linux/tick.h>
7c3576d2 35#include <linux/percpu.h>
529e25f6 36#include <linux/prctl.h>
8b96f011 37#include <linux/ftrace.h>
befa9e78
JSR
38#include <linux/uaccess.h>
39#include <linux/io.h>
40#include <linux/kdebug.h>
1da177e4 41
1da177e4
LT
42#include <asm/pgtable.h>
43#include <asm/system.h>
1da177e4
LT
44#include <asm/ldt.h>
45#include <asm/processor.h>
46#include <asm/i387.h>
1da177e4
LT
47#include <asm/desc.h>
48#ifdef CONFIG_MATH_EMULATION
49#include <asm/math_emu.h>
50#endif
51
1da177e4
LT
52#include <linux/err.h>
53
f3705136
ZM
54#include <asm/tlbflush.h>
55#include <asm/cpu.h>
1eda8149 56#include <asm/idle.h>
bbc1f698 57#include <asm/syscalls.h>
bf53de90 58#include <asm/ds.h>
66cb5917 59#include <asm/debugreg.h>
f3705136 60
1da177e4
LT
61asmlinkage void ret_from_fork(void) __asm__("ret_from_fork");
62
1da177e4
LT
63/*
64 * Return saved PC of a blocked thread.
65 */
66unsigned long thread_saved_pc(struct task_struct *tsk)
67{
faca6227 68 return ((unsigned long *)tsk->thread.sp)[3];
1da177e4
LT
69}
70
913da64b
AN
71#ifndef CONFIG_SMP
72static inline void play_dead(void)
73{
74 BUG();
75}
76#endif
77
1da177e4
LT
78/*
79 * The idle thread. There's no useful work to be
80 * done, so just try to conserve power and have a
81 * low exit latency (ie sit in a loop waiting for
82 * somebody to say that they'd like to reschedule)
83 */
f3705136 84void cpu_idle(void)
1da177e4 85{
5bfb5d69 86 int cpu = smp_processor_id();
f3705136 87
5c79d2a5
TH
88 /*
89 * If we're the non-boot CPU, nothing set the stack canary up
90 * for us. CPU0 already has it initialized but no harm in
91 * doing it again. This is a good place for updating it, as
92 * we wont ever return from this function (so the invalid
93 * canaries already on the stack wont ever trigger).
94 */
95 boot_init_stack_canary();
96
495ab9c0 97 current_thread_info()->status |= TS_POLLING;
64c7c8f8 98
1da177e4
LT
99 /* endless idle loop with no priority at all */
100 while (1) {
b8f8c3cf 101 tick_nohz_stop_sched_tick(1);
1da177e4 102 while (!need_resched()) {
1da177e4 103
f1d1a842 104 check_pgt_cache();
1da177e4 105 rmb();
1da177e4 106
f3705136
ZM
107 if (cpu_is_offline(cpu))
108 play_dead();
109
7f424a8b 110 local_irq_disable();
6cd8a4bb
SR
111 /* Don't trace irqs off for idle */
112 stop_critical_timings();
6ddd2a27 113 pm_idle();
6cd8a4bb 114 start_critical_timings();
1da177e4 115 }
74167347 116 tick_nohz_restart_sched_tick();
5bfb5d69 117 preempt_enable_no_resched();
1da177e4 118 schedule();
5bfb5d69 119 preempt_disable();
1da177e4
LT
120 }
121}
122
e2ce07c8 123void __show_regs(struct pt_regs *regs, int all)
1da177e4
LT
124{
125 unsigned long cr0 = 0L, cr2 = 0L, cr3 = 0L, cr4 = 0L;
bb1995d5 126 unsigned long d0, d1, d2, d3, d6, d7;
65ea5b03 127 unsigned long sp;
9d975ebd
PE
128 unsigned short ss, gs;
129
130 if (user_mode_vm(regs)) {
65ea5b03
PA
131 sp = regs->sp;
132 ss = regs->ss & 0xffff;
d9a89a26 133 gs = get_user_gs(regs);
9d975ebd 134 } else {
def3c5d0 135 sp = kernel_stack_pointer(regs);
9d975ebd
PE
136 savesegment(ss, ss);
137 savesegment(gs, gs);
138 }
1da177e4 139
814e2c84 140 show_regs_common();
9d975ebd 141
d015a092 142 printk(KERN_DEFAULT "EIP: %04x:[<%08lx>] EFLAGS: %08lx CPU: %d\n",
92bc2056 143 (u16)regs->cs, regs->ip, regs->flags,
9d975ebd 144 smp_processor_id());
65ea5b03 145 print_symbol("EIP is at %s\n", regs->ip);
1da177e4 146
d015a092 147 printk(KERN_DEFAULT "EAX: %08lx EBX: %08lx ECX: %08lx EDX: %08lx\n",
65ea5b03 148 regs->ax, regs->bx, regs->cx, regs->dx);
d015a092 149 printk(KERN_DEFAULT "ESI: %08lx EDI: %08lx EBP: %08lx ESP: %08lx\n",
65ea5b03 150 regs->si, regs->di, regs->bp, sp);
d015a092 151 printk(KERN_DEFAULT " DS: %04x ES: %04x FS: %04x GS: %04x SS: %04x\n",
92bc2056 152 (u16)regs->ds, (u16)regs->es, (u16)regs->fs, gs, ss);
9d975ebd
PE
153
154 if (!all)
155 return;
1da177e4 156
4bb0d3ec
ZA
157 cr0 = read_cr0();
158 cr2 = read_cr2();
159 cr3 = read_cr3();
ff6e8c0d 160 cr4 = read_cr4_safe();
d015a092 161 printk(KERN_DEFAULT "CR0: %08lx CR2: %08lx CR3: %08lx CR4: %08lx\n",
9d975ebd 162 cr0, cr2, cr3, cr4);
bb1995d5
AS
163
164 get_debugreg(d0, 0);
165 get_debugreg(d1, 1);
166 get_debugreg(d2, 2);
167 get_debugreg(d3, 3);
d015a092 168 printk(KERN_DEFAULT "DR0: %08lx DR1: %08lx DR2: %08lx DR3: %08lx\n",
bb1995d5 169 d0, d1, d2, d3);
9d975ebd 170
bb1995d5
AS
171 get_debugreg(d6, 6);
172 get_debugreg(d7, 7);
d015a092 173 printk(KERN_DEFAULT "DR6: %08lx DR7: %08lx\n",
9d975ebd
PE
174 d6, d7);
175}
bb1995d5 176
9d975ebd
PE
177void show_regs(struct pt_regs *regs)
178{
a489ca35 179 show_registers(regs);
5bc27dc2 180 show_trace(NULL, regs, &regs->sp, regs->bp);
1da177e4
LT
181}
182
1da177e4
LT
183void release_thread(struct task_struct *dead_task)
184{
2684927c 185 BUG_ON(dead_task->mm);
1da177e4
LT
186 release_vm86_irqs(dead_task);
187}
188
189/*
190 * This gets called before we allocate a new thread and copy
191 * the current task into it.
192 */
193void prepare_to_copy(struct task_struct *tsk)
194{
195 unlazy_fpu(tsk);
196}
197
6f2c55b8 198int copy_thread(unsigned long clone_flags, unsigned long sp,
1da177e4 199 unsigned long unused,
befa9e78 200 struct task_struct *p, struct pt_regs *regs)
1da177e4 201{
befa9e78 202 struct pt_regs *childregs;
1da177e4
LT
203 struct task_struct *tsk;
204 int err;
205
07b047fc 206 childregs = task_pt_regs(p);
f48d9663 207 *childregs = *regs;
65ea5b03
PA
208 childregs->ax = 0;
209 childregs->sp = sp;
f48d9663 210
faca6227
PA
211 p->thread.sp = (unsigned long) childregs;
212 p->thread.sp0 = (unsigned long) (childregs+1);
1da177e4 213
faca6227 214 p->thread.ip = (unsigned long) ret_from_fork;
1da177e4 215
d9a89a26 216 task_user_gs(p) = get_user_gs(regs);
1da177e4 217
66cb5917 218 p->thread.io_bitmap_ptr = NULL;
1da177e4 219 tsk = current;
66cb5917 220 err = -ENOMEM;
24f1e32c
FW
221
222 memset(p->thread.ptrace_bps, 0, sizeof(p->thread.ptrace_bps));
66cb5917 223
b3cf2576 224 if (unlikely(test_tsk_thread_flag(tsk, TIF_IO_BITMAP))) {
52978be6
AD
225 p->thread.io_bitmap_ptr = kmemdup(tsk->thread.io_bitmap_ptr,
226 IO_BITMAP_BYTES, GFP_KERNEL);
1da177e4
LT
227 if (!p->thread.io_bitmap_ptr) {
228 p->thread.io_bitmap_max = 0;
229 return -ENOMEM;
230 }
b3cf2576 231 set_tsk_thread_flag(p, TIF_IO_BITMAP);
1da177e4
LT
232 }
233
efd1ca52
RM
234 err = 0;
235
1da177e4
LT
236 /*
237 * Set a new TLS for the child thread?
238 */
efd1ca52
RM
239 if (clone_flags & CLONE_SETTLS)
240 err = do_set_thread_area(p, -1,
65ea5b03 241 (struct user_desc __user *)childregs->si, 0);
1da177e4 242
1da177e4
LT
243 if (err && p->thread.io_bitmap_ptr) {
244 kfree(p->thread.io_bitmap_ptr);
245 p->thread.io_bitmap_max = 0;
246 }
bf53de90 247
2311f0de
MM
248 clear_tsk_thread_flag(p, TIF_DS_AREA_MSR);
249 p->thread.ds_ctx = NULL;
bf53de90
MM
250
251 clear_tsk_thread_flag(p, TIF_DEBUGCTLMSR);
252 p->thread.debugctlmsr = 0;
253
1da177e4
LT
254 return err;
255}
256
513ad84b
IM
257void
258start_thread(struct pt_regs *regs, unsigned long new_ip, unsigned long new_sp)
259{
d9a89a26 260 set_user_gs(regs, 0);
513ad84b
IM
261 regs->fs = 0;
262 set_fs(USER_DS);
263 regs->ds = __USER_DS;
264 regs->es = __USER_DS;
265 regs->ss = __USER_DS;
266 regs->cs = __USER_CS;
267 regs->ip = new_ip;
268 regs->sp = new_sp;
aa283f49
SS
269 /*
270 * Free the old FP and other extended state
271 */
272 free_thread_xstate(current);
513ad84b
IM
273}
274EXPORT_SYMBOL_GPL(start_thread);
275
1da177e4
LT
276
277/*
278 * switch_to(x,yn) should switch tasks from x to y.
279 *
280 * We fsave/fwait so that an exception goes off at the right time
281 * (as a call from the fsave or fwait in effect) rather than to
282 * the wrong process. Lazy FP saving no longer makes any sense
283 * with modern CPU's, and this simplifies a lot of things (SMP
284 * and UP become the same).
285 *
286 * NOTE! We used to use the x86 hardware context switching. The
287 * reason for not using it any more becomes apparent when you
288 * try to recover gracefully from saved state that is no longer
289 * valid (stale segment register values in particular). With the
290 * hardware task-switch, there is no way to fix up bad state in
291 * a reasonable manner.
292 *
293 * The fact that Intel documents the hardware task-switching to
294 * be slow is a fairly red herring - this code is not noticeably
295 * faster. However, there _is_ some room for improvement here,
296 * so the performance issues may eventually be a valid point.
297 * More important, however, is the fact that this allows us much
298 * more flexibility.
299 *
65ea5b03 300 * The return value (in %ax) will be the "prev" task after
1da177e4
LT
301 * the task-switch, and shows up in ret_from_fork in entry.S,
302 * for example.
303 */
8b96f011
FW
304__notrace_funcgraph struct task_struct *
305__switch_to(struct task_struct *prev_p, struct task_struct *next_p)
1da177e4
LT
306{
307 struct thread_struct *prev = &prev_p->thread,
308 *next = &next_p->thread;
309 int cpu = smp_processor_id();
310 struct tss_struct *tss = &per_cpu(init_tss, cpu);
2fcddce1 311 bool preload_fpu;
1da177e4
LT
312
313 /* never put a printk in __switch_to... printk() calls wake_up*() indirectly */
314
2fcddce1
JF
315 /*
316 * If the task has used fpu the last 5 timeslices, just do a full
317 * restore of the math state immediately to avoid the trap; the
318 * chances of needing FPU soon are obviously high now
319 */
320 preload_fpu = tsk_used_math(next_p) && next_p->fpu_counter > 5;
1da177e4 321
2fcddce1 322 __unlazy_fpu(prev_p);
acc20761
CE
323
324 /* we're going to use this soon, after a few expensive things */
2fcddce1 325 if (preload_fpu)
61c4628b 326 prefetch(next->xstate);
acc20761 327
1da177e4 328 /*
e7a2ff59 329 * Reload esp0.
1da177e4 330 */
faca6227 331 load_sp0(tss, next);
1da177e4
LT
332
333 /*
464d1a78 334 * Save away %gs. No need to save %fs, as it was saved on the
f95d47ca
JF
335 * stack on entry. No need to save %es and %ds, as those are
336 * always kernel segments while inside the kernel. Doing this
337 * before setting the new TLS descriptors avoids the situation
338 * where we temporarily have non-reloadable segments in %fs
339 * and %gs. This could be an issue if the NMI handler ever
340 * used %fs or %gs (it does not today), or if the kernel is
341 * running inside of a hypervisor layer.
1da177e4 342 */
ccbeed3a 343 lazy_save_gs(prev->gs);
1da177e4
LT
344
345 /*
e7a2ff59 346 * Load the per-thread Thread-Local Storage descriptor.
1da177e4 347 */
e7a2ff59 348 load_TLS(next, cpu);
1da177e4 349
8b151144
ZA
350 /*
351 * Restore IOPL if needed. In normal use, the flags restore
352 * in the switch assembly will handle this. But if the kernel
353 * is running virtualized at a non-zero CPL, the popf will
354 * not restore flags, so it must be done in a separate step.
355 */
356 if (get_kernel_rpl() && unlikely(prev->iopl != next->iopl))
357 set_iopl_mask(next->iopl);
358
1da177e4 359 /*
b3cf2576 360 * Now maybe handle debug registers and/or IO bitmaps
1da177e4 361 */
cf99abac
AA
362 if (unlikely(task_thread_info(prev_p)->flags & _TIF_WORK_CTXSW_PREV ||
363 task_thread_info(next_p)->flags & _TIF_WORK_CTXSW_NEXT))
364 __switch_to_xtra(prev_p, next_p, tss);
ffaa8bd6 365
2fcddce1
JF
366 /* If we're going to preload the fpu context, make sure clts
367 is run while we're batching the cpu state updates. */
368 if (preload_fpu)
369 clts();
370
9226d125
ZA
371 /*
372 * Leave lazy mode, flushing any hypercalls made here.
373 * This must be done before restoring TLS segments so
374 * the GDT and LDT are properly updated, and must be
375 * done before math_state_restore, so the TS bit is up
376 * to date.
377 */
224101ed 378 arch_end_context_switch(next_p);
9226d125 379
2fcddce1
JF
380 if (preload_fpu)
381 __math_state_restore();
acc20761 382
9226d125
ZA
383 /*
384 * Restore %gs if needed (which is common)
385 */
386 if (prev->gs | next->gs)
ccbeed3a 387 lazy_load_gs(next->gs);
9226d125 388
6dbde353 389 percpu_write(current_task, next_p);
9226d125 390
1da177e4
LT
391 return prev_p;
392}
393
1da177e4
LT
394#define top_esp (THREAD_SIZE - sizeof(unsigned long))
395#define top_ebp (THREAD_SIZE - 2*sizeof(unsigned long))
396
397unsigned long get_wchan(struct task_struct *p)
398{
65ea5b03 399 unsigned long bp, sp, ip;
1da177e4
LT
400 unsigned long stack_page;
401 int count = 0;
402 if (!p || p == current || p->state == TASK_RUNNING)
403 return 0;
65e0fdff 404 stack_page = (unsigned long)task_stack_page(p);
faca6227 405 sp = p->thread.sp;
65ea5b03 406 if (!stack_page || sp < stack_page || sp > top_esp+stack_page)
1da177e4 407 return 0;
65ea5b03
PA
408 /* include/asm-i386/system.h:switch_to() pushes bp last. */
409 bp = *(unsigned long *) sp;
1da177e4 410 do {
65ea5b03 411 if (bp < stack_page || bp > top_ebp+stack_page)
1da177e4 412 return 0;
65ea5b03
PA
413 ip = *(unsigned long *) (bp+4);
414 if (!in_sched_functions(ip))
415 return ip;
416 bp = *(unsigned long *) bp;
1da177e4
LT
417 } while (count++ < 16);
418 return 0;
419}
420