Commit | Line | Data |
---|---|---|
1da177e4 | 1 | /* |
1da177e4 LT |
2 | * Copyright (C) 1995 Linus Torvalds |
3 | * | |
4 | * Pentium III FXSR, SSE support | |
5 | * Gareth Hughes <gareth@valinux.com>, May 2000 | |
6 | */ | |
7 | ||
8 | /* | |
9 | * This file handles the architecture-dependent parts of process handling.. | |
10 | */ | |
11 | ||
5c79d2a5 | 12 | #include <linux/stackprotector.h> |
f3705136 | 13 | #include <linux/cpu.h> |
1da177e4 LT |
14 | #include <linux/errno.h> |
15 | #include <linux/sched.h> | |
16 | #include <linux/fs.h> | |
17 | #include <linux/kernel.h> | |
18 | #include <linux/mm.h> | |
19 | #include <linux/elfcore.h> | |
20 | #include <linux/smp.h> | |
1da177e4 LT |
21 | #include <linux/stddef.h> |
22 | #include <linux/slab.h> | |
23 | #include <linux/vmalloc.h> | |
24 | #include <linux/user.h> | |
1da177e4 | 25 | #include <linux/interrupt.h> |
1da177e4 LT |
26 | #include <linux/delay.h> |
27 | #include <linux/reboot.h> | |
28 | #include <linux/init.h> | |
29 | #include <linux/mc146818rtc.h> | |
30 | #include <linux/module.h> | |
31 | #include <linux/kallsyms.h> | |
32 | #include <linux/ptrace.h> | |
c16b63e0 | 33 | #include <linux/personality.h> |
74167347 | 34 | #include <linux/tick.h> |
7c3576d2 | 35 | #include <linux/percpu.h> |
529e25f6 | 36 | #include <linux/prctl.h> |
8b96f011 | 37 | #include <linux/ftrace.h> |
befa9e78 JSR |
38 | #include <linux/uaccess.h> |
39 | #include <linux/io.h> | |
40 | #include <linux/kdebug.h> | |
a0bfa137 | 41 | #include <linux/cpuidle.h> |
1da177e4 | 42 | |
1da177e4 LT |
43 | #include <asm/pgtable.h> |
44 | #include <asm/system.h> | |
1da177e4 LT |
45 | #include <asm/ldt.h> |
46 | #include <asm/processor.h> | |
47 | #include <asm/i387.h> | |
1361b83a | 48 | #include <asm/fpu-internal.h> |
1da177e4 LT |
49 | #include <asm/desc.h> |
50 | #ifdef CONFIG_MATH_EMULATION | |
51 | #include <asm/math_emu.h> | |
52 | #endif | |
53 | ||
1da177e4 LT |
54 | #include <linux/err.h> |
55 | ||
f3705136 ZM |
56 | #include <asm/tlbflush.h> |
57 | #include <asm/cpu.h> | |
1eda8149 | 58 | #include <asm/idle.h> |
bbc1f698 | 59 | #include <asm/syscalls.h> |
66cb5917 | 60 | #include <asm/debugreg.h> |
b227e233 | 61 | #include <asm/nmi.h> |
f3705136 | 62 | |
1da177e4 LT |
63 | asmlinkage void ret_from_fork(void) __asm__("ret_from_fork"); |
64 | ||
1da177e4 LT |
65 | /* |
66 | * Return saved PC of a blocked thread. | |
67 | */ | |
68 | unsigned long thread_saved_pc(struct task_struct *tsk) | |
69 | { | |
faca6227 | 70 | return ((unsigned long *)tsk->thread.sp)[3]; |
1da177e4 LT |
71 | } |
72 | ||
913da64b AN |
73 | #ifndef CONFIG_SMP |
74 | static inline void play_dead(void) | |
75 | { | |
76 | BUG(); | |
77 | } | |
78 | #endif | |
79 | ||
1da177e4 LT |
80 | /* |
81 | * The idle thread. There's no useful work to be | |
82 | * done, so just try to conserve power and have a | |
83 | * low exit latency (ie sit in a loop waiting for | |
84 | * somebody to say that they'd like to reschedule) | |
85 | */ | |
f3705136 | 86 | void cpu_idle(void) |
1da177e4 | 87 | { |
5bfb5d69 | 88 | int cpu = smp_processor_id(); |
f3705136 | 89 | |
5c79d2a5 TH |
90 | /* |
91 | * If we're the non-boot CPU, nothing set the stack canary up | |
92 | * for us. CPU0 already has it initialized but no harm in | |
93 | * doing it again. This is a good place for updating it, as | |
94 | * we wont ever return from this function (so the invalid | |
95 | * canaries already on the stack wont ever trigger). | |
96 | */ | |
97 | boot_init_stack_canary(); | |
98 | ||
495ab9c0 | 99 | current_thread_info()->status |= TS_POLLING; |
64c7c8f8 | 100 | |
1da177e4 LT |
101 | /* endless idle loop with no priority at all */ |
102 | while (1) { | |
1268fbc7 FW |
103 | tick_nohz_idle_enter(); |
104 | rcu_idle_enter(); | |
1da177e4 | 105 | while (!need_resched()) { |
1da177e4 | 106 | |
f1d1a842 | 107 | check_pgt_cache(); |
1da177e4 | 108 | rmb(); |
1da177e4 | 109 | |
f3705136 ZM |
110 | if (cpu_is_offline(cpu)) |
111 | play_dead(); | |
112 | ||
b227e233 | 113 | local_touch_nmi(); |
7f424a8b | 114 | local_irq_disable(); |
6cd8a4bb SR |
115 | /* Don't trace irqs off for idle */ |
116 | stop_critical_timings(); | |
a0bfa137 LB |
117 | if (cpuidle_idle_call()) |
118 | pm_idle(); | |
6cd8a4bb | 119 | start_critical_timings(); |
1da177e4 | 120 | } |
1268fbc7 FW |
121 | rcu_idle_exit(); |
122 | tick_nohz_idle_exit(); | |
5bfb5d69 | 123 | preempt_enable_no_resched(); |
1da177e4 | 124 | schedule(); |
5bfb5d69 | 125 | preempt_disable(); |
1da177e4 LT |
126 | } |
127 | } | |
128 | ||
e2ce07c8 | 129 | void __show_regs(struct pt_regs *regs, int all) |
1da177e4 LT |
130 | { |
131 | unsigned long cr0 = 0L, cr2 = 0L, cr3 = 0L, cr4 = 0L; | |
bb1995d5 | 132 | unsigned long d0, d1, d2, d3, d6, d7; |
65ea5b03 | 133 | unsigned long sp; |
9d975ebd PE |
134 | unsigned short ss, gs; |
135 | ||
136 | if (user_mode_vm(regs)) { | |
65ea5b03 PA |
137 | sp = regs->sp; |
138 | ss = regs->ss & 0xffff; | |
d9a89a26 | 139 | gs = get_user_gs(regs); |
9d975ebd | 140 | } else { |
def3c5d0 | 141 | sp = kernel_stack_pointer(regs); |
9d975ebd PE |
142 | savesegment(ss, ss); |
143 | savesegment(gs, gs); | |
144 | } | |
1da177e4 | 145 | |
814e2c84 | 146 | show_regs_common(); |
9d975ebd | 147 | |
d015a092 | 148 | printk(KERN_DEFAULT "EIP: %04x:[<%08lx>] EFLAGS: %08lx CPU: %d\n", |
92bc2056 | 149 | (u16)regs->cs, regs->ip, regs->flags, |
9d975ebd | 150 | smp_processor_id()); |
65ea5b03 | 151 | print_symbol("EIP is at %s\n", regs->ip); |
1da177e4 | 152 | |
d015a092 | 153 | printk(KERN_DEFAULT "EAX: %08lx EBX: %08lx ECX: %08lx EDX: %08lx\n", |
65ea5b03 | 154 | regs->ax, regs->bx, regs->cx, regs->dx); |
d015a092 | 155 | printk(KERN_DEFAULT "ESI: %08lx EDI: %08lx EBP: %08lx ESP: %08lx\n", |
65ea5b03 | 156 | regs->si, regs->di, regs->bp, sp); |
d015a092 | 157 | printk(KERN_DEFAULT " DS: %04x ES: %04x FS: %04x GS: %04x SS: %04x\n", |
92bc2056 | 158 | (u16)regs->ds, (u16)regs->es, (u16)regs->fs, gs, ss); |
9d975ebd PE |
159 | |
160 | if (!all) | |
161 | return; | |
1da177e4 | 162 | |
4bb0d3ec ZA |
163 | cr0 = read_cr0(); |
164 | cr2 = read_cr2(); | |
165 | cr3 = read_cr3(); | |
ff6e8c0d | 166 | cr4 = read_cr4_safe(); |
d015a092 | 167 | printk(KERN_DEFAULT "CR0: %08lx CR2: %08lx CR3: %08lx CR4: %08lx\n", |
9d975ebd | 168 | cr0, cr2, cr3, cr4); |
bb1995d5 AS |
169 | |
170 | get_debugreg(d0, 0); | |
171 | get_debugreg(d1, 1); | |
172 | get_debugreg(d2, 2); | |
173 | get_debugreg(d3, 3); | |
d015a092 | 174 | printk(KERN_DEFAULT "DR0: %08lx DR1: %08lx DR2: %08lx DR3: %08lx\n", |
bb1995d5 | 175 | d0, d1, d2, d3); |
9d975ebd | 176 | |
bb1995d5 AS |
177 | get_debugreg(d6, 6); |
178 | get_debugreg(d7, 7); | |
d015a092 | 179 | printk(KERN_DEFAULT "DR6: %08lx DR7: %08lx\n", |
9d975ebd PE |
180 | d6, d7); |
181 | } | |
bb1995d5 | 182 | |
1da177e4 LT |
183 | void release_thread(struct task_struct *dead_task) |
184 | { | |
2684927c | 185 | BUG_ON(dead_task->mm); |
1da177e4 LT |
186 | release_vm86_irqs(dead_task); |
187 | } | |
188 | ||
189 | /* | |
190 | * This gets called before we allocate a new thread and copy | |
191 | * the current task into it. | |
192 | */ | |
193 | void prepare_to_copy(struct task_struct *tsk) | |
194 | { | |
195 | unlazy_fpu(tsk); | |
196 | } | |
197 | ||
6f2c55b8 | 198 | int copy_thread(unsigned long clone_flags, unsigned long sp, |
1da177e4 | 199 | unsigned long unused, |
befa9e78 | 200 | struct task_struct *p, struct pt_regs *regs) |
1da177e4 | 201 | { |
befa9e78 | 202 | struct pt_regs *childregs; |
1da177e4 LT |
203 | struct task_struct *tsk; |
204 | int err; | |
205 | ||
07b047fc | 206 | childregs = task_pt_regs(p); |
f48d9663 | 207 | *childregs = *regs; |
65ea5b03 PA |
208 | childregs->ax = 0; |
209 | childregs->sp = sp; | |
f48d9663 | 210 | |
faca6227 PA |
211 | p->thread.sp = (unsigned long) childregs; |
212 | p->thread.sp0 = (unsigned long) (childregs+1); | |
1da177e4 | 213 | |
faca6227 | 214 | p->thread.ip = (unsigned long) ret_from_fork; |
1da177e4 | 215 | |
d9a89a26 | 216 | task_user_gs(p) = get_user_gs(regs); |
1da177e4 | 217 | |
cea20ca3 | 218 | p->fpu_counter = 0; |
66cb5917 | 219 | p->thread.io_bitmap_ptr = NULL; |
1da177e4 | 220 | tsk = current; |
66cb5917 | 221 | err = -ENOMEM; |
24f1e32c FW |
222 | |
223 | memset(p->thread.ptrace_bps, 0, sizeof(p->thread.ptrace_bps)); | |
66cb5917 | 224 | |
b3cf2576 | 225 | if (unlikely(test_tsk_thread_flag(tsk, TIF_IO_BITMAP))) { |
52978be6 AD |
226 | p->thread.io_bitmap_ptr = kmemdup(tsk->thread.io_bitmap_ptr, |
227 | IO_BITMAP_BYTES, GFP_KERNEL); | |
1da177e4 LT |
228 | if (!p->thread.io_bitmap_ptr) { |
229 | p->thread.io_bitmap_max = 0; | |
230 | return -ENOMEM; | |
231 | } | |
b3cf2576 | 232 | set_tsk_thread_flag(p, TIF_IO_BITMAP); |
1da177e4 LT |
233 | } |
234 | ||
efd1ca52 RM |
235 | err = 0; |
236 | ||
1da177e4 LT |
237 | /* |
238 | * Set a new TLS for the child thread? | |
239 | */ | |
efd1ca52 RM |
240 | if (clone_flags & CLONE_SETTLS) |
241 | err = do_set_thread_area(p, -1, | |
65ea5b03 | 242 | (struct user_desc __user *)childregs->si, 0); |
1da177e4 | 243 | |
1da177e4 LT |
244 | if (err && p->thread.io_bitmap_ptr) { |
245 | kfree(p->thread.io_bitmap_ptr); | |
246 | p->thread.io_bitmap_max = 0; | |
247 | } | |
248 | return err; | |
249 | } | |
250 | ||
513ad84b IM |
251 | void |
252 | start_thread(struct pt_regs *regs, unsigned long new_ip, unsigned long new_sp) | |
253 | { | |
d9a89a26 | 254 | set_user_gs(regs, 0); |
513ad84b | 255 | regs->fs = 0; |
513ad84b IM |
256 | regs->ds = __USER_DS; |
257 | regs->es = __USER_DS; | |
258 | regs->ss = __USER_DS; | |
259 | regs->cs = __USER_CS; | |
260 | regs->ip = new_ip; | |
261 | regs->sp = new_sp; | |
aa283f49 SS |
262 | /* |
263 | * Free the old FP and other extended state | |
264 | */ | |
265 | free_thread_xstate(current); | |
513ad84b IM |
266 | } |
267 | EXPORT_SYMBOL_GPL(start_thread); | |
268 | ||
1da177e4 LT |
269 | |
270 | /* | |
ea70ef3d | 271 | * switch_to(x,y) should switch tasks from x to y. |
1da177e4 LT |
272 | * |
273 | * We fsave/fwait so that an exception goes off at the right time | |
274 | * (as a call from the fsave or fwait in effect) rather than to | |
275 | * the wrong process. Lazy FP saving no longer makes any sense | |
276 | * with modern CPU's, and this simplifies a lot of things (SMP | |
277 | * and UP become the same). | |
278 | * | |
279 | * NOTE! We used to use the x86 hardware context switching. The | |
280 | * reason for not using it any more becomes apparent when you | |
281 | * try to recover gracefully from saved state that is no longer | |
282 | * valid (stale segment register values in particular). With the | |
283 | * hardware task-switch, there is no way to fix up bad state in | |
284 | * a reasonable manner. | |
285 | * | |
286 | * The fact that Intel documents the hardware task-switching to | |
287 | * be slow is a fairly red herring - this code is not noticeably | |
288 | * faster. However, there _is_ some room for improvement here, | |
289 | * so the performance issues may eventually be a valid point. | |
290 | * More important, however, is the fact that this allows us much | |
291 | * more flexibility. | |
292 | * | |
65ea5b03 | 293 | * The return value (in %ax) will be the "prev" task after |
1da177e4 LT |
294 | * the task-switch, and shows up in ret_from_fork in entry.S, |
295 | * for example. | |
296 | */ | |
8b96f011 FW |
297 | __notrace_funcgraph struct task_struct * |
298 | __switch_to(struct task_struct *prev_p, struct task_struct *next_p) | |
1da177e4 LT |
299 | { |
300 | struct thread_struct *prev = &prev_p->thread, | |
301 | *next = &next_p->thread; | |
302 | int cpu = smp_processor_id(); | |
303 | struct tss_struct *tss = &per_cpu(init_tss, cpu); | |
34ddc81a | 304 | fpu_switch_t fpu; |
1da177e4 LT |
305 | |
306 | /* never put a printk in __switch_to... printk() calls wake_up*() indirectly */ | |
307 | ||
7e16838d | 308 | fpu = switch_fpu_prepare(prev_p, next_p, cpu); |
acc20761 | 309 | |
1da177e4 | 310 | /* |
e7a2ff59 | 311 | * Reload esp0. |
1da177e4 | 312 | */ |
faca6227 | 313 | load_sp0(tss, next); |
1da177e4 LT |
314 | |
315 | /* | |
464d1a78 | 316 | * Save away %gs. No need to save %fs, as it was saved on the |
f95d47ca JF |
317 | * stack on entry. No need to save %es and %ds, as those are |
318 | * always kernel segments while inside the kernel. Doing this | |
319 | * before setting the new TLS descriptors avoids the situation | |
320 | * where we temporarily have non-reloadable segments in %fs | |
321 | * and %gs. This could be an issue if the NMI handler ever | |
322 | * used %fs or %gs (it does not today), or if the kernel is | |
323 | * running inside of a hypervisor layer. | |
1da177e4 | 324 | */ |
ccbeed3a | 325 | lazy_save_gs(prev->gs); |
1da177e4 LT |
326 | |
327 | /* | |
e7a2ff59 | 328 | * Load the per-thread Thread-Local Storage descriptor. |
1da177e4 | 329 | */ |
e7a2ff59 | 330 | load_TLS(next, cpu); |
1da177e4 | 331 | |
8b151144 ZA |
332 | /* |
333 | * Restore IOPL if needed. In normal use, the flags restore | |
334 | * in the switch assembly will handle this. But if the kernel | |
335 | * is running virtualized at a non-zero CPL, the popf will | |
336 | * not restore flags, so it must be done in a separate step. | |
337 | */ | |
338 | if (get_kernel_rpl() && unlikely(prev->iopl != next->iopl)) | |
339 | set_iopl_mask(next->iopl); | |
340 | ||
1da177e4 | 341 | /* |
b3cf2576 | 342 | * Now maybe handle debug registers and/or IO bitmaps |
1da177e4 | 343 | */ |
cf99abac AA |
344 | if (unlikely(task_thread_info(prev_p)->flags & _TIF_WORK_CTXSW_PREV || |
345 | task_thread_info(next_p)->flags & _TIF_WORK_CTXSW_NEXT)) | |
346 | __switch_to_xtra(prev_p, next_p, tss); | |
ffaa8bd6 | 347 | |
9226d125 ZA |
348 | /* |
349 | * Leave lazy mode, flushing any hypercalls made here. | |
350 | * This must be done before restoring TLS segments so | |
351 | * the GDT and LDT are properly updated, and must be | |
352 | * done before math_state_restore, so the TS bit is up | |
353 | * to date. | |
354 | */ | |
224101ed | 355 | arch_end_context_switch(next_p); |
9226d125 | 356 | |
9226d125 ZA |
357 | /* |
358 | * Restore %gs if needed (which is common) | |
359 | */ | |
360 | if (prev->gs | next->gs) | |
ccbeed3a | 361 | lazy_load_gs(next->gs); |
9226d125 | 362 | |
34ddc81a LT |
363 | switch_fpu_finish(next_p, fpu); |
364 | ||
6dbde353 | 365 | percpu_write(current_task, next_p); |
9226d125 | 366 | |
1da177e4 LT |
367 | return prev_p; |
368 | } | |
369 | ||
1da177e4 LT |
370 | #define top_esp (THREAD_SIZE - sizeof(unsigned long)) |
371 | #define top_ebp (THREAD_SIZE - 2*sizeof(unsigned long)) | |
372 | ||
373 | unsigned long get_wchan(struct task_struct *p) | |
374 | { | |
65ea5b03 | 375 | unsigned long bp, sp, ip; |
1da177e4 LT |
376 | unsigned long stack_page; |
377 | int count = 0; | |
378 | if (!p || p == current || p->state == TASK_RUNNING) | |
379 | return 0; | |
65e0fdff | 380 | stack_page = (unsigned long)task_stack_page(p); |
faca6227 | 381 | sp = p->thread.sp; |
65ea5b03 | 382 | if (!stack_page || sp < stack_page || sp > top_esp+stack_page) |
1da177e4 | 383 | return 0; |
65ea5b03 PA |
384 | /* include/asm-i386/system.h:switch_to() pushes bp last. */ |
385 | bp = *(unsigned long *) sp; | |
1da177e4 | 386 | do { |
65ea5b03 | 387 | if (bp < stack_page || bp > top_ebp+stack_page) |
1da177e4 | 388 | return 0; |
65ea5b03 PA |
389 | ip = *(unsigned long *) (bp+4); |
390 | if (!in_sched_functions(ip)) | |
391 | return ip; | |
392 | bp = *(unsigned long *) bp; | |
1da177e4 LT |
393 | } while (count++ < 16); |
394 | return 0; | |
395 | } | |
396 |