x86/paravirt: Move the Xen-only pv_cpu_ops under the PARAVIRT_XXL umbrella
[linux-2.6-block.git] / arch / x86 / kernel / paravirt_patch_64.c
CommitLineData
b2441318 1// SPDX-License-Identifier: GPL-2.0
53fd13cf
GOC
2#include <asm/paravirt.h>
3#include <asm/asm-offsets.h>
8a650ce2 4#include <linux/stringify.h>
53fd13cf 5
5c83511b
JG
6DEF_NATIVE(irq, irq_disable, "cli");
7DEF_NATIVE(irq, irq_enable, "sti");
8DEF_NATIVE(irq, restore_fl, "pushq %rdi; popfq");
9DEF_NATIVE(irq, save_fl, "pushfq; popq %rax");
10DEF_NATIVE(mmu, read_cr2, "movq %cr2, %rax");
11DEF_NATIVE(mmu, read_cr3, "movq %cr3, %rax");
12DEF_NATIVE(mmu, write_cr3, "movq %rdi, %cr3");
9bad5658 13#ifdef CONFIG_PARAVIRT_XXL
5c83511b 14DEF_NATIVE(cpu, wbinvd, "wbinvd");
53fd13cf 15
5c83511b
JG
16DEF_NATIVE(cpu, usergs_sysret64, "swapgs; sysretq");
17DEF_NATIVE(cpu, swapgs, "swapgs");
9bad5658 18#endif
53fd13cf 19
41edafdb
JF
20DEF_NATIVE(, mov32, "mov %edi, %eax");
21DEF_NATIVE(, mov64, "mov %rdi, %rax");
22
cfd8983f 23#if defined(CONFIG_PARAVIRT_SPINLOCKS)
5c83511b
JG
24DEF_NATIVE(lock, queued_spin_unlock, "movb $0, (%rdi)");
25DEF_NATIVE(lock, vcpu_is_preempted, "xor %eax, %eax");
f233f7f1
PZI
26#endif
27
41edafdb
JF
28unsigned paravirt_patch_ident_32(void *insnbuf, unsigned len)
29{
30 return paravirt_patch_insns(insnbuf, len,
31 start__mov32, end__mov32);
32}
33
34unsigned paravirt_patch_ident_64(void *insnbuf, unsigned len)
35{
36 return paravirt_patch_insns(insnbuf, len,
37 start__mov64, end__mov64);
38}
39
f233f7f1 40extern bool pv_is_native_spin_unlock(void);
3cded417 41extern bool pv_is_native_vcpu_is_preempted(void);
f233f7f1 42
abc745f8 43unsigned native_patch(u8 type, void *ibuf, unsigned long addr, unsigned len)
53fd13cf
GOC
44{
45 const unsigned char *start, *end;
46 unsigned ret;
47
48#define PATCH_SITE(ops, x) \
49 case PARAVIRT_PATCH(ops.x): \
50 start = start_##ops##_##x; \
51 end = end_##ops##_##x; \
52 goto patch_site
53 switch(type) {
5c83511b
JG
54 PATCH_SITE(irq, restore_fl);
55 PATCH_SITE(irq, save_fl);
56 PATCH_SITE(irq, irq_enable);
57 PATCH_SITE(irq, irq_disable);
9bad5658 58#ifdef CONFIG_PARAVIRT_XXL
5c83511b
JG
59 PATCH_SITE(cpu, usergs_sysret64);
60 PATCH_SITE(cpu, swapgs);
9bad5658
JG
61 PATCH_SITE(cpu, wbinvd);
62#endif
5c83511b
JG
63 PATCH_SITE(mmu, read_cr2);
64 PATCH_SITE(mmu, read_cr3);
65 PATCH_SITE(mmu, write_cr3);
cfd8983f 66#if defined(CONFIG_PARAVIRT_SPINLOCKS)
5c83511b 67 case PARAVIRT_PATCH(lock.queued_spin_unlock):
f233f7f1 68 if (pv_is_native_spin_unlock()) {
5c83511b
JG
69 start = start_lock_queued_spin_unlock;
70 end = end_lock_queued_spin_unlock;
f233f7f1
PZI
71 goto patch_site;
72 }
45dbea5f
PZ
73 goto patch_default;
74
5c83511b 75 case PARAVIRT_PATCH(lock.vcpu_is_preempted):
3cded417 76 if (pv_is_native_vcpu_is_preempted()) {
5c83511b
JG
77 start = start_lock_vcpu_is_preempted;
78 end = end_lock_vcpu_is_preempted;
3cded417
PZ
79 goto patch_site;
80 }
45dbea5f 81 goto patch_default;
f233f7f1 82#endif
53fd13cf
GOC
83
84 default:
cef4402d 85patch_default: __maybe_unused
abc745f8 86 ret = paravirt_patch_default(type, ibuf, addr, len);
53fd13cf 87 break;
f233f7f1
PZI
88
89patch_site:
90 ret = paravirt_patch_insns(ibuf, len, start, end);
91 break;
53fd13cf
GOC
92 }
93#undef PATCH_SITE
94 return ret;
95}