Merge branch 'work.mqueue' of git://git.kernel.org/pub/scm/linux/kernel/git/viro/vfs
[linux-2.6-block.git] / arch / x86 / kernel / paravirt_patch_64.c
CommitLineData
b2441318 1// SPDX-License-Identifier: GPL-2.0
53fd13cf
GOC
2#include <asm/paravirt.h>
3#include <asm/asm-offsets.h>
8a650ce2 4#include <linux/stringify.h>
53fd13cf
GOC
5
6DEF_NATIVE(pv_irq_ops, irq_disable, "cli");
7DEF_NATIVE(pv_irq_ops, irq_enable, "sti");
8DEF_NATIVE(pv_irq_ops, restore_fl, "pushq %rdi; popfq");
9DEF_NATIVE(pv_irq_ops, save_fl, "pushfq; popq %rax");
53fd13cf
GOC
10DEF_NATIVE(pv_mmu_ops, read_cr2, "movq %cr2, %rax");
11DEF_NATIVE(pv_mmu_ops, read_cr3, "movq %cr3, %rax");
12DEF_NATIVE(pv_mmu_ops, write_cr3, "movq %rdi, %cr3");
53fd13cf
GOC
13DEF_NATIVE(pv_cpu_ops, wbinvd, "wbinvd");
14
2be29982 15DEF_NATIVE(pv_cpu_ops, usergs_sysret64, "swapgs; sysretq");
53fd13cf
GOC
16DEF_NATIVE(pv_cpu_ops, swapgs, "swapgs");
17
41edafdb
JF
18DEF_NATIVE(, mov32, "mov %edi, %eax");
19DEF_NATIVE(, mov64, "mov %rdi, %rax");
20
cfd8983f 21#if defined(CONFIG_PARAVIRT_SPINLOCKS)
f233f7f1 22DEF_NATIVE(pv_lock_ops, queued_spin_unlock, "movb $0, (%rdi)");
3cded417 23DEF_NATIVE(pv_lock_ops, vcpu_is_preempted, "xor %rax, %rax");
f233f7f1
PZI
24#endif
25
41edafdb
JF
26unsigned paravirt_patch_ident_32(void *insnbuf, unsigned len)
27{
28 return paravirt_patch_insns(insnbuf, len,
29 start__mov32, end__mov32);
30}
31
32unsigned paravirt_patch_ident_64(void *insnbuf, unsigned len)
33{
34 return paravirt_patch_insns(insnbuf, len,
35 start__mov64, end__mov64);
36}
37
f233f7f1 38extern bool pv_is_native_spin_unlock(void);
3cded417 39extern bool pv_is_native_vcpu_is_preempted(void);
f233f7f1 40
53fd13cf
GOC
41unsigned native_patch(u8 type, u16 clobbers, void *ibuf,
42 unsigned long addr, unsigned len)
43{
44 const unsigned char *start, *end;
45 unsigned ret;
46
47#define PATCH_SITE(ops, x) \
48 case PARAVIRT_PATCH(ops.x): \
49 start = start_##ops##_##x; \
50 end = end_##ops##_##x; \
51 goto patch_site
52 switch(type) {
53 PATCH_SITE(pv_irq_ops, restore_fl);
54 PATCH_SITE(pv_irq_ops, save_fl);
55 PATCH_SITE(pv_irq_ops, irq_enable);
56 PATCH_SITE(pv_irq_ops, irq_disable);
2be29982 57 PATCH_SITE(pv_cpu_ops, usergs_sysret64);
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GOC
58 PATCH_SITE(pv_cpu_ops, swapgs);
59 PATCH_SITE(pv_mmu_ops, read_cr2);
60 PATCH_SITE(pv_mmu_ops, read_cr3);
61 PATCH_SITE(pv_mmu_ops, write_cr3);
53fd13cf 62 PATCH_SITE(pv_cpu_ops, wbinvd);
cfd8983f 63#if defined(CONFIG_PARAVIRT_SPINLOCKS)
f233f7f1
PZI
64 case PARAVIRT_PATCH(pv_lock_ops.queued_spin_unlock):
65 if (pv_is_native_spin_unlock()) {
66 start = start_pv_lock_ops_queued_spin_unlock;
67 end = end_pv_lock_ops_queued_spin_unlock;
68 goto patch_site;
69 }
45dbea5f
PZ
70 goto patch_default;
71
3cded417
PZ
72 case PARAVIRT_PATCH(pv_lock_ops.vcpu_is_preempted):
73 if (pv_is_native_vcpu_is_preempted()) {
74 start = start_pv_lock_ops_vcpu_is_preempted;
75 end = end_pv_lock_ops_vcpu_is_preempted;
76 goto patch_site;
77 }
45dbea5f 78 goto patch_default;
f233f7f1 79#endif
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GOC
80
81 default:
cef4402d 82patch_default: __maybe_unused
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GOC
83 ret = paravirt_patch_default(type, clobbers, ibuf, addr, len);
84 break;
f233f7f1
PZI
85
86patch_site:
87 ret = paravirt_patch_insns(ibuf, len, start, end);
88 break;
53fd13cf
GOC
89 }
90#undef PATCH_SITE
91 return ret;
92}