x86/paravirt: Move the Xen-only pv_cpu_ops under the PARAVIRT_XXL umbrella
[linux-block.git] / arch / x86 / kernel / paravirt.c
CommitLineData
d3561b7f
RR
1/* Paravirtualization interfaces
2 Copyright (C) 2006 Rusty Russell IBM Corporation
3
4 This program is free software; you can redistribute it and/or modify
5 it under the terms of the GNU General Public License as published by
6 the Free Software Foundation; either version 2 of the License, or
7 (at your option) any later version.
8
9 This program is distributed in the hope that it will be useful,
10 but WITHOUT ANY WARRANTY; without even the implied warranty of
11 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
12 GNU General Public License for more details.
13
14 You should have received a copy of the GNU General Public License
15 along with this program; if not, write to the Free Software
16 Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
b1df07bd
GOC
17
18 2007 - x86_64 support added by Glauber de Oliveira Costa, Red Hat Inc
d3561b7f 19*/
b1df07bd 20
d3561b7f 21#include <linux/errno.h>
186f4360
PG
22#include <linux/init.h>
23#include <linux/export.h>
d3561b7f
RR
24#include <linux/efi.h>
25#include <linux/bcd.h>
ce6234b5 26#include <linux/highmem.h>
376e2424 27#include <linux/kprobes.h>
d3561b7f
RR
28
29#include <asm/bug.h>
30#include <asm/paravirt.h>
50af5ead 31#include <asm/debugreg.h>
d3561b7f
RR
32#include <asm/desc.h>
33#include <asm/setup.h>
a312b37b 34#include <asm/pgtable.h>
d3561b7f 35#include <asm/time.h>
eba0045f 36#include <asm/pgalloc.h>
d3561b7f
RR
37#include <asm/irq.h>
38#include <asm/delay.h>
13623d79
RR
39#include <asm/fixmap.h>
40#include <asm/apic.h>
da181a8b 41#include <asm/tlbflush.h>
6cb9a835 42#include <asm/timer.h>
f05e798a 43#include <asm/special_insns.h>
48a8b97c 44#include <asm/tlb.h>
d3561b7f 45
fc57a7c6
AL
46/*
47 * nop stub, which must not clobber anything *including the stack* to
48 * avoid confusing the entry prologues.
49 */
50extern void _paravirt_nop(void);
51asm (".pushsection .entry.text, \"ax\"\n"
52 ".global _paravirt_nop\n"
53 "_paravirt_nop:\n\t"
54 "ret\n\t"
55 ".size _paravirt_nop, . - _paravirt_nop\n\t"
56 ".type _paravirt_nop, @function\n\t"
57 ".popsection");
d3561b7f 58
41edafdb 59/* identity function, which can be inlined */
15301a57 60u32 notrace _paravirt_ident_32(u32 x)
41edafdb
JF
61{
62 return x;
63}
64
15301a57 65u64 notrace _paravirt_ident_64(u64 x)
41edafdb
JF
66{
67 return x;
68}
69
6f30c1ac 70void __init default_banner(void)
d3561b7f
RR
71{
72 printk(KERN_INFO "Booting paravirtualized kernel on %s\n",
93b1eab3 73 pv_info.name);
d3561b7f
RR
74}
75
93b1eab3
JF
76/* Undefined instruction for dealing with missing ops pointers. */
77static const unsigned char ud2a[] = { 0x0f, 0x0b };
139ec7c4 78
19d36ccd
AK
79struct branch {
80 unsigned char opcode;
81 u32 delta;
82} __attribute__((packed));
83
abc745f8
JG
84static unsigned paravirt_patch_call(void *insnbuf, const void *target,
85 unsigned long addr, unsigned len)
63f70270 86{
ab144f5e
AK
87 struct branch *b = insnbuf;
88 unsigned long delta = (unsigned long)target - (addr+5);
63f70270 89
5800dc5c
PZ
90 if (len < 5) {
91#ifdef CONFIG_RETPOLINE
92 WARN_ONCE("Failing to patch indirect CALL in %ps\n", (void *)addr);
93#endif
63f70270 94 return len; /* call too long for patch site */
5800dc5c 95 }
139ec7c4 96
ab144f5e
AK
97 b->opcode = 0xe8; /* call */
98 b->delta = delta;
99 BUILD_BUG_ON(sizeof(*b) != 5);
139ec7c4 100
63f70270
JF
101 return 5;
102}
103
9bad5658 104#ifdef CONFIG_PARAVIRT_XXL
7e437202
JG
105static unsigned paravirt_patch_jmp(void *insnbuf, const void *target,
106 unsigned long addr, unsigned len)
63f70270 107{
ab144f5e
AK
108 struct branch *b = insnbuf;
109 unsigned long delta = (unsigned long)target - (addr+5);
63f70270 110
5800dc5c
PZ
111 if (len < 5) {
112#ifdef CONFIG_RETPOLINE
113 WARN_ONCE("Failing to patch indirect JMP in %ps\n", (void *)addr);
114#endif
63f70270 115 return len; /* call too long for patch site */
5800dc5c 116 }
63f70270 117
ab144f5e
AK
118 b->opcode = 0xe9; /* jmp */
119 b->delta = delta;
63f70270
JF
120
121 return 5;
122}
9bad5658 123#endif
63f70270 124
9043442b
JG
125DEFINE_STATIC_KEY_TRUE(virt_spin_lock_key);
126
127void __init native_pv_lock_init(void)
128{
129 if (!static_cpu_has(X86_FEATURE_HYPERVISOR))
130 static_branch_disable(&virt_spin_lock_key);
131}
132
abc745f8 133unsigned paravirt_patch_default(u8 type, void *insnbuf,
ab144f5e 134 unsigned long addr, unsigned len)
63f70270 135{
5c83511b
JG
136 /*
137 * Neat trick to map patch type back to the call within the
138 * corresponding structure.
139 */
140 void *opfunc = *((void **)&pv_ops + type);
63f70270
JF
141 unsigned ret;
142
143 if (opfunc == NULL)
144 /* If there's no function, patch it with a ud2a (BUG) */
93b1eab3 145 ret = paravirt_patch_insns(insnbuf, len, ud2a, ud2a+sizeof(ud2a));
41edafdb 146 else if (opfunc == _paravirt_nop)
79f1d836 147 ret = 0;
41edafdb
JF
148
149 /* identity functions just return their single argument */
150 else if (opfunc == _paravirt_ident_32)
151 ret = paravirt_patch_ident_32(insnbuf, len);
152 else if (opfunc == _paravirt_ident_64)
153 ret = paravirt_patch_ident_64(insnbuf, len);
154
9bad5658 155#ifdef CONFIG_PARAVIRT_XXL
5c83511b
JG
156 else if (type == PARAVIRT_PATCH(cpu.iret) ||
157 type == PARAVIRT_PATCH(cpu.usergs_sysret64))
63f70270 158 /* If operation requires a jmp, then jmp */
93b1eab3 159 ret = paravirt_patch_jmp(insnbuf, opfunc, addr, len);
9bad5658 160#endif
63f70270 161 else
abc745f8
JG
162 /* Otherwise call the function. */
163 ret = paravirt_patch_call(insnbuf, opfunc, addr, len);
63f70270
JF
164
165 return ret;
166}
167
ab144f5e 168unsigned paravirt_patch_insns(void *insnbuf, unsigned len,
63f70270
JF
169 const char *start, const char *end)
170{
171 unsigned insn_len = end - start;
139ec7c4 172
63f70270
JF
173 if (insn_len > len || start == NULL)
174 insn_len = len;
175 else
ab144f5e 176 memcpy(insnbuf, start, insn_len);
139ec7c4 177
139ec7c4
RR
178 return insn_len;
179}
180
1a1eecd1 181static void native_flush_tlb(void)
da181a8b
RR
182{
183 __native_flush_tlb();
184}
185
186/*
187 * Global pages have to be flushed a bit differently. Not a real
188 * performance problem because this does not happen often.
189 */
1a1eecd1 190static void native_flush_tlb_global(void)
da181a8b
RR
191{
192 __native_flush_tlb_global();
193}
194
1299ef1d 195static void native_flush_tlb_one_user(unsigned long addr)
da181a8b 196{
1299ef1d 197 __native_flush_tlb_one_user(addr);
da181a8b
RR
198}
199
c5905afb
IM
200struct static_key paravirt_steal_enabled;
201struct static_key paravirt_steal_rq_enabled;
3c404b57
GC
202
203static u64 native_steal_clock(int cpu)
204{
205 return 0;
206}
207
d3561b7f 208/* These are in entry.S */
1a1eecd1 209extern void native_iret(void);
2be29982 210extern void native_usergs_sysret64(void);
d3561b7f 211
d572929c
JF
212static struct resource reserve_ioports = {
213 .start = 0,
214 .end = IO_SPACE_LIMIT,
215 .name = "paravirt-ioport",
216 .flags = IORESOURCE_IO | IORESOURCE_BUSY,
217};
218
d572929c
JF
219/*
220 * Reserve the whole legacy IO space to prevent any legacy drivers
221 * from wasting time probing for their hardware. This is a fairly
222 * brute-force approach to disabling all non-virtual drivers.
223 *
224 * Note that this must be called very early to have any effect.
225 */
226int paravirt_disable_iospace(void)
227{
f7743fe6 228 return request_resource(&ioport_resource, &reserve_ioports);
d572929c
JF
229}
230
8965c1c0
JF
231static DEFINE_PER_CPU(enum paravirt_lazy_mode, paravirt_lazy_mode) = PARAVIRT_LAZY_NONE;
232
233static inline void enter_lazy(enum paravirt_lazy_mode mode)
234{
c6ae41e7 235 BUG_ON(this_cpu_read(paravirt_lazy_mode) != PARAVIRT_LAZY_NONE);
8965c1c0 236
c6ae41e7 237 this_cpu_write(paravirt_lazy_mode, mode);
8965c1c0
JF
238}
239
b407fc57 240static void leave_lazy(enum paravirt_lazy_mode mode)
8965c1c0 241{
c6ae41e7 242 BUG_ON(this_cpu_read(paravirt_lazy_mode) != mode);
8965c1c0 243
c6ae41e7 244 this_cpu_write(paravirt_lazy_mode, PARAVIRT_LAZY_NONE);
8965c1c0
JF
245}
246
247void paravirt_enter_lazy_mmu(void)
248{
249 enter_lazy(PARAVIRT_LAZY_MMU);
250}
251
252void paravirt_leave_lazy_mmu(void)
253{
b407fc57 254 leave_lazy(PARAVIRT_LAZY_MMU);
8965c1c0
JF
255}
256
511ba86e
BO
257void paravirt_flush_lazy_mmu(void)
258{
259 preempt_disable();
260
261 if (paravirt_get_lazy_mode() == PARAVIRT_LAZY_MMU) {
262 arch_leave_lazy_mmu_mode();
263 arch_enter_lazy_mmu_mode();
264 }
265
266 preempt_enable();
267}
268
9bad5658 269#ifdef CONFIG_PARAVIRT_XXL
224101ed 270void paravirt_start_context_switch(struct task_struct *prev)
8965c1c0 271{
2829b449
JF
272 BUG_ON(preemptible());
273
c6ae41e7 274 if (this_cpu_read(paravirt_lazy_mode) == PARAVIRT_LAZY_MMU) {
b407fc57 275 arch_leave_lazy_mmu_mode();
224101ed 276 set_ti_thread_flag(task_thread_info(prev), TIF_LAZY_MMU_UPDATES);
b407fc57 277 }
8965c1c0
JF
278 enter_lazy(PARAVIRT_LAZY_CPU);
279}
280
224101ed 281void paravirt_end_context_switch(struct task_struct *next)
8965c1c0 282{
2829b449
JF
283 BUG_ON(preemptible());
284
b407fc57
JF
285 leave_lazy(PARAVIRT_LAZY_CPU);
286
224101ed 287 if (test_and_clear_ti_thread_flag(task_thread_info(next), TIF_LAZY_MMU_UPDATES))
b407fc57 288 arch_enter_lazy_mmu_mode();
8965c1c0 289}
9bad5658 290#endif
8965c1c0
JF
291
292enum paravirt_lazy_mode paravirt_get_lazy_mode(void)
293{
b8bcfe99
JF
294 if (in_interrupt())
295 return PARAVIRT_LAZY_NONE;
296
c6ae41e7 297 return this_cpu_read(paravirt_lazy_mode);
8965c1c0
JF
298}
299
93b1eab3 300struct pv_info pv_info = {
d3561b7f 301 .name = "bare hardware",
40181646 302#ifdef CONFIG_PARAVIRT_XXL
d3561b7f 303 .kernel_rpl = 0,
5311ab62 304 .shared_kernel_pmd = 1, /* Only used when CONFIG_X86_PAE is set */
318f5a2a
AL
305
306#ifdef CONFIG_X86_64
307 .extra_user_64bit_cs = __USER_CS,
308#endif
40181646 309#endif
93b1eab3 310};
d3561b7f 311
41edafdb
JF
312#if defined(CONFIG_X86_32) && !defined(CONFIG_X86_PAE)
313/* 32-bit pagetable entries */
da5de7c2 314#define PTE_IDENT __PV_IS_CALLEE_SAVE(_paravirt_ident_32)
41edafdb
JF
315#else
316/* 64-bit pagetable entries */
da5de7c2 317#define PTE_IDENT __PV_IS_CALLEE_SAVE(_paravirt_ident_64)
41edafdb
JF
318#endif
319
5c83511b
JG
320struct paravirt_patch_template pv_ops = {
321 /* Init ops. */
322 .init.patch = native_patch,
323
324 /* Time ops. */
325 .time.sched_clock = native_sched_clock,
326 .time.steal_clock = native_steal_clock,
327
328 /* Cpu ops. */
9bad5658
JG
329 .cpu.io_delay = native_io_delay,
330
331#ifdef CONFIG_PARAVIRT_XXL
5c83511b
JG
332 .cpu.cpuid = native_cpuid,
333 .cpu.get_debugreg = native_get_debugreg,
334 .cpu.set_debugreg = native_set_debugreg,
335 .cpu.read_cr0 = native_read_cr0,
336 .cpu.write_cr0 = native_write_cr0,
337 .cpu.write_cr4 = native_write_cr4,
338#ifdef CONFIG_X86_64
339 .cpu.read_cr8 = native_read_cr8,
340 .cpu.write_cr8 = native_write_cr8,
341#endif
342 .cpu.wbinvd = native_wbinvd,
343 .cpu.read_msr = native_read_msr,
344 .cpu.write_msr = native_write_msr,
345 .cpu.read_msr_safe = native_read_msr_safe,
346 .cpu.write_msr_safe = native_write_msr_safe,
347 .cpu.read_pmc = native_read_pmc,
348 .cpu.load_tr_desc = native_load_tr_desc,
349 .cpu.set_ldt = native_set_ldt,
350 .cpu.load_gdt = native_load_gdt,
351 .cpu.load_idt = native_load_idt,
352 .cpu.store_tr = native_store_tr,
353 .cpu.load_tls = native_load_tls,
354#ifdef CONFIG_X86_64
355 .cpu.load_gs_index = native_load_gs_index,
356#endif
357 .cpu.write_ldt_entry = native_write_ldt_entry,
358 .cpu.write_gdt_entry = native_write_gdt_entry,
359 .cpu.write_idt_entry = native_write_idt_entry,
eba0045f 360
5c83511b
JG
361 .cpu.alloc_ldt = paravirt_nop,
362 .cpu.free_ldt = paravirt_nop,
c119ecce 363
5c83511b 364 .cpu.load_sp0 = native_load_sp0,
3dc494e8 365
5c83511b
JG
366#ifdef CONFIG_X86_64
367 .cpu.usergs_sysret64 = native_usergs_sysret64,
368#endif
369 .cpu.iret = native_iret,
370 .cpu.swapgs = native_swapgs,
371
372 .cpu.set_iopl_mask = native_set_iopl_mask,
5c83511b
JG
373
374 .cpu.start_context_switch = paravirt_nop,
375 .cpu.end_context_switch = paravirt_nop,
9bad5658 376#endif /* CONFIG_PARAVIRT_XXL */
5c83511b
JG
377
378 /* Irq ops. */
379 .irq.save_fl = __PV_IS_CALLEE_SAVE(native_save_fl),
380 .irq.restore_fl = __PV_IS_CALLEE_SAVE(native_restore_fl),
381 .irq.irq_disable = __PV_IS_CALLEE_SAVE(native_irq_disable),
382 .irq.irq_enable = __PV_IS_CALLEE_SAVE(native_irq_enable),
383 .irq.safe_halt = native_safe_halt,
384 .irq.halt = native_halt,
385
386 /* Mmu ops. */
387 .mmu.read_cr2 = native_read_cr2,
388 .mmu.write_cr2 = native_write_cr2,
389 .mmu.read_cr3 = __native_read_cr3,
390 .mmu.write_cr3 = native_write_cr3,
391
392 .mmu.flush_tlb_user = native_flush_tlb,
393 .mmu.flush_tlb_kernel = native_flush_tlb_global,
394 .mmu.flush_tlb_one_user = native_flush_tlb_one_user,
395 .mmu.flush_tlb_others = native_flush_tlb_others,
396 .mmu.tlb_remove_table =
397 (void (*)(struct mmu_gather *, void *))tlb_remove_page,
398
399 .mmu.pgd_alloc = __paravirt_pgd_alloc,
400 .mmu.pgd_free = paravirt_nop,
401
402 .mmu.alloc_pte = paravirt_nop,
403 .mmu.alloc_pmd = paravirt_nop,
404 .mmu.alloc_pud = paravirt_nop,
405 .mmu.alloc_p4d = paravirt_nop,
406 .mmu.release_pte = paravirt_nop,
407 .mmu.release_pmd = paravirt_nop,
408 .mmu.release_pud = paravirt_nop,
409 .mmu.release_p4d = paravirt_nop,
410
411 .mmu.set_pte = native_set_pte,
412 .mmu.set_pte_at = native_set_pte_at,
413 .mmu.set_pmd = native_set_pmd,
414
415 .mmu.ptep_modify_prot_start = __ptep_modify_prot_start,
416 .mmu.ptep_modify_prot_commit = __ptep_modify_prot_commit,
08b882c6 417
98233368 418#if CONFIG_PGTABLE_LEVELS >= 3
da181a8b 419#ifdef CONFIG_X86_PAE
5c83511b
JG
420 .mmu.set_pte_atomic = native_set_pte_atomic,
421 .mmu.pte_clear = native_pte_clear,
422 .mmu.pmd_clear = native_pmd_clear,
f95f2f7b 423#endif
5c83511b 424 .mmu.set_pud = native_set_pud,
da5de7c2 425
5c83511b
JG
426 .mmu.pmd_val = PTE_IDENT,
427 .mmu.make_pmd = PTE_IDENT,
f95f2f7b 428
f2a6a705 429#if CONFIG_PGTABLE_LEVELS >= 4
5c83511b
JG
430 .mmu.pud_val = PTE_IDENT,
431 .mmu.make_pud = PTE_IDENT,
da5de7c2 432
5c83511b 433 .mmu.set_p4d = native_set_p4d,
f2a6a705
KS
434
435#if CONFIG_PGTABLE_LEVELS >= 5
5c83511b
JG
436 .mmu.p4d_val = PTE_IDENT,
437 .mmu.make_p4d = PTE_IDENT,
335437fb 438
5c83511b 439 .mmu.set_pgd = native_set_pgd,
335437fb 440#endif /* CONFIG_PGTABLE_LEVELS >= 5 */
f2a6a705 441#endif /* CONFIG_PGTABLE_LEVELS >= 4 */
98233368 442#endif /* CONFIG_PGTABLE_LEVELS >= 3 */
da181a8b 443
5c83511b
JG
444 .mmu.pte_val = PTE_IDENT,
445 .mmu.pgd_val = PTE_IDENT,
3dc494e8 446
5c83511b
JG
447 .mmu.make_pte = PTE_IDENT,
448 .mmu.make_pgd = PTE_IDENT,
3dc494e8 449
5c83511b
JG
450 .mmu.dup_mmap = paravirt_nop,
451 .mmu.exit_mmap = paravirt_nop,
452 .mmu.activate_mm = paravirt_nop,
8965c1c0 453
5c83511b
JG
454 .mmu.lazy_mode = {
455 .enter = paravirt_nop,
456 .leave = paravirt_nop,
457 .flush = paravirt_nop,
8965c1c0 458 },
aeaaa59c 459
5c83511b
JG
460 .mmu.set_fixmap = native_set_fixmap,
461
462#if defined(CONFIG_PARAVIRT_SPINLOCKS)
463 /* Lock ops. */
464#ifdef CONFIG_SMP
465 .lock.queued_spin_lock_slowpath = native_queued_spin_lock_slowpath,
466 .lock.queued_spin_unlock =
467 PV_CALLEE_SAVE(__native_queued_spin_unlock),
468 .lock.wait = paravirt_nop,
469 .lock.kick = paravirt_nop,
470 .lock.vcpu_is_preempted =
471 PV_CALLEE_SAVE(__native_vcpu_is_preempted),
472#endif /* SMP */
473#endif
d3561b7f 474};
0dbe5a11 475
9bad5658 476#ifdef CONFIG_PARAVIRT_XXL
5c83511b
JG
477/* At this point, native_get/set_debugreg has real function entries */
478NOKPROBE_SYMBOL(native_get_debugreg);
479NOKPROBE_SYMBOL(native_set_debugreg);
480NOKPROBE_SYMBOL(native_load_idt);
9bad5658 481#endif
5c83511b
JG
482
483EXPORT_SYMBOL_GPL(pv_ops);
93b1eab3 484EXPORT_SYMBOL_GPL(pv_info);