bug.h: add include of it to various implicit C users
[linux-2.6-block.git] / arch / x86 / kernel / paravirt.c
CommitLineData
d3561b7f
RR
1/* Paravirtualization interfaces
2 Copyright (C) 2006 Rusty Russell IBM Corporation
3
4 This program is free software; you can redistribute it and/or modify
5 it under the terms of the GNU General Public License as published by
6 the Free Software Foundation; either version 2 of the License, or
7 (at your option) any later version.
8
9 This program is distributed in the hope that it will be useful,
10 but WITHOUT ANY WARRANTY; without even the implied warranty of
11 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
12 GNU General Public License for more details.
13
14 You should have received a copy of the GNU General Public License
15 along with this program; if not, write to the Free Software
16 Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
b1df07bd
GOC
17
18 2007 - x86_64 support added by Glauber de Oliveira Costa, Red Hat Inc
d3561b7f 19*/
b1df07bd 20
d3561b7f
RR
21#include <linux/errno.h>
22#include <linux/module.h>
23#include <linux/efi.h>
24#include <linux/bcd.h>
ce6234b5 25#include <linux/highmem.h>
d3561b7f
RR
26
27#include <asm/bug.h>
28#include <asm/paravirt.h>
50af5ead 29#include <asm/debugreg.h>
d3561b7f
RR
30#include <asm/desc.h>
31#include <asm/setup.h>
a312b37b 32#include <asm/pgtable.h>
d3561b7f 33#include <asm/time.h>
eba0045f 34#include <asm/pgalloc.h>
d3561b7f
RR
35#include <asm/irq.h>
36#include <asm/delay.h>
13623d79
RR
37#include <asm/fixmap.h>
38#include <asm/apic.h>
da181a8b 39#include <asm/tlbflush.h>
6cb9a835 40#include <asm/timer.h>
d3561b7f
RR
41
42/* nop stub */
45876233 43void _paravirt_nop(void)
d3561b7f
RR
44{
45}
46
41edafdb
JF
47/* identity function, which can be inlined */
48u32 _paravirt_ident_32(u32 x)
49{
50 return x;
51}
52
53u64 _paravirt_ident_64(u64 x)
54{
55 return x;
56}
57
6f30c1ac 58void __init default_banner(void)
d3561b7f
RR
59{
60 printk(KERN_INFO "Booting paravirtualized kernel on %s\n",
93b1eab3 61 pv_info.name);
d3561b7f
RR
62}
63
139ec7c4 64/* Simple instruction patching code. */
93b1eab3
JF
65#define DEF_NATIVE(ops, name, code) \
66 extern const char start_##ops##_##name[], end_##ops##_##name[]; \
67 asm("start_" #ops "_" #name ": " code "; end_" #ops "_" #name ":")
68
93b1eab3
JF
69/* Undefined instruction for dealing with missing ops pointers. */
70static const unsigned char ud2a[] = { 0x0f, 0x0b };
139ec7c4 71
63f70270
JF
72unsigned paravirt_patch_nop(void)
73{
74 return 0;
75}
76
77unsigned paravirt_patch_ignore(unsigned len)
78{
79 return len;
80}
81
19d36ccd
AK
82struct branch {
83 unsigned char opcode;
84 u32 delta;
85} __attribute__((packed));
86
ab144f5e
AK
87unsigned paravirt_patch_call(void *insnbuf,
88 const void *target, u16 tgt_clobbers,
89 unsigned long addr, u16 site_clobbers,
63f70270
JF
90 unsigned len)
91{
ab144f5e
AK
92 struct branch *b = insnbuf;
93 unsigned long delta = (unsigned long)target - (addr+5);
63f70270
JF
94
95 if (tgt_clobbers & ~site_clobbers)
96 return len; /* target would clobber too much for this site */
97 if (len < 5)
98 return len; /* call too long for patch site */
139ec7c4 99
ab144f5e
AK
100 b->opcode = 0xe8; /* call */
101 b->delta = delta;
102 BUILD_BUG_ON(sizeof(*b) != 5);
139ec7c4 103
63f70270
JF
104 return 5;
105}
106
93b1eab3 107unsigned paravirt_patch_jmp(void *insnbuf, const void *target,
ab144f5e 108 unsigned long addr, unsigned len)
63f70270 109{
ab144f5e
AK
110 struct branch *b = insnbuf;
111 unsigned long delta = (unsigned long)target - (addr+5);
63f70270
JF
112
113 if (len < 5)
114 return len; /* call too long for patch site */
115
ab144f5e
AK
116 b->opcode = 0xe9; /* jmp */
117 b->delta = delta;
63f70270
JF
118
119 return 5;
120}
121
93b1eab3
JF
122/* Neat trick to map patch type back to the call within the
123 * corresponding structure. */
124static void *get_call_destination(u8 type)
125{
126 struct paravirt_patch_template tmpl = {
127 .pv_init_ops = pv_init_ops,
93b1eab3
JF
128 .pv_time_ops = pv_time_ops,
129 .pv_cpu_ops = pv_cpu_ops,
130 .pv_irq_ops = pv_irq_ops,
131 .pv_apic_ops = pv_apic_ops,
132 .pv_mmu_ops = pv_mmu_ops,
b4ecc126 133#ifdef CONFIG_PARAVIRT_SPINLOCKS
74d4affd 134 .pv_lock_ops = pv_lock_ops,
b4ecc126 135#endif
93b1eab3
JF
136 };
137 return *((void **)&tmpl + type);
138}
139
ab144f5e
AK
140unsigned paravirt_patch_default(u8 type, u16 clobbers, void *insnbuf,
141 unsigned long addr, unsigned len)
63f70270 142{
93b1eab3 143 void *opfunc = get_call_destination(type);
63f70270
JF
144 unsigned ret;
145
146 if (opfunc == NULL)
147 /* If there's no function, patch it with a ud2a (BUG) */
93b1eab3 148 ret = paravirt_patch_insns(insnbuf, len, ud2a, ud2a+sizeof(ud2a));
41edafdb 149 else if (opfunc == _paravirt_nop)
63f70270
JF
150 /* If the operation is a nop, then nop the callsite */
151 ret = paravirt_patch_nop();
41edafdb
JF
152
153 /* identity functions just return their single argument */
154 else if (opfunc == _paravirt_ident_32)
155 ret = paravirt_patch_ident_32(insnbuf, len);
156 else if (opfunc == _paravirt_ident_64)
157 ret = paravirt_patch_ident_64(insnbuf, len);
158
93b1eab3 159 else if (type == PARAVIRT_PATCH(pv_cpu_ops.iret) ||
d75cd22f 160 type == PARAVIRT_PATCH(pv_cpu_ops.irq_enable_sysexit) ||
2be29982
JF
161 type == PARAVIRT_PATCH(pv_cpu_ops.usergs_sysret32) ||
162 type == PARAVIRT_PATCH(pv_cpu_ops.usergs_sysret64))
63f70270 163 /* If operation requires a jmp, then jmp */
93b1eab3 164 ret = paravirt_patch_jmp(insnbuf, opfunc, addr, len);
63f70270
JF
165 else
166 /* Otherwise call the function; assume target could
167 clobber any caller-save reg */
ab144f5e
AK
168 ret = paravirt_patch_call(insnbuf, opfunc, CLBR_ANY,
169 addr, clobbers, len);
63f70270
JF
170
171 return ret;
172}
173
ab144f5e 174unsigned paravirt_patch_insns(void *insnbuf, unsigned len,
63f70270
JF
175 const char *start, const char *end)
176{
177 unsigned insn_len = end - start;
139ec7c4 178
63f70270
JF
179 if (insn_len > len || start == NULL)
180 insn_len = len;
181 else
ab144f5e 182 memcpy(insnbuf, start, insn_len);
139ec7c4 183
139ec7c4
RR
184 return insn_len;
185}
186
1a1eecd1 187static void native_flush_tlb(void)
da181a8b
RR
188{
189 __native_flush_tlb();
190}
191
192/*
193 * Global pages have to be flushed a bit differently. Not a real
194 * performance problem because this does not happen often.
195 */
1a1eecd1 196static void native_flush_tlb_global(void)
da181a8b
RR
197{
198 __native_flush_tlb_global();
199}
200
63f70270 201static void native_flush_tlb_single(unsigned long addr)
da181a8b
RR
202{
203 __native_flush_tlb_single(addr);
204}
205
3c404b57
GC
206struct jump_label_key paravirt_steal_enabled;
207struct jump_label_key paravirt_steal_rq_enabled;
208
209static u64 native_steal_clock(int cpu)
210{
211 return 0;
212}
213
d3561b7f 214/* These are in entry.S */
1a1eecd1 215extern void native_iret(void);
d75cd22f 216extern void native_irq_enable_sysexit(void);
2be29982
JF
217extern void native_usergs_sysret32(void);
218extern void native_usergs_sysret64(void);
d3561b7f 219
d572929c
JF
220static struct resource reserve_ioports = {
221 .start = 0,
222 .end = IO_SPACE_LIMIT,
223 .name = "paravirt-ioport",
224 .flags = IORESOURCE_IO | IORESOURCE_BUSY,
225};
226
d572929c
JF
227/*
228 * Reserve the whole legacy IO space to prevent any legacy drivers
229 * from wasting time probing for their hardware. This is a fairly
230 * brute-force approach to disabling all non-virtual drivers.
231 *
232 * Note that this must be called very early to have any effect.
233 */
234int paravirt_disable_iospace(void)
235{
f7743fe6 236 return request_resource(&ioport_resource, &reserve_ioports);
d572929c
JF
237}
238
8965c1c0
JF
239static DEFINE_PER_CPU(enum paravirt_lazy_mode, paravirt_lazy_mode) = PARAVIRT_LAZY_NONE;
240
241static inline void enter_lazy(enum paravirt_lazy_mode mode)
242{
ab2f75f0 243 BUG_ON(percpu_read(paravirt_lazy_mode) != PARAVIRT_LAZY_NONE);
8965c1c0 244
ab2f75f0 245 percpu_write(paravirt_lazy_mode, mode);
8965c1c0
JF
246}
247
b407fc57 248static void leave_lazy(enum paravirt_lazy_mode mode)
8965c1c0 249{
ab2f75f0 250 BUG_ON(percpu_read(paravirt_lazy_mode) != mode);
8965c1c0 251
ab2f75f0 252 percpu_write(paravirt_lazy_mode, PARAVIRT_LAZY_NONE);
8965c1c0
JF
253}
254
255void paravirt_enter_lazy_mmu(void)
256{
257 enter_lazy(PARAVIRT_LAZY_MMU);
258}
259
260void paravirt_leave_lazy_mmu(void)
261{
b407fc57 262 leave_lazy(PARAVIRT_LAZY_MMU);
8965c1c0
JF
263}
264
224101ed 265void paravirt_start_context_switch(struct task_struct *prev)
8965c1c0 266{
2829b449
JF
267 BUG_ON(preemptible());
268
b407fc57
JF
269 if (percpu_read(paravirt_lazy_mode) == PARAVIRT_LAZY_MMU) {
270 arch_leave_lazy_mmu_mode();
224101ed 271 set_ti_thread_flag(task_thread_info(prev), TIF_LAZY_MMU_UPDATES);
b407fc57 272 }
8965c1c0
JF
273 enter_lazy(PARAVIRT_LAZY_CPU);
274}
275
224101ed 276void paravirt_end_context_switch(struct task_struct *next)
8965c1c0 277{
2829b449
JF
278 BUG_ON(preemptible());
279
b407fc57
JF
280 leave_lazy(PARAVIRT_LAZY_CPU);
281
224101ed 282 if (test_and_clear_ti_thread_flag(task_thread_info(next), TIF_LAZY_MMU_UPDATES))
b407fc57 283 arch_enter_lazy_mmu_mode();
8965c1c0
JF
284}
285
286enum paravirt_lazy_mode paravirt_get_lazy_mode(void)
287{
b8bcfe99
JF
288 if (in_interrupt())
289 return PARAVIRT_LAZY_NONE;
290
ab2f75f0 291 return percpu_read(paravirt_lazy_mode);
8965c1c0
JF
292}
293
d85cf93d
JF
294void arch_flush_lazy_mmu_mode(void)
295{
296 preempt_disable();
297
298 if (paravirt_get_lazy_mode() == PARAVIRT_LAZY_MMU) {
299 arch_leave_lazy_mmu_mode();
300 arch_enter_lazy_mmu_mode();
301 }
302
303 preempt_enable();
304}
305
93b1eab3 306struct pv_info pv_info = {
d3561b7f
RR
307 .name = "bare hardware",
308 .paravirt_enabled = 0,
309 .kernel_rpl = 0,
5311ab62 310 .shared_kernel_pmd = 1, /* Only used when CONFIG_X86_PAE is set */
318f5a2a
AL
311
312#ifdef CONFIG_X86_64
313 .extra_user_64bit_cs = __USER_CS,
314#endif
93b1eab3 315};
d3561b7f 316
93b1eab3
JF
317struct pv_init_ops pv_init_ops = {
318 .patch = native_patch,
93b1eab3
JF
319};
320
321struct pv_time_ops pv_time_ops = {
93b1eab3 322 .sched_clock = native_sched_clock,
3c404b57 323 .steal_clock = native_steal_clock,
93b1eab3
JF
324};
325
326struct pv_irq_ops pv_irq_ops = {
ecb93d1c
JF
327 .save_fl = __PV_IS_CALLEE_SAVE(native_save_fl),
328 .restore_fl = __PV_IS_CALLEE_SAVE(native_restore_fl),
329 .irq_disable = __PV_IS_CALLEE_SAVE(native_irq_disable),
330 .irq_enable = __PV_IS_CALLEE_SAVE(native_irq_enable),
93b1eab3
JF
331 .safe_halt = native_safe_halt,
332 .halt = native_halt,
fab58420
JF
333#ifdef CONFIG_X86_64
334 .adjust_exception_frame = paravirt_nop,
335#endif
93b1eab3 336};
d3561b7f 337
93b1eab3 338struct pv_cpu_ops pv_cpu_ops = {
d3561b7f
RR
339 .cpuid = native_cpuid,
340 .get_debugreg = native_get_debugreg,
341 .set_debugreg = native_set_debugreg,
342 .clts = native_clts,
343 .read_cr0 = native_read_cr0,
344 .write_cr0 = native_write_cr0,
d3561b7f
RR
345 .read_cr4 = native_read_cr4,
346 .read_cr4_safe = native_read_cr4_safe,
347 .write_cr4 = native_write_cr4,
88b4755f
GOC
348#ifdef CONFIG_X86_64
349 .read_cr8 = native_read_cr8,
350 .write_cr8 = native_write_cr8,
351#endif
d3561b7f 352 .wbinvd = native_wbinvd,
90a0a06a 353 .read_msr = native_read_msr_safe,
132ec92f 354 .rdmsr_regs = native_rdmsr_safe_regs,
90a0a06a 355 .write_msr = native_write_msr_safe,
132ec92f 356 .wrmsr_regs = native_wrmsr_safe_regs,
d3561b7f
RR
357 .read_tsc = native_read_tsc,
358 .read_pmc = native_read_pmc,
e5aaac44 359 .read_tscp = native_read_tscp,
d3561b7f
RR
360 .load_tr_desc = native_load_tr_desc,
361 .set_ldt = native_set_ldt,
362 .load_gdt = native_load_gdt,
363 .load_idt = native_load_idt,
364 .store_gdt = native_store_gdt,
365 .store_idt = native_store_idt,
366 .store_tr = native_store_tr,
367 .load_tls = native_load_tls,
9f9d489a
JF
368#ifdef CONFIG_X86_64
369 .load_gs_index = native_load_gs_index,
370#endif
75b8bb3e 371 .write_ldt_entry = native_write_ldt_entry,
014b15be 372 .write_gdt_entry = native_write_gdt_entry,
8d947344 373 .write_idt_entry = native_write_idt_entry,
38ffbe66
JF
374
375 .alloc_ldt = paravirt_nop,
376 .free_ldt = paravirt_nop,
377
faca6227 378 .load_sp0 = native_load_sp0,
d3561b7f 379
102d0a4b 380#if defined(CONFIG_X86_32) || defined(CONFIG_IA32_EMULATION)
d75cd22f 381 .irq_enable_sysexit = native_irq_enable_sysexit,
102d0a4b 382#endif
2be29982 383#ifdef CONFIG_X86_64
102d0a4b 384#ifdef CONFIG_IA32_EMULATION
2be29982 385 .usergs_sysret32 = native_usergs_sysret32,
102d0a4b 386#endif
2be29982 387 .usergs_sysret64 = native_usergs_sysret64,
d75cd22f 388#endif
93b1eab3 389 .iret = native_iret,
e801f864 390 .swapgs = native_swapgs,
93b1eab3 391
d3561b7f
RR
392 .set_iopl_mask = native_set_iopl_mask,
393 .io_delay = native_io_delay,
8965c1c0 394
224101ed
JF
395 .start_context_switch = paravirt_nop,
396 .end_context_switch = paravirt_nop,
93b1eab3 397};
d3561b7f 398
93b1eab3 399struct pv_apic_ops pv_apic_ops = {
13623d79 400#ifdef CONFIG_X86_LOCAL_APIC
0260c196 401 .startup_ipi_hook = paravirt_nop,
13623d79 402#endif
93b1eab3
JF
403};
404
41edafdb
JF
405#if defined(CONFIG_X86_32) && !defined(CONFIG_X86_PAE)
406/* 32-bit pagetable entries */
da5de7c2 407#define PTE_IDENT __PV_IS_CALLEE_SAVE(_paravirt_ident_32)
41edafdb
JF
408#else
409/* 64-bit pagetable entries */
da5de7c2 410#define PTE_IDENT __PV_IS_CALLEE_SAVE(_paravirt_ident_64)
41edafdb
JF
411#endif
412
93b1eab3 413struct pv_mmu_ops pv_mmu_ops = {
b239fb25 414
93b1eab3
JF
415 .read_cr2 = native_read_cr2,
416 .write_cr2 = native_write_cr2,
417 .read_cr3 = native_read_cr3,
418 .write_cr3 = native_write_cr3,
419
da181a8b
RR
420 .flush_tlb_user = native_flush_tlb,
421 .flush_tlb_kernel = native_flush_tlb_global,
422 .flush_tlb_single = native_flush_tlb_single,
d4c10477 423 .flush_tlb_others = native_flush_tlb_others,
da181a8b 424
eba0045f
JF
425 .pgd_alloc = __paravirt_pgd_alloc,
426 .pgd_free = paravirt_nop,
427
6944a9c8
JF
428 .alloc_pte = paravirt_nop,
429 .alloc_pmd = paravirt_nop,
2761fa09 430 .alloc_pud = paravirt_nop,
6944a9c8
JF
431 .release_pte = paravirt_nop,
432 .release_pmd = paravirt_nop,
2761fa09 433 .release_pud = paravirt_nop,
c119ecce 434
da181a8b
RR
435 .set_pte = native_set_pte,
436 .set_pte_at = native_set_pte_at,
437 .set_pmd = native_set_pmd,
331127f7 438 .set_pmd_at = native_set_pmd_at,
45876233
JF
439 .pte_update = paravirt_nop,
440 .pte_update_defer = paravirt_nop,
331127f7
AA
441 .pmd_update = paravirt_nop,
442 .pmd_update_defer = paravirt_nop,
3dc494e8 443
08b882c6
JF
444 .ptep_modify_prot_start = __ptep_modify_prot_start,
445 .ptep_modify_prot_commit = __ptep_modify_prot_commit,
446
f95f2f7b 447#if PAGETABLE_LEVELS >= 3
da181a8b
RR
448#ifdef CONFIG_X86_PAE
449 .set_pte_atomic = native_set_pte_atomic,
da181a8b
RR
450 .pte_clear = native_pte_clear,
451 .pmd_clear = native_pmd_clear,
f95f2f7b
EH
452#endif
453 .set_pud = native_set_pud,
da5de7c2
JF
454
455 .pmd_val = PTE_IDENT,
456 .make_pmd = PTE_IDENT,
f95f2f7b
EH
457
458#if PAGETABLE_LEVELS == 4
da5de7c2
JF
459 .pud_val = PTE_IDENT,
460 .make_pud = PTE_IDENT,
461
f95f2f7b 462 .set_pgd = native_set_pgd,
da181a8b 463#endif
f95f2f7b 464#endif /* PAGETABLE_LEVELS >= 3 */
da181a8b 465
da5de7c2
JF
466 .pte_val = PTE_IDENT,
467 .pgd_val = PTE_IDENT,
3dc494e8 468
da5de7c2
JF
469 .make_pte = PTE_IDENT,
470 .make_pgd = PTE_IDENT,
3dc494e8 471
d6dd61c8
JF
472 .dup_mmap = paravirt_nop,
473 .exit_mmap = paravirt_nop,
474 .activate_mm = paravirt_nop,
8965c1c0
JF
475
476 .lazy_mode = {
477 .enter = paravirt_nop,
478 .leave = paravirt_nop,
479 },
aeaaa59c
JF
480
481 .set_fixmap = native_set_fixmap,
d3561b7f 482};
0dbe5a11 483
93b1eab3 484EXPORT_SYMBOL_GPL(pv_time_ops);
f97b8954
JF
485EXPORT_SYMBOL (pv_cpu_ops);
486EXPORT_SYMBOL (pv_mmu_ops);
93b1eab3
JF
487EXPORT_SYMBOL_GPL(pv_apic_ops);
488EXPORT_SYMBOL_GPL(pv_info);
489EXPORT_SYMBOL (pv_irq_ops);