Commit | Line | Data |
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d3561b7f RR |
1 | /* Paravirtualization interfaces |
2 | Copyright (C) 2006 Rusty Russell IBM Corporation | |
3 | ||
4 | This program is free software; you can redistribute it and/or modify | |
5 | it under the terms of the GNU General Public License as published by | |
6 | the Free Software Foundation; either version 2 of the License, or | |
7 | (at your option) any later version. | |
8 | ||
9 | This program is distributed in the hope that it will be useful, | |
10 | but WITHOUT ANY WARRANTY; without even the implied warranty of | |
11 | MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | |
12 | GNU General Public License for more details. | |
13 | ||
14 | You should have received a copy of the GNU General Public License | |
15 | along with this program; if not, write to the Free Software | |
16 | Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA | |
b1df07bd GOC |
17 | |
18 | 2007 - x86_64 support added by Glauber de Oliveira Costa, Red Hat Inc | |
d3561b7f | 19 | */ |
b1df07bd | 20 | |
d3561b7f RR |
21 | #include <linux/errno.h> |
22 | #include <linux/module.h> | |
23 | #include <linux/efi.h> | |
24 | #include <linux/bcd.h> | |
ce6234b5 | 25 | #include <linux/highmem.h> |
d3561b7f RR |
26 | |
27 | #include <asm/bug.h> | |
28 | #include <asm/paravirt.h> | |
29 | #include <asm/desc.h> | |
30 | #include <asm/setup.h> | |
a312b37b | 31 | #include <asm/pgtable.h> |
d3561b7f | 32 | #include <asm/time.h> |
eba0045f | 33 | #include <asm/pgalloc.h> |
d3561b7f RR |
34 | #include <asm/irq.h> |
35 | #include <asm/delay.h> | |
13623d79 RR |
36 | #include <asm/fixmap.h> |
37 | #include <asm/apic.h> | |
da181a8b | 38 | #include <asm/tlbflush.h> |
6cb9a835 | 39 | #include <asm/timer.h> |
d3561b7f RR |
40 | |
41 | /* nop stub */ | |
45876233 | 42 | void _paravirt_nop(void) |
d3561b7f RR |
43 | { |
44 | } | |
45 | ||
41edafdb JF |
46 | /* identity function, which can be inlined */ |
47 | u32 _paravirt_ident_32(u32 x) | |
48 | { | |
49 | return x; | |
50 | } | |
51 | ||
52 | u64 _paravirt_ident_64(u64 x) | |
53 | { | |
54 | return x; | |
55 | } | |
56 | ||
d3561b7f RR |
57 | static void __init default_banner(void) |
58 | { | |
59 | printk(KERN_INFO "Booting paravirtualized kernel on %s\n", | |
93b1eab3 | 60 | pv_info.name); |
d3561b7f RR |
61 | } |
62 | ||
63 | char *memory_setup(void) | |
64 | { | |
93b1eab3 | 65 | return pv_init_ops.memory_setup(); |
d3561b7f RR |
66 | } |
67 | ||
139ec7c4 | 68 | /* Simple instruction patching code. */ |
93b1eab3 JF |
69 | #define DEF_NATIVE(ops, name, code) \ |
70 | extern const char start_##ops##_##name[], end_##ops##_##name[]; \ | |
71 | asm("start_" #ops "_" #name ": " code "; end_" #ops "_" #name ":") | |
72 | ||
93b1eab3 JF |
73 | /* Undefined instruction for dealing with missing ops pointers. */ |
74 | static const unsigned char ud2a[] = { 0x0f, 0x0b }; | |
139ec7c4 | 75 | |
63f70270 JF |
76 | unsigned paravirt_patch_nop(void) |
77 | { | |
78 | return 0; | |
79 | } | |
80 | ||
81 | unsigned paravirt_patch_ignore(unsigned len) | |
82 | { | |
83 | return len; | |
84 | } | |
85 | ||
19d36ccd AK |
86 | struct branch { |
87 | unsigned char opcode; | |
88 | u32 delta; | |
89 | } __attribute__((packed)); | |
90 | ||
ab144f5e AK |
91 | unsigned paravirt_patch_call(void *insnbuf, |
92 | const void *target, u16 tgt_clobbers, | |
93 | unsigned long addr, u16 site_clobbers, | |
63f70270 JF |
94 | unsigned len) |
95 | { | |
ab144f5e AK |
96 | struct branch *b = insnbuf; |
97 | unsigned long delta = (unsigned long)target - (addr+5); | |
63f70270 JF |
98 | |
99 | if (tgt_clobbers & ~site_clobbers) | |
100 | return len; /* target would clobber too much for this site */ | |
101 | if (len < 5) | |
102 | return len; /* call too long for patch site */ | |
139ec7c4 | 103 | |
ab144f5e AK |
104 | b->opcode = 0xe8; /* call */ |
105 | b->delta = delta; | |
106 | BUILD_BUG_ON(sizeof(*b) != 5); | |
139ec7c4 | 107 | |
63f70270 JF |
108 | return 5; |
109 | } | |
110 | ||
93b1eab3 | 111 | unsigned paravirt_patch_jmp(void *insnbuf, const void *target, |
ab144f5e | 112 | unsigned long addr, unsigned len) |
63f70270 | 113 | { |
ab144f5e AK |
114 | struct branch *b = insnbuf; |
115 | unsigned long delta = (unsigned long)target - (addr+5); | |
63f70270 JF |
116 | |
117 | if (len < 5) | |
118 | return len; /* call too long for patch site */ | |
119 | ||
ab144f5e AK |
120 | b->opcode = 0xe9; /* jmp */ |
121 | b->delta = delta; | |
63f70270 JF |
122 | |
123 | return 5; | |
124 | } | |
125 | ||
93b1eab3 JF |
126 | /* Neat trick to map patch type back to the call within the |
127 | * corresponding structure. */ | |
128 | static void *get_call_destination(u8 type) | |
129 | { | |
130 | struct paravirt_patch_template tmpl = { | |
131 | .pv_init_ops = pv_init_ops, | |
93b1eab3 JF |
132 | .pv_time_ops = pv_time_ops, |
133 | .pv_cpu_ops = pv_cpu_ops, | |
134 | .pv_irq_ops = pv_irq_ops, | |
135 | .pv_apic_ops = pv_apic_ops, | |
136 | .pv_mmu_ops = pv_mmu_ops, | |
b4ecc126 | 137 | #ifdef CONFIG_PARAVIRT_SPINLOCKS |
74d4affd | 138 | .pv_lock_ops = pv_lock_ops, |
b4ecc126 | 139 | #endif |
93b1eab3 JF |
140 | }; |
141 | return *((void **)&tmpl + type); | |
142 | } | |
143 | ||
ab144f5e AK |
144 | unsigned paravirt_patch_default(u8 type, u16 clobbers, void *insnbuf, |
145 | unsigned long addr, unsigned len) | |
63f70270 | 146 | { |
93b1eab3 | 147 | void *opfunc = get_call_destination(type); |
63f70270 JF |
148 | unsigned ret; |
149 | ||
150 | if (opfunc == NULL) | |
151 | /* If there's no function, patch it with a ud2a (BUG) */ | |
93b1eab3 | 152 | ret = paravirt_patch_insns(insnbuf, len, ud2a, ud2a+sizeof(ud2a)); |
41edafdb | 153 | else if (opfunc == _paravirt_nop) |
63f70270 JF |
154 | /* If the operation is a nop, then nop the callsite */ |
155 | ret = paravirt_patch_nop(); | |
41edafdb JF |
156 | |
157 | /* identity functions just return their single argument */ | |
158 | else if (opfunc == _paravirt_ident_32) | |
159 | ret = paravirt_patch_ident_32(insnbuf, len); | |
160 | else if (opfunc == _paravirt_ident_64) | |
161 | ret = paravirt_patch_ident_64(insnbuf, len); | |
162 | ||
93b1eab3 | 163 | else if (type == PARAVIRT_PATCH(pv_cpu_ops.iret) || |
d75cd22f | 164 | type == PARAVIRT_PATCH(pv_cpu_ops.irq_enable_sysexit) || |
2be29982 JF |
165 | type == PARAVIRT_PATCH(pv_cpu_ops.usergs_sysret32) || |
166 | type == PARAVIRT_PATCH(pv_cpu_ops.usergs_sysret64)) | |
63f70270 | 167 | /* If operation requires a jmp, then jmp */ |
93b1eab3 | 168 | ret = paravirt_patch_jmp(insnbuf, opfunc, addr, len); |
63f70270 JF |
169 | else |
170 | /* Otherwise call the function; assume target could | |
171 | clobber any caller-save reg */ | |
ab144f5e AK |
172 | ret = paravirt_patch_call(insnbuf, opfunc, CLBR_ANY, |
173 | addr, clobbers, len); | |
63f70270 JF |
174 | |
175 | return ret; | |
176 | } | |
177 | ||
ab144f5e | 178 | unsigned paravirt_patch_insns(void *insnbuf, unsigned len, |
63f70270 JF |
179 | const char *start, const char *end) |
180 | { | |
181 | unsigned insn_len = end - start; | |
139ec7c4 | 182 | |
63f70270 JF |
183 | if (insn_len > len || start == NULL) |
184 | insn_len = len; | |
185 | else | |
ab144f5e | 186 | memcpy(insnbuf, start, insn_len); |
139ec7c4 | 187 | |
139ec7c4 RR |
188 | return insn_len; |
189 | } | |
190 | ||
d3561b7f RR |
191 | void init_IRQ(void) |
192 | { | |
93b1eab3 | 193 | pv_irq_ops.init_IRQ(); |
d3561b7f RR |
194 | } |
195 | ||
1a1eecd1 | 196 | static void native_flush_tlb(void) |
da181a8b RR |
197 | { |
198 | __native_flush_tlb(); | |
199 | } | |
200 | ||
201 | /* | |
202 | * Global pages have to be flushed a bit differently. Not a real | |
203 | * performance problem because this does not happen often. | |
204 | */ | |
1a1eecd1 | 205 | static void native_flush_tlb_global(void) |
da181a8b RR |
206 | { |
207 | __native_flush_tlb_global(); | |
208 | } | |
209 | ||
63f70270 | 210 | static void native_flush_tlb_single(unsigned long addr) |
da181a8b RR |
211 | { |
212 | __native_flush_tlb_single(addr); | |
213 | } | |
214 | ||
d3561b7f | 215 | /* These are in entry.S */ |
1a1eecd1 | 216 | extern void native_iret(void); |
d75cd22f | 217 | extern void native_irq_enable_sysexit(void); |
2be29982 JF |
218 | extern void native_usergs_sysret32(void); |
219 | extern void native_usergs_sysret64(void); | |
d3561b7f RR |
220 | |
221 | static int __init print_banner(void) | |
222 | { | |
93b1eab3 | 223 | pv_init_ops.banner(); |
d3561b7f RR |
224 | return 0; |
225 | } | |
226 | core_initcall(print_banner); | |
227 | ||
d572929c JF |
228 | static struct resource reserve_ioports = { |
229 | .start = 0, | |
230 | .end = IO_SPACE_LIMIT, | |
231 | .name = "paravirt-ioport", | |
232 | .flags = IORESOURCE_IO | IORESOURCE_BUSY, | |
233 | }; | |
234 | ||
d572929c JF |
235 | /* |
236 | * Reserve the whole legacy IO space to prevent any legacy drivers | |
237 | * from wasting time probing for their hardware. This is a fairly | |
238 | * brute-force approach to disabling all non-virtual drivers. | |
239 | * | |
240 | * Note that this must be called very early to have any effect. | |
241 | */ | |
242 | int paravirt_disable_iospace(void) | |
243 | { | |
f7743fe6 | 244 | return request_resource(&ioport_resource, &reserve_ioports); |
d572929c JF |
245 | } |
246 | ||
8965c1c0 JF |
247 | static DEFINE_PER_CPU(enum paravirt_lazy_mode, paravirt_lazy_mode) = PARAVIRT_LAZY_NONE; |
248 | ||
249 | static inline void enter_lazy(enum paravirt_lazy_mode mode) | |
250 | { | |
ab2f75f0 | 251 | BUG_ON(percpu_read(paravirt_lazy_mode) != PARAVIRT_LAZY_NONE); |
8965c1c0 | 252 | |
ab2f75f0 | 253 | percpu_write(paravirt_lazy_mode, mode); |
8965c1c0 JF |
254 | } |
255 | ||
b407fc57 | 256 | static void leave_lazy(enum paravirt_lazy_mode mode) |
8965c1c0 | 257 | { |
ab2f75f0 | 258 | BUG_ON(percpu_read(paravirt_lazy_mode) != mode); |
8965c1c0 | 259 | |
ab2f75f0 | 260 | percpu_write(paravirt_lazy_mode, PARAVIRT_LAZY_NONE); |
8965c1c0 JF |
261 | } |
262 | ||
263 | void paravirt_enter_lazy_mmu(void) | |
264 | { | |
265 | enter_lazy(PARAVIRT_LAZY_MMU); | |
266 | } | |
267 | ||
268 | void paravirt_leave_lazy_mmu(void) | |
269 | { | |
b407fc57 | 270 | leave_lazy(PARAVIRT_LAZY_MMU); |
8965c1c0 JF |
271 | } |
272 | ||
224101ed | 273 | void paravirt_start_context_switch(struct task_struct *prev) |
8965c1c0 | 274 | { |
2829b449 JF |
275 | BUG_ON(preemptible()); |
276 | ||
b407fc57 JF |
277 | if (percpu_read(paravirt_lazy_mode) == PARAVIRT_LAZY_MMU) { |
278 | arch_leave_lazy_mmu_mode(); | |
224101ed | 279 | set_ti_thread_flag(task_thread_info(prev), TIF_LAZY_MMU_UPDATES); |
b407fc57 | 280 | } |
8965c1c0 JF |
281 | enter_lazy(PARAVIRT_LAZY_CPU); |
282 | } | |
283 | ||
224101ed | 284 | void paravirt_end_context_switch(struct task_struct *next) |
8965c1c0 | 285 | { |
2829b449 JF |
286 | BUG_ON(preemptible()); |
287 | ||
b407fc57 JF |
288 | leave_lazy(PARAVIRT_LAZY_CPU); |
289 | ||
224101ed | 290 | if (test_and_clear_ti_thread_flag(task_thread_info(next), TIF_LAZY_MMU_UPDATES)) |
b407fc57 | 291 | arch_enter_lazy_mmu_mode(); |
8965c1c0 JF |
292 | } |
293 | ||
294 | enum paravirt_lazy_mode paravirt_get_lazy_mode(void) | |
295 | { | |
b8bcfe99 JF |
296 | if (in_interrupt()) |
297 | return PARAVIRT_LAZY_NONE; | |
298 | ||
ab2f75f0 | 299 | return percpu_read(paravirt_lazy_mode); |
8965c1c0 JF |
300 | } |
301 | ||
d85cf93d JF |
302 | void arch_flush_lazy_mmu_mode(void) |
303 | { | |
304 | preempt_disable(); | |
305 | ||
306 | if (paravirt_get_lazy_mode() == PARAVIRT_LAZY_MMU) { | |
307 | arch_leave_lazy_mmu_mode(); | |
308 | arch_enter_lazy_mmu_mode(); | |
309 | } | |
310 | ||
311 | preempt_enable(); | |
312 | } | |
313 | ||
93b1eab3 | 314 | struct pv_info pv_info = { |
d3561b7f RR |
315 | .name = "bare hardware", |
316 | .paravirt_enabled = 0, | |
317 | .kernel_rpl = 0, | |
5311ab62 | 318 | .shared_kernel_pmd = 1, /* Only used when CONFIG_X86_PAE is set */ |
93b1eab3 | 319 | }; |
d3561b7f | 320 | |
93b1eab3 JF |
321 | struct pv_init_ops pv_init_ops = { |
322 | .patch = native_patch, | |
d3561b7f | 323 | .banner = default_banner, |
45876233 | 324 | .arch_setup = paravirt_nop, |
d3561b7f | 325 | .memory_setup = machine_specific_memory_setup, |
93b1eab3 JF |
326 | }; |
327 | ||
328 | struct pv_time_ops pv_time_ops = { | |
329 | .time_init = hpet_time_init, | |
d3561b7f RR |
330 | .get_wallclock = native_get_wallclock, |
331 | .set_wallclock = native_set_wallclock, | |
93b1eab3 | 332 | .sched_clock = native_sched_clock, |
e93ef949 | 333 | .get_tsc_khz = native_calibrate_tsc, |
93b1eab3 JF |
334 | }; |
335 | ||
336 | struct pv_irq_ops pv_irq_ops = { | |
d3561b7f | 337 | .init_IRQ = native_init_IRQ, |
ecb93d1c JF |
338 | .save_fl = __PV_IS_CALLEE_SAVE(native_save_fl), |
339 | .restore_fl = __PV_IS_CALLEE_SAVE(native_restore_fl), | |
340 | .irq_disable = __PV_IS_CALLEE_SAVE(native_irq_disable), | |
341 | .irq_enable = __PV_IS_CALLEE_SAVE(native_irq_enable), | |
93b1eab3 JF |
342 | .safe_halt = native_safe_halt, |
343 | .halt = native_halt, | |
fab58420 JF |
344 | #ifdef CONFIG_X86_64 |
345 | .adjust_exception_frame = paravirt_nop, | |
346 | #endif | |
93b1eab3 | 347 | }; |
d3561b7f | 348 | |
93b1eab3 | 349 | struct pv_cpu_ops pv_cpu_ops = { |
d3561b7f RR |
350 | .cpuid = native_cpuid, |
351 | .get_debugreg = native_get_debugreg, | |
352 | .set_debugreg = native_set_debugreg, | |
353 | .clts = native_clts, | |
354 | .read_cr0 = native_read_cr0, | |
355 | .write_cr0 = native_write_cr0, | |
d3561b7f RR |
356 | .read_cr4 = native_read_cr4, |
357 | .read_cr4_safe = native_read_cr4_safe, | |
358 | .write_cr4 = native_write_cr4, | |
88b4755f GOC |
359 | #ifdef CONFIG_X86_64 |
360 | .read_cr8 = native_read_cr8, | |
361 | .write_cr8 = native_write_cr8, | |
362 | #endif | |
d3561b7f | 363 | .wbinvd = native_wbinvd, |
90a0a06a | 364 | .read_msr = native_read_msr_safe, |
132ec92f | 365 | .rdmsr_regs = native_rdmsr_safe_regs, |
b05f78f5 | 366 | .read_msr_amd = native_read_msr_amd_safe, |
90a0a06a | 367 | .write_msr = native_write_msr_safe, |
132ec92f | 368 | .wrmsr_regs = native_wrmsr_safe_regs, |
d3561b7f RR |
369 | .read_tsc = native_read_tsc, |
370 | .read_pmc = native_read_pmc, | |
e5aaac44 | 371 | .read_tscp = native_read_tscp, |
d3561b7f RR |
372 | .load_tr_desc = native_load_tr_desc, |
373 | .set_ldt = native_set_ldt, | |
374 | .load_gdt = native_load_gdt, | |
375 | .load_idt = native_load_idt, | |
376 | .store_gdt = native_store_gdt, | |
377 | .store_idt = native_store_idt, | |
378 | .store_tr = native_store_tr, | |
379 | .load_tls = native_load_tls, | |
9f9d489a JF |
380 | #ifdef CONFIG_X86_64 |
381 | .load_gs_index = native_load_gs_index, | |
382 | #endif | |
75b8bb3e | 383 | .write_ldt_entry = native_write_ldt_entry, |
014b15be | 384 | .write_gdt_entry = native_write_gdt_entry, |
8d947344 | 385 | .write_idt_entry = native_write_idt_entry, |
38ffbe66 JF |
386 | |
387 | .alloc_ldt = paravirt_nop, | |
388 | .free_ldt = paravirt_nop, | |
389 | ||
faca6227 | 390 | .load_sp0 = native_load_sp0, |
d3561b7f | 391 | |
102d0a4b | 392 | #if defined(CONFIG_X86_32) || defined(CONFIG_IA32_EMULATION) |
d75cd22f | 393 | .irq_enable_sysexit = native_irq_enable_sysexit, |
102d0a4b | 394 | #endif |
2be29982 | 395 | #ifdef CONFIG_X86_64 |
102d0a4b | 396 | #ifdef CONFIG_IA32_EMULATION |
2be29982 | 397 | .usergs_sysret32 = native_usergs_sysret32, |
102d0a4b | 398 | #endif |
2be29982 | 399 | .usergs_sysret64 = native_usergs_sysret64, |
d75cd22f | 400 | #endif |
93b1eab3 | 401 | .iret = native_iret, |
e801f864 | 402 | .swapgs = native_swapgs, |
93b1eab3 | 403 | |
d3561b7f RR |
404 | .set_iopl_mask = native_set_iopl_mask, |
405 | .io_delay = native_io_delay, | |
8965c1c0 | 406 | |
224101ed JF |
407 | .start_context_switch = paravirt_nop, |
408 | .end_context_switch = paravirt_nop, | |
93b1eab3 | 409 | }; |
d3561b7f | 410 | |
93b1eab3 | 411 | struct pv_apic_ops pv_apic_ops = { |
13623d79 | 412 | #ifdef CONFIG_X86_LOCAL_APIC |
bbab4f3b ZA |
413 | .setup_boot_clock = setup_boot_APIC_clock, |
414 | .setup_secondary_clock = setup_secondary_APIC_clock, | |
0260c196 | 415 | .startup_ipi_hook = paravirt_nop, |
13623d79 | 416 | #endif |
93b1eab3 JF |
417 | }; |
418 | ||
41edafdb JF |
419 | #if defined(CONFIG_X86_32) && !defined(CONFIG_X86_PAE) |
420 | /* 32-bit pagetable entries */ | |
da5de7c2 | 421 | #define PTE_IDENT __PV_IS_CALLEE_SAVE(_paravirt_ident_32) |
41edafdb JF |
422 | #else |
423 | /* 64-bit pagetable entries */ | |
da5de7c2 | 424 | #define PTE_IDENT __PV_IS_CALLEE_SAVE(_paravirt_ident_64) |
41edafdb JF |
425 | #endif |
426 | ||
93b1eab3 | 427 | struct pv_mmu_ops pv_mmu_ops = { |
d8dd8eec | 428 | #ifndef CONFIG_X86_64 |
b239fb25 JF |
429 | .pagetable_setup_start = native_pagetable_setup_start, |
430 | .pagetable_setup_done = native_pagetable_setup_done, | |
a312b37b EH |
431 | #else |
432 | .pagetable_setup_start = paravirt_nop, | |
433 | .pagetable_setup_done = paravirt_nop, | |
d8dd8eec | 434 | #endif |
b239fb25 | 435 | |
93b1eab3 JF |
436 | .read_cr2 = native_read_cr2, |
437 | .write_cr2 = native_write_cr2, | |
438 | .read_cr3 = native_read_cr3, | |
439 | .write_cr3 = native_write_cr3, | |
440 | ||
da181a8b RR |
441 | .flush_tlb_user = native_flush_tlb, |
442 | .flush_tlb_kernel = native_flush_tlb_global, | |
443 | .flush_tlb_single = native_flush_tlb_single, | |
d4c10477 | 444 | .flush_tlb_others = native_flush_tlb_others, |
da181a8b | 445 | |
eba0045f JF |
446 | .pgd_alloc = __paravirt_pgd_alloc, |
447 | .pgd_free = paravirt_nop, | |
448 | ||
6944a9c8 JF |
449 | .alloc_pte = paravirt_nop, |
450 | .alloc_pmd = paravirt_nop, | |
451 | .alloc_pmd_clone = paravirt_nop, | |
2761fa09 | 452 | .alloc_pud = paravirt_nop, |
6944a9c8 JF |
453 | .release_pte = paravirt_nop, |
454 | .release_pmd = paravirt_nop, | |
2761fa09 | 455 | .release_pud = paravirt_nop, |
c119ecce | 456 | |
da181a8b RR |
457 | .set_pte = native_set_pte, |
458 | .set_pte_at = native_set_pte_at, | |
459 | .set_pmd = native_set_pmd, | |
45876233 JF |
460 | .pte_update = paravirt_nop, |
461 | .pte_update_defer = paravirt_nop, | |
3dc494e8 | 462 | |
08b882c6 JF |
463 | .ptep_modify_prot_start = __ptep_modify_prot_start, |
464 | .ptep_modify_prot_commit = __ptep_modify_prot_commit, | |
465 | ||
ce6234b5 JF |
466 | #ifdef CONFIG_HIGHPTE |
467 | .kmap_atomic_pte = kmap_atomic, | |
468 | #endif | |
469 | ||
f95f2f7b | 470 | #if PAGETABLE_LEVELS >= 3 |
da181a8b RR |
471 | #ifdef CONFIG_X86_PAE |
472 | .set_pte_atomic = native_set_pte_atomic, | |
da181a8b RR |
473 | .pte_clear = native_pte_clear, |
474 | .pmd_clear = native_pmd_clear, | |
f95f2f7b EH |
475 | #endif |
476 | .set_pud = native_set_pud, | |
da5de7c2 JF |
477 | |
478 | .pmd_val = PTE_IDENT, | |
479 | .make_pmd = PTE_IDENT, | |
f95f2f7b EH |
480 | |
481 | #if PAGETABLE_LEVELS == 4 | |
da5de7c2 JF |
482 | .pud_val = PTE_IDENT, |
483 | .make_pud = PTE_IDENT, | |
484 | ||
f95f2f7b | 485 | .set_pgd = native_set_pgd, |
da181a8b | 486 | #endif |
f95f2f7b | 487 | #endif /* PAGETABLE_LEVELS >= 3 */ |
da181a8b | 488 | |
da5de7c2 JF |
489 | .pte_val = PTE_IDENT, |
490 | .pgd_val = PTE_IDENT, | |
3dc494e8 | 491 | |
da5de7c2 JF |
492 | .make_pte = PTE_IDENT, |
493 | .make_pgd = PTE_IDENT, | |
3dc494e8 | 494 | |
d6dd61c8 JF |
495 | .dup_mmap = paravirt_nop, |
496 | .exit_mmap = paravirt_nop, | |
497 | .activate_mm = paravirt_nop, | |
8965c1c0 JF |
498 | |
499 | .lazy_mode = { | |
500 | .enter = paravirt_nop, | |
501 | .leave = paravirt_nop, | |
502 | }, | |
aeaaa59c JF |
503 | |
504 | .set_fixmap = native_set_fixmap, | |
d3561b7f | 505 | }; |
0dbe5a11 | 506 | |
93b1eab3 | 507 | EXPORT_SYMBOL_GPL(pv_time_ops); |
f97b8954 JF |
508 | EXPORT_SYMBOL (pv_cpu_ops); |
509 | EXPORT_SYMBOL (pv_mmu_ops); | |
93b1eab3 JF |
510 | EXPORT_SYMBOL_GPL(pv_apic_ops); |
511 | EXPORT_SYMBOL_GPL(pv_info); | |
512 | EXPORT_SYMBOL (pv_irq_ops); |