Merge git://git.kernel.org/pub/scm/linux/kernel/git/sfrench/cifs-2.6
[linux-2.6-block.git] / arch / x86 / kernel / paravirt.c
CommitLineData
d3561b7f
RR
1/* Paravirtualization interfaces
2 Copyright (C) 2006 Rusty Russell IBM Corporation
3
4 This program is free software; you can redistribute it and/or modify
5 it under the terms of the GNU General Public License as published by
6 the Free Software Foundation; either version 2 of the License, or
7 (at your option) any later version.
8
9 This program is distributed in the hope that it will be useful,
10 but WITHOUT ANY WARRANTY; without even the implied warranty of
11 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
12 GNU General Public License for more details.
13
14 You should have received a copy of the GNU General Public License
15 along with this program; if not, write to the Free Software
16 Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
b1df07bd
GOC
17
18 2007 - x86_64 support added by Glauber de Oliveira Costa, Red Hat Inc
d3561b7f 19*/
b1df07bd 20
d3561b7f
RR
21#include <linux/errno.h>
22#include <linux/module.h>
23#include <linux/efi.h>
24#include <linux/bcd.h>
ce6234b5 25#include <linux/highmem.h>
d3561b7f
RR
26
27#include <asm/bug.h>
28#include <asm/paravirt.h>
29#include <asm/desc.h>
30#include <asm/setup.h>
a312b37b 31#include <asm/pgtable.h>
d3561b7f 32#include <asm/time.h>
eba0045f 33#include <asm/pgalloc.h>
d3561b7f
RR
34#include <asm/irq.h>
35#include <asm/delay.h>
13623d79
RR
36#include <asm/fixmap.h>
37#include <asm/apic.h>
da181a8b 38#include <asm/tlbflush.h>
6cb9a835 39#include <asm/timer.h>
d3561b7f
RR
40
41/* nop stub */
45876233 42void _paravirt_nop(void)
d3561b7f
RR
43{
44}
45
41edafdb
JF
46/* identity function, which can be inlined */
47u32 _paravirt_ident_32(u32 x)
48{
49 return x;
50}
51
52u64 _paravirt_ident_64(u64 x)
53{
54 return x;
55}
56
6f30c1ac 57void __init default_banner(void)
d3561b7f
RR
58{
59 printk(KERN_INFO "Booting paravirtualized kernel on %s\n",
93b1eab3 60 pv_info.name);
d3561b7f
RR
61}
62
139ec7c4 63/* Simple instruction patching code. */
93b1eab3
JF
64#define DEF_NATIVE(ops, name, code) \
65 extern const char start_##ops##_##name[], end_##ops##_##name[]; \
66 asm("start_" #ops "_" #name ": " code "; end_" #ops "_" #name ":")
67
93b1eab3
JF
68/* Undefined instruction for dealing with missing ops pointers. */
69static const unsigned char ud2a[] = { 0x0f, 0x0b };
139ec7c4 70
63f70270
JF
71unsigned paravirt_patch_nop(void)
72{
73 return 0;
74}
75
76unsigned paravirt_patch_ignore(unsigned len)
77{
78 return len;
79}
80
19d36ccd
AK
81struct branch {
82 unsigned char opcode;
83 u32 delta;
84} __attribute__((packed));
85
ab144f5e
AK
86unsigned paravirt_patch_call(void *insnbuf,
87 const void *target, u16 tgt_clobbers,
88 unsigned long addr, u16 site_clobbers,
63f70270
JF
89 unsigned len)
90{
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AK
91 struct branch *b = insnbuf;
92 unsigned long delta = (unsigned long)target - (addr+5);
63f70270
JF
93
94 if (tgt_clobbers & ~site_clobbers)
95 return len; /* target would clobber too much for this site */
96 if (len < 5)
97 return len; /* call too long for patch site */
139ec7c4 98
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AK
99 b->opcode = 0xe8; /* call */
100 b->delta = delta;
101 BUILD_BUG_ON(sizeof(*b) != 5);
139ec7c4 102
63f70270
JF
103 return 5;
104}
105
93b1eab3 106unsigned paravirt_patch_jmp(void *insnbuf, const void *target,
ab144f5e 107 unsigned long addr, unsigned len)
63f70270 108{
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AK
109 struct branch *b = insnbuf;
110 unsigned long delta = (unsigned long)target - (addr+5);
63f70270
JF
111
112 if (len < 5)
113 return len; /* call too long for patch site */
114
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AK
115 b->opcode = 0xe9; /* jmp */
116 b->delta = delta;
63f70270
JF
117
118 return 5;
119}
120
93b1eab3
JF
121/* Neat trick to map patch type back to the call within the
122 * corresponding structure. */
123static void *get_call_destination(u8 type)
124{
125 struct paravirt_patch_template tmpl = {
126 .pv_init_ops = pv_init_ops,
93b1eab3
JF
127 .pv_time_ops = pv_time_ops,
128 .pv_cpu_ops = pv_cpu_ops,
129 .pv_irq_ops = pv_irq_ops,
130 .pv_apic_ops = pv_apic_ops,
131 .pv_mmu_ops = pv_mmu_ops,
b4ecc126 132#ifdef CONFIG_PARAVIRT_SPINLOCKS
74d4affd 133 .pv_lock_ops = pv_lock_ops,
b4ecc126 134#endif
93b1eab3
JF
135 };
136 return *((void **)&tmpl + type);
137}
138
ab144f5e
AK
139unsigned paravirt_patch_default(u8 type, u16 clobbers, void *insnbuf,
140 unsigned long addr, unsigned len)
63f70270 141{
93b1eab3 142 void *opfunc = get_call_destination(type);
63f70270
JF
143 unsigned ret;
144
145 if (opfunc == NULL)
146 /* If there's no function, patch it with a ud2a (BUG) */
93b1eab3 147 ret = paravirt_patch_insns(insnbuf, len, ud2a, ud2a+sizeof(ud2a));
41edafdb 148 else if (opfunc == _paravirt_nop)
63f70270
JF
149 /* If the operation is a nop, then nop the callsite */
150 ret = paravirt_patch_nop();
41edafdb
JF
151
152 /* identity functions just return their single argument */
153 else if (opfunc == _paravirt_ident_32)
154 ret = paravirt_patch_ident_32(insnbuf, len);
155 else if (opfunc == _paravirt_ident_64)
156 ret = paravirt_patch_ident_64(insnbuf, len);
157
93b1eab3 158 else if (type == PARAVIRT_PATCH(pv_cpu_ops.iret) ||
d75cd22f 159 type == PARAVIRT_PATCH(pv_cpu_ops.irq_enable_sysexit) ||
2be29982
JF
160 type == PARAVIRT_PATCH(pv_cpu_ops.usergs_sysret32) ||
161 type == PARAVIRT_PATCH(pv_cpu_ops.usergs_sysret64))
63f70270 162 /* If operation requires a jmp, then jmp */
93b1eab3 163 ret = paravirt_patch_jmp(insnbuf, opfunc, addr, len);
63f70270
JF
164 else
165 /* Otherwise call the function; assume target could
166 clobber any caller-save reg */
ab144f5e
AK
167 ret = paravirt_patch_call(insnbuf, opfunc, CLBR_ANY,
168 addr, clobbers, len);
63f70270
JF
169
170 return ret;
171}
172
ab144f5e 173unsigned paravirt_patch_insns(void *insnbuf, unsigned len,
63f70270
JF
174 const char *start, const char *end)
175{
176 unsigned insn_len = end - start;
139ec7c4 177
63f70270
JF
178 if (insn_len > len || start == NULL)
179 insn_len = len;
180 else
ab144f5e 181 memcpy(insnbuf, start, insn_len);
139ec7c4 182
139ec7c4
RR
183 return insn_len;
184}
185
1a1eecd1 186static void native_flush_tlb(void)
da181a8b
RR
187{
188 __native_flush_tlb();
189}
190
191/*
192 * Global pages have to be flushed a bit differently. Not a real
193 * performance problem because this does not happen often.
194 */
1a1eecd1 195static void native_flush_tlb_global(void)
da181a8b
RR
196{
197 __native_flush_tlb_global();
198}
199
63f70270 200static void native_flush_tlb_single(unsigned long addr)
da181a8b
RR
201{
202 __native_flush_tlb_single(addr);
203}
204
d3561b7f 205/* These are in entry.S */
1a1eecd1 206extern void native_iret(void);
d75cd22f 207extern void native_irq_enable_sysexit(void);
2be29982
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208extern void native_usergs_sysret32(void);
209extern void native_usergs_sysret64(void);
d3561b7f 210
d572929c
JF
211static struct resource reserve_ioports = {
212 .start = 0,
213 .end = IO_SPACE_LIMIT,
214 .name = "paravirt-ioport",
215 .flags = IORESOURCE_IO | IORESOURCE_BUSY,
216};
217
d572929c
JF
218/*
219 * Reserve the whole legacy IO space to prevent any legacy drivers
220 * from wasting time probing for their hardware. This is a fairly
221 * brute-force approach to disabling all non-virtual drivers.
222 *
223 * Note that this must be called very early to have any effect.
224 */
225int paravirt_disable_iospace(void)
226{
f7743fe6 227 return request_resource(&ioport_resource, &reserve_ioports);
d572929c
JF
228}
229
8965c1c0
JF
230static DEFINE_PER_CPU(enum paravirt_lazy_mode, paravirt_lazy_mode) = PARAVIRT_LAZY_NONE;
231
232static inline void enter_lazy(enum paravirt_lazy_mode mode)
233{
ab2f75f0 234 BUG_ON(percpu_read(paravirt_lazy_mode) != PARAVIRT_LAZY_NONE);
8965c1c0 235
ab2f75f0 236 percpu_write(paravirt_lazy_mode, mode);
8965c1c0
JF
237}
238
b407fc57 239static void leave_lazy(enum paravirt_lazy_mode mode)
8965c1c0 240{
ab2f75f0 241 BUG_ON(percpu_read(paravirt_lazy_mode) != mode);
8965c1c0 242
ab2f75f0 243 percpu_write(paravirt_lazy_mode, PARAVIRT_LAZY_NONE);
8965c1c0
JF
244}
245
246void paravirt_enter_lazy_mmu(void)
247{
248 enter_lazy(PARAVIRT_LAZY_MMU);
249}
250
251void paravirt_leave_lazy_mmu(void)
252{
b407fc57 253 leave_lazy(PARAVIRT_LAZY_MMU);
8965c1c0
JF
254}
255
224101ed 256void paravirt_start_context_switch(struct task_struct *prev)
8965c1c0 257{
2829b449
JF
258 BUG_ON(preemptible());
259
b407fc57
JF
260 if (percpu_read(paravirt_lazy_mode) == PARAVIRT_LAZY_MMU) {
261 arch_leave_lazy_mmu_mode();
224101ed 262 set_ti_thread_flag(task_thread_info(prev), TIF_LAZY_MMU_UPDATES);
b407fc57 263 }
8965c1c0
JF
264 enter_lazy(PARAVIRT_LAZY_CPU);
265}
266
224101ed 267void paravirt_end_context_switch(struct task_struct *next)
8965c1c0 268{
2829b449
JF
269 BUG_ON(preemptible());
270
b407fc57
JF
271 leave_lazy(PARAVIRT_LAZY_CPU);
272
224101ed 273 if (test_and_clear_ti_thread_flag(task_thread_info(next), TIF_LAZY_MMU_UPDATES))
b407fc57 274 arch_enter_lazy_mmu_mode();
8965c1c0
JF
275}
276
277enum paravirt_lazy_mode paravirt_get_lazy_mode(void)
278{
b8bcfe99
JF
279 if (in_interrupt())
280 return PARAVIRT_LAZY_NONE;
281
ab2f75f0 282 return percpu_read(paravirt_lazy_mode);
8965c1c0
JF
283}
284
d85cf93d
JF
285void arch_flush_lazy_mmu_mode(void)
286{
287 preempt_disable();
288
289 if (paravirt_get_lazy_mode() == PARAVIRT_LAZY_MMU) {
290 arch_leave_lazy_mmu_mode();
291 arch_enter_lazy_mmu_mode();
292 }
293
294 preempt_enable();
295}
296
93b1eab3 297struct pv_info pv_info = {
d3561b7f
RR
298 .name = "bare hardware",
299 .paravirt_enabled = 0,
300 .kernel_rpl = 0,
5311ab62 301 .shared_kernel_pmd = 1, /* Only used when CONFIG_X86_PAE is set */
93b1eab3 302};
d3561b7f 303
93b1eab3
JF
304struct pv_init_ops pv_init_ops = {
305 .patch = native_patch,
93b1eab3
JF
306};
307
308struct pv_time_ops pv_time_ops = {
93b1eab3 309 .sched_clock = native_sched_clock,
93b1eab3
JF
310};
311
312struct pv_irq_ops pv_irq_ops = {
ecb93d1c
JF
313 .save_fl = __PV_IS_CALLEE_SAVE(native_save_fl),
314 .restore_fl = __PV_IS_CALLEE_SAVE(native_restore_fl),
315 .irq_disable = __PV_IS_CALLEE_SAVE(native_irq_disable),
316 .irq_enable = __PV_IS_CALLEE_SAVE(native_irq_enable),
93b1eab3
JF
317 .safe_halt = native_safe_halt,
318 .halt = native_halt,
fab58420
JF
319#ifdef CONFIG_X86_64
320 .adjust_exception_frame = paravirt_nop,
321#endif
93b1eab3 322};
d3561b7f 323
93b1eab3 324struct pv_cpu_ops pv_cpu_ops = {
d3561b7f
RR
325 .cpuid = native_cpuid,
326 .get_debugreg = native_get_debugreg,
327 .set_debugreg = native_set_debugreg,
328 .clts = native_clts,
329 .read_cr0 = native_read_cr0,
330 .write_cr0 = native_write_cr0,
d3561b7f
RR
331 .read_cr4 = native_read_cr4,
332 .read_cr4_safe = native_read_cr4_safe,
333 .write_cr4 = native_write_cr4,
88b4755f
GOC
334#ifdef CONFIG_X86_64
335 .read_cr8 = native_read_cr8,
336 .write_cr8 = native_write_cr8,
337#endif
d3561b7f 338 .wbinvd = native_wbinvd,
90a0a06a 339 .read_msr = native_read_msr_safe,
132ec92f 340 .rdmsr_regs = native_rdmsr_safe_regs,
90a0a06a 341 .write_msr = native_write_msr_safe,
132ec92f 342 .wrmsr_regs = native_wrmsr_safe_regs,
d3561b7f
RR
343 .read_tsc = native_read_tsc,
344 .read_pmc = native_read_pmc,
e5aaac44 345 .read_tscp = native_read_tscp,
d3561b7f
RR
346 .load_tr_desc = native_load_tr_desc,
347 .set_ldt = native_set_ldt,
348 .load_gdt = native_load_gdt,
349 .load_idt = native_load_idt,
350 .store_gdt = native_store_gdt,
351 .store_idt = native_store_idt,
352 .store_tr = native_store_tr,
353 .load_tls = native_load_tls,
9f9d489a
JF
354#ifdef CONFIG_X86_64
355 .load_gs_index = native_load_gs_index,
356#endif
75b8bb3e 357 .write_ldt_entry = native_write_ldt_entry,
014b15be 358 .write_gdt_entry = native_write_gdt_entry,
8d947344 359 .write_idt_entry = native_write_idt_entry,
38ffbe66
JF
360
361 .alloc_ldt = paravirt_nop,
362 .free_ldt = paravirt_nop,
363
faca6227 364 .load_sp0 = native_load_sp0,
d3561b7f 365
102d0a4b 366#if defined(CONFIG_X86_32) || defined(CONFIG_IA32_EMULATION)
d75cd22f 367 .irq_enable_sysexit = native_irq_enable_sysexit,
102d0a4b 368#endif
2be29982 369#ifdef CONFIG_X86_64
102d0a4b 370#ifdef CONFIG_IA32_EMULATION
2be29982 371 .usergs_sysret32 = native_usergs_sysret32,
102d0a4b 372#endif
2be29982 373 .usergs_sysret64 = native_usergs_sysret64,
d75cd22f 374#endif
93b1eab3 375 .iret = native_iret,
e801f864 376 .swapgs = native_swapgs,
93b1eab3 377
d3561b7f
RR
378 .set_iopl_mask = native_set_iopl_mask,
379 .io_delay = native_io_delay,
8965c1c0 380
224101ed
JF
381 .start_context_switch = paravirt_nop,
382 .end_context_switch = paravirt_nop,
93b1eab3 383};
d3561b7f 384
93b1eab3 385struct pv_apic_ops pv_apic_ops = {
13623d79 386#ifdef CONFIG_X86_LOCAL_APIC
0260c196 387 .startup_ipi_hook = paravirt_nop,
13623d79 388#endif
93b1eab3
JF
389};
390
41edafdb
JF
391#if defined(CONFIG_X86_32) && !defined(CONFIG_X86_PAE)
392/* 32-bit pagetable entries */
da5de7c2 393#define PTE_IDENT __PV_IS_CALLEE_SAVE(_paravirt_ident_32)
41edafdb
JF
394#else
395/* 64-bit pagetable entries */
da5de7c2 396#define PTE_IDENT __PV_IS_CALLEE_SAVE(_paravirt_ident_64)
41edafdb
JF
397#endif
398
93b1eab3 399struct pv_mmu_ops pv_mmu_ops = {
b239fb25 400
93b1eab3
JF
401 .read_cr2 = native_read_cr2,
402 .write_cr2 = native_write_cr2,
403 .read_cr3 = native_read_cr3,
404 .write_cr3 = native_write_cr3,
405
da181a8b
RR
406 .flush_tlb_user = native_flush_tlb,
407 .flush_tlb_kernel = native_flush_tlb_global,
408 .flush_tlb_single = native_flush_tlb_single,
d4c10477 409 .flush_tlb_others = native_flush_tlb_others,
da181a8b 410
eba0045f
JF
411 .pgd_alloc = __paravirt_pgd_alloc,
412 .pgd_free = paravirt_nop,
413
6944a9c8
JF
414 .alloc_pte = paravirt_nop,
415 .alloc_pmd = paravirt_nop,
2761fa09 416 .alloc_pud = paravirt_nop,
6944a9c8
JF
417 .release_pte = paravirt_nop,
418 .release_pmd = paravirt_nop,
2761fa09 419 .release_pud = paravirt_nop,
c119ecce 420
da181a8b
RR
421 .set_pte = native_set_pte,
422 .set_pte_at = native_set_pte_at,
423 .set_pmd = native_set_pmd,
45876233
JF
424 .pte_update = paravirt_nop,
425 .pte_update_defer = paravirt_nop,
3dc494e8 426
08b882c6
JF
427 .ptep_modify_prot_start = __ptep_modify_prot_start,
428 .ptep_modify_prot_commit = __ptep_modify_prot_commit,
429
f95f2f7b 430#if PAGETABLE_LEVELS >= 3
da181a8b
RR
431#ifdef CONFIG_X86_PAE
432 .set_pte_atomic = native_set_pte_atomic,
da181a8b
RR
433 .pte_clear = native_pte_clear,
434 .pmd_clear = native_pmd_clear,
f95f2f7b
EH
435#endif
436 .set_pud = native_set_pud,
da5de7c2
JF
437
438 .pmd_val = PTE_IDENT,
439 .make_pmd = PTE_IDENT,
f95f2f7b
EH
440
441#if PAGETABLE_LEVELS == 4
da5de7c2
JF
442 .pud_val = PTE_IDENT,
443 .make_pud = PTE_IDENT,
444
f95f2f7b 445 .set_pgd = native_set_pgd,
da181a8b 446#endif
f95f2f7b 447#endif /* PAGETABLE_LEVELS >= 3 */
da181a8b 448
da5de7c2
JF
449 .pte_val = PTE_IDENT,
450 .pgd_val = PTE_IDENT,
3dc494e8 451
da5de7c2
JF
452 .make_pte = PTE_IDENT,
453 .make_pgd = PTE_IDENT,
3dc494e8 454
d6dd61c8
JF
455 .dup_mmap = paravirt_nop,
456 .exit_mmap = paravirt_nop,
457 .activate_mm = paravirt_nop,
8965c1c0
JF
458
459 .lazy_mode = {
460 .enter = paravirt_nop,
461 .leave = paravirt_nop,
462 },
aeaaa59c
JF
463
464 .set_fixmap = native_set_fixmap,
d3561b7f 465};
0dbe5a11 466
93b1eab3 467EXPORT_SYMBOL_GPL(pv_time_ops);
f97b8954
JF
468EXPORT_SYMBOL (pv_cpu_ops);
469EXPORT_SYMBOL (pv_mmu_ops);
93b1eab3
JF
470EXPORT_SYMBOL_GPL(pv_apic_ops);
471EXPORT_SYMBOL_GPL(pv_info);
472EXPORT_SYMBOL (pv_irq_ops);