Merge branch 'tracing/core' of git://git.kernel.org/pub/scm/linux/kernel/git/frederic...
[linux-2.6-block.git] / arch / x86 / kernel / mpparse.c
CommitLineData
1da177e4 1/*
11113f84 2 * Intel Multiprocessor Specification 1.1 and 1.4
1da177e4
LT
3 * compliant MP-table parsing routines.
4 *
87c6fe26 5 * (c) 1995 Alan Cox, Building #3 <alan@lxorguk.ukuu.org.uk>
8f47e163 6 * (c) 1998, 1999, 2000, 2009 Ingo Molnar <mingo@redhat.com>
85bdddec 7 * (c) 2008 Alexey Starikovskiy <astarikovskiy@suse.de>
1da177e4
LT
8 */
9
10#include <linux/mm.h>
1da177e4 11#include <linux/init.h>
1da177e4 12#include <linux/delay.h>
1da177e4 13#include <linux/bootmem.h>
1da177e4
LT
14#include <linux/kernel_stat.h>
15#include <linux/mc146818rtc.h>
16#include <linux/bitops.h>
85bdddec
AS
17#include <linux/acpi.h>
18#include <linux/module.h>
103ceffb 19#include <linux/smp.h>
629e15d2 20#include <linux/pci.h>
1da177e4 21
1da177e4
LT
22#include <asm/mtrr.h>
23#include <asm/mpspec.h>
85bdddec 24#include <asm/pgalloc.h>
1da177e4 25#include <asm/io_apic.h>
85bdddec 26#include <asm/proto.h>
ce3fe6b2 27#include <asm/bios_ebda.h>
2944e16b
YL
28#include <asm/e820.h>
29#include <asm/trampoline.h>
3c9cb6de 30#include <asm/setup.h>
4884d8e6 31#include <asm/smp.h>
1da177e4 32
7b6aa335 33#include <asm/apic.h>
1da177e4
LT
34/*
35 * Checksum an MP configuration block.
36 */
37
38static int __init mpf_checksum(unsigned char *mp, int len)
39{
40 int sum = 0;
41
42 while (len--)
43 sum += *mp++;
44
45 return sum & 0xFF;
46}
47
fd6c6661
TG
48int __init default_mpc_apic_id(struct mpc_cpu *m)
49{
50 return m->apicid;
51}
52
f4f21b71 53static void __init MP_processor_info(struct mpc_cpu *m)
c853c676
AS
54{
55 int apicid;
746f2244 56 char *bootup_cpu = "";
c853c676 57
c4563826 58 if (!(m->cpuflag & CPU_ENABLED)) {
7b1292e2 59 disabled_cpus++;
1da177e4 60 return;
7b1292e2 61 }
64898a8b 62
fd6c6661 63 apicid = x86_init.mpparse.mpc_apic_id(m);
64898a8b 64
c4563826 65 if (m->cpuflag & CPU_BOOTPROCESSOR) {
746f2244 66 bootup_cpu = " (Bootup-CPU)";
c4563826 67 boot_cpu_physical_apicid = m->apicid;
1da177e4
LT
68 }
69
c4563826
JSR
70 printk(KERN_INFO "Processor #%d%s\n", m->apicid, bootup_cpu);
71 generic_processor_info(apicid, m->apicver);
1da177e4
LT
72}
73
85cc35fa 74#ifdef CONFIG_X86_IO_APIC
90e1c696 75void __init default_mpc_oem_bus_info(struct mpc_bus *m, char *str)
1da177e4 76{
d4c715fa 77 memcpy(str, m->bustype, 6);
1da177e4 78 str[6] = 0;
90e1c696
TG
79 apic_printk(APIC_VERBOSE, "Bus #%d is %s\n", m->busid, str);
80}
1da177e4 81
90e1c696
TG
82static void __init MP_bus_info(struct mpc_bus *m)
83{
84 char str[7];
1da177e4 85
90e1c696 86 x86_init.mpparse.mpc_oem_bus_info(m, str);
1da177e4 87
5e4edbb7 88#if MAX_MP_BUSSES < 256
d4c715fa 89 if (m->busid >= MAX_MP_BUSSES) {
c0ec31ad 90 printk(KERN_WARNING "MP table busid value (%d) for bustype %s "
4ef81297 91 " is too large, max. supported is %d\n",
d4c715fa 92 m->busid, str, MAX_MP_BUSSES - 1);
c0ec31ad
RD
93 return;
94 }
5e4edbb7 95#endif
c0ec31ad 96
f8924e77 97 if (strncmp(str, BUSTYPE_ISA, sizeof(BUSTYPE_ISA) - 1) == 0) {
d4c715fa 98 set_bit(m->busid, mp_bus_not_pci);
103ceffb 99#if defined(CONFIG_EISA) || defined(CONFIG_MCA)
d4c715fa 100 mp_bus_id_to_type[m->busid] = MP_BUS_ISA;
f8924e77
AS
101#endif
102 } else if (strncmp(str, BUSTYPE_PCI, sizeof(BUSTYPE_PCI) - 1) == 0) {
52fdb568
TG
103 if (x86_init.mpparse.mpc_oem_pci_bus)
104 x86_init.mpparse.mpc_oem_pci_bus(m);
64898a8b 105
d4c715fa 106 clear_bit(m->busid, mp_bus_not_pci);
103ceffb 107#if defined(CONFIG_EISA) || defined(CONFIG_MCA)
d4c715fa 108 mp_bus_id_to_type[m->busid] = MP_BUS_PCI;
4ef81297 109 } else if (strncmp(str, BUSTYPE_EISA, sizeof(BUSTYPE_EISA) - 1) == 0) {
d4c715fa 110 mp_bus_id_to_type[m->busid] = MP_BUS_EISA;
4ef81297 111 } else if (strncmp(str, BUSTYPE_MCA, sizeof(BUSTYPE_MCA) - 1) == 0) {
d4c715fa 112 mp_bus_id_to_type[m->busid] = MP_BUS_MCA;
c0a282c2 113#endif
f8924e77
AS
114 } else
115 printk(KERN_WARNING "Unknown bustype %s - ignoring\n", str);
1da177e4 116}
61048c63 117
857033a6
AS
118static int bad_ioapic(unsigned long address)
119{
120 if (nr_ioapics >= MAX_IO_APICS) {
121 printk(KERN_ERR "ERROR: Max # of I/O APICs (%d) exceeded "
122 "(found %d)\n", MAX_IO_APICS, nr_ioapics);
123 panic("Recompile kernel with bigger MAX_IO_APICS!\n");
124 }
125 if (!address) {
126 printk(KERN_ERR "WARNING: Bogus (zero) I/O APIC address"
127 " found in table, skipping!\n");
128 return 1;
129 }
130 return 0;
131}
132
2b85b5fb 133static void __init MP_ioapic_info(struct mpc_ioapic *m)
1da177e4 134{
5df82c7d 135 if (!(m->flags & MPC_APIC_USABLE))
1da177e4
LT
136 return;
137
64883ab0 138 printk(KERN_INFO "I/O APIC #%d Version %d at 0x%X.\n",
5df82c7d 139 m->apicid, m->apicver, m->apicaddr);
857033a6 140
5df82c7d 141 if (bad_ioapic(m->apicaddr))
1da177e4 142 return;
857033a6 143
b5ba7e6d
JSR
144 mp_ioapics[nr_ioapics].apicaddr = m->apicaddr;
145 mp_ioapics[nr_ioapics].apicid = m->apicid;
146 mp_ioapics[nr_ioapics].type = m->type;
147 mp_ioapics[nr_ioapics].apicver = m->apicver;
148 mp_ioapics[nr_ioapics].flags = m->flags;
1da177e4
LT
149 nr_ioapics++;
150}
151
540d4e72 152static void print_MP_intsrc_info(struct mpc_intsrc *m)
1da177e4 153{
eeb0d7d1 154 apic_printk(APIC_VERBOSE, "Int: type %d, pol %d, trig %d, bus %02x,"
1da177e4 155 " IRQ %02x, APIC ID %x, APIC INT %02x\n",
e253b396
JSR
156 m->irqtype, m->irqflag & 3, (m->irqflag >> 2) & 3, m->srcbus,
157 m->srcbusirq, m->dstapic, m->dstirq);
2944e16b
YL
158}
159
c2c21745 160static void __init print_mp_irq_info(struct mpc_intsrc *mp_irq)
2944e16b 161{
eeb0d7d1 162 apic_printk(APIC_VERBOSE, "Int: type %d, pol %d, trig %d, bus %02x,"
2944e16b 163 " IRQ %02x, APIC ID %x, APIC INT %02x\n",
c2c21745
JSR
164 mp_irq->irqtype, mp_irq->irqflag & 3,
165 (mp_irq->irqflag >> 2) & 3, mp_irq->srcbus,
166 mp_irq->srcbusirq, mp_irq->dstapic, mp_irq->dstirq);
2944e16b
YL
167}
168
540d4e72 169static void __init assign_to_mp_irq(struct mpc_intsrc *m,
c2c21745 170 struct mpc_intsrc *mp_irq)
2944e16b 171{
c2c21745
JSR
172 mp_irq->dstapic = m->dstapic;
173 mp_irq->type = m->type;
174 mp_irq->irqtype = m->irqtype;
175 mp_irq->irqflag = m->irqflag;
176 mp_irq->srcbus = m->srcbus;
177 mp_irq->srcbusirq = m->srcbusirq;
178 mp_irq->dstirq = m->dstirq;
2944e16b
YL
179}
180
c2c21745 181static void __init assign_to_mpc_intsrc(struct mpc_intsrc *mp_irq,
540d4e72 182 struct mpc_intsrc *m)
2944e16b 183{
c2c21745
JSR
184 m->dstapic = mp_irq->dstapic;
185 m->type = mp_irq->type;
186 m->irqtype = mp_irq->irqtype;
187 m->irqflag = mp_irq->irqflag;
188 m->srcbus = mp_irq->srcbus;
189 m->srcbusirq = mp_irq->srcbusirq;
190 m->dstirq = mp_irq->dstirq;
2944e16b
YL
191}
192
c2c21745 193static int __init mp_irq_mpc_intsrc_cmp(struct mpc_intsrc *mp_irq,
540d4e72 194 struct mpc_intsrc *m)
2944e16b 195{
c2c21745 196 if (mp_irq->dstapic != m->dstapic)
2944e16b 197 return 1;
c2c21745 198 if (mp_irq->type != m->type)
2944e16b 199 return 2;
c2c21745 200 if (mp_irq->irqtype != m->irqtype)
2944e16b 201 return 3;
c2c21745 202 if (mp_irq->irqflag != m->irqflag)
2944e16b 203 return 4;
c2c21745 204 if (mp_irq->srcbus != m->srcbus)
2944e16b 205 return 5;
c2c21745 206 if (mp_irq->srcbusirq != m->srcbusirq)
2944e16b 207 return 6;
c2c21745 208 if (mp_irq->dstirq != m->dstirq)
2944e16b
YL
209 return 7;
210
211 return 0;
212}
213
540d4e72 214static void __init MP_intsrc_info(struct mpc_intsrc *m)
2944e16b
YL
215{
216 int i;
217
218 print_MP_intsrc_info(m);
219
fcfa146e
YL
220 for (i = 0; i < mp_irq_entries; i++) {
221 if (!mp_irq_mpc_intsrc_cmp(&mp_irqs[i], m))
222 return;
223 }
2944e16b
YL
224
225 assign_to_mp_irq(m, &mp_irqs[mp_irq_entries]);
1da177e4
LT
226 if (++mp_irq_entries == MAX_IRQ_SOURCES)
227 panic("Max # of irq sources exceeded!!\n");
228}
a6830278
JSR
229#else /* CONFIG_X86_IO_APIC */
230static inline void __init MP_bus_info(struct mpc_bus *m) {}
231static inline void __init MP_ioapic_info(struct mpc_ioapic *m) {}
232static inline void __init MP_intsrc_info(struct mpc_intsrc *m) {}
233#endif /* CONFIG_X86_IO_APIC */
1da177e4 234
61048c63 235
8fb2952b 236static void __init MP_lintsrc_info(struct mpc_lintsrc *m)
1da177e4 237{
eeb0d7d1 238 apic_printk(APIC_VERBOSE, "Lint: type %d, pol %d, trig %d, bus %02x,"
1da177e4 239 " IRQ %02x, APIC ID %x, APIC LINT %02x\n",
b5ced7cd
JSR
240 m->irqtype, m->irqflag & 3, (m->irqflag >> 2) & 3, m->srcbusid,
241 m->srcbusirq, m->destapic, m->destapiclint);
1da177e4
LT
242}
243
1da177e4
LT
244/*
245 * Read/parse the MPC
246 */
247
f29521e4 248static int __init smp_check_mpc(struct mpc_table *mpc, char *oem, char *str)
1da177e4 249{
1da177e4 250
6c65da50 251 if (memcmp(mpc->signature, MPC_SIGNATURE, 4)) {
e950bea8 252 printk(KERN_ERR "MPTABLE: bad signature [%c%c%c%c]!\n",
6c65da50
JSR
253 mpc->signature[0], mpc->signature[1],
254 mpc->signature[2], mpc->signature[3]);
1da177e4
LT
255 return 0;
256 }
6c65da50 257 if (mpf_checksum((unsigned char *)mpc, mpc->length)) {
e950bea8 258 printk(KERN_ERR "MPTABLE: checksum error!\n");
1da177e4
LT
259 return 0;
260 }
6c65da50 261 if (mpc->spec != 0x01 && mpc->spec != 0x04) {
e950bea8 262 printk(KERN_ERR "MPTABLE: bad table version (%d)!!\n",
6c65da50 263 mpc->spec);
1da177e4
LT
264 return 0;
265 }
6c65da50 266 if (!mpc->lapic) {
e950bea8 267 printk(KERN_ERR "MPTABLE: null local APIC address!\n");
1da177e4
LT
268 return 0;
269 }
6c65da50 270 memcpy(oem, mpc->oem, 8);
4ef81297 271 oem[8] = 0;
11a62a05 272 printk(KERN_INFO "MPTABLE: OEM ID: %s\n", oem);
1da177e4 273
6c65da50 274 memcpy(str, mpc->productid, 12);
4ef81297 275 str[12] = 0;
1da177e4 276
11a62a05 277 printk(KERN_INFO "MPTABLE: Product ID: %s\n", str);
1da177e4 278
6c65da50 279 printk(KERN_INFO "MPTABLE: APIC at: 0x%X\n", mpc->lapic);
1da177e4 280
2944e16b
YL
281 return 1;
282}
283
a6830278
JSR
284static void skip_entry(unsigned char **ptr, int *count, int size)
285{
286 *ptr += size;
287 *count += size;
288}
289
5a5737ea
JSR
290static void __init smp_dump_mptable(struct mpc_table *mpc, unsigned char *mpt)
291{
292 printk(KERN_ERR "Your mptable is wrong, contact your HW vendor!\n"
293 "type %x\n", *mpt);
294 print_hex_dump(KERN_ERR, " ", DUMP_PREFIX_ADDRESS, 16,
295 1, mpc, mpc->length, 1);
296}
297
72302142
TG
298void __init default_smp_read_mpc_oem(struct mpc_table *mpc) { }
299
f29521e4 300static int __init smp_read_mpc(struct mpc_table *mpc, unsigned early)
2944e16b
YL
301{
302 char str[16];
303 char oem[10];
304
305 int count = sizeof(*mpc);
306 unsigned char *mpt = ((unsigned char *)mpc) + count;
307
308 if (!smp_check_mpc(mpc, oem, str))
309 return 0;
310
311#ifdef CONFIG_X86_32
9c764247 312 generic_mps_oem_check(mpc, oem, str);
2944e16b 313#endif
e950bea8 314 /* save the local APIC address, it might be non-default */
1da177e4 315 if (!acpi_lapic)
6c65da50 316 mp_lapic_addr = mpc->lapic;
1da177e4 317
888032cd
AS
318 if (early)
319 return 1;
320
72302142
TG
321 if (mpc->oemptr)
322 x86_init.mpparse.smp_read_mpc_oem(mpc);
64898a8b 323
1da177e4 324 /*
4ef81297 325 * Now process the configuration blocks.
1da177e4 326 */
f4848472 327 x86_init.mpparse.mpc_record(0);
64898a8b 328
6c65da50 329 while (count < mpc->length) {
4ef81297
AS
330 switch (*mpt) {
331 case MP_PROCESSOR:
a6830278
JSR
332 /* ACPI may have already provided this data */
333 if (!acpi_lapic)
c58603e8 334 MP_processor_info((struct mpc_cpu *)mpt);
a6830278
JSR
335 skip_entry(&mpt, &count, sizeof(struct mpc_cpu));
336 break;
4ef81297 337 case MP_BUS:
c58603e8 338 MP_bus_info((struct mpc_bus *)mpt);
a6830278
JSR
339 skip_entry(&mpt, &count, sizeof(struct mpc_bus));
340 break;
4ef81297 341 case MP_IOAPIC:
c58603e8 342 MP_ioapic_info((struct mpc_ioapic *)mpt);
a6830278
JSR
343 skip_entry(&mpt, &count, sizeof(struct mpc_ioapic));
344 break;
4ef81297 345 case MP_INTSRC:
c58603e8 346 MP_intsrc_info((struct mpc_intsrc *)mpt);
a6830278
JSR
347 skip_entry(&mpt, &count, sizeof(struct mpc_intsrc));
348 break;
4ef81297 349 case MP_LINTSRC:
c58603e8 350 MP_lintsrc_info((struct mpc_lintsrc *)mpt);
a6830278
JSR
351 skip_entry(&mpt, &count, sizeof(struct mpc_lintsrc));
352 break;
4ef81297 353 default:
711554db 354 /* wrong mptable */
5a5737ea 355 smp_dump_mptable(mpc, mpt);
6c65da50 356 count = mpc->length;
711554db 357 break;
1da177e4 358 }
f4848472 359 x86_init.mpparse.mpc_record(1);
1da177e4 360 }
e0da3364 361
1da177e4 362 if (!num_processors)
e950bea8 363 printk(KERN_ERR "MPTABLE: no processors registered!\n");
1da177e4
LT
364 return num_processors;
365}
366
61048c63
AS
367#ifdef CONFIG_X86_IO_APIC
368
1da177e4
LT
369static int __init ELCR_trigger(unsigned int irq)
370{
371 unsigned int port;
372
373 port = 0x4d0 + (irq >> 3);
374 return (inb(port) >> (irq & 7)) & 1;
375}
376
377static void __init construct_default_ioirq_mptable(int mpc_default_type)
378{
540d4e72 379 struct mpc_intsrc intsrc;
1da177e4
LT
380 int i;
381 int ELCR_fallback = 0;
382
e253b396
JSR
383 intsrc.type = MP_INTSRC;
384 intsrc.irqflag = 0; /* conforming */
385 intsrc.srcbus = 0;
b5ba7e6d 386 intsrc.dstapic = mp_ioapics[0].apicid;
1da177e4 387
e253b396 388 intsrc.irqtype = mp_INT;
1da177e4
LT
389
390 /*
391 * If true, we have an ISA/PCI system with no IRQ entries
392 * in the MP table. To prevent the PCI interrupts from being set up
393 * incorrectly, we try to use the ELCR. The sanity check to see if
394 * there is good ELCR data is very simple - IRQ0, 1, 2 and 13 can
395 * never be level sensitive, so we simply see if the ELCR agrees.
396 * If it does, we assume it's valid.
397 */
398 if (mpc_default_type == 5) {
62441bf1
AS
399 printk(KERN_INFO "ISA/PCI bus type with no IRQ information... "
400 "falling back to ELCR\n");
1da177e4 401
62441bf1
AS
402 if (ELCR_trigger(0) || ELCR_trigger(1) || ELCR_trigger(2) ||
403 ELCR_trigger(13))
404 printk(KERN_ERR "ELCR contains invalid data... "
405 "not using ELCR\n");
1da177e4 406 else {
4ef81297
AS
407 printk(KERN_INFO
408 "Using ELCR to identify PCI interrupts\n");
1da177e4
LT
409 ELCR_fallback = 1;
410 }
411 }
412
413 for (i = 0; i < 16; i++) {
414 switch (mpc_default_type) {
415 case 2:
416 if (i == 0 || i == 13)
417 continue; /* IRQ0 & IRQ13 not connected */
418 /* fall through */
419 default:
420 if (i == 2)
421 continue; /* IRQ2 is never connected */
422 }
423
424 if (ELCR_fallback) {
425 /*
426 * If the ELCR indicates a level-sensitive interrupt, we
427 * copy that information over to the MP table in the
428 * irqflag field (level sensitive, active high polarity).
429 */
430 if (ELCR_trigger(i))
e253b396 431 intsrc.irqflag = 13;
1da177e4 432 else
e253b396 433 intsrc.irqflag = 0;
1da177e4
LT
434 }
435
e253b396
JSR
436 intsrc.srcbusirq = i;
437 intsrc.dstirq = i ? i : 2; /* IRQ0 to INTIN2 */
1da177e4
LT
438 MP_intsrc_info(&intsrc);
439 }
440
e253b396
JSR
441 intsrc.irqtype = mp_ExtINT;
442 intsrc.srcbusirq = 0;
443 intsrc.dstirq = 0; /* 8259A to INTIN0 */
1da177e4
LT
444 MP_intsrc_info(&intsrc);
445}
446
61048c63 447
39e00fe2 448static void __init construct_ioapic_table(int mpc_default_type)
1da177e4 449{
2b85b5fb 450 struct mpc_ioapic ioapic;
00fb8606 451 struct mpc_bus bus;
1da177e4 452
d4c715fa
JSR
453 bus.type = MP_BUS;
454 bus.busid = 0;
1da177e4 455 switch (mpc_default_type) {
4ef81297 456 default:
62441bf1 457 printk(KERN_ERR "???\nUnknown standard configuration %d\n",
4ef81297
AS
458 mpc_default_type);
459 /* fall through */
460 case 1:
461 case 5:
d4c715fa 462 memcpy(bus.bustype, "ISA ", 6);
4ef81297
AS
463 break;
464 case 2:
465 case 6:
466 case 3:
d4c715fa 467 memcpy(bus.bustype, "EISA ", 6);
4ef81297
AS
468 break;
469 case 4:
470 case 7:
d4c715fa 471 memcpy(bus.bustype, "MCA ", 6);
1da177e4
LT
472 }
473 MP_bus_info(&bus);
474 if (mpc_default_type > 4) {
d4c715fa
JSR
475 bus.busid = 1;
476 memcpy(bus.bustype, "PCI ", 6);
1da177e4
LT
477 MP_bus_info(&bus);
478 }
479
8f3e1df4
CG
480 ioapic.type = MP_IOAPIC;
481 ioapic.apicid = 2;
482 ioapic.apicver = mpc_default_type > 4 ? 0x10 : 0x01;
483 ioapic.flags = MPC_APIC_USABLE;
484 ioapic.apicaddr = IO_APIC_DEFAULT_PHYS_BASE;
1da177e4
LT
485 MP_ioapic_info(&ioapic);
486
487 /*
488 * We set up most of the low 16 IO-APIC pins according to MPS rules.
489 */
490 construct_default_ioirq_mptable(mpc_default_type);
85cc35fa
TG
491}
492#else
39e00fe2 493static inline void __init construct_ioapic_table(int mpc_default_type) { }
61048c63 494#endif
85cc35fa
TG
495
496static inline void __init construct_default_ISA_mptable(int mpc_default_type)
497{
f4f21b71 498 struct mpc_cpu processor;
8fb2952b 499 struct mpc_lintsrc lintsrc;
85cc35fa
TG
500 int linttypes[2] = { mp_ExtINT, mp_NMI };
501 int i;
502
503 /*
504 * local APIC has default address
505 */
506 mp_lapic_addr = APIC_DEFAULT_PHYS_BASE;
507
508 /*
509 * 2 CPUs, numbered 0 & 1.
510 */
c4563826 511 processor.type = MP_PROCESSOR;
85cc35fa 512 /* Either an integrated APIC or a discrete 82489DX. */
c4563826
JSR
513 processor.apicver = mpc_default_type > 4 ? 0x10 : 0x01;
514 processor.cpuflag = CPU_ENABLED;
515 processor.cpufeature = (boot_cpu_data.x86 << 8) |
85cc35fa 516 (boot_cpu_data.x86_model << 4) | boot_cpu_data.x86_mask;
c4563826
JSR
517 processor.featureflag = boot_cpu_data.x86_capability[0];
518 processor.reserved[0] = 0;
519 processor.reserved[1] = 0;
85cc35fa 520 for (i = 0; i < 2; i++) {
c4563826 521 processor.apicid = i;
85cc35fa
TG
522 MP_processor_info(&processor);
523 }
524
525 construct_ioapic_table(mpc_default_type);
526
b5ced7cd
JSR
527 lintsrc.type = MP_LINTSRC;
528 lintsrc.irqflag = 0; /* conforming */
529 lintsrc.srcbusid = 0;
530 lintsrc.srcbusirq = 0;
531 lintsrc.destapic = MP_APIC_ALL;
1da177e4 532 for (i = 0; i < 2; i++) {
b5ced7cd
JSR
533 lintsrc.irqtype = linttypes[i];
534 lintsrc.destapiclint = i;
1da177e4
LT
535 MP_lintsrc_info(&lintsrc);
536 }
537}
538
41401db6 539static struct mpf_intel *mpf_found;
1da177e4 540
8d4dd919
YL
541static unsigned long __init get_mpc_size(unsigned long physptr)
542{
543 struct mpc_table *mpc;
544 unsigned long size;
545
546 mpc = early_ioremap(physptr, PAGE_SIZE);
547 size = mpc->length;
548 early_iounmap(mpc, PAGE_SIZE);
549 apic_printk(APIC_VERBOSE, " mpc: %lx-%lx\n", physptr, physptr + size);
550
551 return size;
552}
553
0b3ba0c3
JSR
554static int __init check_physptr(struct mpf_intel *mpf, unsigned int early)
555{
556 struct mpc_table *mpc;
557 unsigned long size;
558
559 size = get_mpc_size(mpf->physptr);
560 mpc = early_ioremap(mpf->physptr, size);
561 /*
562 * Read the physical hardware table. Anything here will
563 * override the defaults.
564 */
565 if (!smp_read_mpc(mpc, early)) {
566#ifdef CONFIG_X86_LOCAL_APIC
567 smp_found_config = 0;
568#endif
569 printk(KERN_ERR "BIOS bug, MP table errors detected!...\n"
570 "... disabling SMP support. (tell your hw vendor)\n");
571 early_iounmap(mpc, size);
572 return -1;
573 }
574 early_iounmap(mpc, size);
575
576 if (early)
577 return -1;
578
579#ifdef CONFIG_X86_IO_APIC
580 /*
581 * If there are no explicit MP IRQ entries, then we are
582 * broken. We set up most of the low 16 IO-APIC pins to
583 * ISA defaults and hope it will work.
584 */
585 if (!mp_irq_entries) {
586 struct mpc_bus bus;
587
588 printk(KERN_ERR "BIOS bug, no explicit IRQ entries, "
589 "using default mptable. (tell your hw vendor)\n");
590
591 bus.type = MP_BUS;
592 bus.busid = 0;
593 memcpy(bus.bustype, "ISA ", 6);
594 MP_bus_info(&bus);
595
596 construct_default_ioirq_mptable(0);
597 }
598#endif
599
600 return 0;
601}
602
1da177e4
LT
603/*
604 * Scan the memory blocks for an SMP configuration block.
605 */
b3f1b617 606void __init default_get_smp_config(unsigned int early)
1da177e4 607{
41401db6 608 struct mpf_intel *mpf = mpf_found;
1da177e4 609
69b88afa
YL
610 if (!mpf)
611 return;
612
888032cd
AS
613 if (acpi_lapic && early)
614 return;
69b88afa 615
1da177e4 616 /*
69b88afa
YL
617 * MPS doesn't support hyperthreading, aka only have
618 * thread 0 apic id in MPS table
1da177e4 619 */
69b88afa 620 if (acpi_lapic && acpi_ioapic)
1da177e4 621 return;
1da177e4 622
4ef81297 623 printk(KERN_INFO "Intel MultiProcessor Specification v1.%d\n",
1eb1b3b6 624 mpf->specification);
b3e24164 625#if defined(CONFIG_X86_LOCAL_APIC) && defined(CONFIG_X86_32)
1eb1b3b6 626 if (mpf->feature2 & (1 << 7)) {
1da177e4
LT
627 printk(KERN_INFO " IMCR and PIC compatibility mode.\n");
628 pic_mode = 1;
629 } else {
630 printk(KERN_INFO " Virtual Wire compatibility mode.\n");
631 pic_mode = 0;
632 }
4421b1c8 633#endif
1da177e4
LT
634 /*
635 * Now see if we need to read further.
636 */
1eb1b3b6 637 if (mpf->feature1 != 0) {
888032cd
AS
638 if (early) {
639 /*
640 * local APIC has default address
641 */
642 mp_lapic_addr = APIC_DEFAULT_PHYS_BASE;
643 return;
644 }
1da177e4 645
4ef81297 646 printk(KERN_INFO "Default MP configuration #%d\n",
1eb1b3b6
JSR
647 mpf->feature1);
648 construct_default_ISA_mptable(mpf->feature1);
1da177e4 649
1eb1b3b6 650 } else if (mpf->physptr) {
0b3ba0c3 651 if (check_physptr(mpf, early))
1da177e4 652 return;
1da177e4
LT
653 } else
654 BUG();
655
888032cd
AS
656 if (!early)
657 printk(KERN_INFO "Processors: %d\n", num_processors);
1da177e4
LT
658 /*
659 * Only use the first configuration found.
660 */
661}
662
b24c2a92 663static void __init smp_reserve_memory(struct mpf_intel *mpf)
a6830278
JSR
664{
665 unsigned long size = get_mpc_size(mpf->physptr);
a6830278 666
b24c2a92 667 reserve_early(mpf->physptr, mpf->physptr+size, "MP-table mpc");
a6830278
JSR
668}
669
b24c2a92 670static int __init smp_scan_config(unsigned long base, unsigned long length)
1da177e4 671{
92fd4b7a 672 unsigned int *bp = phys_to_virt(base);
41401db6 673 struct mpf_intel *mpf;
b24c2a92 674 unsigned long mem;
1da177e4 675
eeb0d7d1
RH
676 apic_printk(APIC_VERBOSE, "Scan SMP from %p for %ld bytes.\n",
677 bp, length);
5d47a271 678 BUILD_BUG_ON(sizeof(*mpf) != 16);
1da177e4
LT
679
680 while (length > 0) {
41401db6 681 mpf = (struct mpf_intel *)bp;
1da177e4 682 if ((*bp == SMP_MAGIC_IDENT) &&
1eb1b3b6 683 (mpf->length == 1) &&
4ef81297 684 !mpf_checksum((unsigned char *)bp, 16) &&
1eb1b3b6
JSR
685 ((mpf->specification == 1)
686 || (mpf->specification == 4))) {
bab4b27c 687#ifdef CONFIG_X86_LOCAL_APIC
1da177e4 688 smp_found_config = 1;
bab4b27c 689#endif
92fd4b7a 690 mpf_found = mpf;
b1f006b6 691
ba1511bf
JSR
692 printk(KERN_INFO "found SMP MP-table at [%p] %llx\n",
693 mpf, (u64)virt_to_phys(mpf));
b1f006b6 694
b24c2a92
YL
695 mem = virt_to_phys(mpf);
696 reserve_early(mem, mem + sizeof(*mpf), "MP-table mpf");
a6830278 697 if (mpf->physptr)
b24c2a92 698 smp_reserve_memory(mpf);
1da177e4 699
d2dbf343 700 return 1;
1da177e4
LT
701 }
702 bp += 4;
703 length -= 16;
704 }
705 return 0;
706}
707
b24c2a92 708void __init default_find_smp_config(void)
1da177e4
LT
709{
710 unsigned int address;
711
712 /*
713 * FIXME: Linux assumes you have 640K of base ram..
714 * this continues the error...
715 *
716 * 1) Scan the bottom 1K for a signature
717 * 2) Scan the top 1K of base RAM
718 * 3) Scan the 64K of bios
719 */
b24c2a92
YL
720 if (smp_scan_config(0x0, 0x400) ||
721 smp_scan_config(639 * 0x400, 0x400) ||
722 smp_scan_config(0xF0000, 0x10000))
1da177e4
LT
723 return;
724 /*
725 * If it is an SMP machine we should know now, unless the
726 * configuration is in an EISA/MCA bus machine with an
727 * extended bios data area.
728 *
729 * there is a real-mode segmented pointer pointing to the
730 * 4K EBDA area at 0x40E, calculate and scan it here.
731 *
732 * NOTE! There are Linux loaders that will corrupt the EBDA
733 * area, and as such this kind of SMP config may be less
734 * trustworthy, simply because the SMP table may have been
735 * stomped on during early boot. These loaders are buggy and
736 * should be fixed.
737 *
738 * MP1.4 SPEC states to only scan first 1K of 4K EBDA.
739 */
740
741 address = get_bios_ebda();
742 if (address)
b24c2a92 743 smp_scan_config(address, 0x400);
888032cd
AS
744}
745
2944e16b
YL
746#ifdef CONFIG_X86_IO_APIC
747static u8 __initdata irq_used[MAX_IRQ_SOURCES];
748
540d4e72 749static int __init get_MP_intsrc_index(struct mpc_intsrc *m)
2944e16b
YL
750{
751 int i;
752
e253b396 753 if (m->irqtype != mp_INT)
2944e16b
YL
754 return 0;
755
e253b396 756 if (m->irqflag != 0x0f)
2944e16b
YL
757 return 0;
758
759 /* not legacy */
760
761 for (i = 0; i < mp_irq_entries; i++) {
c2c21745 762 if (mp_irqs[i].irqtype != mp_INT)
2944e16b
YL
763 continue;
764
c2c21745 765 if (mp_irqs[i].irqflag != 0x0f)
2944e16b
YL
766 continue;
767
c2c21745 768 if (mp_irqs[i].srcbus != m->srcbus)
2944e16b 769 continue;
c2c21745 770 if (mp_irqs[i].srcbusirq != m->srcbusirq)
2944e16b
YL
771 continue;
772 if (irq_used[i]) {
773 /* already claimed */
774 return -2;
775 }
776 irq_used[i] = 1;
777 return i;
778 }
779
780 /* not found */
781 return -1;
782}
783
784#define SPARE_SLOT_NUM 20
785
540d4e72 786static struct mpc_intsrc __initdata *m_spare[SPARE_SLOT_NUM];
a6830278 787
57592224 788static void __init check_irq_src(struct mpc_intsrc *m, int *nr_m_spare)
a6830278
JSR
789{
790 int i;
791
792 apic_printk(APIC_VERBOSE, "OLD ");
793 print_MP_intsrc_info(m);
794
795 i = get_MP_intsrc_index(m);
796 if (i > 0) {
797 assign_to_mpc_intsrc(&mp_irqs[i], m);
798 apic_printk(APIC_VERBOSE, "NEW ");
799 print_mp_irq_info(&mp_irqs[i]);
800 return;
801 }
802 if (!i) {
803 /* legacy, do nothing */
804 return;
805 }
806 if (*nr_m_spare < SPARE_SLOT_NUM) {
807 /*
808 * not found (-1), or duplicated (-2) are invalid entries,
809 * we need to use the slot later
810 */
811 m_spare[*nr_m_spare] = m;
812 *nr_m_spare += 1;
813 }
814}
815#else /* CONFIG_X86_IO_APIC */
57592224
RM
816static
817inline void __init check_irq_src(struct mpc_intsrc *m, int *nr_m_spare) {}
a6830278
JSR
818#endif /* CONFIG_X86_IO_APIC */
819
ee214558
YL
820static int
821check_slot(unsigned long mpc_new_phys, unsigned long mpc_new_length, int count)
a6830278 822{
ee214558
YL
823 int ret = 0;
824
825 if (!mpc_new_phys || count <= mpc_new_length) {
826 WARN(1, "update_mptable: No spare slots (length: %x)\n", count);
827 return -1;
a6830278
JSR
828 }
829
ee214558 830 return ret;
a6830278 831}
2944e16b 832
f29521e4 833static int __init replace_intsrc_all(struct mpc_table *mpc,
2944e16b
YL
834 unsigned long mpc_new_phys,
835 unsigned long mpc_new_length)
836{
837#ifdef CONFIG_X86_IO_APIC
838 int i;
2944e16b 839#endif
2944e16b 840 int count = sizeof(*mpc);
a6830278 841 int nr_m_spare = 0;
2944e16b
YL
842 unsigned char *mpt = ((unsigned char *)mpc) + count;
843
6c65da50
JSR
844 printk(KERN_INFO "mpc_length %x\n", mpc->length);
845 while (count < mpc->length) {
2944e16b
YL
846 switch (*mpt) {
847 case MP_PROCESSOR:
a6830278
JSR
848 skip_entry(&mpt, &count, sizeof(struct mpc_cpu));
849 break;
2944e16b 850 case MP_BUS:
a6830278
JSR
851 skip_entry(&mpt, &count, sizeof(struct mpc_bus));
852 break;
2944e16b 853 case MP_IOAPIC:
a6830278
JSR
854 skip_entry(&mpt, &count, sizeof(struct mpc_ioapic));
855 break;
2944e16b 856 case MP_INTSRC:
c58603e8 857 check_irq_src((struct mpc_intsrc *)mpt, &nr_m_spare);
a6830278
JSR
858 skip_entry(&mpt, &count, sizeof(struct mpc_intsrc));
859 break;
2944e16b 860 case MP_LINTSRC:
a6830278
JSR
861 skip_entry(&mpt, &count, sizeof(struct mpc_lintsrc));
862 break;
2944e16b
YL
863 default:
864 /* wrong mptable */
5a5737ea 865 smp_dump_mptable(mpc, mpt);
2944e16b
YL
866 goto out;
867 }
868 }
869
870#ifdef CONFIG_X86_IO_APIC
871 for (i = 0; i < mp_irq_entries; i++) {
872 if (irq_used[i])
873 continue;
874
c2c21745 875 if (mp_irqs[i].irqtype != mp_INT)
2944e16b
YL
876 continue;
877
c2c21745 878 if (mp_irqs[i].irqflag != 0x0f)
2944e16b
YL
879 continue;
880
881 if (nr_m_spare > 0) {
82034d6f 882 apic_printk(APIC_VERBOSE, "*NEW* found\n");
2944e16b
YL
883 nr_m_spare--;
884 assign_to_mpc_intsrc(&mp_irqs[i], m_spare[nr_m_spare]);
885 m_spare[nr_m_spare] = NULL;
886 } else {
540d4e72
JSR
887 struct mpc_intsrc *m = (struct mpc_intsrc *)mpt;
888 count += sizeof(struct mpc_intsrc);
ee214558 889 if (check_slot(mpc_new_phys, mpc_new_length, count) < 0)
a6830278 890 goto out;
2944e16b 891 assign_to_mpc_intsrc(&mp_irqs[i], m);
6c65da50 892 mpc->length = count;
540d4e72 893 mpt += sizeof(struct mpc_intsrc);
2944e16b
YL
894 }
895 print_mp_irq_info(&mp_irqs[i]);
896 }
897#endif
898out:
899 /* update checksum */
6c65da50
JSR
900 mpc->checksum = 0;
901 mpc->checksum -= mpf_checksum((unsigned char *)mpc, mpc->length);
2944e16b
YL
902
903 return 0;
904}
905
f1bdb523 906int enable_update_mptable;
fcfa146e 907
2944e16b
YL
908static int __init update_mptable_setup(char *str)
909{
910 enable_update_mptable = 1;
629e15d2
YL
911#ifdef CONFIG_PCI
912 pci_routeirq = 1;
913#endif
2944e16b
YL
914 return 0;
915}
916early_param("update_mptable", update_mptable_setup);
917
918static unsigned long __initdata mpc_new_phys;
919static unsigned long mpc_new_length __initdata = 4096;
920
921/* alloc_mptable or alloc_mptable=4k */
922static int __initdata alloc_mptable;
923static int __init parse_alloc_mptable_opt(char *p)
924{
925 enable_update_mptable = 1;
629e15d2
YL
926#ifdef CONFIG_PCI
927 pci_routeirq = 1;
928#endif
2944e16b
YL
929 alloc_mptable = 1;
930 if (!p)
931 return 0;
932 mpc_new_length = memparse(p, &p);
933 return 0;
934}
935early_param("alloc_mptable", parse_alloc_mptable_opt);
936
937void __init early_reserve_e820_mpc_new(void)
938{
939 if (enable_update_mptable && alloc_mptable) {
940 u64 startt = 0;
2944e16b
YL
941 mpc_new_phys = early_reserve_e820(startt, mpc_new_length, 4);
942 }
943}
944
945static int __init update_mp_table(void)
946{
947 char str[16];
948 char oem[10];
41401db6 949 struct mpf_intel *mpf;
f29521e4 950 struct mpc_table *mpc, *mpc_new;
2944e16b
YL
951
952 if (!enable_update_mptable)
953 return 0;
954
955 mpf = mpf_found;
956 if (!mpf)
957 return 0;
958
959 /*
960 * Now see if we need to go further.
961 */
1eb1b3b6 962 if (mpf->feature1 != 0)
2944e16b
YL
963 return 0;
964
1eb1b3b6 965 if (!mpf->physptr)
2944e16b
YL
966 return 0;
967
1eb1b3b6 968 mpc = phys_to_virt(mpf->physptr);
2944e16b
YL
969
970 if (!smp_check_mpc(mpc, oem, str))
971 return 0;
972
ba1511bf 973 printk(KERN_INFO "mpf: %llx\n", (u64)virt_to_phys(mpf));
1eb1b3b6 974 printk(KERN_INFO "physptr: %x\n", mpf->physptr);
2944e16b 975
6c65da50 976 if (mpc_new_phys && mpc->length > mpc_new_length) {
2944e16b
YL
977 mpc_new_phys = 0;
978 printk(KERN_INFO "mpc_new_length is %ld, please use alloc_mptable=8k\n",
979 mpc_new_length);
980 }
981
982 if (!mpc_new_phys) {
983 unsigned char old, new;
984 /* check if we can change the postion */
6c65da50
JSR
985 mpc->checksum = 0;
986 old = mpf_checksum((unsigned char *)mpc, mpc->length);
987 mpc->checksum = 0xff;
988 new = mpf_checksum((unsigned char *)mpc, mpc->length);
2944e16b
YL
989 if (old == new) {
990 printk(KERN_INFO "mpc is readonly, please try alloc_mptable instead\n");
991 return 0;
992 }
993 printk(KERN_INFO "use in-positon replacing\n");
994 } else {
1eb1b3b6 995 mpf->physptr = mpc_new_phys;
2944e16b 996 mpc_new = phys_to_virt(mpc_new_phys);
6c65da50 997 memcpy(mpc_new, mpc, mpc->length);
2944e16b
YL
998 mpc = mpc_new;
999 /* check if we can modify that */
1eb1b3b6 1000 if (mpc_new_phys - mpf->physptr) {
41401db6 1001 struct mpf_intel *mpf_new;
2944e16b
YL
1002 /* steal 16 bytes from [0, 1k) */
1003 printk(KERN_INFO "mpf new: %x\n", 0x400 - 16);
1004 mpf_new = phys_to_virt(0x400 - 16);
1005 memcpy(mpf_new, mpf, 16);
1006 mpf = mpf_new;
1eb1b3b6 1007 mpf->physptr = mpc_new_phys;
2944e16b 1008 }
1eb1b3b6
JSR
1009 mpf->checksum = 0;
1010 mpf->checksum -= mpf_checksum((unsigned char *)mpf, 16);
1011 printk(KERN_INFO "physptr new: %x\n", mpf->physptr);
2944e16b
YL
1012 }
1013
1014 /*
1015 * only replace the one with mp_INT and
1016 * MP_IRQ_TRIGGER_LEVEL|MP_IRQ_POLARITY_LOW,
1017 * already in mp_irqs , stored by ... and mp_config_acpi_gsi,
1018 * may need pci=routeirq for all coverage
1019 */
1020 replace_intsrc_all(mpc, mpc_new_phys, mpc_new_length);
1021
1022 return 0;
1023}
1024
1025late_initcall(update_mp_table);