Commit | Line | Data |
---|---|---|
1da177e4 | 1 | /* |
1da177e4 LT |
2 | * Copyright (C) 1992, 1998 Linus Torvalds, Ingo Molnar |
3 | * | |
4 | * This file contains the lowest level x86_64-specific interrupt | |
5 | * entry and irq statistics code. All the remaining irq logic is | |
6 | * done by the generic kernel/irq/ code and in the | |
7 | * x86_64-specific irq controller code. (e.g. i8259.c and | |
8 | * io_apic.c.) | |
9 | */ | |
10 | ||
11 | #include <linux/kernel_stat.h> | |
12 | #include <linux/interrupt.h> | |
13 | #include <linux/seq_file.h> | |
14 | #include <linux/module.h> | |
76e4f660 | 15 | #include <linux/delay.h> |
1da177e4 LT |
16 | #include <asm/uaccess.h> |
17 | #include <asm/io_apic.h> | |
95833c83 | 18 | #include <asm/idle.h> |
2fb12a9b | 19 | #include <asm/smp.h> |
1da177e4 | 20 | |
4961f10e ES |
21 | #ifdef CONFIG_DEBUG_STACKOVERFLOW |
22 | /* | |
23 | * Probabilistic stack overflow check: | |
24 | * | |
25 | * Only check the stack in process context, because everything else | |
26 | * runs on the big interrupt stacks. Checking reliably is too expensive, | |
27 | * so we just check from interrupts. | |
28 | */ | |
29 | static inline void stack_overflow_check(struct pt_regs *regs) | |
30 | { | |
c9f4f06d | 31 | u64 curbase = (u64)task_stack_page(current); |
4961f10e ES |
32 | static unsigned long warned = -60*HZ; |
33 | ||
65ea5b03 PA |
34 | if (regs->sp >= curbase && regs->sp <= curbase + THREAD_SIZE && |
35 | regs->sp < curbase + sizeof(struct thread_info) + 128 && | |
4961f10e | 36 | time_after(jiffies, warned + 60*HZ)) { |
65ea5b03 PA |
37 | printk("do_IRQ: %s near stack overflow (cur:%Lx,sp:%lx)\n", |
38 | current->comm, curbase, regs->sp); | |
4961f10e ES |
39 | show_stack(NULL,NULL); |
40 | warned = jiffies; | |
41 | } | |
42 | } | |
43 | #endif | |
44 | ||
1da177e4 LT |
45 | /* |
46 | * do_IRQ handles all normal device IRQ's (the special | |
47 | * SMP cross-CPU interrupts have their own specific | |
48 | * handlers). | |
49 | */ | |
50 | asmlinkage unsigned int do_IRQ(struct pt_regs *regs) | |
7d12e780 DH |
51 | { |
52 | struct pt_regs *old_regs = set_irq_regs(regs); | |
46926b67 | 53 | struct irq_desc *desc; |
7d12e780 | 54 | |
19eadf98 | 55 | /* high bit used in ret_from_ code */ |
65ea5b03 | 56 | unsigned vector = ~regs->orig_ax; |
e500f574 EB |
57 | unsigned irq; |
58 | ||
59 | exit_idle(); | |
60 | irq_enter(); | |
550f2299 | 61 | irq = __get_cpu_var(vector_irq)[vector]; |
1da177e4 | 62 | |
4961f10e ES |
63 | #ifdef CONFIG_DEBUG_STACKOVERFLOW |
64 | stack_overflow_check(regs); | |
65 | #endif | |
d3696cf7 | 66 | |
cb5bc832 | 67 | desc = irq_to_desc(irq); |
46926b67 YL |
68 | if (likely(desc)) |
69 | generic_handle_irq_desc(irq, desc); | |
2fb12a9b EB |
70 | else { |
71 | if (!disable_apic) | |
72 | ack_APIC_irq(); | |
73 | ||
74 | if (printk_ratelimit()) | |
75 | printk(KERN_EMERG "%s: %d.%d No irq handler for vector\n", | |
76 | __func__, smp_processor_id(), vector); | |
77 | } | |
d3696cf7 | 78 | |
1da177e4 LT |
79 | irq_exit(); |
80 | ||
7d12e780 | 81 | set_irq_regs(old_regs); |
1da177e4 LT |
82 | return 1; |
83 | } | |
84 | ||
76e4f660 AR |
85 | #ifdef CONFIG_HOTPLUG_CPU |
86 | void fixup_irqs(cpumask_t map) | |
87 | { | |
88 | unsigned int irq; | |
89 | static int warned; | |
2c6927a3 | 90 | struct irq_desc *desc; |
76e4f660 | 91 | |
2c6927a3 | 92 | for_each_irq_desc(irq, desc) { |
76e4f660 | 93 | cpumask_t mask; |
48d8d7ee SS |
94 | int break_affinity = 0; |
95 | int set_affinity = 1; | |
96 | ||
76e4f660 AR |
97 | if (irq == 2) |
98 | continue; | |
99 | ||
48d8d7ee | 100 | /* interrupt's are disabled at this point */ |
08678b08 | 101 | spin_lock(&desc->lock); |
48d8d7ee SS |
102 | |
103 | if (!irq_has_action(irq) || | |
08678b08 YL |
104 | cpus_equal(desc->affinity, map)) { |
105 | spin_unlock(&desc->lock); | |
48d8d7ee SS |
106 | continue; |
107 | } | |
108 | ||
08678b08 | 109 | cpus_and(mask, desc->affinity, map); |
48d8d7ee SS |
110 | if (cpus_empty(mask)) { |
111 | break_affinity = 1; | |
76e4f660 AR |
112 | mask = map; |
113 | } | |
48d8d7ee | 114 | |
08678b08 YL |
115 | if (desc->chip->mask) |
116 | desc->chip->mask(irq); | |
48d8d7ee | 117 | |
08678b08 YL |
118 | if (desc->chip->set_affinity) |
119 | desc->chip->set_affinity(irq, mask); | |
48d8d7ee SS |
120 | else if (!(warned++)) |
121 | set_affinity = 0; | |
122 | ||
08678b08 YL |
123 | if (desc->chip->unmask) |
124 | desc->chip->unmask(irq); | |
48d8d7ee | 125 | |
08678b08 | 126 | spin_unlock(&desc->lock); |
48d8d7ee SS |
127 | |
128 | if (break_affinity && set_affinity) | |
129 | printk("Broke affinity for irq %i\n", irq); | |
130 | else if (!set_affinity) | |
76e4f660 AR |
131 | printk("Cannot set affinity for irq %i\n", irq); |
132 | } | |
133 | ||
134 | /* That doesn't seem sufficient. Give it 1ms. */ | |
135 | local_irq_enable(); | |
136 | mdelay(1); | |
137 | local_irq_disable(); | |
138 | } | |
139 | #endif | |
ed6b676c AK |
140 | |
141 | extern void call_softirq(void); | |
142 | ||
143 | asmlinkage void do_softirq(void) | |
144 | { | |
145 | __u32 pending; | |
146 | unsigned long flags; | |
147 | ||
148 | if (in_interrupt()) | |
149 | return; | |
150 | ||
151 | local_irq_save(flags); | |
152 | pending = local_softirq_pending(); | |
153 | /* Switch to interrupt stack */ | |
2601e64d | 154 | if (pending) { |
ed6b676c | 155 | call_softirq(); |
2601e64d IM |
156 | WARN_ON_ONCE(softirq_count()); |
157 | } | |
ed6b676c AK |
158 | local_irq_restore(flags); |
159 | } |