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1 | #include <linux/kernel.h> |
2 | #include <linux/sched.h> |
3 | #include <linux/init.h> |
4 | #include <linux/mc146818rtc.h> |
5 | #include <linux/time.h> |
6 | #include <linux/clocksource.h> |
7 | #include <linux/ioport.h> |
8 | #include <linux/acpi.h> |
9 | #include <linux/hpet.h> |
10 | #include <asm/pgtable.h> |
11 | #include <asm/vsyscall.h> |
12 | #include <asm/timex.h> |
13 | #include <asm/hpet.h> |
14 | |
6bb74df4 |
15 | #define HPET_MASK 0xFFFFFFFF |
16 | #define HPET_SHIFT 22 |
17 | |
18 | /* FSEC = 10^-15 NSEC = 10^-9 */ |
19 | #define FSEC_PER_NSEC 1000000 |
20 | |
c37e7bb5 |
21 | int nohpet __initdata; |
22 | |
23 | unsigned long hpet_address; |
24 | unsigned long hpet_period; /* fsecs / HPET clock */ |
25 | unsigned long hpet_tick; /* HPET clocks / interrupt */ |
26 | |
27 | int hpet_use_timer; /* Use counter of hpet for time keeping, |
28 | * otherwise PIT |
29 | */ |
c37e7bb5 |
30 | |
31 | #ifdef CONFIG_HPET |
32 | static __init int late_hpet_init(void) |
33 | { |
34 | struct hpet_data hd; |
35 | unsigned int ntimer; |
36 | |
37 | if (!hpet_address) |
38 | return 0; |
39 | |
40 | memset(&hd, 0, sizeof(hd)); |
41 | |
42 | ntimer = hpet_readl(HPET_ID); |
43 | ntimer = (ntimer & HPET_ID_NUMBER) >> HPET_ID_NUMBER_SHIFT; |
44 | ntimer++; |
45 | |
46 | /* |
47 | * Register with driver. |
48 | * Timer0 and Timer1 is used by platform. |
49 | */ |
50 | hd.hd_phys_address = hpet_address; |
51 | hd.hd_address = (void __iomem *)fix_to_virt(FIX_HPET_BASE); |
52 | hd.hd_nirqs = ntimer; |
53 | hd.hd_flags = HPET_DATA_PLATFORM; |
54 | hpet_reserve_timer(&hd, 0); |
55 | #ifdef CONFIG_HPET_EMULATE_RTC |
56 | hpet_reserve_timer(&hd, 1); |
57 | #endif |
58 | hd.hd_irq[0] = HPET_LEGACY_8254; |
59 | hd.hd_irq[1] = HPET_LEGACY_RTC; |
60 | if (ntimer > 2) { |
61 | struct hpet *hpet; |
62 | struct hpet_timer *timer; |
63 | int i; |
64 | |
65 | hpet = (struct hpet *) fix_to_virt(FIX_HPET_BASE); |
66 | timer = &hpet->hpet_timers[2]; |
67 | for (i = 2; i < ntimer; timer++, i++) |
68 | hd.hd_irq[i] = (timer->hpet_config & |
69 | Tn_INT_ROUTE_CNF_MASK) >> |
70 | Tn_INT_ROUTE_CNF_SHIFT; |
71 | |
72 | } |
73 | |
74 | hpet_alloc(&hd); |
75 | return 0; |
76 | } |
77 | fs_initcall(late_hpet_init); |
78 | #endif |
79 | |
80 | int hpet_timer_stop_set_go(unsigned long tick) |
81 | { |
82 | unsigned int cfg; |
83 | |
84 | /* |
85 | * Stop the timers and reset the main counter. |
86 | */ |
87 | |
88 | cfg = hpet_readl(HPET_CFG); |
89 | cfg &= ~(HPET_CFG_ENABLE | HPET_CFG_LEGACY); |
90 | hpet_writel(cfg, HPET_CFG); |
91 | hpet_writel(0, HPET_COUNTER); |
92 | hpet_writel(0, HPET_COUNTER + 4); |
93 | |
94 | /* |
95 | * Set up timer 0, as periodic with first interrupt to happen at hpet_tick, |
96 | * and period also hpet_tick. |
97 | */ |
98 | if (hpet_use_timer) { |
99 | hpet_writel(HPET_TN_ENABLE | HPET_TN_PERIODIC | HPET_TN_SETVAL | |
100 | HPET_TN_32BIT, HPET_T0_CFG); |
101 | hpet_writel(hpet_tick, HPET_T0_CMP); /* next interrupt */ |
102 | hpet_writel(hpet_tick, HPET_T0_CMP); /* period */ |
103 | cfg |= HPET_CFG_LEGACY; |
104 | } |
105 | /* |
106 | * Go! |
107 | */ |
108 | |
109 | cfg |= HPET_CFG_ENABLE; |
110 | hpet_writel(cfg, HPET_CFG); |
111 | |
112 | return 0; |
113 | } |
114 | |
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115 | static cycle_t read_hpet(void) |
116 | { |
117 | return (cycle_t)hpet_readl(HPET_COUNTER); |
118 | } |
119 | |
120 | static cycle_t __vsyscall_fn vread_hpet(void) |
121 | { |
122 | return readl((void __iomem *)fix_to_virt(VSYSCALL_HPET) + 0xf0); |
123 | } |
124 | |
125 | struct clocksource clocksource_hpet = { |
126 | .name = "hpet", |
127 | .rating = 250, |
128 | .read = read_hpet, |
129 | .mask = (cycle_t)HPET_MASK, |
130 | .mult = 0, /* set below */ |
131 | .shift = HPET_SHIFT, |
132 | .flags = CLOCK_SOURCE_IS_CONTINUOUS, |
133 | .vread = vread_hpet, |
134 | }; |
135 | |
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136 | int __init hpet_arch_init(void) |
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137 | { |
138 | unsigned int id; |
6bb74df4 |
139 | u64 tmp; |
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140 | |
141 | if (!hpet_address) |
142 | return -1; |
143 | set_fixmap_nocache(FIX_HPET_BASE, hpet_address); |
144 | __set_fixmap(VSYSCALL_HPET, hpet_address, PAGE_KERNEL_VSYSCALL_NOCACHE); |
145 | |
146 | /* |
147 | * Read the period, compute tick and quotient. |
148 | */ |
149 | |
150 | id = hpet_readl(HPET_ID); |
151 | |
152 | if (!(id & HPET_ID_VENDOR) || !(id & HPET_ID_NUMBER)) |
153 | return -1; |
154 | |
155 | hpet_period = hpet_readl(HPET_PERIOD); |
156 | if (hpet_period < 100000 || hpet_period > 100000000) |
157 | return -1; |
158 | |
159 | hpet_tick = (FSEC_PER_TICK + hpet_period / 2) / hpet_period; |
160 | |
161 | hpet_use_timer = (id & HPET_ID_LEGSUP); |
162 | |
6bb74df4 |
163 | /* |
164 | * hpet period is in femto seconds per cycle |
165 | * so we need to convert this to ns/cyc units |
166 | * aproximated by mult/2^shift |
167 | * |
168 | * fsec/cyc * 1nsec/1000000fsec = nsec/cyc = mult/2^shift |
169 | * fsec/cyc * 1ns/1000000fsec * 2^shift = mult |
170 | * fsec/cyc * 2^shift * 1nsec/1000000fsec = mult |
171 | * (fsec/cyc << shift)/1000000 = mult |
172 | * (hpet_period << shift)/FSEC_PER_NSEC = mult |
173 | */ |
174 | tmp = (u64)hpet_period << HPET_SHIFT; |
175 | do_div(tmp, FSEC_PER_NSEC); |
176 | clocksource_hpet.mult = (u32)tmp; |
177 | clocksource_register(&clocksource_hpet); |
178 | |
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179 | return hpet_timer_stop_set_go(hpet_tick); |
180 | } |
181 | |
182 | int hpet_reenable(void) |
183 | { |
184 | return hpet_timer_stop_set_go(hpet_tick); |
185 | } |
186 | |
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187 | #ifdef CONFIG_HPET_EMULATE_RTC |
188 | /* HPET in LegacyReplacement Mode eats up RTC interrupt line. When, HPET |
189 | * is enabled, we support RTC interrupt functionality in software. |
190 | * RTC has 3 kinds of interrupts: |
191 | * 1) Update Interrupt - generate an interrupt, every sec, when RTC clock |
192 | * is updated |
193 | * 2) Alarm Interrupt - generate an interrupt at a specific time of day |
194 | * 3) Periodic Interrupt - generate periodic interrupt, with frequencies |
195 | * 2Hz-8192Hz (2Hz-64Hz for non-root user) (all freqs in powers of 2) |
196 | * (1) and (2) above are implemented using polling at a frequency of |
197 | * 64 Hz. The exact frequency is a tradeoff between accuracy and interrupt |
198 | * overhead. (DEFAULT_RTC_INT_FREQ) |
199 | * For (3), we use interrupts at 64Hz or user specified periodic |
200 | * frequency, whichever is higher. |
201 | */ |
202 | #include <linux/rtc.h> |
203 | |
204 | #define DEFAULT_RTC_INT_FREQ 64 |
205 | #define RTC_NUM_INTS 1 |
206 | |
207 | static unsigned long UIE_on; |
208 | static unsigned long prev_update_sec; |
209 | |
210 | static unsigned long AIE_on; |
211 | static struct rtc_time alarm_time; |
212 | |
213 | static unsigned long PIE_on; |
214 | static unsigned long PIE_freq = DEFAULT_RTC_INT_FREQ; |
215 | static unsigned long PIE_count; |
216 | |
217 | static unsigned long hpet_rtc_int_freq; /* RTC interrupt frequency */ |
218 | static unsigned int hpet_t1_cmp; /* cached comparator register */ |
219 | |
220 | int is_hpet_enabled(void) |
221 | { |
222 | return hpet_address != 0; |
223 | } |
224 | |
225 | /* |
226 | * Timer 1 for RTC, we do not use periodic interrupt feature, |
227 | * even if HPET supports periodic interrupts on Timer 1. |
228 | * The reason being, to set up a periodic interrupt in HPET, we need to |
229 | * stop the main counter. And if we do that everytime someone diables/enables |
230 | * RTC, we will have adverse effect on main kernel timer running on Timer 0. |
231 | * So, for the time being, simulate the periodic interrupt in software. |
232 | * |
233 | * hpet_rtc_timer_init() is called for the first time and during subsequent |
234 | * interuppts reinit happens through hpet_rtc_timer_reinit(). |
235 | */ |
236 | int hpet_rtc_timer_init(void) |
237 | { |
238 | unsigned int cfg, cnt; |
239 | unsigned long flags; |
240 | |
241 | if (!is_hpet_enabled()) |
242 | return 0; |
243 | /* |
244 | * Set the counter 1 and enable the interrupts. |
245 | */ |
246 | if (PIE_on && (PIE_freq > DEFAULT_RTC_INT_FREQ)) |
247 | hpet_rtc_int_freq = PIE_freq; |
248 | else |
249 | hpet_rtc_int_freq = DEFAULT_RTC_INT_FREQ; |
250 | |
251 | local_irq_save(flags); |
252 | |
253 | cnt = hpet_readl(HPET_COUNTER); |
254 | cnt += ((hpet_tick*HZ)/hpet_rtc_int_freq); |
255 | hpet_writel(cnt, HPET_T1_CMP); |
256 | hpet_t1_cmp = cnt; |
257 | |
258 | cfg = hpet_readl(HPET_T1_CFG); |
259 | cfg &= ~HPET_TN_PERIODIC; |
260 | cfg |= HPET_TN_ENABLE | HPET_TN_32BIT; |
261 | hpet_writel(cfg, HPET_T1_CFG); |
262 | |
263 | local_irq_restore(flags); |
264 | |
265 | return 1; |
266 | } |
267 | |
268 | static void hpet_rtc_timer_reinit(void) |
269 | { |
270 | unsigned int cfg, cnt, ticks_per_int, lost_ints; |
271 | |
272 | if (unlikely(!(PIE_on | AIE_on | UIE_on))) { |
273 | cfg = hpet_readl(HPET_T1_CFG); |
274 | cfg &= ~HPET_TN_ENABLE; |
275 | hpet_writel(cfg, HPET_T1_CFG); |
276 | return; |
277 | } |
278 | |
279 | if (PIE_on && (PIE_freq > DEFAULT_RTC_INT_FREQ)) |
280 | hpet_rtc_int_freq = PIE_freq; |
281 | else |
282 | hpet_rtc_int_freq = DEFAULT_RTC_INT_FREQ; |
283 | |
284 | /* It is more accurate to use the comparator value than current count.*/ |
285 | ticks_per_int = hpet_tick * HZ / hpet_rtc_int_freq; |
286 | hpet_t1_cmp += ticks_per_int; |
287 | hpet_writel(hpet_t1_cmp, HPET_T1_CMP); |
288 | |
289 | /* |
290 | * If the interrupt handler was delayed too long, the write above tries |
291 | * to schedule the next interrupt in the past and the hardware would |
292 | * not interrupt until the counter had wrapped around. |
293 | * So we have to check that the comparator wasn't set to a past time. |
294 | */ |
295 | cnt = hpet_readl(HPET_COUNTER); |
296 | if (unlikely((int)(cnt - hpet_t1_cmp) > 0)) { |
297 | lost_ints = (cnt - hpet_t1_cmp) / ticks_per_int + 1; |
298 | /* Make sure that, even with the time needed to execute |
299 | * this code, the next scheduled interrupt has been moved |
300 | * back to the future: */ |
301 | lost_ints++; |
302 | |
303 | hpet_t1_cmp += lost_ints * ticks_per_int; |
304 | hpet_writel(hpet_t1_cmp, HPET_T1_CMP); |
305 | |
306 | if (PIE_on) |
307 | PIE_count += lost_ints; |
308 | |
309 | if (printk_ratelimit()) |
310 | printk(KERN_WARNING "rtc: lost some interrupts at %ldHz.\n", |
311 | hpet_rtc_int_freq); |
312 | } |
313 | } |
314 | |
315 | /* |
316 | * The functions below are called from rtc driver. |
317 | * Return 0 if HPET is not being used. |
318 | * Otherwise do the necessary changes and return 1. |
319 | */ |
320 | int hpet_mask_rtc_irq_bit(unsigned long bit_mask) |
321 | { |
322 | if (!is_hpet_enabled()) |
323 | return 0; |
324 | |
325 | if (bit_mask & RTC_UIE) |
326 | UIE_on = 0; |
327 | if (bit_mask & RTC_PIE) |
328 | PIE_on = 0; |
329 | if (bit_mask & RTC_AIE) |
330 | AIE_on = 0; |
331 | |
332 | return 1; |
333 | } |
334 | |
335 | int hpet_set_rtc_irq_bit(unsigned long bit_mask) |
336 | { |
337 | int timer_init_reqd = 0; |
338 | |
339 | if (!is_hpet_enabled()) |
340 | return 0; |
341 | |
342 | if (!(PIE_on | AIE_on | UIE_on)) |
343 | timer_init_reqd = 1; |
344 | |
345 | if (bit_mask & RTC_UIE) { |
346 | UIE_on = 1; |
347 | } |
348 | if (bit_mask & RTC_PIE) { |
349 | PIE_on = 1; |
350 | PIE_count = 0; |
351 | } |
352 | if (bit_mask & RTC_AIE) { |
353 | AIE_on = 1; |
354 | } |
355 | |
356 | if (timer_init_reqd) |
357 | hpet_rtc_timer_init(); |
358 | |
359 | return 1; |
360 | } |
361 | |
362 | int hpet_set_alarm_time(unsigned char hrs, unsigned char min, unsigned char sec) |
363 | { |
364 | if (!is_hpet_enabled()) |
365 | return 0; |
366 | |
367 | alarm_time.tm_hour = hrs; |
368 | alarm_time.tm_min = min; |
369 | alarm_time.tm_sec = sec; |
370 | |
371 | return 1; |
372 | } |
373 | |
374 | int hpet_set_periodic_freq(unsigned long freq) |
375 | { |
376 | if (!is_hpet_enabled()) |
377 | return 0; |
378 | |
379 | PIE_freq = freq; |
380 | PIE_count = 0; |
381 | |
382 | return 1; |
383 | } |
384 | |
385 | int hpet_rtc_dropped_irq(void) |
386 | { |
387 | if (!is_hpet_enabled()) |
388 | return 0; |
389 | |
390 | return 1; |
391 | } |
392 | |
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393 | irqreturn_t hpet_rtc_interrupt(int irq, void *dev_id) |
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394 | { |
395 | struct rtc_time curr_time; |
396 | unsigned long rtc_int_flag = 0; |
397 | int call_rtc_interrupt = 0; |
398 | |
399 | hpet_rtc_timer_reinit(); |
400 | |
401 | if (UIE_on | AIE_on) { |
402 | rtc_get_rtc_time(&curr_time); |
403 | } |
404 | if (UIE_on) { |
405 | if (curr_time.tm_sec != prev_update_sec) { |
406 | /* Set update int info, call real rtc int routine */ |
407 | call_rtc_interrupt = 1; |
408 | rtc_int_flag = RTC_UF; |
409 | prev_update_sec = curr_time.tm_sec; |
410 | } |
411 | } |
412 | if (PIE_on) { |
413 | PIE_count++; |
414 | if (PIE_count >= hpet_rtc_int_freq/PIE_freq) { |
415 | /* Set periodic int info, call real rtc int routine */ |
416 | call_rtc_interrupt = 1; |
417 | rtc_int_flag |= RTC_PF; |
418 | PIE_count = 0; |
419 | } |
420 | } |
421 | if (AIE_on) { |
422 | if ((curr_time.tm_sec == alarm_time.tm_sec) && |
423 | (curr_time.tm_min == alarm_time.tm_min) && |
424 | (curr_time.tm_hour == alarm_time.tm_hour)) { |
425 | /* Set alarm int info, call real rtc int routine */ |
426 | call_rtc_interrupt = 1; |
427 | rtc_int_flag |= RTC_AF; |
428 | } |
429 | } |
430 | if (call_rtc_interrupt) { |
431 | rtc_int_flag |= (RTC_IRQF | (RTC_NUM_INTS << 8)); |
432 | rtc_interrupt(rtc_int_flag, dev_id); |
433 | } |
434 | return IRQ_HANDLED; |
435 | } |
436 | #endif |
437 | |
438 | static int __init nohpet_setup(char *s) |
439 | { |
440 | nohpet = 1; |
441 | return 1; |
442 | } |
443 | |
444 | __setup("nohpet", nohpet_setup); |