Commit | Line | Data |
---|---|---|
1da177e4 | 1 | /* |
1da177e4 LT |
2 | * |
3 | * Copyright (C) 1991, 1992 Linus Torvalds | |
4 | * | |
5 | * Enhanced CPU detection and feature setting code by Mike Jagdis | |
6 | * and Martin Mares, November 1997. | |
7 | */ | |
8 | ||
9 | .text | |
1da177e4 | 10 | #include <linux/threads.h> |
8b2f7fff | 11 | #include <linux/init.h> |
1da177e4 LT |
12 | #include <linux/linkage.h> |
13 | #include <asm/segment.h> | |
0341c14d JF |
14 | #include <asm/page_types.h> |
15 | #include <asm/pgtable_types.h> | |
1da177e4 LT |
16 | #include <asm/cache.h> |
17 | #include <asm/thread_info.h> | |
86feeaa8 | 18 | #include <asm/asm-offsets.h> |
1da177e4 | 19 | #include <asm/setup.h> |
551889a6 | 20 | #include <asm/processor-flags.h> |
8a50e513 PA |
21 | #include <asm/msr-index.h> |
22 | #include <asm/cpufeature.h> | |
60a5317f | 23 | #include <asm/percpu.h> |
4c5023a3 | 24 | #include <asm/nops.h> |
551889a6 IC |
25 | |
26 | /* Physical address */ | |
27 | #define pa(X) ((X) - __PAGE_OFFSET) | |
1da177e4 LT |
28 | |
29 | /* | |
30 | * References to members of the new_cpu_data structure. | |
31 | */ | |
32 | ||
33 | #define X86 new_cpu_data+CPUINFO_x86 | |
34 | #define X86_VENDOR new_cpu_data+CPUINFO_x86_vendor | |
35 | #define X86_MODEL new_cpu_data+CPUINFO_x86_model | |
36 | #define X86_MASK new_cpu_data+CPUINFO_x86_mask | |
37 | #define X86_HARD_MATH new_cpu_data+CPUINFO_hard_math | |
38 | #define X86_CPUID new_cpu_data+CPUINFO_cpuid_level | |
39 | #define X86_CAPABILITY new_cpu_data+CPUINFO_x86_capability | |
40 | #define X86_VENDOR_ID new_cpu_data+CPUINFO_x86_vendor_id | |
41 | ||
42 | /* | |
c090f532 JF |
43 | * This is how much memory in addition to the memory covered up to |
44 | * and including _end we need mapped initially. | |
9ce8c2ed | 45 | * We need: |
2bd2753f YL |
46 | * (KERNEL_IMAGE_SIZE/4096) / 1024 pages (worst case, non PAE) |
47 | * (KERNEL_IMAGE_SIZE/4096) / 512 + 4 pages (worst case for PAE) | |
1da177e4 LT |
48 | * |
49 | * Modulo rounding, each megabyte assigned here requires a kilobyte of | |
50 | * memory, which is currently unreclaimed. | |
51 | * | |
52 | * This should be a multiple of a page. | |
2bd2753f YL |
53 | * |
54 | * KERNEL_IMAGE_SIZE should be greater than pa(_end) | |
55 | * and small than max_low_pfn, otherwise will waste some page table entries | |
1da177e4 | 56 | */ |
1da177e4 | 57 | |
9ce8c2ed | 58 | #if PTRS_PER_PMD > 1 |
c090f532 | 59 | #define PAGE_TABLE_SIZE(pages) (((pages) / PTRS_PER_PMD) + PTRS_PER_PGD) |
9ce8c2ed | 60 | #else |
c090f532 | 61 | #define PAGE_TABLE_SIZE(pages) ((pages) / PTRS_PER_PGD) |
9ce8c2ed | 62 | #endif |
9ce8c2ed | 63 | |
147dd561 PA |
64 | /* Number of possible pages in the lowmem region */ |
65 | LOWMEM_PAGES = (((1<<32) - __PAGE_OFFSET) >> PAGE_SHIFT) | |
66 | ||
c090f532 | 67 | /* Enough space to fit pagetables for the low memory linear map */ |
147dd561 | 68 | MAPPING_BEYOND_END = PAGE_TABLE_SIZE(LOWMEM_PAGES) << PAGE_SHIFT |
c090f532 JF |
69 | |
70 | /* | |
71 | * Worst-case size of the kernel mapping we need to make: | |
147dd561 PA |
72 | * a relocatable kernel can live anywhere in lowmem, so we need to be able |
73 | * to map all of lowmem. | |
c090f532 | 74 | */ |
147dd561 | 75 | KERNEL_PAGES = LOWMEM_PAGES |
c090f532 | 76 | |
7bf04be8 | 77 | INIT_MAP_SIZE = PAGE_TABLE_SIZE(KERNEL_PAGES) * PAGE_SIZE |
2bd2753f | 78 | RESERVE_BRK(pagetables, INIT_MAP_SIZE) |
796216a5 | 79 | |
1da177e4 LT |
80 | /* |
81 | * 32-bit kernel entrypoint; only used by the boot CPU. On entry, | |
82 | * %esi points to the real-mode code as a 32-bit pointer. | |
83 | * CS and DS must be 4 GB flat segments, but we don't depend on | |
84 | * any particular GDT layout, because we load our own as soon as we | |
85 | * can. | |
86 | */ | |
4ae59b91 | 87 | __HEAD |
1da177e4 | 88 | ENTRY(startup_32) |
11d4c3f9 PA |
89 | movl pa(stack_start),%ecx |
90 | ||
a24e7851 RR |
91 | /* test KEEP_SEGMENTS flag to see if the bootloader is asking |
92 | us to not reload segments */ | |
93 | testb $(1<<6), BP_loadflags(%esi) | |
94 | jnz 2f | |
1da177e4 LT |
95 | |
96 | /* | |
97 | * Set segments to known values. | |
98 | */ | |
551889a6 | 99 | lgdt pa(boot_gdt_descr) |
1da177e4 LT |
100 | movl $(__BOOT_DS),%eax |
101 | movl %eax,%ds | |
102 | movl %eax,%es | |
103 | movl %eax,%fs | |
104 | movl %eax,%gs | |
11d4c3f9 | 105 | movl %eax,%ss |
a24e7851 | 106 | 2: |
11d4c3f9 | 107 | leal -__PAGE_OFFSET(%ecx),%esp |
1da177e4 LT |
108 | |
109 | /* | |
110 | * Clear BSS first so that there are no surprises... | |
1da177e4 | 111 | */ |
a24e7851 | 112 | cld |
1da177e4 | 113 | xorl %eax,%eax |
551889a6 IC |
114 | movl $pa(__bss_start),%edi |
115 | movl $pa(__bss_stop),%ecx | |
1da177e4 LT |
116 | subl %edi,%ecx |
117 | shrl $2,%ecx | |
118 | rep ; stosl | |
484b90c4 VG |
119 | /* |
120 | * Copy bootup parameters out of the way. | |
121 | * Note: %esi still has the pointer to the real-mode data. | |
122 | * With the kexec as boot loader, parameter segment might be loaded beyond | |
123 | * kernel image and might not even be addressable by early boot page tables. | |
124 | * (kexec on panic case). Hence copy out the parameters before initializing | |
125 | * page tables. | |
126 | */ | |
551889a6 | 127 | movl $pa(boot_params),%edi |
484b90c4 VG |
128 | movl $(PARAM_SIZE/4),%ecx |
129 | cld | |
130 | rep | |
131 | movsl | |
551889a6 | 132 | movl pa(boot_params) + NEW_CL_POINTER,%esi |
484b90c4 | 133 | andl %esi,%esi |
b595076a | 134 | jz 1f # No command line |
551889a6 | 135 | movl $pa(boot_command_line),%edi |
484b90c4 VG |
136 | movl $(COMMAND_LINE_SIZE/4),%ecx |
137 | rep | |
138 | movsl | |
139 | 1: | |
1da177e4 | 140 | |
dc3119e7 | 141 | #ifdef CONFIG_OLPC |
fd699c76 AS |
142 | /* save OFW's pgdir table for later use when calling into OFW */ |
143 | movl %cr3, %eax | |
144 | movl %eax, pa(olpc_ofw_pgd) | |
145 | #endif | |
146 | ||
63b553c6 FY |
147 | #ifdef CONFIG_MICROCODE_EARLY |
148 | /* Early load ucode on BSP. */ | |
149 | call load_ucode_bsp | |
150 | #endif | |
151 | ||
1da177e4 LT |
152 | /* |
153 | * Initialize page tables. This creates a PDE and a set of page | |
2bd2753f | 154 | * tables, which are located immediately beyond __brk_base. The variable |
ccf3fe02 | 155 | * _brk_end is set up to point to the first "safe" location. |
1da177e4 | 156 | * Mappings are created both at virtual address 0 (identity mapping) |
2bd2753f | 157 | * and PAGE_OFFSET for up to _end. |
1da177e4 | 158 | */ |
551889a6 IC |
159 | #ifdef CONFIG_X86_PAE |
160 | ||
161 | /* | |
b40827fa BP |
162 | * In PAE mode initial_page_table is statically defined to contain |
163 | * enough entries to cover the VMSPLIT option (that is the top 1, 2 or 3 | |
164 | * entries). The identity mapping is handled by pointing two PGD entries | |
165 | * to the first kernel PMD. | |
551889a6 | 166 | * |
b40827fa | 167 | * Note the upper half of each PMD or PTE are always zero at this stage. |
551889a6 IC |
168 | */ |
169 | ||
86b2b70e | 170 | #define KPMDS (((-__PAGE_OFFSET) >> 30) & 3) /* Number of kernel PMDs */ |
551889a6 IC |
171 | |
172 | xorl %ebx,%ebx /* %ebx is kept at zero */ | |
173 | ||
ccf3fe02 | 174 | movl $pa(__brk_base), %edi |
b40827fa | 175 | movl $pa(initial_pg_pmd), %edx |
b2bc2731 | 176 | movl $PTE_IDENT_ATTR, %eax |
551889a6 | 177 | 10: |
b2bc2731 | 178 | leal PDE_IDENT_ATTR(%edi),%ecx /* Create PMD entry */ |
551889a6 IC |
179 | movl %ecx,(%edx) /* Store PMD entry */ |
180 | /* Upper half already zero */ | |
181 | addl $8,%edx | |
182 | movl $512,%ecx | |
183 | 11: | |
184 | stosl | |
185 | xchgl %eax,%ebx | |
186 | stosl | |
187 | xchgl %eax,%ebx | |
188 | addl $0x1000,%eax | |
189 | loop 11b | |
190 | ||
191 | /* | |
c090f532 | 192 | * End condition: we must map up to the end + MAPPING_BEYOND_END. |
551889a6 | 193 | */ |
c090f532 | 194 | movl $pa(_end) + MAPPING_BEYOND_END + PTE_IDENT_ATTR, %ebp |
551889a6 IC |
195 | cmpl %ebp,%eax |
196 | jb 10b | |
197 | 1: | |
ccf3fe02 JF |
198 | addl $__PAGE_OFFSET, %edi |
199 | movl %edi, pa(_brk_end) | |
6af61a76 YL |
200 | shrl $12, %eax |
201 | movl %eax, pa(max_pfn_mapped) | |
551889a6 IC |
202 | |
203 | /* Do early initialization of the fixmap area */ | |
b40827fa BP |
204 | movl $pa(initial_pg_fixmap)+PDE_IDENT_ATTR,%eax |
205 | movl %eax,pa(initial_pg_pmd+0x1000*KPMDS-8) | |
551889a6 IC |
206 | #else /* Not PAE */ |
207 | ||
208 | page_pde_offset = (__PAGE_OFFSET >> 20); | |
209 | ||
ccf3fe02 | 210 | movl $pa(__brk_base), %edi |
b40827fa | 211 | movl $pa(initial_page_table), %edx |
b2bc2731 | 212 | movl $PTE_IDENT_ATTR, %eax |
1da177e4 | 213 | 10: |
b2bc2731 | 214 | leal PDE_IDENT_ATTR(%edi),%ecx /* Create PDE entry */ |
1da177e4 LT |
215 | movl %ecx,(%edx) /* Store identity PDE entry */ |
216 | movl %ecx,page_pde_offset(%edx) /* Store kernel PDE entry */ | |
217 | addl $4,%edx | |
218 | movl $1024, %ecx | |
219 | 11: | |
220 | stosl | |
221 | addl $0x1000,%eax | |
222 | loop 11b | |
551889a6 | 223 | /* |
c090f532 | 224 | * End condition: we must map up to the end + MAPPING_BEYOND_END. |
551889a6 | 225 | */ |
c090f532 | 226 | movl $pa(_end) + MAPPING_BEYOND_END + PTE_IDENT_ATTR, %ebp |
1da177e4 LT |
227 | cmpl %ebp,%eax |
228 | jb 10b | |
ccf3fe02 JF |
229 | addl $__PAGE_OFFSET, %edi |
230 | movl %edi, pa(_brk_end) | |
6af61a76 YL |
231 | shrl $12, %eax |
232 | movl %eax, pa(max_pfn_mapped) | |
17d57a92 | 233 | |
551889a6 | 234 | /* Do early initialization of the fixmap area */ |
b40827fa BP |
235 | movl $pa(initial_pg_fixmap)+PDE_IDENT_ATTR,%eax |
236 | movl %eax,pa(initial_page_table+0xffc) | |
551889a6 | 237 | #endif |
d50d8fe1 RR |
238 | |
239 | #ifdef CONFIG_PARAVIRT | |
240 | /* This is can only trip for a broken bootloader... */ | |
241 | cmpw $0x207, pa(boot_params + BP_version) | |
242 | jb default_entry | |
243 | ||
244 | /* Paravirt-compatible boot parameters. Look to see what architecture | |
245 | we're booting under. */ | |
246 | movl pa(boot_params + BP_hardware_subarch), %eax | |
247 | cmpl $num_subarch_entries, %eax | |
248 | jae bad_subarch | |
249 | ||
250 | movl pa(subarch_entries)(,%eax,4), %eax | |
251 | subl $__PAGE_OFFSET, %eax | |
252 | jmp *%eax | |
253 | ||
254 | bad_subarch: | |
255 | WEAK(lguest_entry) | |
256 | WEAK(xen_entry) | |
257 | /* Unknown implementation; there's really | |
258 | nothing we can do at this point. */ | |
259 | ud2a | |
260 | ||
261 | __INITDATA | |
262 | ||
263 | subarch_entries: | |
264 | .long default_entry /* normal x86/PC */ | |
265 | .long lguest_entry /* lguest hypervisor */ | |
266 | .long xen_entry /* Xen hypervisor */ | |
267 | .long default_entry /* Moorestown MID */ | |
268 | num_subarch_entries = (. - subarch_entries) / 4 | |
269 | .previous | |
270 | #else | |
271 | jmp default_entry | |
272 | #endif /* CONFIG_PARAVIRT */ | |
273 | ||
3e2a0cc3 FY |
274 | #ifdef CONFIG_HOTPLUG_CPU |
275 | /* | |
276 | * Boot CPU0 entry point. It's called from play_dead(). Everything has been set | |
277 | * up already except stack. We just set up stack here. Then call | |
278 | * start_secondary(). | |
279 | */ | |
280 | ENTRY(start_cpu0) | |
281 | movl stack_start, %ecx | |
282 | movl %ecx, %esp | |
283 | jmp *(initial_code) | |
284 | ENDPROC(start_cpu0) | |
285 | #endif | |
286 | ||
1da177e4 LT |
287 | /* |
288 | * Non-boot CPU entry point; entered from trampoline.S | |
289 | * We can't lgdt here, because lgdt itself uses a data segment, but | |
52de74dd | 290 | * we know the trampoline has already loaded the boot_gdt for us. |
f8657e1b VG |
291 | * |
292 | * If cpu hotplug is not supported then this code can go in init section | |
293 | * which will be freed later | |
1da177e4 LT |
294 | */ |
295 | ENTRY(startup_32_smp) | |
296 | cld | |
297 | movl $(__BOOT_DS),%eax | |
298 | movl %eax,%ds | |
299 | movl %eax,%es | |
300 | movl %eax,%fs | |
301 | movl %eax,%gs | |
11d4c3f9 PA |
302 | movl pa(stack_start),%ecx |
303 | movl %eax,%ss | |
304 | leal -__PAGE_OFFSET(%ecx),%esp | |
48927bbb | 305 | |
63b553c6 FY |
306 | #ifdef CONFIG_MICROCODE_EARLY |
307 | /* Early load ucode on AP. */ | |
308 | call load_ucode_ap | |
309 | #endif | |
310 | ||
311 | ||
d50d8fe1 | 312 | default_entry: |
021ef050 PA |
313 | #define CR0_STATE (X86_CR0_PE | X86_CR0_MP | X86_CR0_ET | \ |
314 | X86_CR0_NE | X86_CR0_WP | X86_CR0_AM | \ | |
315 | X86_CR0_PG) | |
316 | movl $(CR0_STATE & ~X86_CR0_PG),%eax | |
317 | movl %eax,%cr0 | |
318 | ||
1da177e4 | 319 | /* |
9efb58de BP |
320 | * We want to start out with EFLAGS unambiguously cleared. Some BIOSes leave |
321 | * bits like NT set. This would confuse the debugger if this code is traced. So | |
322 | * initialize them properly now before switching to protected mode. That means | |
323 | * DF in particular (even though we have cleared it earlier after copying the | |
324 | * command line) because GCC expects it. | |
325 | */ | |
326 | pushl $0 | |
327 | popfl | |
328 | ||
329 | /* | |
330 | * New page tables may be in 4Mbyte page mode and may be using the global pages. | |
1da177e4 | 331 | * |
9efb58de BP |
332 | * NOTE! If we are on a 486 we may have no cr4 at all! Specifically, cr4 exists |
333 | * if and only if CPUID exists and has flags other than the FPU flag set. | |
1da177e4 | 334 | */ |
9efb58de | 335 | movl $-1,pa(X86_CPUID) # preset CPUID level |
5a5a51db PA |
336 | movl $X86_EFLAGS_ID,%ecx |
337 | pushl %ecx | |
9efb58de | 338 | popfl # set EFLAGS=ID |
5a5a51db | 339 | pushfl |
9efb58de BP |
340 | popl %eax # get EFLAGS |
341 | testl $X86_EFLAGS_ID,%eax # did EFLAGS.ID remained set? | |
5e2a044d | 342 | jz enable_paging # hw disallowed setting of ID bit |
9efb58de BP |
343 | # which means no CPUID and no CR4 |
344 | ||
345 | xorl %eax,%eax | |
346 | cpuid | |
347 | movl %eax,pa(X86_CPUID) # save largest std CPUID function | |
5a5a51db | 348 | |
6662c34f PA |
349 | movl $1,%eax |
350 | cpuid | |
9efb58de | 351 | andl $~1,%edx # Ignore CPUID.FPU |
5e2a044d | 352 | jz enable_paging # No flags or only CPUID.FPU = no CR4 |
6662c34f | 353 | |
5a5a51db | 354 | movl pa(mmu_cr4_features),%eax |
1da177e4 LT |
355 | movl %eax,%cr4 |
356 | ||
8a50e513 | 357 | testb $X86_CR4_PAE, %al # check if PAE is enabled |
5e2a044d | 358 | jz enable_paging |
1da177e4 LT |
359 | |
360 | /* Check if extended functions are implemented */ | |
361 | movl $0x80000000, %eax | |
362 | cpuid | |
8a50e513 PA |
363 | /* Value must be in the range 0x80000001 to 0x8000ffff */ |
364 | subl $0x80000001, %eax | |
365 | cmpl $(0x8000ffff-0x80000001), %eax | |
5e2a044d | 366 | ja enable_paging |
ebba638a KC |
367 | |
368 | /* Clear bogus XD_DISABLE bits */ | |
369 | call verify_cpu | |
370 | ||
1da177e4 LT |
371 | mov $0x80000001, %eax |
372 | cpuid | |
373 | /* Execute Disable bit supported? */ | |
8a50e513 | 374 | btl $(X86_FEATURE_NX & 31), %edx |
5e2a044d | 375 | jnc enable_paging |
1da177e4 LT |
376 | |
377 | /* Setup EFER (Extended Feature Enable Register) */ | |
8a50e513 | 378 | movl $MSR_EFER, %ecx |
1da177e4 LT |
379 | rdmsr |
380 | ||
8a50e513 | 381 | btsl $_EFER_NX, %eax |
1da177e4 LT |
382 | /* Make changes effective */ |
383 | wrmsr | |
384 | ||
5e2a044d | 385 | enable_paging: |
1da177e4 LT |
386 | |
387 | /* | |
388 | * Enable paging | |
389 | */ | |
b40827fa | 390 | movl $pa(initial_page_table), %eax |
1da177e4 | 391 | movl %eax,%cr3 /* set the page table pointer.. */ |
021ef050 | 392 | movl $CR0_STATE,%eax |
1da177e4 LT |
393 | movl %eax,%cr0 /* ..and set paging (PG) bit */ |
394 | ljmp $__BOOT_CS,$1f /* Clear prefetch and normalize %eip */ | |
395 | 1: | |
11d4c3f9 PA |
396 | /* Shift the stack pointer to a virtual address */ |
397 | addl $__PAGE_OFFSET, %esp | |
1da177e4 | 398 | |
1da177e4 LT |
399 | /* |
400 | * start system 32-bit setup. We need to re-do some of the things done | |
401 | * in 16-bit mode for the "real" operations. | |
402 | */ | |
4c5023a3 PA |
403 | movl setup_once_ref,%eax |
404 | andl %eax,%eax | |
405 | jz 1f # Did we do this already? | |
406 | call *%eax | |
407 | 1: | |
166df91d | 408 | |
1da177e4 | 409 | /* |
166df91d | 410 | * Check if it is 486 |
1da177e4 | 411 | */ |
237d1548 | 412 | movb $4,X86 # at least 486 |
c3a22a26 | 413 | cmpl $-1,X86_CPUID |
1da177e4 LT |
414 | je is486 |
415 | ||
416 | /* get vendor info */ | |
417 | xorl %eax,%eax # call CPUID with 0 -> return vendor ID | |
418 | cpuid | |
419 | movl %eax,X86_CPUID # save CPUID level | |
420 | movl %ebx,X86_VENDOR_ID # lo 4 chars | |
421 | movl %edx,X86_VENDOR_ID+4 # next 4 chars | |
422 | movl %ecx,X86_VENDOR_ID+8 # last 4 chars | |
423 | ||
424 | orl %eax,%eax # do we have processor info as well? | |
425 | je is486 | |
426 | ||
427 | movl $1,%eax # Use the CPUID instruction to get CPU type | |
428 | cpuid | |
429 | movb %al,%cl # save reg for future use | |
430 | andb $0x0f,%ah # mask processor family | |
431 | movb %ah,X86 | |
432 | andb $0xf0,%al # mask model | |
433 | shrb $4,%al | |
434 | movb %al,X86_MODEL | |
435 | andb $0x0f,%cl # mask mask revision | |
436 | movb %cl,X86_MASK | |
437 | movl %edx,X86_CAPABILITY | |
438 | ||
c3a22a26 | 439 | is486: |
c3a22a26 | 440 | movl $0x50022,%ecx # set AM, WP, NE and MP |
166df91d | 441 | movl %cr0,%eax |
1da177e4 LT |
442 | andl $0x80000011,%eax # Save PG,PE,ET |
443 | orl %ecx,%eax | |
444 | movl %eax,%cr0 | |
445 | ||
2a57ff1a | 446 | lgdt early_gdt_descr |
1da177e4 LT |
447 | lidt idt_descr |
448 | ljmp $(__KERNEL_CS),$1f | |
449 | 1: movl $(__KERNEL_DS),%eax # reload all the segment registers | |
450 | movl %eax,%ss # after changing gdt. | |
451 | ||
452 | movl $(__USER_DS),%eax # DS/ES contains default USER segment | |
453 | movl %eax,%ds | |
454 | movl %eax,%es | |
455 | ||
0dd76d73 BG |
456 | movl $(__KERNEL_PERCPU), %eax |
457 | movl %eax,%fs # set this cpu's percpu | |
458 | ||
60a5317f | 459 | movl $(__KERNEL_STACK_CANARY),%eax |
464d1a78 | 460 | movl %eax,%gs |
60a5317f TH |
461 | |
462 | xorl %eax,%eax # Clear LDT | |
1da177e4 | 463 | lldt %ax |
f95d47ca | 464 | |
26fd5e08 | 465 | pushl $0 # fake return address for unwinder |
e3f77edf | 466 | jmp *(initial_code) |
1da177e4 | 467 | |
4c5023a3 PA |
468 | #include "verify_cpu.S" |
469 | ||
1da177e4 | 470 | /* |
4c5023a3 | 471 | * setup_once |
1da177e4 | 472 | * |
4c5023a3 | 473 | * The setup work we only want to run on the BSP. |
1da177e4 LT |
474 | * |
475 | * Warning: %esi is live across this function. | |
476 | */ | |
4c5023a3 PA |
477 | __INIT |
478 | setup_once: | |
479 | /* | |
480 | * Set up a idt with 256 entries pointing to ignore_int, | |
481 | * interrupt gates. It doesn't actually load idt - that needs | |
482 | * to be done on each CPU. Interrupts are enabled elsewhere, | |
483 | * when we can be relatively sure everything is ok. | |
484 | */ | |
1da177e4 | 485 | |
4c5023a3 PA |
486 | movl $idt_table,%edi |
487 | movl $early_idt_handlers,%eax | |
488 | movl $NUM_EXCEPTION_VECTORS,%ecx | |
489 | 1: | |
1da177e4 | 490 | movl %eax,(%edi) |
4c5023a3 PA |
491 | movl %eax,4(%edi) |
492 | /* interrupt gate, dpl=0, present */ | |
493 | movl $(0x8E000000 + __KERNEL_CS),2(%edi) | |
494 | addl $9,%eax | |
1da177e4 | 495 | addl $8,%edi |
4c5023a3 | 496 | loop 1b |
ec5c0926 | 497 | |
4c5023a3 PA |
498 | movl $256 - NUM_EXCEPTION_VECTORS,%ecx |
499 | movl $ignore_int,%edx | |
ec5c0926 | 500 | movl $(__KERNEL_CS << 16),%eax |
4c5023a3 | 501 | movw %dx,%ax /* selector = 0x0010 = cs */ |
ec5c0926 | 502 | movw $0x8E00,%dx /* interrupt gate - dpl=0, present */ |
4c5023a3 PA |
503 | 2: |
504 | movl %eax,(%edi) | |
505 | movl %edx,4(%edi) | |
506 | addl $8,%edi | |
507 | loop 2b | |
ec5c0926 | 508 | |
4c5023a3 PA |
509 | #ifdef CONFIG_CC_STACKPROTECTOR |
510 | /* | |
511 | * Configure the stack canary. The linker can't handle this by | |
512 | * relocation. Manually set base address in stack canary | |
513 | * segment descriptor. | |
514 | */ | |
515 | movl $gdt_page,%eax | |
516 | movl $stack_canary,%ecx | |
517 | movw %cx, 8 * GDT_ENTRY_STACK_CANARY + 2(%eax) | |
518 | shrl $16, %ecx | |
519 | movb %cl, 8 * GDT_ENTRY_STACK_CANARY + 4(%eax) | |
520 | movb %ch, 8 * GDT_ENTRY_STACK_CANARY + 7(%eax) | |
521 | #endif | |
ec5c0926 | 522 | |
4c5023a3 | 523 | andl $0,setup_once_ref /* Once is enough, thanks */ |
1da177e4 LT |
524 | ret |
525 | ||
4c5023a3 PA |
526 | ENTRY(early_idt_handlers) |
527 | # 36(%esp) %eflags | |
528 | # 32(%esp) %cs | |
529 | # 28(%esp) %eip | |
530 | # 24(%rsp) error code | |
531 | i = 0 | |
532 | .rept NUM_EXCEPTION_VECTORS | |
533 | .if (EXCEPTION_ERRCODE_MASK >> i) & 1 | |
534 | ASM_NOP2 | |
535 | .else | |
536 | pushl $0 # Dummy error code, to make stack frame uniform | |
537 | .endif | |
538 | pushl $i # 20(%esp) Vector number | |
539 | jmp early_idt_handler | |
540 | i = i + 1 | |
541 | .endr | |
542 | ENDPROC(early_idt_handlers) | |
543 | ||
544 | /* This is global to keep gas from relaxing the jumps */ | |
545 | ENTRY(early_idt_handler) | |
546 | cld | |
5fa10196 | 547 | |
b01d4e68 | 548 | cmpl $2,(%esp) # X86_TRAP_NMI |
5fa10196 PA |
549 | je is_nmi # Ignore NMI |
550 | ||
4c5023a3 PA |
551 | cmpl $2,%ss:early_recursion_flag |
552 | je hlt_loop | |
553 | incl %ss:early_recursion_flag | |
ec5c0926 | 554 | |
4c5023a3 PA |
555 | push %eax # 16(%esp) |
556 | push %ecx # 12(%esp) | |
557 | push %edx # 8(%esp) | |
558 | push %ds # 4(%esp) | |
559 | push %es # 0(%esp) | |
560 | movl $(__KERNEL_DS),%eax | |
561 | movl %eax,%ds | |
562 | movl %eax,%es | |
ec5c0926 | 563 | |
4c5023a3 PA |
564 | cmpl $(__KERNEL_CS),32(%esp) |
565 | jne 10f | |
ec5c0926 | 566 | |
4c5023a3 PA |
567 | leal 28(%esp),%eax # Pointer to %eip |
568 | call early_fixup_exception | |
569 | andl %eax,%eax | |
570 | jnz ex_entry /* found an exception entry */ | |
ec5c0926 | 571 | |
4c5023a3 | 572 | 10: |
ec5c0926 | 573 | #ifdef CONFIG_PRINTK |
4c5023a3 PA |
574 | xorl %eax,%eax |
575 | movw %ax,2(%esp) /* clean up the segment values on some cpus */ | |
576 | movw %ax,6(%esp) | |
577 | movw %ax,34(%esp) | |
578 | leal 40(%esp),%eax | |
579 | pushl %eax /* %esp before the exception */ | |
580 | pushl %ebx | |
581 | pushl %ebp | |
582 | pushl %esi | |
583 | pushl %edi | |
ec5c0926 CE |
584 | movl %cr2,%eax |
585 | pushl %eax | |
4c5023a3 | 586 | pushl (20+6*4)(%esp) /* trapno */ |
ec5c0926 | 587 | pushl $fault_msg |
ec5c0926 | 588 | call printk |
ec5c0926 | 589 | #endif |
94878efd | 590 | call dump_stack |
ec5c0926 CE |
591 | hlt_loop: |
592 | hlt | |
593 | jmp hlt_loop | |
594 | ||
4c5023a3 PA |
595 | ex_entry: |
596 | pop %es | |
597 | pop %ds | |
598 | pop %edx | |
599 | pop %ecx | |
600 | pop %eax | |
4c5023a3 | 601 | decl %ss:early_recursion_flag |
5fa10196 PA |
602 | is_nmi: |
603 | addl $8,%esp /* drop vector number and error code */ | |
4c5023a3 PA |
604 | iret |
605 | ENDPROC(early_idt_handler) | |
606 | ||
1da177e4 LT |
607 | /* This is the default interrupt "handler" :-) */ |
608 | ALIGN | |
609 | ignore_int: | |
610 | cld | |
d59745ce | 611 | #ifdef CONFIG_PRINTK |
1da177e4 LT |
612 | pushl %eax |
613 | pushl %ecx | |
614 | pushl %edx | |
615 | pushl %es | |
616 | pushl %ds | |
617 | movl $(__KERNEL_DS),%eax | |
618 | movl %eax,%ds | |
619 | movl %eax,%es | |
ec5c0926 CE |
620 | cmpl $2,early_recursion_flag |
621 | je hlt_loop | |
622 | incl early_recursion_flag | |
1da177e4 LT |
623 | pushl 16(%esp) |
624 | pushl 24(%esp) | |
625 | pushl 32(%esp) | |
626 | pushl 40(%esp) | |
627 | pushl $int_msg | |
628 | call printk | |
d5e397cb IM |
629 | |
630 | call dump_stack | |
631 | ||
1da177e4 LT |
632 | addl $(5*4),%esp |
633 | popl %ds | |
634 | popl %es | |
635 | popl %edx | |
636 | popl %ecx | |
637 | popl %eax | |
d59745ce | 638 | #endif |
1da177e4 | 639 | iret |
4c5023a3 PA |
640 | ENDPROC(ignore_int) |
641 | __INITDATA | |
642 | .align 4 | |
643 | early_recursion_flag: | |
644 | .long 0 | |
1da177e4 | 645 | |
4c5023a3 PA |
646 | __REFDATA |
647 | .align 4 | |
583323b9 TG |
648 | ENTRY(initial_code) |
649 | .long i386_start_kernel | |
4c5023a3 PA |
650 | ENTRY(setup_once_ref) |
651 | .long setup_once | |
583323b9 | 652 | |
1da177e4 LT |
653 | /* |
654 | * BSS section | |
655 | */ | |
02b7da37 | 656 | __PAGE_ALIGNED_BSS |
7bf04be8 | 657 | .align PAGE_SIZE |
551889a6 | 658 | #ifdef CONFIG_X86_PAE |
d50d8fe1 | 659 | initial_pg_pmd: |
551889a6 IC |
660 | .fill 1024*KPMDS,4,0 |
661 | #else | |
b40827fa | 662 | ENTRY(initial_page_table) |
1da177e4 | 663 | .fill 1024,4,0 |
551889a6 | 664 | #endif |
d50d8fe1 | 665 | initial_pg_fixmap: |
b1c931e3 | 666 | .fill 1024,4,0 |
1da177e4 LT |
667 | ENTRY(empty_zero_page) |
668 | .fill 4096,1,0 | |
b40827fa BP |
669 | ENTRY(swapper_pg_dir) |
670 | .fill 1024,4,0 | |
2bd2753f | 671 | |
1da177e4 LT |
672 | /* |
673 | * This starts the data section. | |
674 | */ | |
551889a6 | 675 | #ifdef CONFIG_X86_PAE |
abe1ee3a | 676 | __PAGE_ALIGNED_DATA |
551889a6 | 677 | /* Page-aligned for the benefit of paravirt? */ |
7bf04be8 | 678 | .align PAGE_SIZE |
b40827fa BP |
679 | ENTRY(initial_page_table) |
680 | .long pa(initial_pg_pmd+PGD_IDENT_ATTR),0 /* low identity map */ | |
551889a6 | 681 | # if KPMDS == 3 |
b40827fa BP |
682 | .long pa(initial_pg_pmd+PGD_IDENT_ATTR),0 |
683 | .long pa(initial_pg_pmd+PGD_IDENT_ATTR+0x1000),0 | |
684 | .long pa(initial_pg_pmd+PGD_IDENT_ATTR+0x2000),0 | |
551889a6 IC |
685 | # elif KPMDS == 2 |
686 | .long 0,0 | |
b40827fa BP |
687 | .long pa(initial_pg_pmd+PGD_IDENT_ATTR),0 |
688 | .long pa(initial_pg_pmd+PGD_IDENT_ATTR+0x1000),0 | |
551889a6 IC |
689 | # elif KPMDS == 1 |
690 | .long 0,0 | |
691 | .long 0,0 | |
b40827fa | 692 | .long pa(initial_pg_pmd+PGD_IDENT_ATTR),0 |
551889a6 IC |
693 | # else |
694 | # error "Kernel PMDs should be 1, 2 or 3" | |
695 | # endif | |
7bf04be8 | 696 | .align PAGE_SIZE /* needs to be page-sized too */ |
551889a6 IC |
697 | #endif |
698 | ||
1da177e4 | 699 | .data |
11d4c3f9 | 700 | .balign 4 |
1da177e4 LT |
701 | ENTRY(stack_start) |
702 | .long init_thread_union+THREAD_SIZE | |
1da177e4 | 703 | |
4c5023a3 | 704 | __INITRODATA |
1da177e4 | 705 | int_msg: |
d5e397cb | 706 | .asciz "Unknown interrupt or fault at: %p %p %p\n" |
1da177e4 | 707 | |
ec5c0926 | 708 | fault_msg: |
575ca735 VN |
709 | /* fault info: */ |
710 | .ascii "BUG: Int %d: CR2 %p\n" | |
4c5023a3 PA |
711 | /* regs pushed in early_idt_handler: */ |
712 | .ascii " EDI %p ESI %p EBP %p EBX %p\n" | |
713 | .ascii " ESP %p ES %p DS %p\n" | |
714 | .ascii " EDX %p ECX %p EAX %p\n" | |
575ca735 | 715 | /* fault frame: */ |
4c5023a3 | 716 | .ascii " vec %p err %p EIP %p CS %p flg %p\n" |
575ca735 VN |
717 | .ascii "Stack: %p %p %p %p %p %p %p %p\n" |
718 | .ascii " %p %p %p %p %p %p %p %p\n" | |
719 | .asciz " %p %p %p %p %p %p %p %p\n" | |
ec5c0926 | 720 | |
9702785a | 721 | #include "../../x86/xen/xen-head.S" |
5ead97c8 | 722 | |
1da177e4 LT |
723 | /* |
724 | * The IDT and GDT 'descriptors' are a strange 48-bit object | |
725 | * only used by the lidt and lgdt instructions. They are not | |
726 | * like usual segment descriptors - they consist of a 16-bit | |
727 | * segment size, and 32-bit linear address value: | |
728 | */ | |
729 | ||
4c5023a3 | 730 | .data |
1da177e4 LT |
731 | .globl boot_gdt_descr |
732 | .globl idt_descr | |
1da177e4 LT |
733 | |
734 | ALIGN | |
735 | # early boot GDT descriptor (must use 1:1 address mapping) | |
736 | .word 0 # 32 bit align gdt_desc.address | |
737 | boot_gdt_descr: | |
738 | .word __BOOT_DS+7 | |
52de74dd | 739 | .long boot_gdt - __PAGE_OFFSET |
1da177e4 LT |
740 | |
741 | .word 0 # 32-bit align idt_desc.address | |
742 | idt_descr: | |
743 | .word IDT_ENTRIES*8-1 # idt contains 256 entries | |
744 | .long idt_table | |
745 | ||
746 | # boot GDT descriptor (later on used by CPU#0): | |
747 | .word 0 # 32 bit align gdt_desc.address | |
2a57ff1a | 748 | ENTRY(early_gdt_descr) |
1da177e4 | 749 | .word GDT_ENTRIES*8-1 |
dd17c8f7 | 750 | .long gdt_page /* Overwritten for secondary CPUs */ |
1da177e4 | 751 | |
1da177e4 | 752 | /* |
52de74dd | 753 | * The boot_gdt must mirror the equivalent in setup.S and is |
1da177e4 LT |
754 | * used only for booting. |
755 | */ | |
756 | .align L1_CACHE_BYTES | |
52de74dd | 757 | ENTRY(boot_gdt) |
1da177e4 LT |
758 | .fill GDT_ENTRY_BOOT_CS,8,0 |
759 | .quad 0x00cf9a000000ffff /* kernel 4GB code at 0x00000000 */ | |
760 | .quad 0x00cf92000000ffff /* kernel 4GB data at 0x00000000 */ |