Merge branch 'x86-platform-for-linus' of git://git.kernel.org/pub/scm/linux/kernel...
[linux-2.6-block.git] / arch / x86 / kernel / head64.c
CommitLineData
b2441318 1// SPDX-License-Identifier: GPL-2.0
1da177e4 2/*
835c34a1 3 * prepare to run common code
1da177e4
LT
4 *
5 * Copyright (C) 2000 Andrea Arcangeli <andrea@suse.de> SuSE
1da177e4
LT
6 */
7
be3606ff 8#define DISABLE_BRANCH_PROFILING
1da177e4
LT
9#include <linux/init.h>
10#include <linux/linkage.h>
11#include <linux/types.h>
12#include <linux/kernel.h>
13#include <linux/string.h>
14#include <linux/percpu.h>
eaf76e8b 15#include <linux/start_kernel.h>
8b664aa6 16#include <linux/io.h>
72d7c3b3 17#include <linux/memblock.h>
5868f365 18#include <linux/mem_encrypt.h>
1da177e4
LT
19
20#include <asm/processor.h>
21#include <asm/proto.h>
22#include <asm/smp.h>
1da177e4
LT
23#include <asm/setup.h>
24#include <asm/desc.h>
f6c2e333 25#include <asm/pgtable.h>
cfd243d4 26#include <asm/tlbflush.h>
2bc0414e 27#include <asm/sections.h>
718fc13b 28#include <asm/kdebug.h>
66441bd3 29#include <asm/e820/api.h>
47a3d5da 30#include <asm/bios_ebda.h>
5dcd14ec 31#include <asm/bootparam_utils.h>
feddc9de 32#include <asm/microcode.h>
ef7f0d6a 33#include <asm/kasan.h>
1da177e4 34
39b95522
KS
35#ifdef CONFIG_X86_5LEVEL
36#undef pgtable_l5_enabled
37#define pgtable_l5_enabled __pgtable_l5_enabled
38#endif
39
8170e6be
PA
40/*
41 * Manage page tables very early on.
42 */
8170e6be 43extern pmd_t early_dynamic_pgts[EARLY_DYNAMIC_PAGE_TABLES][PTRS_PER_PMD];
c88d7150 44static unsigned int __initdata next_early_pgt;
5e427ec2 45pmdval_t early_pmd_flags = __PAGE_KERNEL_LARGE & ~(_PAGE_GLOBAL | _PAGE_NX);
8170e6be 46
e626e6bb 47#ifdef CONFIG_X86_5LEVEL
39b95522
KS
48unsigned int __pgtable_l5_enabled __ro_after_init;
49EXPORT_SYMBOL(__pgtable_l5_enabled);
b16e770b 50unsigned int pgdir_shift __ro_after_init = 39;
c65e774f 51EXPORT_SYMBOL(pgdir_shift);
b16e770b 52unsigned int ptrs_per_p4d __ro_after_init = 1;
c65e774f 53EXPORT_SYMBOL(ptrs_per_p4d);
e626e6bb
KS
54#endif
55
eedb92ab 56#ifdef CONFIG_DYNAMIC_MEMORY_LAYOUT
4fa5662b 57unsigned long page_offset_base __ro_after_init = __PAGE_OFFSET_BASE_L4;
eedb92ab 58EXPORT_SYMBOL(page_offset_base);
a7412546 59unsigned long vmalloc_base __ro_after_init = __VMALLOC_BASE_L4;
eedb92ab 60EXPORT_SYMBOL(vmalloc_base);
9b46a051 61unsigned long vmemmap_base __ro_after_init = __VMEMMAP_BASE_L4;
eedb92ab
KS
62EXPORT_SYMBOL(vmemmap_base);
63#endif
64
26179670
KS
65#define __head __section(.head.text)
66
67static void __head *fixup_pointer(void *ptr, unsigned long physaddr)
c88d7150
KS
68{
69 return ptr - (void *)_text + (void *)physaddr;
70}
71
4fa5662b
KS
72static unsigned long __head *fixup_long(void *ptr, unsigned long physaddr)
73{
74 return fixup_pointer(ptr, physaddr);
75}
76
4c2b4058
KS
77#ifdef CONFIG_X86_5LEVEL
78static unsigned int __head *fixup_int(void *ptr, unsigned long physaddr)
79{
80 return fixup_pointer(ptr, physaddr);
81}
82
6f9dd329 83static bool __head check_la57_support(unsigned long physaddr)
4c2b4058
KS
84{
85 if (native_cpuid_eax(0) < 7)
6f9dd329 86 return false;
4c2b4058
KS
87
88 if (!(native_cpuid_ecx(7) & (1 << (X86_FEATURE_LA57 & 31))))
6f9dd329 89 return false;
4c2b4058
KS
90
91 *fixup_int(&pgtable_l5_enabled, physaddr) = 1;
b16e770b
KS
92 *fixup_int(&pgdir_shift, physaddr) = 48;
93 *fixup_int(&ptrs_per_p4d, physaddr) = 512;
4fa5662b 94 *fixup_long(&page_offset_base, physaddr) = __PAGE_OFFSET_BASE_L5;
a7412546 95 *fixup_long(&vmalloc_base, physaddr) = __VMALLOC_BASE_L5;
9b46a051 96 *fixup_long(&vmemmap_base, physaddr) = __VMEMMAP_BASE_L5;
6f9dd329
KS
97
98 return true;
4c2b4058
KS
99}
100#else
6f9dd329
KS
101static bool __head check_la57_support(unsigned long physaddr)
102{
103 return false;
104}
4c2b4058
KS
105#endif
106
aca20d54
TL
107unsigned long __head __startup_64(unsigned long physaddr,
108 struct boot_params *bp)
c88d7150 109{
6f9dd329 110 unsigned long load_delta, *p;
5868f365 111 unsigned long pgtable_flags;
c88d7150 112 pgdval_t *pgd;
032370b9 113 p4dval_t *p4d;
c88d7150
KS
114 pudval_t *pud;
115 pmdval_t *pmd, pmd_entry;
6f9dd329 116 bool la57;
c88d7150 117 int i;
187e91fe 118 unsigned int *next_pgt_ptr;
c88d7150 119
6f9dd329 120 la57 = check_la57_support(physaddr);
4c2b4058 121
c88d7150
KS
122 /* Is the address too large? */
123 if (physaddr >> MAX_PHYSMEM_BITS)
124 for (;;);
125
126 /*
127 * Compute the delta between the address I am compiled to run at
128 * and the address I am actually running at.
129 */
130 load_delta = physaddr - (unsigned long)(_text - __START_KERNEL_map);
131
132 /* Is the address not 2M aligned? */
133 if (load_delta & ~PMD_PAGE_MASK)
134 for (;;);
135
5868f365 136 /* Activate Secure Memory Encryption (SME) if supported and enabled */
aca20d54 137 sme_enable(bp);
5868f365
TL
138
139 /* Include the SME encryption mask in the fixup value */
140 load_delta += sme_get_me_mask();
141
c88d7150
KS
142 /* Fixup the physical addresses in the page table */
143
65ade2f8 144 pgd = fixup_pointer(&early_top_pgt, physaddr);
6f9dd329
KS
145 p = pgd + pgd_index(__START_KERNEL_map);
146 if (la57)
147 *p = (unsigned long)level4_kernel_pgt;
148 else
149 *p = (unsigned long)level3_kernel_pgt;
150 *p += _PAGE_TABLE_NOENC - __START_KERNEL_map + load_delta;
151
152 if (la57) {
032370b9
KS
153 p4d = fixup_pointer(&level4_kernel_pgt, physaddr);
154 p4d[511] += load_delta;
155 }
156
c88d7150
KS
157 pud = fixup_pointer(&level3_kernel_pgt, physaddr);
158 pud[510] += load_delta;
159 pud[511] += load_delta;
160
161 pmd = fixup_pointer(level2_fixmap_pgt, physaddr);
162 pmd[506] += load_delta;
163
164 /*
165 * Set up the identity mapping for the switchover. These
166 * entries should *NOT* have the global bit set! This also
167 * creates a bunch of nonsense entries but that is fine --
168 * it avoids problems around wraparound.
169 */
170
187e91fe
AP
171 next_pgt_ptr = fixup_pointer(&next_early_pgt, physaddr);
172 pud = fixup_pointer(early_dynamic_pgts[(*next_pgt_ptr)++], physaddr);
173 pmd = fixup_pointer(early_dynamic_pgts[(*next_pgt_ptr)++], physaddr);
c88d7150 174
21729f81 175 pgtable_flags = _KERNPG_TABLE_NOENC + sme_get_me_mask();
c88d7150 176
6f9dd329 177 if (la57) {
032370b9
KS
178 p4d = fixup_pointer(early_dynamic_pgts[next_early_pgt++], physaddr);
179
180 i = (physaddr >> PGDIR_SHIFT) % PTRS_PER_PGD;
5868f365
TL
181 pgd[i + 0] = (pgdval_t)p4d + pgtable_flags;
182 pgd[i + 1] = (pgdval_t)p4d + pgtable_flags;
032370b9
KS
183
184 i = (physaddr >> P4D_SHIFT) % PTRS_PER_P4D;
5868f365
TL
185 p4d[i + 0] = (pgdval_t)pud + pgtable_flags;
186 p4d[i + 1] = (pgdval_t)pud + pgtable_flags;
032370b9
KS
187 } else {
188 i = (physaddr >> PGDIR_SHIFT) % PTRS_PER_PGD;
5868f365
TL
189 pgd[i + 0] = (pgdval_t)pud + pgtable_flags;
190 pgd[i + 1] = (pgdval_t)pud + pgtable_flags;
032370b9 191 }
c88d7150
KS
192
193 i = (physaddr >> PUD_SHIFT) % PTRS_PER_PUD;
5868f365
TL
194 pud[i + 0] = (pudval_t)pmd + pgtable_flags;
195 pud[i + 1] = (pudval_t)pmd + pgtable_flags;
c88d7150
KS
196
197 pmd_entry = __PAGE_KERNEL_LARGE_EXEC & ~_PAGE_GLOBAL;
5868f365 198 pmd_entry += sme_get_me_mask();
c88d7150
KS
199 pmd_entry += physaddr;
200
201 for (i = 0; i < DIV_ROUND_UP(_end - _text, PMD_SIZE); i++) {
202 int idx = i + (physaddr >> PMD_SHIFT) % PTRS_PER_PMD;
203 pmd[idx] = pmd_entry + i * PMD_SIZE;
204 }
205
206 /*
207 * Fixup the kernel text+data virtual addresses. Note that
208 * we might write invalid pmds, when the kernel is relocated
209 * cleanup_highmap() fixes this up along with the mappings
210 * beyond _end.
211 */
212
213 pmd = fixup_pointer(level2_kernel_pgt, physaddr);
214 for (i = 0; i < PTRS_PER_PMD; i++) {
215 if (pmd[i] & _PAGE_PRESENT)
216 pmd[i] += load_delta;
217 }
218
5868f365
TL
219 /*
220 * Fixup phys_base - remove the memory encryption mask to obtain
221 * the true physical address.
222 */
4fa5662b 223 *fixup_long(&phys_base, physaddr) += load_delta - sme_get_me_mask();
5868f365 224
107cd253
TL
225 /* Encrypt the kernel and related (if SME is active) */
226 sme_encrypt_kernel(bp);
5868f365
TL
227
228 /*
229 * Return the SME encryption mask (if SME is active) to be used as a
230 * modifier for the initial pgdir entry programmed into CR3.
231 */
232 return sme_get_me_mask();
233}
234
235unsigned long __startup_secondary_64(void)
236{
237 /*
238 * Return the SME encryption mask (if SME is active) to be used as a
239 * modifier for the initial pgdir entry programmed into CR3.
240 */
241 return sme_get_me_mask();
c88d7150
KS
242}
243
8170e6be
PA
244/* Wipe all early page tables except for the kernel symbol map */
245static void __init reset_early_page_tables(void)
cfd243d4 246{
65ade2f8 247 memset(early_top_pgt, 0, sizeof(pgd_t)*(PTRS_PER_PGD-1));
8170e6be 248 next_early_pgt = 0;
21729f81 249 write_cr3(__sme_pa_nodebug(early_top_pgt));
8170e6be
PA
250}
251
252/* Create a new PMD entry */
b9d05200 253int __init __early_make_pgtable(unsigned long address, pmdval_t pmd)
8170e6be
PA
254{
255 unsigned long physaddr = address - __PAGE_OFFSET;
8170e6be 256 pgdval_t pgd, *pgd_p;
032370b9 257 p4dval_t p4d, *p4d_p;
6b9c75ac 258 pudval_t pud, *pud_p;
b9d05200 259 pmdval_t *pmd_p;
8170e6be
PA
260
261 /* Invalid address or early pgt is done ? */
65ade2f8 262 if (physaddr >= MAXMEM || read_cr3_pa() != __pa_nodebug(early_top_pgt))
8170e6be
PA
263 return -1;
264
6b9c75ac 265again:
65ade2f8 266 pgd_p = &early_top_pgt[pgd_index(address)].pgd;
8170e6be
PA
267 pgd = *pgd_p;
268
269 /*
270 * The use of __START_KERNEL_map rather than __PAGE_OFFSET here is
271 * critical -- __PAGE_OFFSET would point us back into the dynamic
272 * range and we might end up looping forever...
273 */
6f9dd329 274 if (!pgtable_l5_enabled)
032370b9
KS
275 p4d_p = pgd_p;
276 else if (pgd)
277 p4d_p = (p4dval_t *)((pgd & PTE_PFN_MASK) + __START_KERNEL_map - phys_base);
278 else {
279 if (next_early_pgt >= EARLY_DYNAMIC_PAGE_TABLES) {
280 reset_early_page_tables();
281 goto again;
282 }
283
284 p4d_p = (p4dval_t *)early_dynamic_pgts[next_early_pgt++];
285 memset(p4d_p, 0, sizeof(*p4d_p) * PTRS_PER_P4D);
286 *pgd_p = (pgdval_t)p4d_p - __START_KERNEL_map + phys_base + _KERNPG_TABLE;
287 }
288 p4d_p += p4d_index(address);
289 p4d = *p4d_p;
290
291 if (p4d)
292 pud_p = (pudval_t *)((p4d & PTE_PFN_MASK) + __START_KERNEL_map - phys_base);
6b9c75ac
YL
293 else {
294 if (next_early_pgt >= EARLY_DYNAMIC_PAGE_TABLES) {
8170e6be 295 reset_early_page_tables();
6b9c75ac
YL
296 goto again;
297 }
8170e6be
PA
298
299 pud_p = (pudval_t *)early_dynamic_pgts[next_early_pgt++];
a91bbe01 300 memset(pud_p, 0, sizeof(*pud_p) * PTRS_PER_PUD);
032370b9 301 *p4d_p = (p4dval_t)pud_p - __START_KERNEL_map + phys_base + _KERNPG_TABLE;
8170e6be 302 }
6b9c75ac
YL
303 pud_p += pud_index(address);
304 pud = *pud_p;
8170e6be 305
6b9c75ac
YL
306 if (pud)
307 pmd_p = (pmdval_t *)((pud & PTE_PFN_MASK) + __START_KERNEL_map - phys_base);
308 else {
309 if (next_early_pgt >= EARLY_DYNAMIC_PAGE_TABLES) {
310 reset_early_page_tables();
311 goto again;
312 }
313
314 pmd_p = (pmdval_t *)early_dynamic_pgts[next_early_pgt++];
a91bbe01 315 memset(pmd_p, 0, sizeof(*pmd_p) * PTRS_PER_PMD);
6b9c75ac
YL
316 *pud_p = (pudval_t)pmd_p - __START_KERNEL_map + phys_base + _KERNPG_TABLE;
317 }
6b9c75ac 318 pmd_p[pmd_index(address)] = pmd;
8170e6be
PA
319
320 return 0;
cfd243d4
VG
321}
322
b9d05200
TL
323int __init early_make_pgtable(unsigned long address)
324{
325 unsigned long physaddr = address - __PAGE_OFFSET;
326 pmdval_t pmd;
327
328 pmd = (physaddr & PMD_MASK) + early_pmd_flags;
329
330 return __early_make_pgtable(address, pmd);
331}
332
1da177e4
LT
333/* Don't add a printk in there. printk relies on the PDA which is not initialized
334 yet. */
335static void __init clear_bss(void)
336{
1da177e4 337 memset(__bss_start, 0,
2bc0414e 338 (unsigned long) __bss_stop - (unsigned long) __bss_start);
1da177e4
LT
339}
340
f1da834c
YL
341static unsigned long get_cmd_line_ptr(void)
342{
343 unsigned long cmd_line_ptr = boot_params.hdr.cmd_line_ptr;
344
ee92d815
YL
345 cmd_line_ptr |= (u64)boot_params.ext_cmd_line_ptr << 32;
346
f1da834c
YL
347 return cmd_line_ptr;
348}
349
1da177e4
LT
350static void __init copy_bootdata(char *real_mode_data)
351{
1da177e4 352 char * command_line;
f1da834c 353 unsigned long cmd_line_ptr;
1da177e4 354
b9d05200
TL
355 /*
356 * If SME is active, this will create decrypted mappings of the
357 * boot data in advance of the copy operations.
358 */
359 sme_map_bootdata(real_mode_data);
360
30c82645 361 memcpy(&boot_params, real_mode_data, sizeof boot_params);
5dcd14ec 362 sanitize_boot_params(&boot_params);
f1da834c
YL
363 cmd_line_ptr = get_cmd_line_ptr();
364 if (cmd_line_ptr) {
365 command_line = __va(cmd_line_ptr);
30c82645 366 memcpy(boot_command_line, command_line, COMMAND_LINE_SIZE);
1da177e4 367 }
b9d05200
TL
368
369 /*
370 * The old boot data is no longer needed and won't be reserved,
371 * freeing up that memory for use by the system. If SME is active,
372 * we need to remove the mappings that were created so that the
373 * memory doesn't remain mapped as decrypted.
374 */
375 sme_unmap_bootdata(real_mode_data);
1da177e4
LT
376}
377
2605fc21 378asmlinkage __visible void __init x86_64_start_kernel(char * real_mode_data)
1da177e4 379{
b4e0409a
IM
380 /*
381 * Build-time sanity checks on the kernel image and module
382 * area mappings. (these are purely build-time and produce no code)
383 */
8e3c2a8c
BP
384 BUILD_BUG_ON(MODULES_VADDR < __START_KERNEL_map);
385 BUILD_BUG_ON(MODULES_VADDR - __START_KERNEL_map < KERNEL_IMAGE_SIZE);
b4e0409a 386 BUILD_BUG_ON(MODULES_LEN + KERNEL_IMAGE_SIZE > 2*PUD_SIZE);
8e3c2a8c 387 BUILD_BUG_ON((__START_KERNEL_map & ~PMD_MASK) != 0);
b4e0409a
IM
388 BUILD_BUG_ON((MODULES_VADDR & ~PMD_MASK) != 0);
389 BUILD_BUG_ON(!(MODULES_VADDR > __START_KERNEL));
c65e774f 390 MAYBE_BUILD_BUG_ON(!(((MODULES_END - 1) & PGDIR_MASK) ==
b4e0409a 391 (__START_KERNEL & PGDIR_MASK)));
66d4bdf2 392 BUILD_BUG_ON(__fix_to_virt(__end_of_fixed_addresses) <= MODULES_END);
b4e0409a 393
1e02ce4c
AL
394 cr4_init_shadow();
395
8170e6be
PA
396 /* Kill off the identity-map trampoline */
397 reset_early_page_tables();
398
3df0af0e
YL
399 clear_bss();
400
65ade2f8 401 clear_page(init_top_pgt);
d0f77d4d 402
21729f81
TL
403 /*
404 * SME support may update early_pmd_flags to include the memory
405 * encryption mask, so it needs to be called before anything
406 * that may generate a page fault.
407 */
408 sme_early_init();
409
5d5aa3cf
AP
410 kasan_early_init();
411
588787fd 412 idt_setup_early_handler();
f6c2e333 413
fa2bbce9
YL
414 copy_bootdata(__va(real_mode_data));
415
feddc9de
FY
416 /*
417 * Load microcode early on BSP.
418 */
419 load_ucode_bsp();
420
65ade2f8
KS
421 /* set init_top_pgt kernel high mapping*/
422 init_top_pgt[511] = early_top_pgt[511];
8170e6be 423
f97013fd
JF
424 x86_64_start_reservations(real_mode_data);
425}
426
427void __init x86_64_start_reservations(char *real_mode_data)
428{
fa2bbce9
YL
429 /* version is always not zero if it is copied */
430 if (!boot_params.hdr.version)
431 copy_bootdata(__va(real_mode_data));
9de819fe 432
8d152e7a 433 x86_early_init_platform_quirks();
75175278 434
3fda5bb4
AS
435 switch (boot_params.hdr.hardware_subarch) {
436 case X86_SUBARCH_INTEL_MID:
437 x86_intel_mid_early_setup();
438 break;
439 default:
440 break;
441 }
442
1da177e4
LT
443 start_kernel();
444}